mirror of https://github.com/efabless/caravel.git
159 lines
7.1 KiB
Plaintext
159 lines
7.1 KiB
Plaintext
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===========================================================================
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report_parasitic_annotation -report_unannotated
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============================================================================
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Found 0 unannotated nets.
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Found 0 partially unannotated nets.
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parastic_annotation_check
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check_slew
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===========================================================================
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report_check_types -max_slew -max_cap -max_fanout -violators
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============================================================================
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max slew
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Pin Limit Slew Slack
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------------------------------------------------------------
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clkbuf_0_pll_clk/A 0.75 5.00 -4.25 (VIOLATED)
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ANTENNA_clkbuf_0_pll_clk_A/DIODE 0.75 5.00 -4.25 (VIOLATED)
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clkbuf_0_pll_clk90/A 0.75 5.00 -4.25 (VIOLATED)
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ANTENNA_clkbuf_0_pll_clk90_A/DIODE 0.75 5.00 -4.25 (VIOLATED)
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clkbuf_0_ext_clk/A 0.75 5.00 -4.25 (VIOLATED)
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input6/A 0.75 5.00 -4.25 (VIOLATED)
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input8/A 0.75 5.00 -4.25 (VIOLATED)
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ANTENNA_input10_A/DIODE 0.75 5.00 -4.25 (VIOLATED)
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ANTENNA_input8_A/DIODE 0.75 5.00 -4.25 (VIOLATED)
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input10/A 0.75 5.00 -4.25 (VIOLATED)
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ANTENNA_input6_A/DIODE 0.75 5.00 -4.25 (VIOLATED)
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ANTENNA_clkbuf_0_ext_clk_A/DIODE 0.75 5.00 -4.25 (VIOLATED)
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input2/A 0.75 5.00 -4.25 (VIOLATED)
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input7/A 0.75 5.00 -4.25 (VIOLATED)
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input9/A 0.75 5.00 -4.25 (VIOLATED)
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ANTENNA_input7_A/DIODE 0.75 5.00 -4.25 (VIOLATED)
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ANTENNA_input9_A/DIODE 0.75 5.00 -4.25 (VIOLATED)
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input1/A 0.75 5.00 -4.25 (VIOLATED)
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input3/A 0.75 5.00 -4.25 (VIOLATED)
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input4/A 0.75 5.00 -4.25 (VIOLATED)
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input5/A 0.75 5.00 -4.25 (VIOLATED)
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ANTENNA_input4_A/DIODE 0.75 5.00 -4.25 (VIOLATED)
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ANTENNA_input1_A/DIODE 0.75 5.00 -4.25 (VIOLATED)
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ANTENNA_input5_A/DIODE 0.75 5.00 -4.25 (VIOLATED)
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ANTENNA_input3_A/DIODE 0.75 5.00 -4.25 (VIOLATED)
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ANTENNA_input2_A/DIODE 0.75 5.00 -4.25 (VIOLATED)
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ext_clk 0.75 5.00 -4.25 (VIOLATED)
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ext_clk_sel 0.75 5.00 -4.25 (VIOLATED)
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ext_reset 0.75 5.00 -4.25 (VIOLATED)
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pll_clk 0.75 5.00 -4.25 (VIOLATED)
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pll_clk90 0.75 5.00 -4.25 (VIOLATED)
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porb 0.75 5.00 -4.25 (VIOLATED)
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resetb 0.75 5.00 -4.25 (VIOLATED)
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sel2[0] 0.75 5.00 -4.25 (VIOLATED)
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sel2[1] 0.75 5.00 -4.25 (VIOLATED)
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sel2[2] 0.75 5.00 -4.25 (VIOLATED)
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sel[0] 0.75 5.00 -4.25 (VIOLATED)
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sel[1] 0.75 5.00 -4.25 (VIOLATED)
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sel[2] 0.75 5.00 -4.25 (VIOLATED)
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max fanout
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Pin Limit Fanout Slack
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---------------------------------------------------------
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fanout14/X 12 24 -12 (VIOLATED)
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fanout15/X 12 24 -12 (VIOLATED)
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fanout16/X 12 24 -12 (VIOLATED)
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fanout19/X 12 24 -12 (VIOLATED)
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fanout28/X 12 24 -12 (VIOLATED)
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clkbuf_1_1__f_pll_clk/X 12 14 -2 (VIOLATED)
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===========================================================================
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max slew violation count 39
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max fanout violation count 6
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max cap violation count 0
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============================================================================
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check_slew_end
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tns_report
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===========================================================================
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report_tns
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============================================================================
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tns 0.00
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tns_report_end
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wns_report
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===========================================================================
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report_wns
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============================================================================
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wns 0.00
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wns_report_end
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worst_slack
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===========================================================================
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report_worst_slack -max (Setup)
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============================================================================
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worst slack 1.23
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===========================================================================
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report_worst_slack -min (Hold)
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============================================================================
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worst slack 0.28
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worst_slack_end
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clock_skew
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===========================================================================
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report_clock_skew
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============================================================================
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Clock core_clk
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No launch/capture paths found.
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Clock ext_clk
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Latency CRPR Skew
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_416_/CLK ^
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3.19
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_415_/CLK ^
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2.76 -0.27 0.15
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Clock pll_clk
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Latency CRPR Skew
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_443_/CLK ^
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3.20
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_422_/CLK ^
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0.77 -0.06 2.37
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Clock pll_clk90
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Latency CRPR Skew
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_469_/CLK ^
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3.15
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_459_/CLK ^
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0.75 -0.06 2.34
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clock_skew_end
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power_report
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===========================================================================
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report_power
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============================================================================
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Group Internal Switching Leakage Total
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Power Power Power Power (Watts)
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----------------------------------------------------------------
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Sequential 3.77e-04 3.74e-05 6.04e-10 4.15e-04 27.7%
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Combinational 5.95e-04 4.86e-04 2.22e-09 1.08e-03 72.3%
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Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%
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Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%
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----------------------------------------------------------------
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Total 9.72e-04 5.24e-04 2.82e-09 1.50e-03 100.0%
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65.0% 35.0% 0.0%
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power_report_end
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area_report
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===========================================================================
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report_design_area
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============================================================================
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Design area 4357 u^2 52% utilization.
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area_report_end
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Setting global connections for newly added cells...
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[WARNING] Did not save OpenROAD database!
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Writing SDF to /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/caravel_clocking/runs/23_02_27_06_16/results/routing/mca/process_corner_nom/caravel_clocking.sdf...
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Writing timing model to /home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/caravel_clocking/runs/23_02_27_06_16/results/routing/mca/process_corner_nom/caravel_clocking.lib...
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