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caravel/xschem/simple_por_tb.spice

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Fix the simple_por to (logically) isolate the 1.8V and 3.3V grounds. (#90) * Fix the simple_por to (logically) isolate the 1.8V and 3.3V grounds. This commit does the following: (1) Corrects the xschem simple_por schematic to separate the 1.8V and 3.3V grounds. (2) Corrects the xschem simple_por symbol to separate the 1.8V and 3.3V grounds. (3) Corrects the xschem testbench to connect to both grounds of simple_por. (4) Corrects the simple_por layout to remove the 1.8V logic from the 3.3V ground and connect it instead to the 1.8V ground. (5) Extends the top-level power routing of caravel and caravan to make a better connection to the simple_por 1.8V ground. (6) Adds an LVS script to properly check the simple_por layout against the xschem-generated schematic netlist. NOTE: None of these modifications change the function of any circuit. The 1.8V and 3.3V ground nets are only logically separated in the netlists but share the substrate. This fix cleanly defines the 1.8V and 3.3V grounds within the simple_por, where they were previously mingled. It also ensures that the full LVS for caravel and caravan can now include the simple_por at the transistor level and still pass. * Updated the GDS of simple_por (previously did not remove GDS_FILE from the .mag file and so it just overwrote the original GDS file with itself). * Corrected a route to simple_por in the top level of both caravel and caravan that was shorting to the extra metals put on top of the substrate contact across the top (bottom, in the top level) of the simple_por layout.
2022-05-09 00:51:29 -05:00
**.subckt simple_por_tb vdd3v3 vdd1v8 porb_h porb_l por_l
*.opin vdd3v3
*.opin vdd1v8
*.opin porb_h
*.opin porb_l
*.opin por_l
x1 vdd3v3 vdd1v8 porb_h porb_l por_l GND GND simple_por
V1 vdd3v3 GND PWL(0.0 0 100u 0 5m 3.3)
V2 vdd1v8 GND PWL(0.0 0 300u 0 5.3m 1.8)
**** begin user architecture code
.lib /usr/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice tt
.include /usr/share/pdk/sky130A/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice
Added the files for the simple_por block design, and placed the latest hardened macro components into the caravel and caravan layouts.
2021-11-15 09:34:52 -06:00
.control
Fix the simple_por to (logically) isolate the 1.8V and 3.3V grounds. (#90) * Fix the simple_por to (logically) isolate the 1.8V and 3.3V grounds. This commit does the following: (1) Corrects the xschem simple_por schematic to separate the 1.8V and 3.3V grounds. (2) Corrects the xschem simple_por symbol to separate the 1.8V and 3.3V grounds. (3) Corrects the xschem testbench to connect to both grounds of simple_por. (4) Corrects the simple_por layout to remove the 1.8V logic from the 3.3V ground and connect it instead to the 1.8V ground. (5) Extends the top-level power routing of caravel and caravan to make a better connection to the simple_por 1.8V ground. (6) Adds an LVS script to properly check the simple_por layout against the xschem-generated schematic netlist. NOTE: None of these modifications change the function of any circuit. The 1.8V and 3.3V ground nets are only logically separated in the netlists but share the substrate. This fix cleanly defines the 1.8V and 3.3V grounds within the simple_por, where they were previously mingled. It also ensures that the full LVS for caravel and caravan can now include the simple_por at the transistor level and still pass. * Updated the GDS of simple_por (previously did not remove GDS_FILE from the .mag file and so it just overwrote the original GDS file with itself). * Corrected a route to simple_por in the top level of both caravel and caravan that was shorting to the extra metals put on top of the substrate contact across the top (bottom, in the top level) of the simple_por layout.
2022-05-09 00:51:29 -05:00
tran 1u 20m
plot V(vdd3v3) V(vdd1v8) V(porb_h) V(porb_l) V(por_l)
Added the files for the simple_por block design, and placed the latest hardened macro components into the caravel and caravan layouts.
2021-11-15 09:34:52 -06:00
.endc
Fix the simple_por to (logically) isolate the 1.8V and 3.3V grounds. (#90) * Fix the simple_por to (logically) isolate the 1.8V and 3.3V grounds. This commit does the following: (1) Corrects the xschem simple_por schematic to separate the 1.8V and 3.3V grounds. (2) Corrects the xschem simple_por symbol to separate the 1.8V and 3.3V grounds. (3) Corrects the xschem testbench to connect to both grounds of simple_por. (4) Corrects the simple_por layout to remove the 1.8V logic from the 3.3V ground and connect it instead to the 1.8V ground. (5) Extends the top-level power routing of caravel and caravan to make a better connection to the simple_por 1.8V ground. (6) Adds an LVS script to properly check the simple_por layout against the xschem-generated schematic netlist. NOTE: None of these modifications change the function of any circuit. The 1.8V and 3.3V ground nets are only logically separated in the netlists but share the substrate. This fix cleanly defines the 1.8V and 3.3V grounds within the simple_por, where they were previously mingled. It also ensures that the full LVS for caravel and caravan can now include the simple_por at the transistor level and still pass. * Updated the GDS of simple_por (previously did not remove GDS_FILE from the .mag file and so it just overwrote the original GDS file with itself). * Corrected a route to simple_por in the top level of both caravel and caravan that was shorting to the extra metals put on top of the substrate contact across the top (bottom, in the top level) of the simple_por layout.
2022-05-09 00:51:29 -05:00
**** end user architecture code
**.ends
Added the files for the simple_por block design, and placed the latest hardened macro components into the caravel and caravan layouts.
2021-11-15 09:34:52 -06:00
Fix the simple_por to (logically) isolate the 1.8V and 3.3V grounds. (#90) * Fix the simple_por to (logically) isolate the 1.8V and 3.3V grounds. This commit does the following: (1) Corrects the xschem simple_por schematic to separate the 1.8V and 3.3V grounds. (2) Corrects the xschem simple_por symbol to separate the 1.8V and 3.3V grounds. (3) Corrects the xschem testbench to connect to both grounds of simple_por. (4) Corrects the simple_por layout to remove the 1.8V logic from the 3.3V ground and connect it instead to the 1.8V ground. (5) Extends the top-level power routing of caravel and caravan to make a better connection to the simple_por 1.8V ground. (6) Adds an LVS script to properly check the simple_por layout against the xschem-generated schematic netlist. NOTE: None of these modifications change the function of any circuit. The 1.8V and 3.3V ground nets are only logically separated in the netlists but share the substrate. This fix cleanly defines the 1.8V and 3.3V grounds within the simple_por, where they were previously mingled. It also ensures that the full LVS for caravel and caravan can now include the simple_por at the transistor level and still pass. * Updated the GDS of simple_por (previously did not remove GDS_FILE from the .mag file and so it just overwrote the original GDS file with itself). * Corrected a route to simple_por in the top level of both caravel and caravan that was shorting to the extra metals put on top of the substrate contact across the top (bottom, in the top level) of the simple_por layout.
2022-05-09 00:51:29 -05:00
* expanding symbol: simple_por.sym # of pins=7
* sym_path: /home/tim/gits/caravel/xschem/simple_por.sym
* sch_path: /home/tim/gits/caravel/xschem/simple_por.sch
.subckt simple_por vdd3v3 vdd1v8 porb_h porb_l por_l vss3v3 vss1v8
*.iopin vdd3v3
*.iopin vss3v3
*.opin porb_h
*.opin porb_l
*.opin por_l
*.iopin vdd1v8
*.iopin vss1v8
XC1 net9 vss3v3 sky130_fd_pr__cap_mim_m3_1 W=30 L=30 MF=1 m=1
XC2 vss3v3 net9 sky130_fd_pr__cap_mim_m3_2 W=30 L=30 MF=1 m=1
XM1 net3 net7 net5 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
XM2 net2 net3 vss3v3 vss3v3 sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
XR1 net4 vdd3v3 vss3v3 sky130_fd_pr__res_xhigh_po_0p69 L=500 mult=1 m=1
XM4 net5 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
XM5 net3 net3 vss3v3 vss3v3 sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29'
+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
XR2 vss3v3 net4 vss3v3 sky130_fd_pr__res_xhigh_po_0p69 L=150 mult=1 m=1
XM7 net2 net2 net1 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
XM8 net1 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29'
+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
XM10 net7 net4 vss3v3 vss3v3 sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
XM9 net7 net7 net6 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
XM11 net6 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=16 nf=8 ad='int((nf+1)/2) * W/nf * 0.29'
+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
XM12 net8 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
XM13 net9 net2 net8 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
XR3 vss3v3 vss3v3 vss3v3 sky130_fd_pr__res_xhigh_po_0p69 L=25 mult=2 m=2
x2 net10 vss3v3 vss3v3 vdd3v3 vdd3v3 porb_h sky130_fd_sc_hvl__buf_8
x3 net10 vss1v8 vss1v8 vdd1v8 vdd1v8 porb_l sky130_fd_sc_hvl__buf_8
x4 net10 vss1v8 vss1v8 vdd1v8 vdd1v8 por_l sky130_fd_sc_hvl__inv_8
x5 net9 vss3v3 vss3v3 vdd3v3 vdd3v3 net10 sky130_fd_sc_hvl__schmittbuf_1
.ends
.GLOBAL GND
** flattened .save nodes
.end