mirror of https://github.com/efabless/caravel.git
201 lines
16 KiB
Plaintext
201 lines
16 KiB
Plaintext
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****************************************
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Report : analysis_coverage
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-status_details {untested}
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-sort_by slack
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Design : caravel_clocking
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Version: T-2022.03-SP3
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Date : Tue Oct 18 15:37:53 2022
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****************************************
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Type of Check Total Met Violated Untested
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--------------------------------------------------------------------------------
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setup 59 39 ( 66%) 12 ( 20%) 8 ( 14%)
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hold 59 51 ( 86%) 0 ( 0%) 8 ( 14%)
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recovery 53 0 ( 0%) 0 ( 0%) 53 (100%)
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removal 53 0 ( 0%) 0 ( 0%) 53 (100%)
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min_pulse_width 170 120 ( 71%) 0 ( 0%) 50 ( 29%)
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clock_gating_setup 8 8 (100%) 0 ( 0%) 0 ( 0%)
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clock_gating_hold 8 2 ( 25%) 6 ( 75%) 0 ( 0%)
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out_setup 1 1 (100%) 0 ( 0%) 0 ( 0%)
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out_hold 1 1 (100%) 0 ( 0%) 0 ( 0%)
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--------------------------------------------------------------------------------
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All Checks 412 222 ( 54%) 18 ( 4%) 172 ( 42%)
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Constrained Related Check
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Pin Pin Clock Type Slack Reason
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--------------------------------------------------------------------------------
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_437_/RESET_B(low) - - min_pulse_width untested no_clock
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_437_/RESET_B(rise) CLK(rise) pll_clk recovery untested no_startpoint_clock
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_437_/RESET_B(rise) CLK(rise) pll_clk removal untested no_startpoint_clock
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_438_/SET_B(low) - - min_pulse_width untested no_clock
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_438_/SET_B(rise) CLK(rise) pll_clk recovery untested no_startpoint_clock
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_438_/SET_B(rise) CLK(rise) pll_clk removal untested no_startpoint_clock
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_439_/RESET_B(low) - - min_pulse_width untested no_clock
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_439_/RESET_B(rise) CLK(rise) pll_clk recovery untested no_startpoint_clock
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_439_/RESET_B(rise) CLK(rise) pll_clk removal untested no_startpoint_clock
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_436_/D CLK(rise) - hold untested constant_disabled
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_436_/D CLK(rise) - setup untested constant_disabled
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_436_/RESET_B(low) - - min_pulse_width untested constant_disabled
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_436_/RESET_B(rise) CLK(rise) - recovery untested constant_disabled
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_436_/RESET_B(rise) CLK(rise) - removal untested constant_disabled
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_415_/RESET_B(low) - - min_pulse_width untested no_clock
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_415_/RESET_B(rise) CLK(rise) pll_clk recovery untested no_startpoint_clock
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_415_/RESET_B(rise) CLK(rise) pll_clk removal untested no_startpoint_clock
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_434_/D CLK(rise) - hold untested constant_disabled
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_434_/D CLK(rise) - setup untested constant_disabled
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_434_/RESET_B(low) - - min_pulse_width untested constant_disabled
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_434_/RESET_B(rise) CLK(rise) - recovery untested constant_disabled
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_434_/RESET_B(rise) CLK(rise) - removal untested constant_disabled
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_413_/RESET_B(low) - - min_pulse_width untested no_clock
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_413_/RESET_B(rise) CLK(rise) pll_clk recovery untested no_startpoint_clock
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_413_/RESET_B(rise) CLK(rise) pll_clk removal untested no_startpoint_clock
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_459_/RESET_B(low) - - min_pulse_width untested no_clock
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_459_/RESET_B(rise) CLK(rise) pll_clk90 recovery untested no_startpoint_clock
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_459_/RESET_B(rise) CLK(rise) pll_clk90 removal untested no_startpoint_clock
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_412_/D CLK(rise) pll_clk hold untested false_paths
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_412_/D CLK(rise) pll_clk setup untested false_paths
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_412_/RESET_B(low) - - min_pulse_width untested no_clock
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_412_/RESET_B(rise) CLK(rise) pll_clk recovery untested no_startpoint_clock
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_412_/RESET_B(rise) CLK(rise) pll_clk removal untested no_startpoint_clock
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_411_/D CLK(rise) - hold untested constant_disabled
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_411_/D CLK(rise) - setup untested constant_disabled
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_411_/SET_B(low) - - min_pulse_width untested no_clock
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_411_/SET_B(rise) CLK(rise) pll_clk recovery untested no_startpoint_clock
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_411_/SET_B(rise) CLK(rise) ext_clk recovery untested no_startpoint_clock
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_411_/SET_B(rise) CLK(rise) pll_clk removal untested no_startpoint_clock
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_411_/SET_B(rise) CLK(rise) ext_clk removal untested no_startpoint_clock
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_435_/D CLK(rise) - hold untested constant_disabled
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_435_/D CLK(rise) - setup untested constant_disabled
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_435_/SET_B(low) - - min_pulse_width untested no_clock
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_435_/SET_B(rise) CLK(rise) pll_clk recovery untested no_startpoint_clock
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_435_/SET_B(rise) CLK(rise) pll_clk removal untested no_startpoint_clock
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_410_/SET_B(low) - - min_pulse_width untested no_clock
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_410_/SET_B(rise) CLK(rise) pll_clk recovery untested no_startpoint_clock
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_410_/SET_B(rise) CLK(rise) ext_clk recovery untested no_startpoint_clock
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_410_/SET_B(rise) CLK(rise) pll_clk removal untested no_startpoint_clock
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_410_/SET_B(rise) CLK(rise) ext_clk removal untested no_startpoint_clock
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_433_/RESET_B(low) - - min_pulse_width untested no_clock
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_433_/RESET_B(rise) CLK(rise) pll_clk recovery untested no_startpoint_clock
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_433_/RESET_B(rise) CLK(rise) pll_clk removal untested no_startpoint_clock
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_460_/D CLK(rise) - hold untested constant_disabled
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_460_/D CLK(rise) - setup untested constant_disabled
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_460_/RESET_B(low) - - min_pulse_width untested constant_disabled
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_460_/RESET_B(rise) CLK(rise) - recovery untested constant_disabled
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_460_/RESET_B(rise) CLK(rise) - removal untested constant_disabled
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_409_/SET_B(low) - - min_pulse_width untested no_clock
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_409_/SET_B(rise) CLK(rise) pll_clk recovery untested no_startpoint_clock
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_409_/SET_B(rise) CLK(rise) ext_clk recovery untested no_startpoint_clock
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_409_/SET_B(rise) CLK(rise) pll_clk removal untested no_startpoint_clock
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_409_/SET_B(rise) CLK(rise) ext_clk removal untested no_startpoint_clock
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_447_/SET_B(low) - - min_pulse_width untested no_clock
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_447_/SET_B(rise) CLK(rise) pll_clk90 recovery untested no_startpoint_clock
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_447_/SET_B(rise) CLK(rise) pll_clk90 removal untested no_startpoint_clock
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_456_/SET_B(low) - - min_pulse_width untested no_clock
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_456_/SET_B(rise) CLK(rise) pll_clk recovery untested no_startpoint_clock
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_456_/SET_B(rise) CLK(rise) pll_clk removal untested no_startpoint_clock
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_422_/SET_B(low) - - min_pulse_width untested no_clock
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_422_/SET_B(rise) CLK(rise) pll_clk recovery untested no_startpoint_clock
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_422_/SET_B(rise) CLK(rise) pll_clk removal untested no_startpoint_clock
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_424_/SET_B(low) - - min_pulse_width untested no_clock
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_424_/SET_B(rise) CLK(rise) pll_clk recovery untested no_startpoint_clock
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_424_/SET_B(rise) CLK(rise) pll_clk removal untested no_startpoint_clock
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_461_/D CLK(rise) - hold untested constant_disabled
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_461_/D CLK(rise) - setup untested constant_disabled
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_461_/SET_B(low) - - min_pulse_width untested no_clock
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_461_/SET_B(rise) CLK(rise) pll_clk90 recovery untested no_startpoint_clock
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_461_/SET_B(rise) CLK(rise) pll_clk90 removal untested no_startpoint_clock
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_462_/D CLK(rise) - hold untested constant_disabled
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_462_/D CLK(rise) - setup untested constant_disabled
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_462_/RESET_B(low) - - min_pulse_width untested constant_disabled
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_462_/RESET_B(rise) CLK(rise) - recovery untested constant_disabled
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_462_/RESET_B(rise) CLK(rise) - removal untested constant_disabled
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_463_/RESET_B(low) - - min_pulse_width untested no_clock
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_463_/RESET_B(rise) CLK(rise) pll_clk90 recovery untested no_startpoint_clock
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_463_/RESET_B(rise) CLK(rise) pll_clk90 removal untested no_startpoint_clock
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_464_/SET_B(low) - - min_pulse_width untested no_clock
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_464_/SET_B(rise) CLK(rise) pll_clk90 recovery untested no_startpoint_clock
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_464_/SET_B(rise) CLK(rise) pll_clk90 removal untested no_startpoint_clock
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_465_/RESET_B(low) - - min_pulse_width untested no_clock
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_465_/RESET_B(rise) CLK(rise) pll_clk90 recovery untested no_startpoint_clock
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_465_/RESET_B(rise) CLK(rise) pll_clk90 removal untested no_startpoint_clock
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_420_/RESET_B(low) - - min_pulse_width untested no_clock
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_420_/RESET_B(rise) CLK(rise) pll_clk recovery untested no_startpoint_clock
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_420_/RESET_B(rise) CLK(rise) pll_clk removal untested no_startpoint_clock
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_458_/RESET_B(low) - - min_pulse_width untested no_clock
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_458_/RESET_B(rise) CLK(rise) pll_clk90 recovery untested no_startpoint_clock
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_458_/RESET_B(rise) CLK(rise) pll_clk90 removal untested no_startpoint_clock
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_444_/SET_B(low) - - min_pulse_width untested no_clock
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_444_/SET_B(rise) CLK(rise) pll_clk90 recovery untested no_startpoint_clock
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_444_/SET_B(rise) CLK(rise) pll_clk90 removal untested no_startpoint_clock
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_419_/SET_B(low) - - min_pulse_width untested no_clock
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_419_/SET_B(rise) CLK(rise) pll_clk recovery untested no_startpoint_clock
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_419_/SET_B(rise) CLK(rise) pll_clk removal untested no_startpoint_clock
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_431_/SET_B(low) - - min_pulse_width untested no_clock
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_431_/SET_B(rise) CLK(rise) pll_clk recovery untested no_startpoint_clock
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_431_/SET_B(rise) CLK(rise) pll_clk removal untested no_startpoint_clock
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_445_/RESET_B(low) - - min_pulse_width untested no_clock
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_445_/RESET_B(rise) CLK(rise) pll_clk90 recovery untested no_startpoint_clock
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_445_/RESET_B(rise) CLK(rise) pll_clk90 removal untested no_startpoint_clock
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_432_/RESET_B(low) - - min_pulse_width untested no_clock
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_432_/RESET_B(rise) CLK(rise) pll_clk recovery untested no_startpoint_clock
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_432_/RESET_B(rise) CLK(rise) pll_clk removal untested no_startpoint_clock
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_457_/SET_B(low) - - min_pulse_width untested no_clock
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_457_/SET_B(rise) CLK(rise) pll_clk90 recovery untested no_startpoint_clock
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_457_/SET_B(rise) CLK(rise) pll_clk90 removal untested no_startpoint_clock
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_414_/SET_B(low) - - min_pulse_width untested no_clock
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_414_/SET_B(rise) CLK(rise) pll_clk90 recovery untested no_startpoint_clock
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_414_/SET_B(rise) CLK(rise) pll_clk90 removal untested no_startpoint_clock
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_449_/SET_B(low) - - min_pulse_width untested no_clock
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_449_/SET_B(rise) CLK(rise) pll_clk90 recovery untested no_startpoint_clock
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_449_/SET_B(rise) CLK(rise) pll_clk90 removal untested no_startpoint_clock
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_446_/RESET_B(low) - - min_pulse_width untested no_clock
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_446_/RESET_B(rise) CLK_N(fall) pll_clk90 recovery untested no_startpoint_clock
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_446_/RESET_B(rise) CLK_N(fall) pll_clk90 removal untested no_startpoint_clock
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_429_/SET_B(low) - - min_pulse_width untested no_clock
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_429_/SET_B(rise) CLK(rise) pll_clk recovery untested no_startpoint_clock
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_429_/SET_B(rise) CLK(rise) pll_clk removal untested no_startpoint_clock
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_451_/SET_B(low) - - min_pulse_width untested no_clock
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_451_/SET_B(rise) CLK(rise) pll_clk90 recovery untested no_startpoint_clock
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_451_/SET_B(rise) CLK(rise) pll_clk90 removal untested no_startpoint_clock
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_450_/RESET_B(low) - - min_pulse_width untested no_clock
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_450_/RESET_B(rise) CLK_N(fall) pll_clk90 recovery untested no_startpoint_clock
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_450_/RESET_B(rise) CLK_N(fall) pll_clk90 removal untested no_startpoint_clock
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_430_/RESET_B(low) - - min_pulse_width untested no_clock
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_430_/RESET_B(rise) CLK(rise) pll_clk recovery untested no_startpoint_clock
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_430_/RESET_B(rise) CLK(rise) pll_clk removal untested no_startpoint_clock
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_452_/RESET_B(low) - - min_pulse_width untested no_clock
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_452_/RESET_B(rise) CLK_N(fall) pll_clk90 recovery untested no_startpoint_clock
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_452_/RESET_B(rise) CLK_N(fall) pll_clk90 removal untested no_startpoint_clock
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_426_/SET_B(low) - - min_pulse_width untested no_clock
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_426_/SET_B(rise) CLK(rise) pll_clk recovery untested no_startpoint_clock
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_426_/SET_B(rise) CLK(rise) pll_clk removal untested no_startpoint_clock
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_421_/RESET_B(low) - - min_pulse_width untested no_clock
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_421_/RESET_B(rise) CLK_N(fall) pll_clk recovery untested no_startpoint_clock
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_421_/RESET_B(rise) CLK_N(fall) pll_clk removal untested no_startpoint_clock
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_425_/RESET_B(low) - - min_pulse_width untested no_clock
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_425_/RESET_B(rise) CLK_N(fall) pll_clk recovery untested no_startpoint_clock
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_425_/RESET_B(rise) CLK_N(fall) pll_clk removal untested no_startpoint_clock
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_427_/RESET_B(low) - - min_pulse_width untested no_clock
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_427_/RESET_B(rise) CLK_N(fall) pll_clk recovery untested no_startpoint_clock
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_427_/RESET_B(rise) CLK_N(fall) pll_clk removal untested no_startpoint_clock
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_455_/RESET_B(low) - - min_pulse_width untested no_clock
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_455_/RESET_B(rise) CLK(rise) pll_clk90 recovery untested no_startpoint_clock
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_455_/RESET_B(rise) CLK(rise) pll_clk90 removal untested no_startpoint_clock
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_423_/RESET_B(low) - - min_pulse_width untested no_clock
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_423_/RESET_B(rise) CLK_N(fall) pll_clk recovery untested no_startpoint_clock
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_423_/RESET_B(rise) CLK_N(fall) pll_clk removal untested no_startpoint_clock
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_453_/RESET_B(low) - - min_pulse_width untested no_clock
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_453_/RESET_B(rise) CLK(rise) pll_clk90 recovery untested no_startpoint_clock
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_453_/RESET_B(rise) CLK(rise) pll_clk90 removal untested no_startpoint_clock
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_428_/RESET_B(low) - - min_pulse_width untested no_clock
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_428_/RESET_B(rise) CLK(rise) pll_clk recovery untested no_startpoint_clock
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_428_/RESET_B(rise) CLK(rise) pll_clk removal untested no_startpoint_clock
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_454_/SET_B(low) - - min_pulse_width untested no_clock
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_454_/SET_B(rise) CLK(rise) pll_clk90 recovery untested no_startpoint_clock
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_454_/SET_B(rise) CLK(rise) pll_clk90 removal untested no_startpoint_clock
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_448_/RESET_B(low) - - min_pulse_width untested no_clock
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_448_/RESET_B(rise) CLK_N(fall) pll_clk90 recovery untested no_startpoint_clock
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_448_/RESET_B(rise) CLK_N(fall) pll_clk90 removal untested no_startpoint_clock
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1
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