caravel/signoff/gpio_control_block/final_summary_report.csv

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2021-11-04 09:19:12 -05:00
,design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,suggested_clock_frequency,suggested_clock_period,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GLB_RT_ADJUSTMENT,STD_CELL_LIBRARY,CELL_PAD,DIODE_INSERTION_STRATEGY
0,/home/kareem_farid/fresh/caravel_timing/openlane/gpio_control_block,gpio_control_block,gpio_control_block,flow completed,0h1m34s0ms,0h1m22s0ms,-2.0,0.01105,-1,69.84,521.59,-1,0,0,0,0,0,0,0,0,0,-1,-1,4387,1001,0.0,0.0,-1,0.0,0.0,0.0,0.0,-1,0.0,0.0,4147542.0,0.0,12.18,14.64,14.41,-1,13.57,57,85,50,78,0,0,0,42,2,13,13,0,13,0,0,4,29,44,4,38,28,0,66,20.0,50.0,50,DELAY 0,5,50,1,25,16.9,0.7,0.05,sky130_fd_sc_hd,0,4