mirror of https://github.com/efabless/caravel.git
58 lines
2.0 KiB
Tcl
58 lines
2.0 KiB
Tcl
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# SPDX-FileCopyrightText: 2020 Efabless Corporation
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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# SPDX-License-Identifier: Apache-2.0
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# DON'T TOUCH THE FOLLOWING SECTIONS
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set script_dir [file dirname [file normalize [info script]]]
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# This makes sure that the core rings are outside the boundaries
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# of your block.
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set ::env(MAGIC_ZEROIZE_ORIGIN) 0
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# Area Configurations. DON'T TOUCH.
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set ::env(FP_SIZING) absolute
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set ::env(DIE_AREA) "0 0 2920 3520"
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set ::env(RUN_CVC) 0
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# Pin Configurations. DON'T TOUCH
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set ::env(FP_PIN_ORDER_CFG) $script_dir/pin_order.cfg
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set ::unit 2.4
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set ::env(FP_IO_VEXTEND) [expr 2*$::unit]
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set ::env(FP_IO_HEXTEND) [expr 2*$::unit]
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set ::env(FP_IO_VLENGTH) $::unit
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set ::env(FP_IO_HLENGTH) $::unit
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set ::env(FP_IO_VTHICKNESS_MULT) 4
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set ::env(FP_IO_HTHICKNESS_MULT) 4
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# Power & Pin Configurations. DON'T TOUCH.
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set ::env(FP_PDN_CORE_RING) 1
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set ::env(FP_PDN_CORE_RING_VWIDTH) 3.1
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set ::env(FP_PDN_CORE_RING_HWIDTH) 3.1
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set ::env(FP_PDN_CORE_RING_VOFFSET) 14
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set ::env(FP_PDN_CORE_RING_HOFFSET) $::env(FP_PDN_CORE_RING_VOFFSET)
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set ::env(FP_PDN_CORE_RING_VSPACING) 1.7
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set ::env(FP_PDN_CORE_RING_HSPACING) $::env(FP_PDN_CORE_RING_VSPACING)
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set ::env(FP_PDN_VWIDTH) 3.1
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set ::env(FP_PDN_HWIDTH) 3.1
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set ::env(FP_PDN_VSPACING) [expr 5*$::env(FP_PDN_CORE_RING_VWIDTH)]
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set ::env(FP_PDN_HSPACING) [expr 5*$::env(FP_PDN_CORE_RING_HWIDTH)]
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set ::env(VDD_NETS) [list {vccd1} {vccd2} {vdda1} {vdda2}]
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set ::env(GND_NETS) [list {vssd1} {vssd2} {vssa1} {vssa2}]
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set ::env(SYNTH_USE_PG_PINS_DEFINES) "USE_POWER_PINS"
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