2023-02-27 12:38:06 -06:00
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design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,CoreArea_um^2,power_slowest_internal_uW,power_slowest_switching_uW,power_slowest_leakage_uW,power_typical_internal_uW,power_typical_switching_uW,power_typical_leakage_uW,power_fastest_internal_uW,power_fastest_switching_uW,power_fastest_leakage_uW,critical_path_ns,suggested_clock_period,suggested_clock_frequency,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GRT_ADJUSTMENT,STD_CELL_LIBRARY,DIODE_INSERTION_STRATEGY
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2023-03-27 06:44:22 -05:00
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/home/hosni/caravel_sky130/caravel_redesign-2/caravel/openlane/caravel_core,caravel_core,23_03_26_19_21,flow completed,1h29m25s0ms,-1,3149.0854548666102,15.087555,1574.5427274333051,16.98,8064.05,23756,0,0,0,0,0,0,13,34,-1,-1,-1,3989955,387857,-15.49,-1.17,-1,-2.3,0.0,-3717.86,-59.38,-1,-197.35,0.0,3466679808.0,0.0,22.13,20.46,7.0,3.15,3.74,16946,40270,4063,26506,0,0,0,21208,852,36,445,493,2745,738,98,4383,6959,7530,15,8532,67559,27840,103931,14916786.380800001,-1,-1,-1,-1,-1,-1,-1,-1,-1,20.77,25.0,40.0,25,6,1,50,360,264,0.06,0.29,sky130_fd_sc_hd,16,DELAY 1
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