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caravel/signoff/digital_pll/openlane-signoff/27-write_powered_def.log

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reharden: digital_pll ~ reimplement digital_pll using updated RTL ~ changes in config to generate same PDN ~ change deprecated variables
2022-10-13 08:21:08 -05:00
OpenROAD 4174c3ad802d2ac1d04d387d2c4b883903f6647e
This program is licensed under the BSD-3 license. See the LICENSE file for details.
Components of this program may be licensed under more restrictive licenses which must be honored.
reharden!: digital_pll ~ enable synth buffering to fix fanout ~ add *buf_1* to no synth list ~ add attribute (* keep *) to the oscillator as dont touch for yosys !need to verify that the oscillator remains untouched
2022-10-17 12:56:01 -05:00
[INFO ODB-0222] Reading LEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_17_10_45/tmp/merged.nom.lef
reharden: digital_pll ~ reimplement digital_pll using updated RTL ~ changes in config to generate same PDN ~ change deprecated variables
2022-10-13 08:21:08 -05:00
[WARNING ODB-0220] WARNING (LEFPARS-2036): SOURCE statement is obsolete in version 5.6 and later.
The LEF parser will ignore this statement.
reharden!: digital_pll ~ enable synth buffering to fix fanout ~ add *buf_1* to no synth list ~ add attribute (* keep *) to the oscillator as dont touch for yosys !need to verify that the oscillator remains untouched
2022-10-17 12:56:01 -05:00
To avoid this warning in the future, remove this statement from the LEF file with version 5.6 or later. See file /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_17_10_45/tmp/merged.nom.lef at line 930.
reharden: digital_pll ~ reimplement digital_pll using updated RTL ~ changes in config to generate same PDN ~ change deprecated variables
2022-10-13 08:21:08 -05:00
[INFO ODB-0223] Created 13 technology layers
[INFO ODB-0224] Created 25 technology vias
[INFO ODB-0225] Created 441 library cells
reharden!: digital_pll ~ enable synth buffering to fix fanout ~ add *buf_1* to no synth list ~ add attribute (* keep *) to the oscillator as dont touch for yosys !need to verify that the oscillator remains untouched
2022-10-17 12:56:01 -05:00
[INFO ODB-0226] Finished LEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_17_10_45/tmp/merged.nom.lef
[INFO ODB-0127] Reading DEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_17_10_45/results/routing/digital_pll.def
reharden: digital_pll ~ reimplement digital_pll using updated RTL ~ changes in config to generate same PDN ~ change deprecated variables
2022-10-13 08:21:08 -05:00
[INFO ODB-0128] Design: digital_pll
[INFO ODB-0130] Created 39 pins.
reharden!: digital_pll ~ enable synth buffering to fix fanout ~ add *buf_1* to no synth list ~ add attribute (* keep *) to the oscillator as dont touch for yosys !need to verify that the oscillator remains untouched
2022-10-17 12:56:01 -05:00
[INFO ODB-0131] Created 586 components and 3453 component-terminals.
[INFO ODB-0132] Created 2 special nets and 2244 connections.
[INFO ODB-0133] Created 366 nets and 1208 connections.
[INFO ODB-0134] Finished DEF file: /home/kareem_farid/caravel/openlane/digital_pll/runs/22_10_17_10_45/results/routing/digital_pll.def
reharden: digital_pll ~ reimplement digital_pll using updated RTL ~ changes in config to generate same PDN ~ change deprecated variables
2022-10-13 08:21:08 -05:00
Top-level design name: digital_pll
Found default power net 'VPWR'
Found default ground net 'VGND'
Found 1 power ports.
Found 1 ground ports.
reharden!: digital_pll ~ enable synth buffering to fix fanout ~ add *buf_1* to no synth list ~ add attribute (* keep *) to the oscillator as dont touch for yosys !need to verify that the oscillator remains untouched
2022-10-17 12:56:01 -05:00
Modified power connections of 586/586 cells.