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caravel/signoff/gpio_control_block/standalone_pvr/gpio_control_block.lvs.json

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add signoff results for `gpio_control_block`: - signoff summary report - DRC and LVS reports - STA timing reports for all corners - generated lib files for all corners - generated sdf files for all corners
2022-10-19 07:10:24 -05:00
[
{
"pins": [
[
"1",
"2",
"3",
"4"
], [
"1",
"2",
"3",
"4"
]
]
},
{
"pins": [
[
"1",
"2",
"3",
"4"
], [
"1",
"2",
"3",
"4"
]
]
},
{
"name": [
"sky130_fd_sc_hd__nand2_2",
"sky130_fd_sc_hd__nand2_2"
],
"devices": [
[
["sky130_fd_pr__pfet_01v8_hvt", 2],
["sky130_fd_pr__nfet_01v8", 2 ]
], [
["sky130_fd_pr__pfet_01v8_hvt", 2 ],
["sky130_fd_pr__nfet_01v8", 2 ]
]
],
"nets": [
8,
8
],
"badnets": [
],
"badelements": [
],
"pins": [
[
"VGND",
"Y",
"A",
"VNB",
"B",
"VPWR",
"VPB"
], [
"VGND",
"Y",
"A",
"VNB",
"B",
"VPWR",
"VPB"
]
]
},
{
"name": [
"sky130_fd_sc_hd__inv_2",
"sky130_fd_sc_hd__inv_2"
],
"devices": [
[
["sky130_fd_pr__pfet_01v8_hvt", 1],
["sky130_fd_pr__nfet_01v8", 1 ]
], [
["sky130_fd_pr__pfet_01v8_hvt", 1 ],
["sky130_fd_pr__nfet_01v8", 1 ]
]
],
"nets": [
6,
6
],
"badnets": [
],
"badelements": [
],
"pins": [
[
"VGND",
"VNB",
"VPWR",
"VPB",
"Y",
"A"
], [
"VGND",
"VNB",
"VPWR",
"VPB",
"Y",
"A"
]
]
},
{
"name": [
"sky130_fd_sc_hd__nor2_2",
"sky130_fd_sc_hd__nor2_2"
],
"devices": [
[
["sky130_fd_pr__pfet_01v8_hvt", 2],
["sky130_fd_pr__nfet_01v8", 2 ]
], [
["sky130_fd_pr__pfet_01v8_hvt", 2 ],
["sky130_fd_pr__nfet_01v8", 2 ]
]
],
"nets": [
8,
8
],
"badnets": [
],
"badelements": [
],
"pins": [
[
"VPWR",
"B",
"VGND",
"VNB",
"A",
"VPB",
"Y"
], [
"VPWR",
"B",
"VGND",
"VNB",
"A",
"VPB",
"Y"
]
]
},
{
"name": [
"sky130_fd_sc_hd__conb_1",
"sky130_fd_sc_hd__conb_1"
],
"devices": [
[
["sky130_fd_pr__res_generic_po", 2 ]
], [
["sky130_fd_pr__res_generic_po", 2 ]
]
],
"nets": [
4,
4
],
"badnets": [
],
"badelements": [
],
"pins": [
[
"VGND",
"LO",
"HI",
"VPWR",
"VPB",
"VNB"
], [
"VGND",
"LO",
"HI",
"VPWR",
"VPB",
"VNB"
]
]
},
{
"name": [
"sky130_fd_sc_hd__decap_6",
"sky130_fd_sc_hd__decap_6"
],
"devices": [
[
["sky130_fd_pr__pfet_01v8_hvt", 1],
["sky130_fd_pr__nfet_01v8", 1 ]
], [
["sky130_fd_pr__pfet_01v8_hvt", 1 ],
["sky130_fd_pr__nfet_01v8", 1 ]
]
],
"nets": [
4,
4
],
"badnets": [
],
"badelements": [
],
"pins": [
[
"VPB",
"VNB",
"VPWR",
"VGND"
], [
"VPB",
"VNB",
"VPWR",
"VGND"
]
]
},
{
"name": [
"sky130_fd_sc_hd__decap_8",
"sky130_fd_sc_hd__decap_8"
],
"devices": [
[
["sky130_fd_pr__pfet_01v8_hvt", 1],
["sky130_fd_pr__nfet_01v8", 1 ]
], [
["sky130_fd_pr__pfet_01v8_hvt", 1 ],
["sky130_fd_pr__nfet_01v8", 1 ]
]
],
"nets": [
4,
4
],
"badnets": [
],
"badelements": [
],
"pins": [
[
"VPB",
"VNB",
"VPWR",
"VGND"
], [
"VPB",
"VNB",
"VPWR",
"VGND"
]
]
},
{
"name": [
"sky130_fd_sc_hd__decap_3",
"sky130_fd_sc_hd__decap_3"
],
"devices": [
[
["sky130_fd_pr__pfet_01v8_hvt", 1],
["sky130_fd_pr__nfet_01v8", 1 ]
], [
["sky130_fd_pr__pfet_01v8_hvt", 1 ],
["sky130_fd_pr__nfet_01v8", 1 ]
]
],
"nets": [
4,
4
],
"badnets": [
],
"badelements": [
],
"pins": [
[
"VPB",
"VNB",
"VPWR",
"VGND"
], [
"VPB",
"VNB",
"VPWR",
"VGND"
]
]
},
{
"name": [
"sky130_fd_sc_hd__decap_4",
"sky130_fd_sc_hd__decap_4"
],
"devices": [
[
["sky130_fd_pr__pfet_01v8_hvt", 1],
["sky130_fd_pr__nfet_01v8", 1 ]
], [
["sky130_fd_pr__pfet_01v8_hvt", 1 ],
["sky130_fd_pr__nfet_01v8", 1 ]
]
],
"nets": [
4,
4
],
"badnets": [
],
"badelements": [
],
"pins": [
[
"VPB",
"VNB",
"VPWR",
"VGND"
], [
"VPB",
"VNB",
"VPWR",
"VGND"
]
]
},
{
"name": [
"sky130_fd_sc_hd__nand2b_2",
"sky130_fd_sc_hd__nand2b_2"
],
"devices": [
[
["sky130_fd_pr__pfet_01v8_hvt", 3],
["sky130_fd_pr__nfet_01v8", 3 ]
], [
["sky130_fd_pr__pfet_01v8_hvt", 3 ],
["sky130_fd_pr__nfet_01v8", 3 ]
]
],
"nets": [
9,
9
],
"badnets": [
],
"badelements": [
],
"pins": [
[
"B",
"VGND",
"A_N",
"VNB",
"VPWR",
"Y",
"VPB"
], [
"B",
"VGND",
"A_N",
"VNB",
"VPWR",
"Y",
"VPB"
]
]
},
{
"name": [
"sky130_fd_sc_hd__dfrtp_4",
"sky130_fd_sc_hd__dfrtp_4"
],
"devices": [
[
["sky130_fd_pr__nfet_01v8", 14],
["sky130_fd_pr__pfet_01v8_hvt", 14 ]
], [
["sky130_fd_pr__nfet_01v8", 14 ],
["sky130_fd_pr__pfet_01v8_hvt", 14 ]
]
],
"nets": [
21,
21
],
"badnets": [
],
"badelements": [
],
"pins": [
[
"VPWR",
"RESET_B",
"VPB",
"VNB",
"VGND",
"D",
"Q",
"CLK"
], [
"VPWR",
"RESET_B",
"VPB",
"VNB",
"VGND",
"D",
"Q",
"CLK"
]
]
},
{
"name": [
"sky130_fd_sc_hd__dfbbn_2",
"sky130_fd_sc_hd__dfbbn_2"
],
"devices": [
[
["sky130_fd_pr__nfet_01v8", 20],
["sky130_fd_pr__pfet_01v8_hvt", 20 ]
], [
["sky130_fd_pr__nfet_01v8", 20 ],
["sky130_fd_pr__pfet_01v8_hvt", 20 ]
]
],
"nets": [
29,
29
],
"badnets": [
],
"badelements": [
],
"pins": [
[
"VPWR",
"RESET_B",
"Q_N",
"Q",
"D",
"CLK_N",
"VPB",
"VNB",
"VGND",
"SET_B"
], [
"VPWR",
"RESET_B",
"Q_N",
"Q",
"D",
"CLK_N",
"VPB",
"VNB",
"VGND",
"SET_B"
]
]
},
{
"name": [
"sky130_fd_sc_hd__buf_16",
"sky130_fd_sc_hd__buf_16"
],
"devices": [
[
["sky130_fd_pr__nfet_01v8", 2],
["sky130_fd_pr__pfet_01v8_hvt", 2 ]
], [
["sky130_fd_pr__nfet_01v8", 2 ],
["sky130_fd_pr__pfet_01v8_hvt", 2 ]
]
],
"nets": [
7,
7
],
"badnets": [
],
"badelements": [
],
"pins": [
[
"X",
"VPWR",
"VPB",
"VGND",
"VNB",
"A"
], [
"X",
"VPWR",
"VPB",
"VGND",
"VNB",
"A"
]
]
},
{
"name": [
"sky130_fd_sc_hd__clkbuf_16",
"sky130_fd_sc_hd__clkbuf_16"
],
"devices": [
[
["sky130_fd_pr__pfet_01v8_hvt", 2],
["sky130_fd_pr__nfet_01v8", 2 ]
], [
["sky130_fd_pr__pfet_01v8_hvt", 2 ],
["sky130_fd_pr__nfet_01v8", 2 ]
]
],
"nets": [
7,
7
],
"badnets": [
],
"badelements": [
],
"pins": [
[
"VPWR",
"X",
"VPB",
"VGND",
"VNB",
"A"
], [
"VPWR",
"X",
"VPB",
"VGND",
"VNB",
"A"
]
]
},
{
"name": [
"sky130_fd_sc_hd__mux2_4",
"sky130_fd_sc_hd__mux2_4"
],
"devices": [
[
["sky130_fd_pr__pfet_01v8_hvt", 6],
["sky130_fd_pr__nfet_01v8", 6 ]
], [
["sky130_fd_pr__pfet_01v8_hvt", 6 ],
["sky130_fd_pr__nfet_01v8", 6 ]
]
],
"nets": [
14,
14
],
"badnets": [
],
"badelements": [
],
"pins": [
[
"VGND",
"VPWR",
"S",
"VNB",
"VPB",
"X",
"A0",
"A1"
], [
"VGND",
"VPWR",
"S",
"VNB",
"VPB",
"X",
"A0",
"A1"
]
]
},
{
"name": [
"sky130_fd_sc_hd__and2_0",
"sky130_fd_sc_hd__and2_0"
],
"devices": [
[
["sky130_fd_pr__pfet_01v8_hvt", 3],
["sky130_fd_pr__nfet_01v8", 3 ]
], [
["sky130_fd_pr__pfet_01v8_hvt", 3 ],
["sky130_fd_pr__nfet_01v8", 3 ]
]
],
"nets": [
9,
9
],
"badnets": [
],
"badelements": [
],
"pins": [
[
"B",
"VGND",
"A",
"X",
"VPWR",
"VPB",
"VNB"
], [
"B",
"VGND",
"A",
"X",
"VPWR",
"VPB",
"VNB"
]
]
},
{
"name": [
"sky130_fd_sc_hd__dlygate4sd3_1",
"sky130_fd_sc_hd__dlygate4sd3_1"
],
"devices": [
[
["sky130_fd_pr__pfet_01v8_hvt", 4],
["sky130_fd_pr__nfet_01v8", 4 ]
], [
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
["sky130_fd_pr__nfet_01v8", 4 ]
]
],
"nets": [
9,
9
],
"badnets": [
],
"badelements": [
],
"pins": [
[
"A",
"X",
"VGND",
"VNB",
"VPWR",
"VPB"
], [
"A",
"X",
"VGND",
"VNB",
"VPWR",
"VPB"
]
]
},
{
"name": [
"sky130_fd_sc_hd__diode_2",
"sky130_fd_sc_hd__diode_2"
],
"devices": [
[
["sky130_fd_pr__diode_pw2nd_05v5", 1 ]
], [
["sky130_fd_pr__diode_pw2nd_05v5", 1 ]
]
],
"nets": [
2,
2
],
"badnets": [
],
"badelements": [
],
"pins": [
[
"VNB",
"DIODE",
"VGND",
"VPWR",
"VPB"
], [
"VNB",
"DIODE",
"VGND",
"VPWR",
"VPB"
]
]
},
{
"name": [
"sky130_fd_sc_hd__buf_2",
"sky130_fd_sc_hd__buf_2"
],
"devices": [
[
["sky130_fd_pr__pfet_01v8_hvt", 2],
["sky130_fd_pr__nfet_01v8", 2 ]
], [
["sky130_fd_pr__pfet_01v8_hvt", 2 ],
["sky130_fd_pr__nfet_01v8", 2 ]
]
],
"nets": [
7,
7
],
"badnets": [
],
"badelements": [
],
"pins": [
[
"X",
"VGND",
"VNB",
"A",
"VPWR",
"VPB"
], [
"X",
"VGND",
"VNB",
"A",
"VPWR",
"VPB"
]
]
},
{
"name": [
"sky130_fd_sc_hd__or2_0",
"sky130_fd_sc_hd__or2_0"
],
"devices": [
[
["sky130_fd_pr__nfet_01v8", 3],
["sky130_fd_pr__pfet_01v8_hvt", 3 ]
], [
["sky130_fd_pr__nfet_01v8", 3 ],
["sky130_fd_pr__pfet_01v8_hvt", 3 ]
]
],
"nets": [
9,
9
],
"badnets": [
],
"badelements": [
],
"pins": [
[
"X",
"A",
"VPWR",
"B",
"VGND",
"VNB",
"VPB"
], [
"X",
"A",
"VPWR",
"B",
"VGND",
"VNB",
"VPB"
]
]
},
{
"name": [
"sky130_fd_sc_hd__macro_sparecell",
"sky130_fd_sc_hd__macro_sparecell"
],
"devices": [
[
["sky130_fd_sc_hd__nand2_2", 2],
["sky130_fd_sc_hd__inv_2", 2],
["sky130_fd_sc_hd__nor2_2", 2],
["sky130_fd_sc_hd__conb_1", 1 ]
], [
["sky130_fd_sc_hd__nand2_2", 2 ],
["sky130_fd_sc_hd__inv_2", 2 ],
["sky130_fd_sc_hd__nor2_2", 2 ],
["sky130_fd_sc_hd__conb_1", 1 ]
]
],
"nets": [
12,
12
],
"badnets": [
[
[
[
"sky130_fd_sc_hd__conb_1_0/HI",
[
[ "sky130_fd_sc_hd__conb_1", "HI", 1 ]
]
]
], [
[
"sky130_fd_sc_hd__conb_1_0/HI",
[
[ "sky130_fd_sc_hd__conb_1", "VNB", 1 ]
]
]
]
],
[
[
[
"VPB",
[
[ "sky130_fd_sc_hd__nand2_2", "VPB", 2 ],
[ "sky130_fd_sc_hd__inv_2", "VPB", 2 ],
[ "sky130_fd_sc_hd__nor2_2", "VPB", 2 ],
[ "sky130_fd_sc_hd__conb_1", "VPB", 1 ]
]
],
[
"VNB",
[
[ "sky130_fd_sc_hd__nand2_2", "VNB", 2 ],
[ "sky130_fd_sc_hd__inv_2", "VNB", 2 ],
[ "sky130_fd_sc_hd__nor2_2", "VNB", 2 ],
[ "sky130_fd_sc_hd__conb_1", "VNB", 1 ]
]
],
[
"VPWR",
[
[ "sky130_fd_sc_hd__nand2_2", "VPWR", 2 ],
[ "sky130_fd_sc_hd__inv_2", "VPWR", 2 ],
[ "sky130_fd_sc_hd__nor2_2", "VPWR", 2 ],
[ "sky130_fd_sc_hd__conb_1", "VPWR", 1 ]
]
],
[
"VGND",
[
[ "sky130_fd_sc_hd__nand2_2", "VGND", 2 ],
[ "sky130_fd_sc_hd__inv_2", "VGND", 2 ],
[ "sky130_fd_sc_hd__nor2_2", "VGND", 2 ],
[ "sky130_fd_sc_hd__conb_1", "VGND", 1 ]
]
]
], [
[
"VPWR",
[
[ "sky130_fd_sc_hd__nand2_2", "Y", 2 ],
[ "sky130_fd_sc_hd__inv_2", "VPWR", 2 ],
[ "sky130_fd_sc_hd__nor2_2", "Y", 2 ],
[ "sky130_fd_sc_hd__conb_1", "LO", 1 ]
]
],
[
"VGND",
[
[ "sky130_fd_sc_hd__nand2_2", "VPWR", 2 ],
[ "sky130_fd_sc_hd__inv_2", "Y", 2 ],
[ "sky130_fd_sc_hd__nor2_2", "VPWR", 2 ],
[ "sky130_fd_sc_hd__conb_1", "HI", 1 ]
]
],
[
"VNB",
[
[ "sky130_fd_sc_hd__nand2_2", "VPB", 2 ],
[ "sky130_fd_sc_hd__inv_2", "VPB", 2 ],
[ "sky130_fd_sc_hd__nor2_2", "VPB", 2 ],
[ "sky130_fd_sc_hd__conb_1", "VPWR", 1 ]
]
],
[
"VPB",
[
[ "sky130_fd_sc_hd__nand2_2", "VNB", 2 ],
[ "sky130_fd_sc_hd__inv_2", "VNB", 2 ],
[ "sky130_fd_sc_hd__nor2_2", "VNB", 2 ],
[ "sky130_fd_sc_hd__conb_1", "VPB", 1 ]
]
]
]
],
[
[
[
"LO",
[
[ "sky130_fd_sc_hd__nand2_2", "A", 2 ],
[ "sky130_fd_sc_hd__nand2_2", "B", 2 ],
[ "sky130_fd_sc_hd__conb_1", "LO", 1 ]
]
]
], [
[
"LO",
[
[ "sky130_fd_sc_hd__nand2_2", "B", 2 ],
[ "sky130_fd_sc_hd__nand2_2", "VGND", 2 ],
[ "sky130_fd_sc_hd__conb_1", "VGND", 1 ]
]
]
]
]
],
"badelements": [
[
[
[
"sky130_fd_sc_hd__conb_1_0",
[
[ "LO", 5 ],
[ "HI", 1 ],
[ "VPB", 7 ],
[ "VNB", 7 ],
[ "VGND", 7 ],
[ "VPWR", 7 ]
]
]
], [
[
"sky130_fd_sc_hd__conb_1_0",
[
[ "LO", 7 ],
[ "HI", 7 ],
[ "VPB", 7 ],
[ "VNB", 1 ],
[ "VGND", 5 ],
[ "VPWR", 7 ]
]
]
]
]
]
},
{
"name": [
"gpio_logic_high",
"gpio_logic_high"
],
"devices": [
[
["sky130_fd_sc_hd__decap_6", 1],
["sky130_fd_sc_hd__decap_8", 1],
["sky130_fd_sc_hd__decap_3", 1],
["sky130_fd_sc_hd__decap_4", 1],
["sky130_fd_sc_hd__conb_1", 1 ]
], [
["sky130_fd_sc_hd__decap_6", 1 ],
["sky130_fd_sc_hd__decap_8", 1 ],
["sky130_fd_sc_hd__decap_3", 1 ],
["sky130_fd_sc_hd__decap_4", 1 ],
["sky130_fd_sc_hd__conb_1", 1 ]
]
],
"nets": [
4,
4
],
"badnets": [
],
"badelements": [
],
"pins": [
[
"gpio_logic1",
"vssd1",
"vccd1"
], [
"gpio_logic1",
"vssd1",
"vccd1"
]
]
},
{
"name": [
"sky130_fd_sc_hd__and2_2",
"sky130_fd_sc_hd__and2_2"
],
"devices": [
[
["sky130_fd_pr__pfet_01v8_hvt", 3],
["sky130_fd_pr__nfet_01v8", 3 ]
], [
["sky130_fd_pr__pfet_01v8_hvt", 3 ],
["sky130_fd_pr__nfet_01v8", 3 ]
]
],
"nets": [
9,
9
],
"badnets": [
],
"badelements": [
],
"pins": [
[
"VPWR",
"VPB",
"VNB",
"X",
"A",
"B",
"VGND"
], [
"VPWR",
"VPB",
"VNB",
"X",
"A",
"B",
"VGND"
]
]
},
{
"name": [
"sky130_fd_sc_hd__o21ai_4",
"sky130_fd_sc_hd__o21ai_4"
],
"devices": [
[
["sky130_fd_pr__pfet_01v8_hvt", 3],
["sky130_fd_pr__nfet_01v8", 3 ]
], [
["sky130_fd_pr__pfet_01v8_hvt", 3 ],
["sky130_fd_pr__nfet_01v8", 3 ]
]
],
"nets": [
10,
10
],
"badnets": [
],
"badelements": [
],
"pins": [
[
"Y",
"VPB",
"VNB",
"A2",
"VGND",
"A1",
"B1",
"VPWR"
], [
"Y",
"VPB",
"VNB",
"A2",
"VGND",
"A1",
"B1",
"VPWR"
]
]
},
{
"name": [
"sky130_fd_sc_hd__o21ai_2",
"sky130_fd_sc_hd__o21ai_2"
],
"devices": [
[
["sky130_fd_pr__nfet_01v8", 3],
["sky130_fd_pr__pfet_01v8_hvt", 3 ]
], [
["sky130_fd_pr__nfet_01v8", 3 ],
["sky130_fd_pr__pfet_01v8_hvt", 3 ]
]
],
"nets": [
10,
10
],
"badnets": [
],
"badelements": [
],
"pins": [
[
"Y",
"VPB",
"VNB",
"A2",
"VGND",
"VPWR",
"B1",
"A1"
], [
"Y",
"VPB",
"VNB",
"A2",
"VGND",
"VPWR",
"B1",
"A1"
]
]
},
{
"name": [
"sky130_fd_sc_hd__and2b_2",
"sky130_fd_sc_hd__and2b_2"
],
"devices": [
[
["sky130_fd_pr__pfet_01v8_hvt", 4],
["sky130_fd_pr__nfet_01v8", 4 ]
], [
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
["sky130_fd_pr__nfet_01v8", 4 ]
]
],
"nets": [
10,
10
],
"badnets": [
],
"badelements": [
],
"pins": [
[
"VGND",
"X",
"B",
"A_N",
"VPWR",
"VPB",
"VNB"
], [
"VGND",
"X",
"B",
"A_N",
"VPWR",
"VPB",
"VNB"
]
]
},
{
"name": [
"sky130_fd_sc_hd__and3b_2",
"sky130_fd_sc_hd__and3b_2"
],
"devices": [
[
["sky130_fd_pr__pfet_01v8_hvt", 5],
["sky130_fd_pr__nfet_01v8", 5 ]
], [
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
["sky130_fd_pr__nfet_01v8", 5 ]
]
],
"nets": [
12,
12
],
"badnets": [
],
"badelements": [
],
"pins": [
[
"VGND",
"VNB",
"VPWR",
"VPB",
"C",
"X",
"B",
"A_N"
], [
"VGND",
"VNB",
"VPWR",
"VPB",
"C",
"X",
"B",
"A_N"
]
]
},
{
"name": [
"sky130_fd_sc_hd__dfrtp_2",
"sky130_fd_sc_hd__dfrtp_2"
],
"devices": [
[
["sky130_fd_pr__nfet_01v8", 14],
["sky130_fd_pr__pfet_01v8_hvt", 14 ]
], [
["sky130_fd_pr__nfet_01v8", 14 ],
["sky130_fd_pr__pfet_01v8_hvt", 14 ]
]
],
"nets": [
21,
21
],
"badnets": [
],
"badelements": [
],
"pins": [
[
"RESET_B",
"VPWR",
"VPB",
"VNB",
"VGND",
"Q",
"D",
"CLK"
], [
"RESET_B",
"VPWR",
"VPB",
"VNB",
"VGND",
"Q",
"D",
"CLK"
]
]
},
{
"name": [
"gpio_control_block",
"gpio_control_block"
],
"devices": [
[
["sky130_fd_sc_hd__nand2b_2", 14],
["sky130_fd_sc_hd__dfrtp_4", 13],
["sky130_fd_sc_hd__dfbbn_2", 13],
["sky130_fd_sc_hd__inv_2", 16],
["sky130_fd_sc_hd__buf_16", 19],
["sky130_fd_sc_hd__clkbuf_16", 8],
["sky130_fd_sc_hd__mux2_4", 1],
["sky130_fd_sc_hd__and2_0", 1],
["sky130_fd_sc_hd__dlygate4sd3_1", 13],
["sky130_fd_sc_hd__diode_2", 23],
["sky130_fd_sc_hd__decap_3", 1],
["sky130_fd_sc_hd__conb_1", 2],
["sky130_fd_sc_hd__buf_2", 16],
["sky130_fd_sc_hd__or2_0", 13],
["sky130_fd_sc_hd__nand2_2", 2],
["sky130_fd_sc_hd__nor2_2", 2],
["gpio_logic_high", 1],
["sky130_fd_sc_hd__and2_2", 1],
["sky130_fd_sc_hd__o21ai_4", 1],
["sky130_fd_sc_hd__o21ai_2", 1],
["sky130_fd_sc_hd__and2b_2", 1],
["sky130_fd_sc_hd__and3b_2", 1],
["sky130_fd_sc_hd__dfrtp_2", 1 ]
], [
["sky130_fd_sc_hd__nand2b_2", 14 ],
["sky130_fd_sc_hd__dfrtp_4", 13 ],
["sky130_fd_sc_hd__dfbbn_2", 13 ],
["sky130_fd_sc_hd__inv_2", 16 ],
["sky130_fd_sc_hd__buf_16", 19 ],
["sky130_fd_sc_hd__clkbuf_16", 8 ],
["sky130_fd_sc_hd__mux2_4", 1 ],
["sky130_fd_sc_hd__and2_0", 1 ],
["sky130_fd_sc_hd__dlygate4sd3_1", 13 ],
["sky130_fd_sc_hd__diode_2", 23 ],
["sky130_fd_sc_hd__decap_3", 1 ],
["sky130_fd_sc_hd__conb_1", 2 ],
["sky130_fd_sc_hd__buf_2", 16 ],
["sky130_fd_sc_hd__or2_0", 13 ],
["sky130_fd_sc_hd__nand2_2", 2 ],
["sky130_fd_sc_hd__nor2_2", 2 ],
["gpio_logic_high", 1 ],
["sky130_fd_sc_hd__and2_2", 1 ],
["sky130_fd_sc_hd__o21ai_4", 1 ],
["sky130_fd_sc_hd__o21ai_2", 1 ],
["sky130_fd_sc_hd__and2b_2", 1 ],
["sky130_fd_sc_hd__and3b_2", 1 ],
["sky130_fd_sc_hd__dfrtp_2", 1 ]
]
],
"nets": [
180,
181
],
"badnets": [
[
[
[
"vssd1",
[
[ "sky130_fd_sc_hd__nand2b_2", "VGND", 14 ],
[ "sky130_fd_sc_hd__nand2b_2", "VNB", 14 ],
[ "sky130_fd_sc_hd__dfrtp_4", "VGND", 13 ],
[ "sky130_fd_sc_hd__dfrtp_4", "VNB", 13 ],
[ "sky130_fd_sc_hd__dfbbn_2", "VGND", 13 ],
[ "sky130_fd_sc_hd__dfbbn_2", "VNB", 13 ],
[ "sky130_fd_sc_hd__inv_2", "VGND", 16 ],
[ "sky130_fd_sc_hd__inv_2", "VNB", 16 ],
[ "sky130_fd_sc_hd__buf_16", "VGND", 19 ],
[ "sky130_fd_sc_hd__buf_16", "VNB", 19 ],
[ "sky130_fd_sc_hd__clkbuf_16", "VGND", 8 ],
[ "sky130_fd_sc_hd__clkbuf_16", "VNB", 8 ],
[ "sky130_fd_sc_hd__mux2_4", "VGND", 1 ],
[ "sky130_fd_sc_hd__mux2_4", "VNB", 1 ],
[ "sky130_fd_sc_hd__and2_0", "VGND", 1 ],
[ "sky130_fd_sc_hd__and2_0", "VNB", 1 ],
[ "sky130_fd_sc_hd__dlygate4sd3_1", "VGND", 13 ],
[ "sky130_fd_sc_hd__dlygate4sd3_1", "VNB", 13 ],
[ "sky130_fd_sc_hd__diode_2", "VGND", 23 ],
[ "sky130_fd_sc_hd__diode_2", "VNB", 23 ],
[ "sky130_fd_sc_hd__decap_3", "VGND", 1 ],
[ "sky130_fd_sc_hd__decap_3", "VNB", 1 ],
[ "sky130_fd_sc_hd__conb_1", "VNB", 2 ],
[ "sky130_fd_sc_hd__conb_1", "VGND", 2 ],
[ "sky130_fd_sc_hd__buf_2", "VGND", 16 ],
[ "sky130_fd_sc_hd__buf_2", "VNB", 16 ],
[ "sky130_fd_sc_hd__or2_0", "VGND", 13 ],
[ "sky130_fd_sc_hd__or2_0", "VNB", 13 ],
[ "sky130_fd_sc_hd__nand2_2", "VGND", 2 ],
[ "sky130_fd_sc_hd__nand2_2", "VNB", 2 ],
[ "sky130_fd_sc_hd__nor2_2", "VGND", 2 ],
[ "sky130_fd_sc_hd__nor2_2", "VNB", 2 ],
[ "gpio_logic_high", "vssd1", 1 ],
[ "sky130_fd_sc_hd__and2_2", "VGND", 1 ],
[ "sky130_fd_sc_hd__and2_2", "VNB", 1 ],
[ "sky130_fd_sc_hd__o21ai_4", "VGND", 1 ],
[ "sky130_fd_sc_hd__o21ai_4", "VNB", 1 ],
[ "sky130_fd_sc_hd__o21ai_2", "VGND", 1 ],
[ "sky130_fd_sc_hd__o21ai_2", "VNB", 1 ],
[ "sky130_fd_sc_hd__and2b_2", "VGND", 1 ],
[ "sky130_fd_sc_hd__and2b_2", "VNB", 1 ],
[ "sky130_fd_sc_hd__and3b_2", "VGND", 1 ],
[ "sky130_fd_sc_hd__and3b_2", "VNB", 1 ],
[ "sky130_fd_sc_hd__dfrtp_2", "VGND", 1 ],
[ "sky130_fd_sc_hd__dfrtp_2", "VNB", 1 ]
]
],
[
"vccd",
[
[ "sky130_fd_sc_hd__nand2b_2", "VPWR", 14 ],
[ "sky130_fd_sc_hd__nand2b_2", "VPB", 14 ],
[ "sky130_fd_sc_hd__dfrtp_4", "VPWR", 13 ],
[ "sky130_fd_sc_hd__dfrtp_4", "VPB", 13 ],
[ "sky130_fd_sc_hd__dfbbn_2", "VPWR", 13 ],
[ "sky130_fd_sc_hd__dfbbn_2", "VPB", 13 ],
[ "sky130_fd_sc_hd__inv_2", "VPWR", 16 ],
[ "sky130_fd_sc_hd__inv_2", "VPB", 16 ],
[ "sky130_fd_sc_hd__buf_16", "VPWR", 19 ],
[ "sky130_fd_sc_hd__buf_16", "VPB", 19 ],
[ "sky130_fd_sc_hd__clkbuf_16", "VPWR", 8 ],
[ "sky130_fd_sc_hd__clkbuf_16", "VPB", 8 ],
[ "sky130_fd_sc_hd__mux2_4", "VPWR", 1 ],
[ "sky130_fd_sc_hd__mux2_4", "VPB", 1 ],
[ "sky130_fd_sc_hd__and2_0", "VPWR", 1 ],
[ "sky130_fd_sc_hd__and2_0", "VPB", 1 ],
[ "sky130_fd_sc_hd__dlygate4sd3_1", "VPWR", 13 ],
[ "sky130_fd_sc_hd__dlygate4sd3_1", "VPB", 13 ],
[ "sky130_fd_sc_hd__diode_2", "VPWR", 23 ],
[ "sky130_fd_sc_hd__diode_2", "VPB", 23 ],
[ "sky130_fd_sc_hd__decap_3", "VPWR", 1 ],
[ "sky130_fd_sc_hd__decap_3", "VPB", 1 ],
[ "sky130_fd_sc_hd__conb_1", "VPB", 2 ],
[ "sky130_fd_sc_hd__conb_1", "VPWR", 2 ],
[ "sky130_fd_sc_hd__buf_2", "VPWR", 16 ],
[ "sky130_fd_sc_hd__buf_2", "VPB", 16 ],
[ "sky130_fd_sc_hd__or2_0", "VPWR", 13 ],
[ "sky130_fd_sc_hd__or2_0", "VPB", 13 ],
[ "sky130_fd_sc_hd__nand2_2", "VPWR", 2 ],
[ "sky130_fd_sc_hd__nand2_2", "VPB", 2 ],
[ "sky130_fd_sc_hd__nor2_2", "VPWR", 2 ],
[ "sky130_fd_sc_hd__nor2_2", "VPB", 2 ],
[ "sky130_fd_sc_hd__and2_2", "VPWR", 1 ],
[ "sky130_fd_sc_hd__and2_2", "VPB", 1 ],
[ "sky130_fd_sc_hd__o21ai_4", "VPWR", 1 ],
[ "sky130_fd_sc_hd__o21ai_4", "VPB", 1 ],
[ "sky130_fd_sc_hd__o21ai_2", "VPWR", 1 ],
[ "sky130_fd_sc_hd__o21ai_2", "VPB", 1 ],
[ "sky130_fd_sc_hd__and2b_2", "VPWR", 1 ],
[ "sky130_fd_sc_hd__and2b_2", "VPB", 1 ],
[ "sky130_fd_sc_hd__and3b_2", "VPWR", 1 ],
[ "sky130_fd_sc_hd__and3b_2", "VPB", 1 ],
[ "sky130_fd_sc_hd__dfrtp_2", "VPWR", 1 ],
[ "sky130_fd_sc_hd__dfrtp_2", "VPB", 1 ]
]
],
[
"sky130_fd_sc_hd__macro_sparecell:spare_cell/sky130_fd_sc_hd__conb_1_0/HI",
[
[ "sky130_fd_sc_hd__conb_1", "HI", 1 ]
]
],
[
"(no matching net)",
[
[ "", "", 0 ]
]
]
], [
[
"vssd",
[
[ "sky130_fd_sc_hd__diode_2", "VGND", 23 ],
[ "sky130_fd_sc_hd__diode_2", "VNB", 23 ],
[ "sky130_fd_sc_hd__decap_3", "VGND", 1 ],
[ "sky130_fd_sc_hd__decap_3", "VNB", 1 ],
[ "sky130_fd_sc_hd__inv_2", "VGND", 14 ],
[ "sky130_fd_sc_hd__inv_2", "VNB", 14 ],
[ "sky130_fd_sc_hd__and2_0", "VGND", 1 ],
[ "sky130_fd_sc_hd__and2_0", "VNB", 1 ],
[ "sky130_fd_sc_hd__mux2_4", "VGND", 1 ],
[ "sky130_fd_sc_hd__mux2_4", "VNB", 1 ],
[ "sky130_fd_sc_hd__nand2b_2", "VGND", 14 ],
[ "sky130_fd_sc_hd__nand2b_2", "VNB", 14 ],
[ "sky130_fd_sc_hd__and3b_2", "VGND", 1 ],
[ "sky130_fd_sc_hd__and3b_2", "VNB", 1 ],
[ "sky130_fd_sc_hd__and2b_2", "VGND", 1 ],
[ "sky130_fd_sc_hd__and2b_2", "VNB", 1 ],
[ "sky130_fd_sc_hd__o21ai_2", "VGND", 1 ],
[ "sky130_fd_sc_hd__o21ai_2", "VNB", 1 ],
[ "sky130_fd_sc_hd__o21ai_4", "VGND", 1 ],
[ "sky130_fd_sc_hd__o21ai_4", "VNB", 1 ],
[ "sky130_fd_sc_hd__and2_2", "VGND", 1 ],
[ "sky130_fd_sc_hd__and2_2", "VNB", 1 ],
[ "sky130_fd_sc_hd__or2_0", "VGND", 13 ],
[ "sky130_fd_sc_hd__or2_0", "VNB", 13 ],
[ "sky130_fd_sc_hd__dfbbn_2", "VGND", 13 ],
[ "sky130_fd_sc_hd__dfbbn_2", "VNB", 13 ],
[ "sky130_fd_sc_hd__dfrtp_4", "VGND", 13 ],
[ "sky130_fd_sc_hd__dfrtp_4", "VNB", 13 ],
[ "sky130_fd_sc_hd__dfrtp_2", "VGND", 1 ],
[ "sky130_fd_sc_hd__dfrtp_2", "VNB", 1 ],
[ "sky130_fd_sc_hd__buf_2", "VGND", 16 ],
[ "sky130_fd_sc_hd__buf_2", "VNB", 16 ],
[ "sky130_fd_sc_hd__clkbuf_16", "VGND", 8 ],
[ "sky130_fd_sc_hd__clkbuf_16", "VNB", 8 ],
[ "sky130_fd_sc_hd__conb_1", "VNB", 1 ],
[ "sky130_fd_sc_hd__conb_1", "VGND", 1 ],
[ "sky130_fd_sc_hd__dlygate4sd3_1", "VGND", 13 ],
[ "sky130_fd_sc_hd__dlygate4sd3_1", "VNB", 13 ],
[ "sky130_fd_sc_hd__buf_16", "VGND", 19 ],
[ "sky130_fd_sc_hd__buf_16", "VNB", 19 ],
[ "sky130_fd_sc_hd__nand2_2", "VPWR", 2 ],
[ "sky130_fd_sc_hd__nand2_2", "VPB", 2 ],
[ "sky130_fd_sc_hd__inv_2", "Y", 2 ],
[ "sky130_fd_sc_hd__inv_2", "VPB", 2 ],
[ "sky130_fd_sc_hd__nor2_2", "VPWR", 2 ],
[ "sky130_fd_sc_hd__nor2_2", "VPB", 2 ],
[ "sky130_fd_sc_hd__conb_1", "HI", 1 ],
[ "sky130_fd_sc_hd__conb_1", "VPWR", 1 ]
]
],
[
"vccd",
[
[ "sky130_fd_sc_hd__diode_2", "VPWR", 23 ],
[ "sky130_fd_sc_hd__diode_2", "VPB", 23 ],
[ "sky130_fd_sc_hd__decap_3", "VPWR", 1 ],
[ "sky130_fd_sc_hd__decap_3", "VPB", 1 ],
[ "sky130_fd_sc_hd__inv_2", "VPWR", 16 ],
[ "sky130_fd_sc_hd__inv_2", "VPB", 14 ],
[ "sky130_fd_sc_hd__and2_0", "VPWR", 1 ],
[ "sky130_fd_sc_hd__and2_0", "VPB", 1 ],
[ "sky130_fd_sc_hd__mux2_4", "VPWR", 1 ],
[ "sky130_fd_sc_hd__mux2_4", "VPB", 1 ],
[ "sky130_fd_sc_hd__nand2b_2", "VPWR", 14 ],
[ "sky130_fd_sc_hd__nand2b_2", "VPB", 14 ],
[ "sky130_fd_sc_hd__and3b_2", "VPWR", 1 ],
[ "sky130_fd_sc_hd__and3b_2", "VPB", 1 ],
[ "sky130_fd_sc_hd__and2b_2", "VPWR", 1 ],
[ "sky130_fd_sc_hd__and2b_2", "VPB", 1 ],
[ "sky130_fd_sc_hd__o21ai_2", "VPWR", 1 ],
[ "sky130_fd_sc_hd__o21ai_2", "VPB", 1 ],
[ "sky130_fd_sc_hd__o21ai_4", "VPWR", 1 ],
[ "sky130_fd_sc_hd__o21ai_4", "VPB", 1 ],
[ "sky130_fd_sc_hd__and2_2", "VPWR", 1 ],
[ "sky130_fd_sc_hd__and2_2", "VPB", 1 ],
[ "sky130_fd_sc_hd__or2_0", "VPWR", 13 ],
[ "sky130_fd_sc_hd__or2_0", "VPB", 13 ],
[ "sky130_fd_sc_hd__dfbbn_2", "VPWR", 13 ],
[ "sky130_fd_sc_hd__dfbbn_2", "VPB", 13 ],
[ "sky130_fd_sc_hd__dfrtp_4", "VPWR", 13 ],
[ "sky130_fd_sc_hd__dfrtp_4", "VPB", 13 ],
[ "sky130_fd_sc_hd__dfrtp_2", "VPWR", 1 ],
[ "sky130_fd_sc_hd__dfrtp_2", "VPB", 1 ],
[ "sky130_fd_sc_hd__buf_2", "VPWR", 16 ],
[ "sky130_fd_sc_hd__buf_2", "VPB", 16 ],
[ "sky130_fd_sc_hd__clkbuf_16", "VPWR", 8 ],
[ "sky130_fd_sc_hd__clkbuf_16", "VPB", 8 ],
[ "sky130_fd_sc_hd__conb_1", "VPB", 2 ],
[ "sky130_fd_sc_hd__conb_1", "VPWR", 1 ],
[ "sky130_fd_sc_hd__dlygate4sd3_1", "VPWR", 13 ],
[ "sky130_fd_sc_hd__dlygate4sd3_1", "VPB", 13 ],
[ "sky130_fd_sc_hd__buf_16", "VPWR", 19 ],
[ "sky130_fd_sc_hd__buf_16", "VPB", 19 ],
[ "sky130_fd_sc_hd__nand2_2", "Y", 2 ],
[ "sky130_fd_sc_hd__nand2_2", "VNB", 2 ],
[ "sky130_fd_sc_hd__inv_2", "VNB", 2 ],
[ "sky130_fd_sc_hd__nor2_2", "Y", 2 ],
[ "sky130_fd_sc_hd__nor2_2", "VNB", 2 ],
[ "sky130_fd_sc_hd__conb_1", "LO", 1 ]
]
],
[
"vssd1",
[
[ "gpio_logic_high", "vssd1", 1 ]
]
],
[
"spare_cell/sky130_fd_sc_hd__conb_1_0/HI",
[
[ "sky130_fd_sc_hd__conb_1", "VNB", 1 ]
]
]
]
],
[
[
[
"spare_cell/LO",
[
[ "sky130_fd_sc_hd__nand2_2", "A", 2 ],
[ "sky130_fd_sc_hd__nand2_2", "B", 2 ],
[ "sky130_fd_sc_hd__conb_1", "LO", 1 ]
]
]
], [
[
"_noconnect_1_",
[
[ "sky130_fd_sc_hd__nand2_2", "B", 2 ],
[ "sky130_fd_sc_hd__nand2_2", "VGND", 2 ],
[ "sky130_fd_sc_hd__conb_1", "VGND", 1 ]
]
]
]
]
],
"badelements": [
[
[
[
"sky130_fd_sc_hd__macro_sparecell:spare_cell//sky130_fd_sc_hd__conb_1_0",
[
[ "LO", 5 ],
[ "HI", 1 ],
[ "VPB", 326 ],
[ "VNB", 327 ],
[ "VGND", 327 ],
[ "VPWR", 326 ]
]
]
], [
[
"spare_cell//sky130_fd_sc_hd__conb_1_0",
[
[ "LO", 326 ],
[ "HI", 326 ],
[ "VPB", 326 ],
[ "VNB", 1 ],
[ "VGND", 5 ],
[ "VPWR", 326 ]
]
]
]
]
],
"pins": [
[
"vssd1",
"vccd",
"serial_load_out",
"vccd1",
"serial_clock_out",
"pad_gpio_dm[1]",
"pad_gpio_dm[2]",
"one",
"pad_gpio_dm[0]",
"pad_gpio_out",
"pad_gpio_outenb",
"resetn_out",
"serial_data_out",
"user_gpio_in",
"mgmt_gpio_in",
"pad_gpio_slow_sel",
"pad_gpio_inenb",
"pad_gpio_vtrip_sel",
"pad_gpio_holdover",
"pad_gpio_ib_mode_sel",
"pad_gpio_ana_en",
"pad_gpio_ana_pol",
"pad_gpio_ana_sel",
"zero",
"gpio_defaults[1]",
"gpio_defaults[10]",
"gpio_defaults[12]",
"gpio_defaults[11]",
"gpio_defaults[0]",
"gpio_defaults[7]",
"gpio_defaults[2]",
"gpio_defaults[3]",
"gpio_defaults[6]",
"gpio_defaults[5]",
"gpio_defaults[4]",
"gpio_defaults[8]",
"gpio_defaults[9]",
"user_gpio_oeb",
"user_gpio_out",
"serial_clock",
"serial_load",
"pad_gpio_in",
"mgmt_gpio_oeb",
"serial_data_in",
"mgmt_gpio_out",
"resetn",
"(no matching pin)"
], [
"vssd",
"vccd",
"serial_load_out",
"vccd1",
"serial_clock_out",
"pad_gpio_dm[1]",
"pad_gpio_dm[2]",
"one",
"pad_gpio_dm[0]",
"pad_gpio_out",
"pad_gpio_outenb",
"resetn_out",
"serial_data_out",
"user_gpio_in",
"mgmt_gpio_in",
"pad_gpio_slow_sel",
"pad_gpio_inenb",
"pad_gpio_vtrip_sel",
"pad_gpio_holdover",
"pad_gpio_ib_mode_sel",
"pad_gpio_ana_en",
"pad_gpio_ana_pol",
"pad_gpio_ana_sel",
"zero",
"gpio_defaults[1]",
"gpio_defaults[10]",
"gpio_defaults[12]",
"gpio_defaults[11]",
"gpio_defaults[0]",
"gpio_defaults[7]",
"gpio_defaults[2]",
"gpio_defaults[3]",
"gpio_defaults[6]",
"gpio_defaults[5]",
"gpio_defaults[4]",
"gpio_defaults[8]",
"gpio_defaults[9]",
"user_gpio_oeb",
"user_gpio_out",
"serial_clock",
"serial_load",
"pad_gpio_in",
"mgmt_gpio_oeb",
"serial_data_in",
"mgmt_gpio_out",
"resetn",
"vssd1"
]
]
}
]