From fdc4b86a4fb0bd664dc647f016c8fe5d5e73c3a8 Mon Sep 17 00:00:00 2001 From: Franck Wajsburt Date: Thu, 31 Aug 2000 11:45:37 +0000 Subject: [PATCH] Correction d'une erreur de DRC --- alliance/share/cells/sxlib/a3_x2.ap | 165 ++++++++++++++-------------- 1 file changed, 84 insertions(+), 81 deletions(-) diff --git a/alliance/share/cells/sxlib/a3_x2.ap b/alliance/share/cells/sxlib/a3_x2.ap index 9176287e..b7fad827 100644 --- a/alliance/share/cells/sxlib/a3_x2.ap +++ b/alliance/share/cells/sxlib/a3_x2.ap @@ -1,87 +1,90 @@ V ALLIANCE : 6 -H a3_x2,P,30/ 8/2000,100 +H a3_x2,P,31/ 8/2000,100 A 0,0,3000,5000 -R 1500,2500,ref_ref,i2_25 -R 1500,2000,ref_ref,i2_20 -R 1500,1500,ref_ref,i2_15 -R 500,1500,ref_ref,i0_15 -R 1000,1500,ref_ref,i1_15 -R 500,3500,ref_ref,i0_35 -R 500,3000,ref_ref,i0_30 -R 500,2500,ref_ref,i0_25 -R 500,2000,ref_ref,i0_20 -R 1000,3500,ref_ref,i1_35 -R 1000,3000,ref_ref,i1_30 -R 1000,2500,ref_ref,i1_25 -R 1000,2000,ref_ref,i1_20 -R 1500,3000,ref_ref,i2_30 -R 1500,3500,ref_ref,i2_35 -R 2500,2000,ref_ref,q_20 -R 2500,2500,ref_ref,q_25 -R 2500,3000,ref_ref,q_30 -R 2500,3500,ref_ref,q_35 -R 2500,4000,ref_ref,q_40 -R 2500,1500,ref_ref,q_15 R 2500,1000,ref_ref,q_10 -S 300,300,1100,300,300,*,RIGHT,PTIE -S 2500,3000,2700,3000,200,*,LEFT,ALU1 -S 2500,3500,2700,3500,200,*,LEFT,ALU1 -S 1900,2000,2300,2000,300,*,RIGHT,POLY -S 1800,2600,1800,3100,100,*,UP,POLY -S 1400,1900,1400,2600,100,*,UP,POLY -S 1400,2600,1800,2600,100,*,RIGHT,POLY -S 1500,1500,1500,3500,100,*,DOWN,ALU1 -S 2000,1000,2000,4000,100,*,UP,ALU1 -S 300,1000,2000,1000,100,*,RIGHT,ALU1 -S 300,800,300,1700,300,*,UP,NDIF -S 600,600,600,1900,100,*,DOWN,NTRANS -S 1000,600,1000,1900,100,*,DOWN,NTRANS -S 1400,600,1400,1900,100,*,DOWN,NTRANS -S 1000,1900,1000,3100,100,*,UP,POLY -S 600,1900,600,3100,100,*,UP,POLY -S 1000,3100,1200,3100,100,*,LEFT,POLY -S 900,3300,900,4600,300,*,DOWN,PDIF -S 1200,3100,1200,4400,100,*,UP,PTRANS -S 300,3300,300,4200,300,*,DOWN,PDIF -S 600,3100,600,4400,100,*,UP,PTRANS -S 500,1500,500,3500,100,*,DOWN,ALU1 -S 1000,1500,1000,3500,100,*,DOWN,ALU1 -S 300,4000,2000,4000,100,*,RIGHT,ALU1 -S 2100,2800,2100,4700,300,*,UP,PDIF -S 0,4700,3000,4700,600,vdd,RIGHT,CALU1 -S 0,300,3000,300,600,vss,RIGHT,CALU1 -S 2400,1400,2400,2600,100,*,UP,POLY -S 2700,2800,2700,4700,300,*,DOWN,PDIF -S 2400,2600,2400,4900,100,*,UP,PTRANS -S 2400,100,2400,1400,100,*,DOWN,NTRANS -S 2700,300,2700,1200,300,*,UP,NDIF -S 1800,3100,1800,4400,100,*,UP,PTRANS -S 1500,3300,1500,4200,300,*,DOWN,PDIF -S 0,3900,3000,3900,2400,*,RIGHT,NWELL -S 2500,950,2500,4050,200,*,DOWN,ALU1 -S 2450,4000,2700,4000,200,*,LEFT,ALU1 -S 2450,1000,2700,1000,200,*,LEFT,ALU1 -S 1500,1500,1500,3500,200,i2,DOWN,CALU1 -S 500,1500,500,3500,200,i0,DOWN,CALU1 -S 1000,1500,1000,3500,200,i1,DOWN,CALU1 +R 2500,1500,ref_ref,q_15 +R 2500,4000,ref_ref,q_40 +R 2500,3500,ref_ref,q_35 +R 2500,3000,ref_ref,q_30 +R 2500,2500,ref_ref,q_25 +R 2500,2000,ref_ref,q_20 +R 1500,3500,ref_ref,i2_35 +R 1500,3000,ref_ref,i2_30 +R 1000,2000,ref_ref,i1_20 +R 1000,2500,ref_ref,i1_25 +R 1000,3000,ref_ref,i1_30 +R 1000,3500,ref_ref,i1_35 +R 500,2000,ref_ref,i0_20 +R 500,2500,ref_ref,i0_25 +R 500,3000,ref_ref,i0_30 +R 500,3500,ref_ref,i0_35 +R 1000,1500,ref_ref,i1_15 +R 500,1500,ref_ref,i0_15 +R 1500,1500,ref_ref,i2_15 +R 1500,2000,ref_ref,i2_20 +R 1500,2500,ref_ref,i2_25 +S 1700,300,1700,1700,300,*,UP,NDIF +S 2000,300,2000,1200,400,*,UP,NDIF S 2500,1000,2500,4000,200,q,DOWN,CALU1 -V 1500,4700,CONT_BODY_N,* -V 1100,300,CONT_BODY_P,* -V 700,300,CONT_BODY_P,* -V 300,300,CONT_BODY_P,* -V 2000,2000,CONT_POLY,* -V 1500,2500,CONT_POLY,* -V 300,1000,CONT_DIF_N,* -V 500,2000,CONT_POLY,* -V 2000,500,CONT_DIF_N,* -V 900,4500,CONT_DIF_P,* -V 1000,2500,CONT_POLY,* -V 300,4000,CONT_DIF_P,* -V 1500,4000,CONT_DIF_P,* -V 300,4700,CONT_BODY_N,* -V 2700,3000,CONT_DIF_P,* -V 2700,4000,CONT_DIF_P,* -V 2700,3500,CONT_DIF_P,* -V 2700,1000,CONT_DIF_N,* +S 1000,1500,1000,3500,200,i1,DOWN,CALU1 +S 500,1500,500,3500,200,i0,DOWN,CALU1 +S 1500,1500,1500,3500,200,i2,DOWN,CALU1 +S 2450,1000,2700,1000,200,*,LEFT,ALU1 +S 2450,4000,2700,4000,200,*,LEFT,ALU1 +S 2500,950,2500,4050,200,*,DOWN,ALU1 +S 0,3900,3000,3900,2400,*,RIGHT,NWELL +S 1500,3300,1500,4200,300,*,DOWN,PDIF +S 1800,3100,1800,4400,100,*,UP,PTRANS +S 2700,300,2700,1200,300,*,UP,NDIF +S 2400,100,2400,1400,100,*,DOWN,NTRANS +S 2400,2600,2400,4900,100,*,UP,PTRANS +S 2700,2800,2700,4700,300,*,DOWN,PDIF +S 2400,1400,2400,2600,100,*,UP,POLY +S 0,300,3000,300,600,vss,RIGHT,CALU1 +S 0,4700,3000,4700,600,vdd,RIGHT,CALU1 +S 2100,2800,2100,4700,300,*,UP,PDIF +S 300,4000,2000,4000,100,*,RIGHT,ALU1 +S 1000,1500,1000,3500,100,*,DOWN,ALU1 +S 500,1500,500,3500,100,*,DOWN,ALU1 +S 600,3100,600,4400,100,*,UP,PTRANS +S 300,3300,300,4200,300,*,DOWN,PDIF +S 1200,3100,1200,4400,100,*,UP,PTRANS +S 900,3300,900,4600,300,*,DOWN,PDIF +S 1000,3100,1200,3100,100,*,LEFT,POLY +S 600,1900,600,3100,100,*,UP,POLY +S 1000,1900,1000,3100,100,*,UP,POLY +S 1400,600,1400,1900,100,*,DOWN,NTRANS +S 1000,600,1000,1900,100,*,DOWN,NTRANS +S 600,600,600,1900,100,*,DOWN,NTRANS +S 300,800,300,1700,300,*,UP,NDIF +S 300,1000,2000,1000,100,*,RIGHT,ALU1 +S 2000,1000,2000,4000,100,*,UP,ALU1 +S 1500,1500,1500,3500,100,*,DOWN,ALU1 +S 1400,2600,1800,2600,100,*,RIGHT,POLY +S 1400,1900,1400,2600,100,*,UP,POLY +S 1800,2600,1800,3100,100,*,UP,POLY +S 1900,2000,2300,2000,300,*,RIGHT,POLY +S 2500,3500,2700,3500,200,*,LEFT,ALU1 +S 2500,3000,2700,3000,200,*,LEFT,ALU1 +S 300,300,1100,300,300,*,RIGHT,PTIE +V 1700,500,CONT_DIF_N,* +V 2100,500,CONT_DIF_N,* V 2100,4500,CONT_DIF_P,* +V 2700,1000,CONT_DIF_N,* +V 2700,3500,CONT_DIF_P,* +V 2700,4000,CONT_DIF_P,* +V 2700,3000,CONT_DIF_P,* +V 300,4700,CONT_BODY_N,* +V 1500,4000,CONT_DIF_P,* +V 300,4000,CONT_DIF_P,* +V 1000,2500,CONT_POLY,* +V 900,4500,CONT_DIF_P,* +V 500,2000,CONT_POLY,* +V 300,1000,CONT_DIF_N,* +V 1500,2500,CONT_POLY,* +V 2000,2000,CONT_POLY,* +V 300,300,CONT_BODY_P,* +V 700,300,CONT_BODY_P,* +V 1100,300,CONT_BODY_P,* +V 1500,4700,CONT_BODY_N,* EOF