Big bugs dans windex ...
This commit is contained in:
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@ -1,12 +1,9 @@
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ACTION, GENPAT Package
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AFFECT, GENPAT Package
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ALLIANCE VHDL Subset
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ACTION (3) - GENPAT Package
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AFFECT (3) - GENPAT Package
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AMG (1) - Array Multiplior Generator
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ARRAY, GENPAT Package
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ARRAY (3) - GENPAT Package
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BEH (3) - Generic behavioural data structures
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BOOM (1) - BOOlean Minimization
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BUS (3) - Creates a bus name for netlist
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BooG (1) - Binding and Optimizing On Gates.
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COPY_UP_ALL_CON (3) - copy all physical connectors of an instance face in the current figure
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COPY_UP_ALL_REF (3) - copy a several physical reference from an instance in the current figure
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COPY_UP_CON (3) - copy a physical connector from an instance in the current figure
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@ -146,8 +143,8 @@ GET_REF_X (3) - retrieve the x coordinate of an instance reference
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GET_REF_Y (3) - retrieve the y coordinate of an instance reference
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HEIGHT (3) - compute the height of a model
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INF (5) - YAGLE and TAS information file
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INIT, GENPAT Package
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LABEL, GENPAT Package
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INIT (3) - GENPAT Package
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LABEL (3) - GENPAT Package
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LOAD_LOFIG (3) - loads a netlist form disk and opens it as current figure
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LOCON (3) - adds a logical connector to the current netlist figure
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LOINS (3) - add a logical instance to the current figure
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@ -155,7 +152,6 @@ LOINSE (3) - add a logical instance to the current figure, with explic
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LOSIG (3) - declare an internal logical signal, or a vector of internal logical signals
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LOSIGMERGE (3) - merge two logical signals
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LOTRS (3) - adds a logical transistor to the current netlist figure
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LooN (1) - Light optimizing on Nets.
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MBK_CATAL_NAME (1) - define the mbk catalog file
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MBK_CATA_LIB (1) - define the mbk catalog directory
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MBK_FILTER_SFX (1) - define the input/output filter suffixe.
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@ -216,18 +212,18 @@ WIDTH (3) - compute the width of a model
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WIRE1 (3) - place a physical segment in the current figure
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WIRE2 (3) - place two physical segments in the current figure
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WIRE3 (3) - place three physical segments in the current figure
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a2_dp
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a2_y
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a2p_dp
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a2p_y
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a3_dp
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a3_y
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a3p_dp
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a3p_y
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a4_dp
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a4_y
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a4p_dp
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a4p_y
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a2_dp (5)
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a2_y (5)
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a2p_dp (5)
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a2p_y (5)
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a3_dp (5)
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a3_y (5)
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a3p_dp (5)
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a3p_y (5)
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a4_dp (5)
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a4_y (5)
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a4p_dp (5)
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a4p_y (5)
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abl (1) - Prefixed representation for boolean functions
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ablToBddCct (3) - converts an ABL into a BDD within a circuit
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aboxmbkrds (3) - converts MBK abutment box to RDS rectangle
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@ -289,8 +285,8 @@ allocrdsrecwin (3) - allocates a structure used to know windows which contains
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allocrdswin (3) - allocates window's table
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allocrdswindow (3) - allocates a window structure
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allocrdswinrec (3) - allocates a structure used to create a list of tables of rectangles.
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annup_dp
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annup_y
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annup_dp (5)
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annup_y (5)
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anyExpr (3) - returns the value of a logical OR applied on the results of the application of a function on the arguments of an operator expression
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ap (5) - Alliance physical format
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append (3) - append a chain_list to an other chain_list
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@ -315,8 +311,8 @@ auth2table (3) - hash table structure
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authelem (3) - element in an hash table
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authtable (3) - hash table structure
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autresizeblock (3) - resizes a memory block
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b1_dp
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b1_y
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b1_dp (5)
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b1_y (5)
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bbr (1) - A pitchless channel router for preplaced two blocks floorplan
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bdd (1) - Mutli Reduced Ordered Binary Decision Diagrams
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bdd (1) - Ordered binary decision diagrams representation
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@ -353,6 +349,8 @@ bgd (1) - register file generator
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biabl (3) - BEH data structure
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bigvia (3) - draws a non minimal via as a bunch of vias
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binode (3) - BEH data structure
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boog (1) - Binding and Optimizing On Gates.
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boom (1) - BOOlean Minimization
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bop (1) - boolean optimization of a logic level behavioural description (VHDL data flow)
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bsg (1) - Barrel Shifter Generator
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buildrdswindow (3) - builds windowing of a figure
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@ -367,9 +365,9 @@ checkloconorder (3) - checks the consistency of a list of logical connectors
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clearbddsystemref (3) - clears the references for all bdd nodes.
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clearbddsystemrefext (3) - clears the external references for all bdd nodes.
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clearbddsystemrefint (3) - clears the internal references for all bdd nodes.
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cmx2_y
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cmx2_y (5)
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cofactorbddnode (3) - computes the generalized cofactor.
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comment, GENPAT Package
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comment (3) - GENPAT Package
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composeBdd (3) - substitutes an index by a BDD in another BDD
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composeCct (3) - composes all the outputs within a circuit with a BDD
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composebddnode (3) - substitutes a variable by a bdd in another bdd.
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@ -377,8 +375,8 @@ concatname (3) - concatenate two names with user separator
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conmbkrds (3) - converts MBK connector to RDS rectangle
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constraintBdd (3) - restricts a BDD to another BDD
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constraintCct (3) - restricts all the outputs within a circuit with a BDD constraint
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conv, GENPAT Package
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convcmp, GENPAT Package
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conv (3) - GENPAT Package
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convcmp (3) - , GENPAT Package
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convertbddcircuitabl (3) - converts a bdd node to an abl expression.
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convertbddcircuitsumabl (3) - converts a bdd node to an abl expression.
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convertbddindexabl (3) - converts a bdd index to an abl expression.
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@ -402,9 +400,9 @@ createauth2table (3) - creates an hash table with two keys.
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createauthtable (3) - creates a simple hash table.
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createbddcircuit (3) - creates a bdd circuit.
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createbddsystem (3) - creates a bdd system.
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cry_dp
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cry_y
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d1_y
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cry_dp (5)
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cry_y (5)
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d1_y (5)
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decbddrefext (3) - decrements the external reference of a bdd node.
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decbddrefint (3) - decrements the internal reference of a bdd node.
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defab (3) - defines the abutment box of a phfig
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@ -565,23 +563,23 @@ isbddvarinsupport (3) - tests if a variable appears in a bdd.
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isvdd -tells if a name contains the pattern defined by the user
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isvss -tells if a name contains the pattern defined by the user
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k2f, FSM translator ALLIANCE format from/to Berkeley format
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l1_y
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l1n_y
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l1x_y
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l2_y
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l2n_y
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l1_y (5)
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l1n_y (5)
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l1x_y (5)
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l2_y (5)
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l2n_y (5)
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l2p (1) - Creates a PostScript file from a symbolic layout file, or from a physical layout file.
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l3_y
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l3r_y
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l3s_y
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l4_y
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l4r_y
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l4s_y
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l5_y
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l5r_y
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l5s_y
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l6r_y
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l6s_y
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l3_y (5)
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l3r_y (5)
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l3s_y (5)
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l4_y (5)
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l4r_y (5)
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l4s_y (5)
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l5_y (5)
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l5r_y (5)
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l5s_y (5)
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l6r_y (5)
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l6s_y (5)
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lax (5) - Parameter file for logic synthesis
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lengthExpr (3) - returns the number of arguments in an expression
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librds (1) - rds library description
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@ -600,6 +598,7 @@ lofigchain (3) - creates a netlist in terms of connectors on signals
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log (1) - logical representations for boolean functions and utilities.
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log (3) - logical representations for boolean functions and utilities.
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loins (3) - mbk logical instance
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loon (1) - Light optimizing on Nets.
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losig (3) - mbk logical signal
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lotrs (3) - mbk logical transistor
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lvx (1) - Logical Versus eXtracted net-list comparator
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@ -629,77 +628,77 @@ minExpr (3) - returns the lowest argument of an operator expression.
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mlodebug (3) - logical data structure contents debug function
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modelmbkrds (3) - gets all models of instances contained in a figure.
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mphdebug (3) - physical data structure contents debug function
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ms2_dp
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ms2_y
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ms2n_dp
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ms2n_y
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ms2rx_dp
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ms2rx_y
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ms2sx_dp
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ms2sx_y
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ms2x_dp
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ms2x_y
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ms_dp
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ms_y
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msn_dp
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msn_y
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msrx_dp
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msrx_y
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mssx_dp
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mssx_y
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msx_dp
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msx_y
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mx2_dp
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mx2_y
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mx2p_dp
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mx2p_y
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mx3_dp
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mx3_y
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mx4_y
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n1_dp
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n1_y
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na2_dp
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na2_y
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na2p_dp
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na2p_y
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na3_dp
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na3_y
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na3p_dp
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na3p_y
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na4_dp
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na4_y
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ms2_dp (5)
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ms2_y (5)
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ms2n_dp (5)
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ms2n_y (5)
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ms2rx_dp (5)
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ms2rx_y (5)
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ms2sx_dp (5)
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ms2sx_y (5)
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ms2x_dp (5)
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ms2x_y (5)
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ms_dp (5)
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ms_y (5)
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msn_dp (5)
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msn_y (5)
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msrx_dp (5)
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msrx_y (5)
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mssx_dp (5)
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mssx_y (5)
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msx_dp (5)
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msx_y (5)
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mx2_dp (5)
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mx2_y (5)
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mx2p_dp (5)
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mx2p_y (5)
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mx3_dp (5)
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mx3_y (5)
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mx4_y (5)
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n1_dp (5)
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n1_y (5)
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na2_dp (5)
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na2_y (5)
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na2p_dp (5)
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na2p_y (5)
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na3_dp (5)
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na3_y (5)
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na3p_dp (5)
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na3p_y (5)
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na4_dp (5)
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na4_y (5)
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namealloc (3) - hash table for strings
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namefind (3) - hash table for strings
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nameindex (3) - concatenate a name and index with user separator
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nao3_dp
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nao3_y
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nao4_dp
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nao4_y
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nao3_dp (5)
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nao3_y (5)
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nao4_dp (5)
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nao4_y (5)
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naturalstrcmp (3) - compare string in alphabetical order for letters and numerical for digits.
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ndrv_dp
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ndrv_y
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neou4_dp
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nmx2_dp
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nmx2_y
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no2_dp
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no2_y
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no3_dp
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no3_y
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noa3_dp
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noa3_y
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noa4_dp
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noa4_y
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nop2_dp
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nop2_y
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nop3_dp
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nop3_y
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ndrv_dp (5)
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ndrv_y (5)
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neou4_dp (5)
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nmx2_dp (5)
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nmx2_y (5)
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no2_dp (5)
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no2_y (5)
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no3_dp (5)
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no3_y (5)
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noa3_dp (5)
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noa3_y (5)
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noa4_dp (5)
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noa4_y (5)
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nop2_dp (5)
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nop2_y (5)
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nop3_dp (5)
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nop3_y (5)
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normExpr (3) - normalizes an expression
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notBdd (3) - complements a BDD
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notExpr (3) - complements an expressio and eventually does a simplification
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noue4_dp
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noue4_y
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np1_dp
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np1_y
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noue4_dp (5)
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noue4_y (5)
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np1_dp (5)
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np1_y (5)
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num (3) - mbk list of number
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numberAtomExpr (3) - returns the number of atoms in an expression
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numberNodeAllBdd (3) - count the number of nodes used in the BDD system
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@ -707,21 +706,21 @@ numberNodeBdd (3) - computes the number of nodes used in a BDD
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numberNodeCct (3) - counts the number of nodes used within a circuit
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numberOccExpr (3) - returns the number of time an atom appears in an expression.
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numberOperBinExpr (3) - returns the number of equivalent binary operators in an expression
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nxr2_dp
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nxr2_y
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o2_dp
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o2_y
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o3_dp
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o3_y
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one_dp
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one_y
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op2_dp
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op2_y
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op3_dp
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op3_y
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nxr2_dp (5)
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nxr2_y (5)
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o2_dp (5)
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o2_y (5)
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o3_dp (5)
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o3_y (5)
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one_dp (5)
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one_y (5)
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op2_dp (5)
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op2_y (5)
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op3_dp (5)
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op3_y (5)
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operToChar (3) - converts an operator number into an operator string
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p1_dp
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p1_y
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p1_dp (5)
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p1_y (5)
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pacom (3) - PAT data structure
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paevt (3) - PAT data structure
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pagrp (3) - PAT data structure
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@ -730,13 +729,13 @@ paiol (3) - PAT data structure
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papat (3) - PAT data structure
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paseq (3) - PAT data structure
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pat2dwl, pattern translator from ALLIANCE CAD SYSTEM to HILO CAD SYSTEM
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pat_addpacom, pat_frepacom
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pat_addpaevt, pat_frepaevt
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pat_addpagrp
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pat_addpaini, pat_frepaini
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pat_addpaiol, pat_crtpaiol, pat_frepaiol
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pat_addpapat, pat_frepapat
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pat_addpaseq
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pat_addpacom (3) pat_frepacom
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pat_addpaevt (3) pat_frepaevt
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pat_addpagrp (3)
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pat_addpaini (3) pat_frepaini
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pat_addpaiol (3) pat_crtpaiol, pat_frepaiol
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pat_addpapat (3) pat_frepapat
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pat_addpaseq (3)
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pat_debug (3) - PAT structures displayer-debugger
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pat_lodpaseq (3) - pattern file compiler
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pat_savpaseq (3) - save pattern structures in a pattern description file
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@ -748,31 +747,31 @@ phins (3) - mbk physical instance
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phref (3) - mbk physical reference
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phseg (3) - mbk physical segment
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phvia (3) - mbk physical contact
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pi_sp
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piot_sp
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piotw_sp
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po_sp
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pi_sp (5)
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piot_sp (5)
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piotw_sp (5)
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po_sp (5)
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polarablexpr (3) - moves inverters to the atomic level.
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polardupablexpr (3) - duplicates an expression and moves down the inverters.
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port, GENPAT Package
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pot_sp
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potw_sp
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pow_sp
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process, GENPAT Package
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port (3) - GENPAT Package
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pot_sp (5)
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potw_sp (5)
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pow_sp (5)
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process (3) - GENPAT Package
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profAOExpr (3) - returns the depth of an expression without taking the inverters into account.
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profExpr (3) - returns the depth of an expression.
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prol (5) - define the rules for symbolic to real layout translation
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proof (1) - Formal proof between two behavioural descriptions
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proofCct (3) - checks the equivalence of two circuits
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ptype (3) - mbk list of typed pointers
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pvdde_sp
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pvddeck_sp
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pvddi_sp
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pvddick_sp
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pvsse_sp
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pvsseck_sp
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pvssi_sp
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pvssick_sp
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pvdde_sp (5)
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pvddeck_sp (5)
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pvddi_sp (5)
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pvddick_sp (5)
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pvsse_sp (5)
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pvsseck_sp (5)
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pvssi_sp (5)
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pvssick_sp (5)
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rage (1) - Random Acess Memory(RAM) Generator
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rds (1) - rds package
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rdsalloc (3) - memory allocation function
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@ -852,13 +851,13 @@ swapbddvar (3) - swaps two contiguous variables.
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|||
sxlib (5) - a portable CMOS Standard Cell Library
|
||||
tas (1) - A switch level static timing analyzer for CMOS circuits
|
||||
testbddcircuit (3) - debugs a bdd circuit.
|
||||
tie_y
|
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tie_y (5)
|
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tpl (5) - LV500 Template description format.
|
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ts_dp
|
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ts_y
|
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tsn_dp
|
||||
tsn_y
|
||||
tsp_y
|
||||
ts_dp (5)
|
||||
ts_y (5)
|
||||
tsn_dp (5)
|
||||
tsn_y (5)
|
||||
tsp_y (5)
|
||||
ttv (5) - The timing analyzer tas report : 'general perfmodule' format.
|
||||
unflatablexpr (3) - unflats the operators of an expression
|
||||
unflattenlofig (3) - creates a hierarchy level from instances of a figure
|
||||
|
@ -867,8 +866,8 @@ unsetbddrefext (3) - increments the internal reference, and decrements the ext
|
|||
upVarBdd (3) - brings up an index in a BDD
|
||||
upVarCct (3) - brings up the index of a primary input within a circuit
|
||||
upstr (3) - convert a string to upper case
|
||||
vasy VHDL RTL subset.
|
||||
vbe VHDL behavioural subset.
|
||||
vasy (5) - VHDL RTL subset.
|
||||
vbe (5) - VHDL behavioural subset.
|
||||
vhdlablname (3) - returns a compatible VHDL name.
|
||||
vhdlablvector (3) - gives the index and the name of a vectorized name.
|
||||
viambkrds (3) - adds to RDS figure a contact from a MBK figure
|
||||
|
@ -909,11 +908,11 @@ viewrfmvia (3) - displays contact caracteristics in MBK and RDS format.
|
|||
vst VHDL structural subset.
|
||||
xmbk (1) - A simple way to set alliance environnement variables
|
||||
xpat (1) - graphic pattern viewer
|
||||
xr2_dp
|
||||
xr2_y
|
||||
xr2_dp (5)
|
||||
xr2_y (5)
|
||||
xsch (1) - graphical schematic viewer
|
||||
xyflat (3) - compute hierarchical coordinates
|
||||
yagle (1) - Disassembly and functional abstraction of CMOS circuits
|
||||
zbli_y
|
||||
zero_dp
|
||||
zero_y
|
||||
zbli_y (5)
|
||||
zero_dp (5)
|
||||
zero_y (5)
|
||||
|
|
Loading…
Reference in New Issue