mise a jour pcbs

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Francois Donnet 2002-02-20 13:20:23 +00:00
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.\" @(#)PCBS.1 3.0 April 2001 UPMC; Author: DONNET Francois
.\" @(#)PCBS.1 2.0 April 1998 UPMC; Author: DONNET F.
.TH PCBS 1 "April 1998" "Release 2.0" "CAO\-VLSI Reference Manual"
.SH NAME
.PP
\fIPcBs\fP, PC/Boundary-Scan Tester Platform.
\fIpcbs\fP, PC/Boundary-Scan Tester Platform.
.so man1/alc_origin.1
.SH SYNOPSIS
.PP
\f4pcbs\fP [ -hv ] [ \-\-pci | \-\-parallel ]
[ -l <\fInumber\fP> ] [ -b <\fInumber\fP> ]
[ <\fIsource.PAT\fP> [ <\fIres.PAT\fP> ] ]
[ -e <\fIconnections_file\fP> [ -s <\fIbs.PAT\fP> ] ]
\fBpcbs\fP \-\-check [-b <\fIBSDL\fP> | -e <\fIemul\fP> <\fIpga\fP>]
.PP
\fBpcbs\fP \-\-execute <\fIsource.PAT\fP> [<\fIdestination.PAT\fP>]
.PP
\fBpcbs\fP \-\-bsdl <\fIBSDL\fP> <\fIsource.PAT\fP> <\fIdestination.PAT\fP>
.PP
\fBpcbs\fP \-\-emulbs <\fIemul\fP> <\fIpga\fP> <\fIsource.PAT\fP> <\fIdestination.PAT\fP>
.SH DESCRIPTION
.PP
\f4pcbs\fP is a tool addressing a Boundary Scan card connected to the PC Printer
parallel interface or to the pci bus interface. This tool is able to :
\fBpcbs\fP is a tool addressing a Boundary Scan card connected to the PC Printer
parallel interface. This tool is able to :
.PP
\- Automatically check the Boundary\-scan device for Instruction register length, Bypass register length and Boundary\-scan register length,
.PP
\- Execute Boundary\-scan patterns directly to the device,
.PP
\- Translate functionnal patterns to Boundary\-scan patterns using an ASCII description of the device Boundary\-scan architecture for the specific emulbs31 card.
\- Translate functionnal patterns to Boundary\-scan patterns using a BSDL description of the device Boundary\-scan architecture,
.PP
\- Translate functionnal patterns to Boundary\-scan patterns using an ASCII description of the device Boundary\-scan architecture for the specific emulbs31 card,
.PP
To use this tool, you don't need to have a particular knowledge of Boundary-scan architecture.
The lpscan driver should be installed if you want to use the parallel port.
To use this tool, you must have a strong knowledge of Boundary-scan architecture
and eventually Boundary\-scan Description Language.
.SH DEFINITION
.PP
If it cannot communicate with the device, \f4pcbs\fP will output an error message
We call "\fBBoundary\-scan patterns\fP" patterns written for a device with Boundary\-scan architecture using only the Test Acess Port interface (i.e TDI, TDO, TMS, TCK and eventually TRST).
.br
We call "\fBFunctionnal patterns\fP" patterns written for a device with Boundary\-
scan architecture(case of --bsdl option), but using the fonctionnal interface of the device or for a chip branched with the specific EMULBS31 card which emulated the boundary-scan device(--emulbs option).
.SH CHECK MODE
.PP
\fBpcbs\fP \-\-check [-b <\fIBSDL\fP> | -e <\fIemul\fP> <\fIpga\fP>]
\fBpcbs\fP will send special patterns to the Boundary\-scan device to find by itself
the Instruction register length, the Bypass register length and the
Boundary\-scan register length. If a <\fIbsdl\fP> file is provided, it will compare
the found values against the <\fIbsdl\fP> or <\fIemul\fP> + <\fIpga\fP> ones.
See BSDL MODE or EMULBS MODE for more informations about these files.
.PP
If it cannot communicate with the device, \fBpcbs\fP will output an error message
like :
.PP
.nf
@ -39,69 +60,58 @@ Cannot check INSTRUCTION Register (longer than xxxx bits ???)
Check the card connection
.fi
.SH DEFINITION
.SH EXECUTION MODE
.PP
We call "\f4Boundary\-scan patterns\fP" patterns written for a device with Boundary\-scan architecture using only the Test Acess Port interface (i.e TDI, TDO, TMS, TCK and eventually TRST).
\fBpcbs\fP \-\-execute [\-vp] <\fIsource.PAT\fP> [ [\-fs] <\fIdestination.PAT\fP>]
\fBpcbs\fP will send the "\fBBoundary\-scan patterns\fP" <\fIsource.PAT\fP> to the device.
The EXECUTION MODE can be used with the BSDL MODE or EMULBS MODE to translate the
functionnal patterns and send them directly to the device.\n
.br
We call "\f4Functionnal patterns\fP" patterns written for a device with Boundary\-
scan architecture, but using the fonctionnal interface of the device or for a chip branched with the specific EMULBS31 card which emulated the boundary-scan device(--emulbs option).
If <\fIdestination.PAT\fP> is specified, it will save the results with format boundary(\-s) or functionnal(\-f).
.SH OPTION
\-v or \-\-verbose mode display all behaves and warnings. It is very verbose, so use it only for debugging your patterns.\n
.br
\-p or \-\-pattern followed by a number is to indicate the number of patterns to be loaded in memory in one sequence. It's an evidence you must decrease this number if you have problem of memory and swapping(\-p=50 for example). you should also raise it if you are free of (\-p all for example).
.TP 10
\f4\-h,\-\-help\fP
Help mode. Displays possible uses of \f4pcbs\fP.
.SH BSDL MODE
.PP
\fBpcbs\fP \-\-bsdl [\-vp] <\fIBSDL\fP> <\fIsource.PAT\fP> <\fIdestination.PAT\fP>
.TP 10
\f4\-v,\-\-verbose\fP
Verbose mode. Dump executed patterns as \f4asimut\fP.
\fBpcbs\fP will translate "\fBFunctionnal patterns\fP" <\fIsource.PAT\fP> to
"\fBBoundary\-scan patterns\fP" <\fIdestination.PAT\fP> (see DEFINITIONS) using a
Boundary-Scan Description Language file <\fIBSDL\fP>.
.br
\-v or \-\-verbose mode display all behaves and warnings. It is very verbose, so use it only for debugging your patterns.
.br
\-p or \-\-pattern followed by a number is to indicate the number of patterns to be loaded in memory in one sequence. It's an evidence you must decrease this number if you have problem of memory and swapping(\-p=50 for example). you should also raise it if you are free of (\-p all for example).
.TP 10
\f4\-l,\-\-load\fP <number>
Do not load all patterns in memory but do it by sequences of <number> patterns.
Boundary-scan patterns are well known to be huge. It's a way to save memory.
.TP 10
\f4\-b,\-\-burst\fP <number>
When you are using a pci bus, you can choose the size in words of your dma burst.
It's a nonsense to use this option with a parallel port.
.TP 10
\f4\-e,\-\-emulbs\fP <connections_file>
<connections_file> describes the device connections between the tested chip and the test card. Functional patterns in <source.PAT> will be serialized in boundary-scan patterns.
.TP 10
\f4\-s,\-\-save\fP <connections_file>
Save the produced boundary-scan patterns in the file <bs.PAT>.
This option should be used with \f4\-e,\-\-emulbs\fP.
.TP 10
\f4\--pci\fP
To select the pci port where the test card is connected.
First check the device. Then if files exist:
Results of testing <source.PAT> will be saved in the file <res.PAT>.
.TP 10
\f4\--parallel\fP
To select the parallel port where the test card is connected.
First check the device. Then if files exist:
Results of testing <source.PAT> will be saved in the file <res.PAT>.
.SH EMULBS CONNECTIONS FILE
.SH EMULBS MODE
.PP
\fBpcbs\fP \-\-emulbs [-vp] <\fIemul\fP> <\fIpga\fP> <\fIsource.PAT\fP> <\fIdestination.PAT\fP>
\fBpcbs\fP will translate "\fBFunctionnal patterns\fP" <\fIsource.PAT\fP> to
"\fBBoundary\-scan patterns\fP" <\fIdestination.PAT\fP> (see DEFINITIONS) using
ASCII description files. Users have to give connexions between the PGA block and the emulbs31 card and also between the PGA and the chip.
\fBpcbs\fP runs faster if your connexions are only on some emulbs31 because of bypass.
.br
\-v or \-\-verbose mode display all behaves and warnings. It is very verbose, so use it only for debugging your patterns.
.br
\-p or \-\-pattern followed by a number is to indicate the number of patterns to be loaded in memory in one sequence. It's an evidence you must decrease this number if you have problem of memory and swapping(\-p=50 for example). you should also raise it if you are free of (\-p all for example).
.nf
--example for emulbs connexions file
--left-hand is for EMULBS connector
--right-hand is for CHIP connector
0 <=in ck ;
185 <=out y ;
56 <=in i(0);
76 <=in i(1);
80 <=inout sh ;
--example for emul connexions file | --example for chip connexions file
--left-hand is for EMULBS connector| --left-hand is for PGA connector
--right-hand is for PGA connector | --right-hand is for CHIP connector
|
pcbs emul_connexions V2.0; | pcbs pga_connexions version 2.0;
0 <=a:1 ; | a:1 <=in ck ;
185 <=r:16; | r:16<=out y ;
56 <=d:5 ; | d:4 <=in i(0);
76 <=d:4 ; | d:5 <=in i[1];
80 <=g:2 ; | g:2 <=inout sh ;
Vdd <=e:6 ; | e:6 <=in d_Vdd ;
d_Vss<=a:2 ; | a:2 <=in d_Vss ;
.fi
.SH SEE ALSO