diff --git a/alliance/share/man/man5/lax.5 b/alliance/share/man/man5/lax.5
index b637eb8f..30f1f914 100644
--- a/alliance/share/man/man5/lax.5
+++ b/alliance/share/man/man5/lax.5
@@ -1,4 +1,4 @@
-.\"   $Id: lax.5,v 1.2 2000/11/06 13:02:21 czo Exp $
+.\"   $Id: lax.5,v 1.3 2001/11/14 11:23:24 francois Exp $
 .\"                ,,,
 .\"               (o o)
 .\"  ####=====oOO--(_)--OOO=========================================####
@@ -15,7 +15,7 @@
 .\"  ####===========================================================####
 .\" 
 .\" 
-.\"   $Id: lax.5,v 1.2 2000/11/06 13:02:21 czo Exp $
+.\"   $Id: lax.5,v 1.3 2001/11/14 11:23:24 francois Exp $
 .\" 
 .\" 
 .TH LAX 5 "October 1, 1997" "ASIM/LIP6" "CAO\-VLSI Reference Manual"
@@ -94,13 +94,11 @@ ARCHITECTURE behaviour_data_flow OF digia IS
 
 ## This line is a comment
 
-
-## The following parameters are used in boom boog and loon.
-
 ## Set the Optimisation Mode (0..4)
 ## 0 : full area optimisation
 ## 2 : 50% area, 50% delay
 ## 4 : full delay optimisation
+## Used by boog and loon
 #M{4}
 
 
@@ -110,11 +108,10 @@ ARCHITECTURE behaviour_data_flow OF digia IS
 #L{5}
 
 
-## Set the list of delayed inputs
-## This can be used to delay some primary inputs of 
-## the circuit. Delay is in ns (nano-seconds).
+## External Input Delay (in ns)
 ## Those signals are taken into account to optimise
 ## the global delay of the circuit.
+## Used by boog and loon
 #D{
 i(3):300;
 i(0):100;
@@ -166,13 +163,14 @@ ef_e4;
 jour:50; 
 }
 
-## Output Capacitance : The primary outputs of the circuit 
-## can have capacitance. (in fF)
+## External Output Capacitance (in fF)
+## Used by boog and loon
 #C{
 porte:50;
 }
 
-## Input Impedance (in Ohms)
+## External Input Impedance (in Ohms)
+## Used by boog and loon
 #I{
 jour:5000;
 }
@@ -190,6 +188,7 @@ clock:1;
 .BR \fBboom\fP (1),
 .BR \fBboog\fP (1),
 .BR \fBloon\fP (1),
+.BR \fBglop\fP (1),
 .BR \fBc4map\fP (1),