Man de FSP et FMI
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.TH FSP 1 "October 1, 1997" "ASIM/LIP6" "CAO\-VLSI Reference Manual"
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.SH NAME
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.TP
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fmi
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\- FSM state miminization
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.so man1/alc_origin.1
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.SH SYNOPSIS
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.TP
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\fBfmi\fP [\fI-V\fP] \fIinput_file\fP \fIoutput_file\fP
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.br
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.SH DESCRIPTION
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.br
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Made to run on FSM descriptions, \fBfmi\fP supports the same subset of VHDL as syf
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(for further informations about this subset see SYF(1) and FSM(5)).
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\fBfmi\fP uses a Reduced Ordered Binary Decision Diagrams representation and
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identifies equivalent states.
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After this step, it drives a new FSM where all equivalent states are replaced
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by a single state.
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.br
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As a restriction \fBfmi\fP doesn't handle don't cares (as this much more
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difficult).
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.SH ENVIRONMENT VARIABLES
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.br
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.HP
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.ti 7
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\fIMBK_WORK_LIB\fP gives the path of the FSM description.
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The default value is the current directory.
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.br
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.HP
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.ti 7
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\fIMBK_CATA_LIB\fP gives some auxiliary pathes for the FSM descriptions.
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The default value is the current directory.
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.SH OPTIONS
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.ti 7
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\-V
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Sets verbose mode on. Each step of the minimization is displayed on the
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standard output.
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.br
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.SH EXAMPLE
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.br
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fmi digi digi_min
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.SH SEE ALSO
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.br
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\fBsyf\fP (1), \fBfsp\fP (1), \fBfsm\fP (5), \fBxfsm\fP (1).
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.so man1/alc_bug_report.1
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.TH FSP 1 "October 1, 1997" "ASIM/LIP6" "CAO\-VLSI Reference Manual"
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.SH NAME
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.TP
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fsp
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\- Formal proof between two FSM descriptions
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.so man1/alc_origin.1
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.SH SYNOPSIS
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.TP
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\fBfsp\fP [\fI-V\fP] \fIformat1\fP \fIformat2\fP \fIfile1\fP \fIfile2\fP
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.br
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.SH DESCRIPTION
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.br
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Made to run on FSM descriptions, \fBfsp\fP supports the same subset of VHDL as syf
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(for further informations about this subset see SYF(1) and FSM(5)).
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\fBfsp\fP uses a Reduced Ordered Binary Decision Diagrams representation and
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computes the product of the two FSM descriptions.
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After this step, it explores the resulting FSM product and proves formally the equivalence
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between the two initial FSM descriptions.
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Those two descriptions must have the same interface (VHDL entity).
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.SH ENVIRONMENT VARIABLES
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.br
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.HP
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.ti 7
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\fIMBK_WORK_LIB\fP gives the path for the FSM descriptions.
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The default value is the current directory.
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.br
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.HP
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.ti 7
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\fIMBK_CATA_LIB\fP gives some auxiliary pathes for the FSM descriptions.
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The default value is the current directory.
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.SH OPTIONS
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.ti 7
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\-V
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Sets verbose mode on. Each step of the formal proof is displayed on the
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standard output.
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.br
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.SH EXAMPLE
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.br
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fsp fsm fsm digi digi2
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.SH SEE ALSO
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.br
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\fBsyf\fP (1), \fBfmi\fP (1), \fBfsm\fP (5), \fBxfsm\fP (1).
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.so man1/alc_bug_report.1
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@ -445,6 +445,7 @@ flatbeh (1) - Synthetizes a behavioral description from a structural de
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flatenphfig (3) - flatten a instance in a figure
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flatenphfig (3) - flatten a instance in a figure
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flatPolarityExpr (3) - translates the inverters of an expression to the level of atomic expressions
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flatPolarityExpr (3) - translates the inverters of an expression to the level of atomic expressions
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flattenlofig (3) - flatten a instance in a logical figure
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flattenlofig (3) - flatten a instance in a logical figure
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fmi (1) - FSM state miminization
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fpgen (1) - Procedural language for Data-Path synthesis based upon C.
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fpgen (1) - Procedural language for Data-Path synthesis based upon C.
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fpmap (1) - fpga mapper of a logic level behavioural description (VHDL data flow)
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fpmap (1) - fpga mapper of a logic level behavioural description (VHDL data flow)
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freeExpr (3) - frees an expression.
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freeExpr (3) - frees an expression.
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@ -461,6 +462,7 @@ freerdsrec (2) - free memory associated to a rectangle
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freerdsrec (3) - free memory associated to a rectangle
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freerdsrec (3) - free memory associated to a rectangle
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fsm (1) - Finite State Machine representation.
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fsm (1) - Finite State Machine representation.
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fsm (5) - Alliance VHDL Finite State Machine description subset.
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fsm (5) - Alliance VHDL Finite State Machine description subset.
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fsp (1) - Formal proof between two FSM descriptions
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garbagebddsystem (3) - Forces a bdd garbage collection.
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garbagebddsystem (3) - Forces a bdd garbage collection.
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gcNodeBdd (3) - does a garbage collection
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gcNodeBdd (3) - does a garbage collection
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gcNodeCct (3) - does a garbage collection
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gcNodeCct (3) - does a garbage collection
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@ -445,6 +445,7 @@ flatbeh (1) - Synthetizes a behavioral description from a structural de
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flatenphfig (3) - flatten a instance in a figure
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flatenphfig (3) - flatten a instance in a figure
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flatPolarityExpr (3) - translates the inverters of an expression to the level of atomic expressions
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flatPolarityExpr (3) - translates the inverters of an expression to the level of atomic expressions
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flattenlofig (3) - flatten a instance in a logical figure
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flattenlofig (3) - flatten a instance in a logical figure
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fmi (1) - FSM state miminization
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fpgen (1) - Procedural language for Data-Path synthesis based upon C.
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fpgen (1) - Procedural language for Data-Path synthesis based upon C.
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fpmap (1) - fpga mapper of a logic level behavioural description (VHDL data flow)
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fpmap (1) - fpga mapper of a logic level behavioural description (VHDL data flow)
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freeExpr (3) - frees an expression.
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freeExpr (3) - frees an expression.
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@ -461,6 +462,7 @@ freerdsrec (2) - free memory associated to a rectangle
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freerdsrec (3) - free memory associated to a rectangle
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freerdsrec (3) - free memory associated to a rectangle
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fsm (1) - Finite State Machine representation.
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fsm (1) - Finite State Machine representation.
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fsm (5) - Alliance VHDL Finite State Machine description subset.
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fsm (5) - Alliance VHDL Finite State Machine description subset.
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fsp (1) - Formal proof between two FSM descriptions
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garbagebddsystem (3) - Forces a bdd garbage collection.
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garbagebddsystem (3) - Forces a bdd garbage collection.
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gcNodeBdd (3) - does a garbage collection
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gcNodeBdd (3) - does a garbage collection
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gcNodeCct (3) - does a garbage collection
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gcNodeCct (3) - does a garbage collection
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