Suppress link dependency loop in libraries.
This is the missing message from the N-2 commit.
It also include small corrections.
* Change: There was depency loop in Alliance libraries, mainly between
the database <mbk> and it's parsers/drivers (<mbkap>, <mbkvti>, ...).
This was not causing problems on systems that allows symbols to be
undefined when the library is built, but on others it prevents to
build at least dynamic libraries, for example under Cygwin.
Note: to reproduce this behavior under linux pass '-Wl,-z,-defs'
in the CFLAGS/CXXFLAGS.
Another side effect was to prevent parallel building (-jX).
* Change: <mbkvhdl> is redundant with <mbkvhdlg> which is newer, so
this library is suppressed.
* Change: mbk merged libraries, <mbkap>, <mbkvti> goest into Mpu.
<mbkedif>, <mbkal>, <mbkhilo>, <mbkmg>, <mbkspice>, <mbkmg>,
<mbkvhdlg> and <mbkvrlog> goes into Mlu.
* Change: rds merged libraries, <rdscif> and <rdsgds> goes into Rds.
All Rds sub-libraries are also mergeds into Rds.
* Change: vbh merged libraries, <vbl>, <vvh>, <vtl> & <vpd> goes into
Vbh.
* Change: pat merged libraries, <ppt> & <phl> goes into Pat.
* Change: in <asimut>, the Cst libraries is transferred into <beh> to
be merged with Beh.
This commit is contained in:
Jean-Paul Chaput
parent
0182089511
commit
c1f401b681
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@ -72,7 +72,7 @@ dirs="$newdirs documentation"
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## Order directories.
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order="mbk \
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aut rds elp abl bdd log btr vex ctl ctp abe abt \
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abv fsm fks fvh ftl rtn rtd scl vbh vpn pat gcp \
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abv fsm fks fvh ftl rtn rtd scl vpn vbh pat gcp \
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druc beh bhl bvl"
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ordered_dirs=""
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for lib in $order; do
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@ -1 +1 @@
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SUBDIRS = src man1 man3 man5
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SUBDIRS = src etc man1 man3 man5
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@ -0,0 +1,8 @@
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# $Id: Makefile.am,v 1.4 2002/05/08 21:07:25 jpc Exp $
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etcdir=$(prefix)/etc
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etc_DATA=spimodel.cfg
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EXTRA_DIST=$(etc_DATA)
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@ -0,0 +1,7 @@
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# MBK_SPI_MODEL
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# configure the transistor models of spi parser/driver
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#
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TN N
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TP P
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@ -1,2 +1,2 @@
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man_MANS = ap.5 catal.5 prol.5 vbe.5 vhdl.5 vst.5
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man_MANS = ap.5 al.5 catal.5 prol.5 vbe.5 vhdl.5 vst.5 spi.5
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EXTRA_DIST = $(man_MANS)
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@ -0,0 +1,347 @@
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.\" @(#)al.5 6.0 29 Mar 1999 UPMC; Author: Gregoire AVOT
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.TH AL 5 "October 1, 1997 Release 5.0" "ASIM/LIP6" "File Formats"
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.SH NAME
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al \- Alliance logical format
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.so man1/alc_origin.1
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.SH DESCRIPTION
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The .al format is the ALLIANCE format for the logical view
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of a cell. We give below the BNF description of the format :
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.nf
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file ::=
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version
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header
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connectors
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instances
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transistors
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signals
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crosstalk_capacitances
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end_of_file
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version ::= 'V ALLIANCE : ' version_number
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header ::= 'H ' name ',' file_type ',' date
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/// name : name of the figure
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/// date : saving file date
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connectors ::= { connector }
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connector ::= 'C ' name ',' connector_direction ','
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connector_type ',' net_num [list_of_physical_node]
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list_of_physical_node ::= { ',' node_num }
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instances ::= { instance connectors }
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/// An instance is followed by his connectors
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instance ::= 'I ' model_name ',' instance_name
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transistors ::= { transistor }
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transistor ::= 'T' type ',' lenght ',' width ',' drain ','
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grid ',' source ',' bulk ',' xs ',' xd ',' ps ',' pd
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',' x ',' y [ ',' node_drain ',' node_grid ','
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node_source ',' node_bulk ] ',' trname
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/// drain : number of the net connected to the drain
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/// grid : number of the net connected to the grid
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/// source : number of the net connected to the source
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/// bulk : number of the net connected to the bulk
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/// xs, xd : To compute respectivly the source and
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/// drain area
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/// ps, pd : perimeter of the source and drain
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/// x, y : coordinate of the transistor in a layout
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/// node_drain : number of the node connected to the drain
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/// node_grid : number of the node connected to the grid
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/// node_source : number of the node connected to the source
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/// node_bulk : number of the node connected to the bulk
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signals ::= { signal }
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signal := sig_index [ { resistance } ] [ { capacitance } ]
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sig_index ::= 'S ' net_num ',' signal_type [ list_of_signal_name ]
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list_of_signal_name ::= { ',' signal_name }
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resistance := 'R ' layer ',' node1 ',' node2 ',' resi ',' capa ','
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x ',' y ',' dx ',' dy
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capacitance := 'Q ' capa
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/// Each resistance is describe as a resistor beetwen two nodes
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/// connected to the ground with capacitor with a value of capa/2.
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/// Capacitance is the entire capacitance of the net to ground.
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crosstalk_capacitances ::= { crosstalk_capacitance }
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crosstalk_capacitance ::= K capa ',' sig1 ',' node1 ',' sig2 ',' node2
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end_of_file ::= 'EOF'
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version_number ::= number
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file_type ::= 'L'
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date ::= day '/' month '/' year
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connector_direction ::= 'IN' | 'OUT' | 'INOUT' | 'UNKNOWN' |
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'TRISTATE' | 'TRANSCV'
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/// in : input
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/// out : output
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/// inout : input and output
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/// unknown : no information is available
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/// tristate : tristate output
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/// transcv : tristate output and input
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connector_type ::= 'EXTERNAL' | 'INTERNAL'
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net_num ::= number
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node_num ::= number
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model_name ::= name
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instance_name ::= name
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type ::= 'N' | 'P'
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lenght ::= float
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width ::= float
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drain ::= net_num
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grid ::= net_num
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source ::= net_num
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bulk ::= net_num
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node1 ::= node_num
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node2 ::= node_num
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sig1 ::= net_num
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sig2 ::= net_num
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xs ::= float
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xd ::= float
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ps ::= float
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pd ::= float
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x ::= float
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y ::= float
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dx ::= float
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dy ::= float
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trname :: name
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layer ::= 'X' | 'PY' | 'A1' | 'A2' | 'CY' | 'CN' | 'CP' | 'CV'
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| 'CW' | 'CA' | 'RE'
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signal_type ::= 'EXTERNAL' | 'INTERNAL'
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capa ::= float
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resi ::= float
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signal_name ::= name
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number ::= { '0' | '1'| '2' | '3' | '4' | '5' |
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'6' | '7'| '8' | '9' }
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float ::= number [ '.' number ]
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name ::= word
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.fi
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.SH EXAMPLES
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.LP
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.SS Example 1
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This example is the representation of a nand whith two input, extracted
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with Lynx at transistor level.
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.LP
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.nf
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V ALLIANCE : 6
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H na2_y,L,29/ 3/99
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C vss,UNKNOWN,EXTERNAL,2,1,9
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C vdd,UNKNOWN,EXTERNAL,1,9,13
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C i1,UNKNOWN,EXTERNAL,6,1,8
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C i0,UNKNOWN,EXTERNAL,5,2,8
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C f,UNKNOWN,EXTERNAL,3,1,11
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T P,1,12,1,5,3,1,2,2,28,28,17,32.5,4,3,7,3,tr_00004
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T P,1,12,3,6,1,1,2,2,28,28,11,32.5,7,7,1,2,tr_00003
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T N,1,12,3,5,4,2,2,2,28,28,17,12.5,3,1,1,8,tr_00002
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T N,1,12,4,6,2,2,2,2,28,28,11,12.5,1,2,2,5,tr_00001
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S 6,EXTERNAL,i1
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Q 0.020455
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W 4,3,CV,0,0,7.2,17.6,0,0
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W 6,5,CV,0,0,6.4,22.4,0,0
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W 5,8,A2,0.4,0.00408,6.4,22.4,1.6,13.6
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W 1,5,A2,0.6,0.006,6.4,2.4,1.6,20
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W 3,6,A1,0.3,0.00168,6.4,17.6,1.6,4.8
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W 4,7,PY,500,0.00315,8.8,17.6,0.8,8.4
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W 2,4,PY,450,0.00285,8.8,10,0.8,7.6
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S 5,EXTERNAL,i0
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Q 0.020455
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W 5,4,CV,0,0,15.2,17.6,0,0
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W 7,6,CV,0,0,16,22.4,0,0
|
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W 6,8,A2,0.4,0.00408,16,22.4,1.6,13.6
|
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W 2,6,A2,0.6,0.006,16,2.4,1.6,20
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W 4,7,A1,0.3,0.00168,16,17.6,1.6,4.8
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W 5,3,PY,500,0.00315,13.6,17.6,0.8,8.4
|
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W 1,5,PY,450,0.00285,13.6,10,0.8,7.6
|
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S 4,INTERNAL
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Q 0
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S 3,EXTERNAL,f
|
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Q 0.021985
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W 3,4,CV,0,0,16,10.4,0,0
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W 6,5,CV,0,0,11.2,17.6,0,0
|
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W 8,7,CV,0,0,11.2,23.2,0,0
|
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W 9,7,CV,0,0,11.2,28,0,0
|
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W 5,11,A2,0.55,0.00552,11.2,17.6,1.6,18.4
|
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W 1,5,A2,0.45,0.00456,11.2,2.4,1.6,15.2
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W 10,9,A1,0.2,0.00126,11.2,24.4,1.6,3.6
|
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W 8,10,A1,0,0.00042,11.2,23.2,1.6,1.2
|
||||
W 6,8,A1,0.7,0.00161,11.2,17.6,0.8,5.6
|
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W 2,6,A1,0.9,0.00207,11.2,10.4,0.8,7.2
|
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W 2,4,A1,0.6,0.00138,11.2,10.4,4.8,0.8
|
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S 2,EXTERNAL,vss
|
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Q 0.0245
|
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W 4,3,CV,0,0,6.4,1.6,0,0
|
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W 7,6,CV,0,0,11.2,1.6,0,0
|
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W 11,10,CV,0,0,16,1.6,0,0
|
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W 3,2,CV,0,0,6.4,6.4,0,0
|
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W 12,2,CV,0,0,6.4,10.4,0,0
|
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W 3,12,A1,0.4,0.00224,6.4,4,1.6,6.4
|
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W 10,9,A1,0,0.00174,16,4,2.4,6.4
|
||||
W 6,10,A1,0,0.00348,11.2,4,4.8,6.4
|
||||
W 3,6,A1,0,0.00348,6.4,4,4.8,6.4
|
||||
W 1,3,A1,0,0.00174,4,4,2.4,6.4
|
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S 1,EXTERNAL,vdd
|
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Q 0.02846
|
||||
W 5,1,CV,0,0,6.4,26.4,0,0
|
||||
W 6,4,CV,0,0,16,26.4,0,0
|
||||
W 7,1,CV,0,0,6.4,29.6,0,0
|
||||
W 8,4,CV,0,0,16,29.6,0,0
|
||||
W 14,10,CV,0,0,6.4,36,0,0
|
||||
W 15,11,CV,0,0,11.2,36,0,0
|
||||
W 16,12,CV,0,0,16,36,0,0
|
||||
W 7,10,A1,0.3,0.00168,6.4,29.6,1.6,4.8
|
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W 5,7,A1,0.2,0.00112,6.4,26.4,1.6,3.2
|
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W 8,12,A1,0.3,0.00168,16,29.6,1.6,4.8
|
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W 6,8,A1,0.2,0.00112,16,26.4,1.6,3.2
|
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W 12,13,A1,0,0.00174,16,34.4,2.4,6.4
|
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W 9,10,A1,0,0.00174,4,34.4,2.4,6.4
|
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W 11,12,A1,0,0.00348,11.2,36,4.8,6.4
|
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W 10,11,A1,0,0.00348,6.4,36,4.8,6.4
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K 0.00213,1,1,2,1
|
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K 0.00454,5,6,2,1
|
||||
K 0.00199,6,8,2,1
|
||||
EOF
|
||||
.fi
|
||||
.SS Example 2
|
||||
This example is a xor designed with three cells.
|
||||
.LP
|
||||
.nf
|
||||
V ALLIANCE : 6
|
||||
H gxor,L,29/ 3/99
|
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C vss,UNKNOWN,EXTERNAL,4,1,2,9,10
|
||||
C vdd,UNKNOWN,EXTERNAL,6,1,2,10,3
|
||||
C s,UNKNOWN,EXTERNAL,8,2
|
||||
C b,UNKNOWN,EXTERNAL,5,5
|
||||
C a,UNKNOWN,EXTERNAL,3,1
|
||||
I ndrvp_y,auxsc3
|
||||
C vss,UNKNOWN,INTERNAL,4,8,9
|
||||
C vdd,UNKNOWN,INTERNAL,6,9,10
|
||||
C i,UNKNOWN,INTERNAL,5,4,9
|
||||
C f,UNKNOWN,INTERNAL,7,8,12
|
||||
I mx2_y,s
|
||||
C vss,UNKNOWN,INTERNAL,4,4,8
|
||||
C vdd,UNKNOWN,INTERNAL,6,5,9
|
||||
C t,UNKNOWN,INTERNAL,8,1,3
|
||||
C l1,UNKNOWN,INTERNAL,7,1,11
|
||||
C l0,UNKNOWN,INTERNAL,2,4,8
|
||||
C i1,UNKNOWN,INTERNAL,3,11,13
|
||||
C i0,UNKNOWN,INTERNAL,5,1,8
|
||||
I ndrvp_y,auxsc1
|
||||
C vss,UNKNOWN,INTERNAL,4,2,3
|
||||
C vdd,UNKNOWN,INTERNAL,6,2,4
|
||||
C i,UNKNOWN,INTERNAL,3,10,12
|
||||
C f,UNKNOWN,INTERNAL,2,1,7
|
||||
S 8,EXTERNAL,s
|
||||
Q 0.0072
|
||||
W 2,1,A2,0.55,0.00528,79.2,0,1.6,17.6
|
||||
S 7,INTERNAL,auxsc3
|
||||
Q 0.02142
|
||||
W 3,2,CV,0,0,64.8,8.8,0,0
|
||||
W 5,4,CV,0,0,74.4,8.8,0,0
|
||||
W 7,6,CV,0,0,74.4,12.8,0,0
|
||||
W 10,9,CV,0,0,88.8,12.8,0,0
|
||||
W 9,8,A2,0.15,0.00144,88.8,12.8,1.6,4.8
|
||||
W 6,10,A1,1.8,0.00414,74.4,12.8,14.4,0.8
|
||||
W 4,7,A2,0.1,0.0012,74.4,8.8,1.6,4
|
||||
W 2,1,A2,0.25,0.00264,64.8,8.8,1.6,8.8
|
||||
W 3,5,A1,1.2,0.00276,64.8,8.8,9.6,0.8
|
||||
S 6,EXTERNAL,vdd
|
||||
Q 0.05453
|
||||
W 7,6,CV,0,0,37.6,48,0,0
|
||||
W 8,6,CV,0,0,37.6,51.2,0,0
|
||||
W 6,5,A1,0.1,0.00754,37.6,49.6,10.4,6.4
|
||||
W 4,6,A1,0,0.0029,33.6,49.6,4,6.4
|
||||
W 8,3,A2,0.05,0.00203,37.6,51.2,3.2,5.6
|
||||
W 7,8,A2,0.05,0.00116,37.6,48,3.2,3.2
|
||||
W 1,7,A2,0.75,0.0174,37.6,0,3.2,48
|
||||
S 5,EXTERNAL,b
|
||||
Q 0.02922
|
||||
W 3,2,CV,0,0,50.4,4.8,0,0
|
||||
W 7,6,CV,0,0,98.4,4.8,0,0
|
||||
W 6,4,A2,0.4,0.00384,98.4,4.8,1.6,12.8
|
||||
W 5,6,A2,0.15,0.00144,98.4,0,1.6,4.8
|
||||
W 2,1,A2,0.4,0.00384,50.4,4.8,1.6,12.8
|
||||
W 3,7,A1,6,0.0138,50.4,4.8,48,0.8
|
||||
S 4,EXTERNAL,vss
|
||||
Q 0.05453
|
||||
W 6,5,CV,0,0,44,17.6,0,0
|
||||
W 6,7,CV,0,0,44,20.8,0,0
|
||||
W 7,10,A2,0.55,0.01305,44,20.8,3.2,36
|
||||
W 1,5,A2,0.25,0.00638,44,0,3.2,17.6
|
||||
W 5,7,A2,0.05,0.00116,44,17.6,3.2,3.2
|
||||
W 6,4,A1,0,0.0029,44,19.2,4,6.4
|
||||
W 3,6,A1,0.1,0.00754,33.6,19.2,10.4,6.4
|
||||
S 3,EXTERNAL,a
|
||||
Q 0.03282
|
||||
W 3,2,CV,0,0,16.8,8.8,0,0
|
||||
W 5,4,CV,0,0,60,8.8,0,0
|
||||
W 7,6,CV,0,0,60,12.8,0,0
|
||||
W 9,8,CV,0,0,69.6,12.8,0,0
|
||||
W 8,11,A2,0.15,0.00144,69.6,12.8,1.6,4.8
|
||||
W 6,9,A1,1.2,0.00276,60,12.8,9.6,0.8
|
||||
W 4,7,A2,0.1,0.0012,60,8.8,1.6,4
|
||||
W 2,10,A2,0.25,0.00264,16.8,8.8,1.6,8.8
|
||||
W 1,2,A2,0.25,0.00264,16.8,0,1.6,8.8
|
||||
W 3,5,A1,5.4,0.01242,16.8,8.8,43.2,0.8
|
||||
S 2,INTERNAL,auxsc1
|
||||
Q 0.0225
|
||||
W 3,2,CV,0,0,7.2,12.8,0,0
|
||||
W 6,5,CV,0,0,55.2,12.8,0,0
|
||||
W 5,4,A2,0.15,0.00144,55.2,12.8,1.6,4.8
|
||||
W 2,1,A2,0.15,0.00144,7.2,12.8,1.6,4.8
|
||||
W 3,6,A1,6,0.0138,7.2,12.8,48,0.8
|
||||
S 1,INTERNAL,implicit
|
||||
Q 0
|
||||
EOF
|
||||
.fi
|
||||
.SH SEE ALSO
|
||||
.BR mbk (3)
|
||||
|
||||
.so man1/alc_bug_report.1
|
||||
|
||||
|
|
@ -0,0 +1,198 @@
|
|||
.TH SPI 5 "30 March 1999" "ASIM/LIP6" "File Formats"
|
||||
|
||||
.SH NAME
|
||||
|
||||
spi \- Alliance parser and driver for Spice netlist.
|
||||
|
||||
.so man1/alc_origin.1
|
||||
|
||||
.SH FILES
|
||||
|
||||
The description of a netlist foo must be contained in a \fB.SUBCKT\fP of a file named \fIfoo.spi\fP. This description can include others \fB.SUBCKT\fP that must be in the same file or files included with the command \fB.INCLUDE\fP in the source file.
|
||||
|
||||
Recognized elements are :
|
||||
|
||||
.RS
|
||||
Resistances
|
||||
|
||||
Capacitances
|
||||
|
||||
Instances
|
||||
|
||||
MOS transistors.
|
||||
|
||||
.RE
|
||||
Others elements are not considered.
|
||||
|
||||
Nodes can be either numbered or nameed. It's possible to assign a name to a node which is designated by a number with the directive
|
||||
|
||||
.B * NET number = name
|
||||
|
||||
in the \fB.SUBCKT\fP. The word NET can be replaced by positioning the environment variable \fIMBK_SPI_NETNAME\fP. Names are used to named the signals and the connectors in the \fILOFIG\fP.
|
||||
|
||||
On the \fB.SUBCKT\fP interface, nodes of the same name followed by a period and a number are considered to be on the net, even if no connected in the circuit. For example :
|
||||
|
||||
.RS
|
||||
.SUBCKT nand2 in out out.1 out.2 vss vdd out.3
|
||||
.RE
|
||||
|
||||
The nodes out, out.1, out.2 and out.3 are considered to be the same signal of the Alliance \fILOFIG\fP. This feature can be turned off if the environment variable \fIMBK_SPI_MERGE\fP is set, and the period can be replaced by another character with the environment variable \fIMBK_SPI_SEPAR\fP.
|
||||
|
||||
No particular information is needed to build a \fILOFIG\fP from a \fB.SUBCKT\fP, the parser rebuild all signals, even they contains many resistances and capacitances. If names are not provided, the parser will create then in order to provide a valid lofig.
|
||||
|
||||
.SH DRIVER
|
||||
|
||||
The driver creates a Spice netlist of the \fILOFIG\fP passed as a parameter. The file contain a single \fB.SUBCKT\fP representing the figure and commands \fB.INCLUDE\fP with name of instances contained in the \fILOFIG\fP. Nodes are number named with the directive \fB* NET\fP, or strings, depending on \fIMBK_SPI_NAMEDNODES\fP. A comment at the beginning of the file represents the interface of the \fILOFIG\fP. This comment is not used by the parser.
|
||||
|
||||
Environment variable considered are
|
||||
|
||||
.RS
|
||||
.B MBK_SPI_MODEL
|
||||
|
||||
.B MBK_SPI_NETNAME
|
||||
|
||||
.B MBK_SPI_NAMEDNODES
|
||||
.RE
|
||||
|
||||
.SH PARSER
|
||||
|
||||
The parser load all \fB.SUBCKT\fP in memory, even those in files included with the command \fB.INCLUDE\fP until the required \fILOFIG\fP is loaded. For each \fB.SUBCKT\fP loaded, the parser build the equipotentials with both nodes of resistances on the same net and both nodes of capacitances on differents net unless more information is given. The RCN library is used to handle resistances and capacitances.
|
||||
|
||||
As the \fILOWIRE\fP can contain a resistance and a capacitance, the parser groups a resistance and two capacitances in a single \fILOWIRE\fP if the following conditions are met :
|
||||
|
||||
.RS
|
||||
The resistance is named 'name' and the two capacitances are named 'name1' and 'name2'
|
||||
|
||||
The two capacitances must have the same value
|
||||
|
||||
The two capacitances must be between the net of the resistance and VSS.
|
||||
|
||||
.RE
|
||||
The driver supports this feature.
|
||||
|
||||
Environment variable considered are
|
||||
|
||||
.RS
|
||||
.B MBK_SPI_MODEL
|
||||
|
||||
.B MBK_SPI_NETNAME
|
||||
|
||||
.B MBK_SPI_SEPAR
|
||||
|
||||
.B MBK_SPI_MERGE
|
||||
|
||||
.B MBK_SPI_FILE
|
||||
|
||||
.B MBK_SPI_VERBOSE
|
||||
|
||||
.B MBK_SPI_ONE_NODE_NORC
|
||||
|
||||
.B MBK_SPI_NO_AFF_UNK
|
||||
.RE
|
||||
|
||||
.SH ENVIRONMENT VARIABLES
|
||||
|
||||
.B MBK_SPI_MODEL
|
||||
|
||||
File name where transistors models are described. Syntax for file is :
|
||||
.RS
|
||||
MODELNAME N|P [FAST] [HVIO]
|
||||
.RE
|
||||
Blank lines are allowed, and line comment begin with a '#'.
|
||||
|
||||
.B MBK_SPI_NETNAME
|
||||
|
||||
Comment used to name the nodes. Default is
|
||||
.I NET.
|
||||
|
||||
.B MBK_SPI_SEPAR
|
||||
|
||||
Character used to separate a name from a node number on the interface of the \fB.SUBCKT\fP. The parser considers nodes of the same name to be on the same equipotential. Default is '\fB.\fP'.
|
||||
|
||||
.B MBK_SPI_NOMERGE
|
||||
|
||||
If this variable is set, the parser does not merge interface nodes of the same name, but different number, on the same equipotential.
|
||||
|
||||
.B MBK_SPI_FILE
|
||||
|
||||
If this variable is set, the name of the files opened are displayed on the error output.
|
||||
|
||||
.B MBK_SPI_VERBOSE
|
||||
|
||||
If this variable is set, display debug various information on the error output.
|
||||
|
||||
.B MBK_SPI_ONE_NODE_NORC
|
||||
|
||||
If this variable is set, an RCN view is not created for a net containing only one node.
|
||||
|
||||
.B MBK_SPI_NO_AFF_UNK
|
||||
|
||||
Default behaviour of Spice parser is to display an error message when an unknown element is read in the input file. Setting this variable prevent this display. Usefull when file contain command for Spice simulator.
|
||||
|
||||
.B MBK_SPI_NAMEDNODES
|
||||
|
||||
When this environment variable is set, spice netlist's nodes are named using one of the following convention, if signal name is set or no, or if signal has an RCN view :
|
||||
|
||||
.RS
|
||||
"SIGNAL NAME" $MBK_SEPAR "RCN NODE"
|
||||
|
||||
"SIGNAL NAME"
|
||||
|
||||
SIG "SIGNAL INDEX" $MBK_SEPAR "RCN NODE"
|
||||
|
||||
SIG "SIGNAL INDEX"
|
||||
.RE
|
||||
|
||||
$MBK_SEPAR is a single character defined by a environment variable with the same name.
|
||||
|
||||
.SH EXAMPLE
|
||||
|
||||
This is an example of a file generated by the Spice driver.
|
||||
|
||||
.nf
|
||||
|
||||
* Spice description of gxor
|
||||
* Spice driver version 700
|
||||
* Date ( dd/mm/yyyy hh:mm:ss ): 29/03/1999 at 17:43:53
|
||||
|
||||
* INTERF a b s vdd vdd vdd vdd vss vss vss vss
|
||||
|
||||
.INCLUDE mx2_y.spi
|
||||
.INCLUDE ndrvp_y.spi
|
||||
|
||||
.subckt gxor 24 42 49 52 53 61 54 63 64 71 72
|
||||
* NET 1 = implicit
|
||||
* NET 4 = auxsc1
|
||||
* NET 13 = auxsc3
|
||||
* NET 26 = a
|
||||
* NET 40 = b
|
||||
* NET 49 = s
|
||||
* NET 52 = vdd
|
||||
* NET 65 = vss
|
||||
xauxsc1 64 65 53 55 33 35 2 8 ndrvp_y
|
||||
xs 66 70 56 60 48 50 11 21 5 9 34 36 38 45 mx2_y
|
||||
xauxsc3 70 71 60 61 41 46 18 22 ndrvp_y
|
||||
R2_1 4 7 6
|
||||
C2_11 4 63 6.9e-15
|
||||
C2_12 7 63 6.9e-15
|
||||
R2_2 3 2 0.15
|
||||
C2_21 3 63 7.2e-16
|
||||
|
||||
.B [----- CUT -----]
|
||||
|
||||
C4_51 69 63 6.525e-15
|
||||
C4_52 72 63 6.525e-15
|
||||
R4_6 68 69 0.001
|
||||
R4_7 68 67 0.001
|
||||
.ends gxor
|
||||
|
||||
.SH SEE ALSO
|
||||
|
||||
.B Alliance(1) MBK(1) Al(1) RCN(1) MBK_SEPAR(1)
|
||||
|
||||
.SH AUTHOR
|
||||
|
||||
Gregoire AVOT.
|
||||
.I Gregoire.AVOT@lip6.fr
|
||||
|
||||
.so man1/alc_bug_report.1
|
||||
|
|
@ -25,7 +25,6 @@ pat_decl_y.c pat_decl_y.h : $(srcdir)/pat_decl_y.y
|
|||
$(YACC) -d $(YFLAGS) $(srcdir)/pat_decl_y.y \
|
||||
&& sed -e "s/yy/pat_decl_y_/g" -e "s/YY/PAT_DECL_Y_/g" y.tab.c \
|
||||
| sed -e "s/int[ ]*pat_decl_y_char;/extern int pat_decl_y_char;/" \
|
||||
| sed -e "s/PAT_DECL_Y_STYPE[ ]*pat_decl_y_lval;/extern PAT_DECL_Y_STYPE pat_decl_y_lval;/" \
|
||||
| sed -e "s/int[ ]*pat_decl_y_nerrs;/extern int pat_decl_y_nerrs;/" \
|
||||
> pat_decl_y.c \
|
||||
&& sed -e "s/yy/pat_decl_y_/g" -e "s/YY/PAT_DECL_Y_/g" y.tab.h > pat_decl_y.h
|
||||
|
|
|
|||
|
|
@ -11,7 +11,6 @@ AM_CFLAGS = @ALLIANCE_CFLAGS@ \
|
|||
-I$(top_srcdir)/rtn/src \
|
||||
-I$(top_srcdir)/vex/src \
|
||||
-I$(top_srcdir)/vbh/src \
|
||||
-I$(top_srcdir)/vbl/src \
|
||||
-I$(top_srcdir)/vpn/src \
|
||||
-I$(top_srcdir)/vtl/src
|
||||
|
||||
|
|
@ -23,13 +22,10 @@ vasy_LDADD = @ALLIANCE_LIBS@ \
|
|||
-L$(top_srcdir)/rtd/src \
|
||||
-L$(top_srcdir)/rtn/src \
|
||||
-L$(top_srcdir)/vbh/src \
|
||||
-L$(top_srcdir)/vbl/src \
|
||||
-L$(top_srcdir)/vex/src \
|
||||
-L$(top_srcdir)/vpd/src \
|
||||
-L$(top_srcdir)/vpn/src \
|
||||
-L$(top_srcdir)/vtl/src \
|
||||
-L$(top_srcdir)/vvh/src \
|
||||
-lRtd -lRtn -lVpd -lVpn -lVbh \
|
||||
-lRtd -lRtn -lVpn -lVbh \
|
||||
-lVex -lBdd -lAbl -lAut -lMut
|
||||
|
||||
vasy_SOURCES = \
|
||||
|
|
|
|||
Loading…
Reference in New Issue