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This commit is contained in:
Olivier Sirol 2002-02-14 10:51:51 +00:00
parent 8434ab7290
commit a74d387959
70 changed files with 14658 additions and 0 deletions
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35
alliance/share/cells/padlib/CATAL Normal file
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@ -0,0 +1,35 @@
padreal G
padreal C
pck_sp C
pi_sp C
piot_sp C
piotw_sp C
pot_sp C
potw_sp C
po_sp C
pow_sp C
pvdde_sp C
pvddeck_sp C
pvddi_sp C
pvddick_sp C
pvsse_sp C
pvsseck_sp C
pvssi_sp C
pvssick_sp C
palck_sp C
pali_sp C
paliot_sp C
paliotw_sp C
palo_sp C
palot_sp C
palotw_sp C
palow_sp C
palvdde_sp C
palvddeck_sp C
palvddi_sp C
palvddick_sp C
palvsse_sp C
palvsseck_sp C
palvssi_sp C
palvssick_sp C
corner_sp C

24
alliance/share/cells/padlib/corner_sp.ap Normal file
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V ALLIANCE : 6
H corner_sp,P,13/10/2000,100
A 0,0,50000,50000
C 48700,0,1200,ck,0,SOUTH,ALU2
C 45300,0,4000,vssi,0,SOUTH,ALU2
C 40900,0,4000,vddi,0,SOUTH,ALU2
C 19700,0,12000,vsse,0,SOUTH,ALU2
C 32500,0,12000,vdde,0,SOUTH,ALU2
C 50000,4700,4000,vssi,1,EAST,ALU2
C 50000,9100,4000,vddi,1,EAST,ALU2
C 50000,30300,12000,vsse,1,EAST,ALU2
C 50000,17500,12000,vdde,1,EAST,ALU2
C 50000,1300,1200,ck,1,EAST,ALU2
S 19700,0,19700,36200,12000,*,UP,ALU2
S 48200,1300,50000,1300,1200,*,RIGHT,ALU2
S 48700,100,48700,1800,1200,*,UP,ALU2
S 43400,4700,50000,4700,4000,*,LEFT,ALU2
S 45300,0,45300,6600,4000,*,UP,ALU2
S 39000,9100,50000,9100,4000,*,LEFT,ALU2
S 40900,0,40900,11000,4000,*,UP,ALU2
S 26600,17500,50000,17500,12000,*,LEFT,ALU2
S 32500,0,32500,23400,12000,*,UP,ALU2
S 13800,30300,50000,30300,12000,*,LEFT,ALU2
EOF

27
alliance/share/cells/padlib/corner_sp.vbe Normal file
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-- VHDL data flow description generated from `corner_sp`
-- date : Thu Feb 23 17:06:23 1995
-- Entity Declaration
ENTITY corner_sp IS
PORT (
ck : in BIT; -- ck
vdde : in BIT; -- vdde
vddi : in BIT; -- vddi
vsse : in BIT; -- vsse
vssi : in BIT -- vssi
);
END corner_sp;
-- Architecture Declaration
ARCHITECTURE behaviour_data_flow OF corner_sp IS
BEGIN
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on corner_sp"
SEVERITY WARNING;
END;

7
alliance/share/cells/padlib/padreal.ap Normal file
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@ -0,0 +1,7 @@
V ALLIANCE : 6
H padreal,P,13/10/2000,100
A 0,7600,17200,21300
C 8600,7600,10000,in,0,SOUTH,ALU1
S 8600,7700,8600,21200,10000,*,UP,ALU1
B 8600,15200,12200,12200,CONT_VIA,*
EOF

24
alliance/share/cells/padlib/padreal.cif Normal file
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@ -0,0 +1,24 @@
(rds to CIF driver version 1.03
technology /users/alc/distrib/dev/alliance-3.2/etc/prol10_7.rds
Wed May 21 16:49:13 1997
padreal
distrib);
DS1 5 2;
9 padreal;
(AB : 0.00, 0.00 150.50, 118.15 in micron);
4A 0 0 6020 4726;
LCC;
B4000 4000 3010 3320;
LCM;
B3500 1320 3010 660;
B4400 4400 3010 3320;
LCM2;
B4400 4400 3010 3320;
LCG;
B4000 4000 3010 3320;
DF;
C1;
(AB : 0.00, 0.00 150.50, 118.15 in micron);
E

60
alliance/share/cells/padlib/padsymb.db Normal file
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@ -0,0 +1,60 @@
#cell1 padsymb any library 31744 v7r5.6
# 24-Nov-91 14:16 24-Nov-91 14:16 stacs * .
v1(50,padsymb
(33,CP
[padreal,cp]
[palck_sp,cp]
[pali_sp,cp]
[paliot_sp,cp]
[paliotw_sp,cp]
[palo_sp,cp]
[palot_sp,cp]
[palotw_sp,cp]
[palow_sp,cp]
[palvdde_sp,cp]
[palvddeck_sp,cp]
[palvddi_sp,cp]
[palvddick_sp,cp]
[palvsse_sp,cp]
[palvsseck_sp,cp]
[palvssi_sp,cp]
[palvssick_sp,cp]
[pck_sp,cp]
[pi_sp,cp]
[piot_sp,cp]
[piotw_sp,cp]
[po_sp,cp]
[pot_sp,cp]
[potw_sp,cp]
[pow_sp,cp]
[pvdde_sp,cp]
[pvddeck_sp,cp]
[pvddi_sp,cp]
[pvddick_sp,cp]
[pvsse_sp,cp]
[pvsseck_sp,cp]
[pvssi_sp,cp]
[pvssick_sp,cp]
)
(16,HNS
[pck_sp,hns]
[pi_sp,hns]
[piot_sp,hns]
[piotw_sp,hns]
[po_sp,hns]
[pot_sp,hns]
[potw_sp,hns]
[pow_sp,hns]
[pvdde_sp,hns]
[pvddeck_sp,hns]
[pvddi_sp,hns]
[pvddick_sp,hns]
[pvsse_sp,hns]
[pvsseck_sp,hns]
[pvssi_sp,hns]
[pvssick_sp,hns]
)
(1,CIF
[padreal,cif]
)
)

823
alliance/share/cells/padlib/palck_sp.ap Normal file
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@ -0,0 +1,823 @@
V ALLIANCE : 6
H palck_sp,P,13/10/2000,100
A 300,100,17500,36400
C 300,17600,12000,vdde,0,WEST,ALU2
C 300,30400,12000,vsse,0,WEST,ALU2
C 17500,30400,12000,vsse,1,EAST,ALU2
C 17500,17600,12000,vdde,1,EAST,ALU2
C 17500,9200,4000,vddi,1,EAST,ALU2
C 17500,4800,4000,vssi,1,EAST,ALU2
C 17500,1400,1200,ck,1,EAST,ALU2
C 300,1400,1200,ck,0,WEST,ALU2
C 300,9200,4000,vddi,0,WEST,ALU2
C 300,4800,4000,vssi,0,WEST,ALU2
S 15000,1000,15000,4900,200,*,UP,ALU1
S 13800,1000,13800,4900,200,*,UP,ALU1
S 12600,1000,12600,4900,200,*,UP,ALU1
S 11300,6400,12000,6400,200,*,RIGHT,ALU1
S 8400,500,15600,500,200,*,RIGHT,ALU1
S 15600,500,15600,4000,200,*,UP,ALU1
S 14400,500,14400,4000,200,*,UP,ALU1
S 13200,500,13200,4000,200,*,UP,ALU1
S 12000,500,12000,4000,200,*,UP,ALU1
S 10800,500,10800,9200,200,*,UP,ALU1
S 9600,500,9600,9200,200,*,UP,ALU1
S 8400,500,8400,5500,200,*,UP,ALU1
S 7800,4500,8400,4500,200,*,RIGHT,ALU1
S 7800,6400,8400,6400,200,*,RIGHT,ALU1
S 3700,5900,3700,12800,200,*,UP,ALU1
S 1800,12800,11400,12800,200,*,RIGHT,ALU1
S 2200,5900,2200,12800,1000,*,UP,ALU1
S 4900,5900,4900,12800,200,*,UP,ALU1
S 6100,5900,6100,12800,200,*,UP,ALU1
S 6400,14400,8200,14400,200,*,RIGHT,ALU1
S 6700,14400,6700,23400,800,*,UP,ALU1
S 11400,7300,11400,12800,200,*,UP,ALU1
S 7300,5900,7300,12800,200,*,UP,ALU1
S 9000,5900,9000,12800,200,*,UP,ALU1
S 10200,5900,10200,12800,200,*,UP,ALU1
S 12000,4400,12000,13400,200,*,UP,ALU1
S 8800,13400,12000,13400,200,*,RIGHT,ALU1
S 8800,13400,8800,15100,200,*,UP,ALU1
S 8200,14400,8200,23400,200,*,UP,ALU1
S 9300,25100,10100,25100,200,*,RIGHT,ALU1
S 9700,25100,9700,29600,1000,*,UP,ALU1
S 300,30400,17500,30400,12000,log.vsse,RIGHT,ALU2
S 8700,6400,11800,6400,300,*,RIGHT,POLY
S 11400,6800,11400,12900,300,*,UP,NTIE
S 1800,6000,11400,6000,300,*,RIGHT,NTIE
S 13200,4500,13200,5400,200,*,DOWN,ALU1
S 14400,4500,14400,5400,200,*,DOWN,ALU1
S 12000,5400,14400,5400,200,*,RIGHT,ALU1
S 1700,12800,11400,12800,300,*,RIGHT,NTIE
S 1600,9400,11600,9400,7200,*,RIGHT,NWELL
S 10200,6700,10200,9300,300,*,UP,PDIF
S 16200,1000,16200,5000,200,*,UP,ALU1
S 11400,1000,11400,5000,200,*,UP,ALU1
S 10200,1000,10200,5000,200,*,UP,ALU1
S 8700,4500,15300,4500,300,*,RIGHT,POLY
S 1800,1100,16200,1100,300,*,RIGHT,PTIE
S 1800,4900,16200,4900,300,*,RIGHT,PTIE
S 12000,1600,12000,4200,200,*,UP,NDIF
S 13800,1600,13800,4200,200,*,UP,NDIF
S 15600,1600,15600,4200,300,*,UP,NDIF
S 15600,1600,15600,4200,200,*,UP,NDIF
S 16200,1000,16200,5000,300,*,UP,PTIE
S 14700,1400,14700,4400,100,*,UP,NTRANS
S 14100,1400,14100,4400,100,*,UP,NTRANS
S 15000,1600,15000,4200,200,*,UP,NDIF
S 14400,1600,14400,4200,200,*,UP,NDIF
S 15300,1400,15300,4400,100,*,UP,NTRANS
S 12900,1400,12900,4400,100,*,UP,NTRANS
S 12600,1600,12600,4200,200,*,UP,NDIF
S 13200,1600,13200,4200,200,*,UP,NDIF
S 12300,1400,12300,4400,100,*,UP,NTRANS
S 13500,1400,13500,4400,100,*,UP,NTRANS
S 11100,1400,11100,4400,100,*,UP,NTRANS
S 11700,1400,11700,4400,100,*,UP,NTRANS
S 10500,1400,10500,4400,100,*,UP,NTRANS
S 10200,1600,10200,4200,300,*,UP,NDIF
S 11400,1600,11400,4200,200,*,UP,NDIF
S 10800,1600,10800,4200,200,*,UP,NDIF
S 10800,6700,10800,9300,300,*,UP,PDIF
S 10200,6700,10200,9300,300,*,UP,PDIF
S 10500,6500,10500,9500,100,*,UP,PTRANS
S 9600,6700,9600,9300,300,*,UP,PDIF
S 9900,6500,9900,9500,100,*,UP,PTRANS
S 9300,6500,9300,9500,100,*,UP,PTRANS
S 9900,1400,9900,4400,100,*,UP,NTRANS
S 9300,1400,9300,4400,100,*,UP,NTRANS
S 3100,1600,3100,4200,200,*,UP,NDIF
S 8400,1600,8400,4200,300,*,UP,NDIF
S 8700,1400,8700,4400,100,*,UP,NTRANS
S 9000,1600,9000,4200,200,*,UP,NDIF
S 9600,1600,9600,4200,200,*,UP,NDIF
S 3700,1600,3700,4200,200,*,UP,NDIF
S 5200,1400,5200,4400,100,*,UP,NTRANS
S 4600,1400,4600,4400,100,*,UP,NTRANS
S 2800,1400,2800,4400,100,*,UP,NTRANS
S 6700,1600,6700,4200,200,*,UP,NDIF
S 4000,1400,4000,4400,100,*,UP,NTRANS
S 3400,1400,3400,4400,100,*,UP,NTRANS
S 6100,1600,6100,4200,200,*,UP,NDIF
S 5500,1600,5500,4200,200,*,UP,NDIF
S 4900,1600,4900,4200,200,*,UP,NDIF
S 4300,1600,4300,4200,200,*,UP,NDIF
S 2500,1600,2500,4200,300,*,UP,NDIF
S 7300,1600,7300,4200,400,*,UP,NDIF
S 7000,1400,7000,4400,100,*,UP,NTRANS
S 6400,1400,6400,4400,100,*,UP,NTRANS
S 5800,1400,5800,4400,100,*,UP,NTRANS
S 2500,6700,2500,12300,400,*,UP,PDIF
S 8400,6700,8400,9300,400,*,UP,PDIF
S 8700,6500,8700,9500,100,*,UP,PTRANS
S 9000,6700,9000,9300,300,*,UP,PDIF
S 7000,6500,7000,12500,100,*,UP,PTRANS
S 3100,6700,3100,12300,200,*,UP,PDIF
S 3700,6700,3700,12300,200,*,UP,PDIF
S 4300,6700,4300,12300,200,*,UP,PDIF
S 4900,6700,4900,12300,200,*,UP,PDIF
S 5500,6700,5500,12300,200,*,UP,PDIF
S 6100,6700,6100,12300,200,*,UP,PDIF
S 6700,6700,6700,12300,200,*,UP,PDIF
S 4600,6500,4600,12500,100,*,UP,PTRANS
S 5200,6500,5200,12500,100,*,UP,PTRANS
S 5800,6500,5800,12500,100,*,UP,PTRANS
S 6400,6500,6400,12500,100,*,UP,PTRANS
S 2800,6500,2800,12500,100,*,UP,PTRANS
S 3400,6500,3400,12500,100,*,UP,PTRANS
S 4000,6500,4000,12500,100,*,UP,PTRANS
S 3700,6700,3700,12300,400,*,UP,PDIF
S 4900,6700,4900,12300,400,*,UP,PDIF
S 6100,6700,6100,12300,400,*,UP,PDIF
S 7300,6700,7300,12300,400,*,UP,PDIF
S 1800,5900,1800,12800,300,*,UP,NTIE
S 1900,1200,1900,5000,300,*,UP,PTIE
S 2800,4500,8400,4500,300,*,RIGHT,POLY
S 2800,12500,7000,12500,100,*,RIGHT,POLY
S 2800,1400,7000,1400,100,*,RIGHT,POLY
S 8700,6300,8700,6500,100,*,UP,POLY
S 2800,6400,8400,6400,300,*,RIGHT,POLY
S 8400,5300,8400,9200,200,*,UP,ALU1
S 9000,1000,9000,5000,200,*,UP,ALU1
S 2200,1000,2200,5000,900,*,UP,ALU1
S 7300,1000,7300,5000,200,*,UP,ALU1
S 6100,1000,6100,5000,200,*,UP,ALU1
S 4900,1000,4900,5000,200,*,UP,ALU1
S 3700,1000,3700,5000,200,*,UP,ALU1
S 3100,1000,3100,12300,200,*,UP,ALU1
S 4300,1000,4300,12300,200,*,UP,ALU1
S 5500,1000,5500,12300,200,*,UP,ALU1
S 6700,1000,6700,12300,200,*,UP,ALU1
S 7600,15000,7600,29900,200,*,UP,ALU1
S 8800,15000,8800,29900,200,*,UP,ALU1
S 8200,24500,8200,29600,200,*,UP,ALU1
S 9400,25600,9400,29000,300,*,UP,NDIF
S 8800,25600,8800,29000,300,*,UP,NDIF
S 8200,25600,8200,29000,300,*,UP,NDIF
S 7600,25600,7600,29000,300,*,UP,NDIF
S 7300,25400,7300,29200,100,*,UP,NTRANS
S 7900,25400,7900,29200,100,*,UP,NTRANS
S 8500,25400,8500,29200,100,*,UP,NTRANS
S 9100,25400,9100,29200,100,*,UP,NTRANS
S 7100,29500,9500,29500,300,*,RIGHT,PTIE
S 9400,14900,9400,22800,300,*,UP,PDIF
S 8800,14900,8800,22800,200,*,UP,PDIF
S 8200,14900,8200,22800,200,*,UP,PDIF
S 7600,14900,7600,22800,200,*,UP,PDIF
S 7300,14700,7300,23000,100,*,UP,PTRANS
S 7900,14700,7900,23000,100,*,UP,PTRANS
S 8500,14700,8500,23000,100,*,UP,PTRANS
S 9100,14700,9100,23000,100,*,UP,PTRANS
S 8400,14200,8400,23500,2800,*,UP,NWELL
S 8800,24500,8800,24700,200,*,UP,POLY
S 7100,25100,8500,25100,300,*,RIGHT,PTIE
S 7300,25400,9100,25400,100,*,RIGHT,POLY
S 8800,24600,8800,25400,200,*,UP,POLY
S 8800,24600,9300,24600,300,*,RIGHT,POLY
S 7100,23300,9500,23300,300,*,RIGHT,NTIE
S 6700,14200,6700,23500,1000,*,UP,NWELL
S 9900,14200,9900,23500,600,*,UP,NWELL
S 7000,25600,7000,29000,300,*,UP,NDIF
S 7000,14900,7000,22800,300,*,UP,PDIF
S 6400,14400,6400,23400,300,*,UP,NTIE
S 6400,23300,7000,23300,300,*,RIGHT,NTIE
S 10000,27100,10000,29300,300,*,UP,PTIE
S 9400,29500,10100,29500,300,*,RIGHT,PTIE
S 6300,29500,7100,29500,300,*,RIGHT,PTIE
S 6400,25000,6400,29600,300,*,UP,PTIE
S 6300,25100,7100,25100,300,*,RIGHT,PTIE
S 6700,25000,6700,29600,900,*,UP,ALU1
S 7500,30400,9400,30400,900,*,RIGHT,ALU1
S 9300,24600,9700,24600,200,*,RIGHT,ALU1
S 10000,25000,10000,27300,300,*,UP,PTIE
S 9100,25100,10000,25100,300,*,RIGHT,PTIE
S 9800,14200,9800,23500,400,*,UP,NWELL
S 6400,14400,8500,14400,300,*,RIGHT,NTIE
S 7300,14700,9100,14700,100,*,RIGHT,POLY
S 9500,23300,10000,23300,300,*,RIGHT,NTIE
S 10000,14400,10000,23400,300,*,UP,NTIE
S 9900,14200,9900,23500,600,*,UP,NWELL
S 9700,14300,9700,23400,1000,*,UP,ALU1
S 8800,13700,8800,14600,200,*,UP,POLY
S 7600,13800,8300,13800,200,*,RIGHT,ALU1
S 8200,13800,8800,13800,300,*,RIGHT,POLY
S 9100,14400,10000,14400,300,*,RIGHT,NTIE
S 8900,30900,8900,36400,1000,*,UP,ALU1
S 300,1400,17500,1400,1200,log.ck,RIGHT,ALU2
S 300,4800,17500,4800,4000,log.vssi,RIGHT,ALU2
S 300,9200,17500,9200,4000,log.vddi,RIGHT,ALU2
S 300,17600,17500,17600,12000,log.vdde,RIGHT,ALU2
B 6700,27300,800,4600,CONT_VIA,*
B 9700,18800,1000,9300,CONT_VIA,*
B 6700,18900,800,9200,CONT_VIA,*
B 2200,3900,1000,2200,CONT_VIA,*
B 2200,9200,1000,4000,CONT_VIA,*
B 14400,5400,200,200,CONT_TURN1,*
B 8400,500,200,200,CONT_TURN1,*
B 15600,500,200,200,CONT_TURN1,*
B 8800,13400,200,200,CONT_TURN1,*
B 12000,13400,200,200,CONT_TURN1,*
B 10100,25100,200,200,CONT_TURN1,*
B 9300,25100,200,200,CONT_TURN1,*
V 11800,6400,CONT_POLY,*
V 11400,6400,CONT_POLY,*
V 14400,4500,CONT_POLY,*
V 13200,4500,CONT_POLY,*
V 12000,4500,CONT_POLY,*
V 11400,11600,CONT_BODY_N,*
V 11400,12400,CONT_BODY_N,*
V 11400,12000,CONT_BODY_N,*
V 11400,12800,CONT_BODY_N,*
V 11400,10500,CONT_BODY_N,*
V 11400,10000,CONT_BODY_N,*
V 11400,8900,CONT_BODY_N,*
V 11400,8400,CONT_BODY_N,*
V 11400,7400,CONT_BODY_N,*
V 11400,7900,CONT_VIA,*
V 11400,11000,CONT_VIA,*
V 11400,9400,CONT_VIA,*
V 10200,7000,CONT_DIF_P,*
V 10200,7800,CONT_DIF_P,*
V 10200,7000,CONT_DIF_P,*
V 10200,8200,CONT_DIF_P,*
V 10200,9000,CONT_DIF_P,*
V 10200,6000,CONT_BODY_N,*
V 10200,12800,CONT_BODY_N,*
V 10200,7400,CONT_VIA,*
V 10200,8600,CONT_VIA,*
V 10200,11000,CONT_VIA,*
V 10200,9400,CONT_VIA,*
V 10200,10200,CONT_VIA,*
V 16200,2900,CONT_VIA,*
V 16200,3700,CONT_VIA,*
V 16200,4500,CONT_VIA,*
V 15000,1100,CONT_BODY_P,*
V 13800,1100,CONT_BODY_P,*
V 12600,1100,CONT_BODY_P,*
V 11400,1100,CONT_BODY_P,*
V 10200,1100,CONT_BODY_P,*
V 13800,4900,CONT_BODY_P,*
V 8400,2400,CONT_DIF_N,*
V 9600,2400,CONT_DIF_N,*
V 10800,2400,CONT_DIF_N,*
V 12000,2400,CONT_DIF_N,*
V 13200,2400,CONT_DIF_N,*
V 14400,2400,CONT_DIF_N,*
V 15600,2400,CONT_DIF_N,*
V 12600,4900,CONT_BODY_P,*
V 11400,4900,CONT_BODY_P,*
V 10200,4900,CONT_BODY_P,*
V 10800,7000,CONT_DIF_P,*
V 10800,8600,CONT_DIF_P,*
V 10800,8100,CONT_DIF_P,*
V 10800,7500,CONT_DIF_P,*
V 10800,9100,CONT_DIF_P,*
V 15000,4900,CONT_BODY_P,*
V 10800,3900,CONT_DIF_N,*
V 10800,2900,CONT_DIF_N,*
V 10800,1900,CONT_DIF_N,*
V 10800,3400,CONT_DIF_N,*
V 12000,1900,CONT_DIF_N,*
V 12000,2900,CONT_DIF_N,*
V 12000,3900,CONT_DIF_N,*
V 12000,3400,CONT_DIF_N,*
V 13200,3400,CONT_DIF_N,*
V 13200,3900,CONT_DIF_N,*
V 13200,2900,CONT_DIF_N,*
V 13200,1900,CONT_DIF_N,*
V 15000,2500,CONT_DIF_N,*
V 15000,2000,CONT_DIF_N,*
V 15000,3500,CONT_DIF_N,*
V 15000,4000,CONT_VIA,*
V 15000,3000,CONT_VIA,*
V 14400,1900,CONT_DIF_N,*
V 14400,2900,CONT_DIF_N,*
V 14400,3900,CONT_DIF_N,*
V 14400,3400,CONT_DIF_N,*
V 13800,3500,CONT_DIF_N,*
V 13800,2000,CONT_DIF_N,*
V 13800,2500,CONT_DIF_N,*
V 13800,3000,CONT_VIA,*
V 13800,4000,CONT_VIA,*
V 12600,2500,CONT_DIF_N,*
V 12600,3500,CONT_DIF_N,*
V 12600,2000,CONT_DIF_N,*
V 12600,3000,CONT_VIA,*
V 12600,4000,CONT_VIA,*
V 11400,2000,CONT_DIF_N,*
V 11400,3500,CONT_DIF_N,*
V 11400,2500,CONT_DIF_N,*
V 11400,4000,CONT_VIA,*
V 11400,3000,CONT_VIA,*
V 10200,2500,CONT_DIF_N,*
V 10200,3500,CONT_DIF_N,*
V 10200,2000,CONT_DIF_N,*
V 10200,3000,CONT_VIA,*
V 10200,4000,CONT_VIA,*
V 15600,1900,CONT_DIF_N,*
V 15600,3900,CONT_DIF_N,*
V 15600,3400,CONT_DIF_N,*
V 15600,2900,CONT_DIF_N,*
V 16200,2500,CONT_BODY_P,*
V 16200,2100,CONT_BODY_P,*
V 16200,4900,CONT_BODY_P,*
V 16200,1700,CONT_BODY_P,*
V 16200,1300,CONT_BODY_P,*
V 16200,4100,CONT_BODY_P,*
V 16200,3300,CONT_BODY_P,*
V 9600,9100,CONT_DIF_P,*
V 9600,7500,CONT_DIF_P,*
V 9600,8100,CONT_DIF_P,*
V 9600,8600,CONT_DIF_P,*
V 9600,7000,CONT_DIF_P,*
V 9600,2900,CONT_DIF_N,*
V 9000,3500,CONT_DIF_N,*
V 9000,2000,CONT_DIF_N,*
V 8400,2900,CONT_DIF_N,*
V 8400,3400,CONT_DIF_N,*
V 8400,3900,CONT_DIF_N,*
V 9600,3900,CONT_DIF_N,*
V 9600,3400,CONT_DIF_N,*
V 2500,1900,CONT_DIF_N,*
V 2500,3900,CONT_DIF_N,*
V 2500,3400,CONT_DIF_N,*
V 2500,2400,CONT_DIF_N,*
V 2500,2900,CONT_DIF_N,*
V 9000,2500,CONT_DIF_N,*
V 9600,1900,CONT_DIF_N,*
V 8400,1900,CONT_DIF_N,*
V 4900,3500,CONT_DIF_N,*
V 3700,2000,CONT_DIF_N,*
V 3700,3500,CONT_DIF_N,*
V 3700,2500,CONT_DIF_N,*
V 3100,2900,CONT_DIF_N,*
V 3100,2400,CONT_DIF_N,*
V 3100,3900,CONT_DIF_N,*
V 3100,3400,CONT_DIF_N,*
V 5500,3400,CONT_DIF_N,*
V 5500,3900,CONT_DIF_N,*
V 4300,2400,CONT_DIF_N,*
V 4300,2900,CONT_DIF_N,*
V 4300,3900,CONT_DIF_N,*
V 4300,3400,CONT_DIF_N,*
V 4900,2500,CONT_DIF_N,*
V 4900,2000,CONT_DIF_N,*
V 6700,2900,CONT_DIF_N,*
V 6700,3900,CONT_DIF_N,*
V 6700,3400,CONT_DIF_N,*
V 6100,2500,CONT_DIF_N,*
V 6100,2000,CONT_DIF_N,*
V 6100,3500,CONT_DIF_N,*
V 5500,2900,CONT_DIF_N,*
V 5500,2400,CONT_DIF_N,*
V 7300,3500,CONT_DIF_N,*
V 7300,2500,CONT_DIF_N,*
V 7300,2000,CONT_DIF_N,*
V 6700,2400,CONT_DIF_N,*
V 9000,7000,CONT_DIF_P,*
V 9000,7800,CONT_DIF_P,*
V 9000,7000,CONT_DIF_P,*
V 6700,10600,CONT_DIF_P,*
V 9000,9000,CONT_DIF_P,*
V 9000,8200,CONT_DIF_P,*
V 8400,8600,CONT_DIF_P,*
V 8400,8100,CONT_DIF_P,*
V 8400,7500,CONT_DIF_P,*
V 8400,7000,CONT_DIF_P,*
V 8400,9100,CONT_DIF_P,*
V 6700,12200,CONT_DIF_P,*
V 6700,7800,CONT_DIF_P,*
V 6700,8200,CONT_DIF_P,*
V 6700,8600,CONT_DIF_P,*
V 6700,9000,CONT_DIF_P,*
V 6700,9400,CONT_DIF_P,*
V 6700,9800,CONT_DIF_P,*
V 6700,10200,CONT_DIF_P,*
V 5500,9400,CONT_DIF_P,*
V 5500,9000,CONT_DIF_P,*
V 5500,8600,CONT_DIF_P,*
V 6700,7000,CONT_DIF_P,*
V 6700,7400,CONT_DIF_P,*
V 6700,11000,CONT_DIF_P,*
V 6700,11400,CONT_DIF_P,*
V 6700,11800,CONT_DIF_P,*
V 5500,11800,CONT_DIF_P,*
V 5500,11400,CONT_DIF_P,*
V 5500,11000,CONT_DIF_P,*
V 5500,7400,CONT_DIF_P,*
V 5500,7000,CONT_DIF_P,*
V 5500,10600,CONT_DIF_P,*
V 5500,10200,CONT_DIF_P,*
V 5500,9800,CONT_DIF_P,*
V 4300,9800,CONT_DIF_P,*
V 4300,10200,CONT_DIF_P,*
V 4300,10600,CONT_DIF_P,*
V 4300,7000,CONT_DIF_P,*
V 4300,7400,CONT_DIF_P,*
V 5500,8200,CONT_DIF_P,*
V 5500,7800,CONT_DIF_P,*
V 5500,12200,CONT_DIF_P,*
V 4300,11400,CONT_DIF_P,*
V 4300,11800,CONT_DIF_P,*
V 4300,12200,CONT_DIF_P,*
V 4300,7800,CONT_DIF_P,*
V 4300,8200,CONT_DIF_P,*
V 4300,8600,CONT_DIF_P,*
V 4300,9000,CONT_DIF_P,*
V 4300,9400,CONT_DIF_P,*
V 3100,9400,CONT_DIF_P,*
V 3100,9000,CONT_DIF_P,*
V 3100,8600,CONT_DIF_P,*
V 3100,8200,CONT_DIF_P,*
V 3100,7800,CONT_DIF_P,*
V 3100,7400,CONT_DIF_P,*
V 3100,7000,CONT_DIF_P,*
V 4300,11000,CONT_DIF_P,*
V 2500,7200,CONT_DIF_P,*
V 3100,12200,CONT_DIF_P,*
V 3100,11800,CONT_DIF_P,*
V 3100,11400,CONT_DIF_P,*
V 3100,11000,CONT_DIF_P,*
V 3100,10600,CONT_DIF_P,*
V 3100,10200,CONT_DIF_P,*
V 3100,9800,CONT_DIF_P,*
V 2500,11200,CONT_DIF_P,*
V 2500,10700,CONT_DIF_P,*
V 2500,10200,CONT_DIF_P,*
V 2500,9700,CONT_DIF_P,*
V 2500,9200,CONT_DIF_P,*
V 2500,8700,CONT_DIF_P,*
V 2500,8200,CONT_DIF_P,*
V 2500,7700,CONT_DIF_P,*
V 2500,12200,CONT_DIF_P,*
V 2500,11700,CONT_DIF_P,*
V 7300,12200,CONT_DIF_P,*
V 7300,7800,CONT_DIF_P,*
V 7300,8200,CONT_DIF_P,*
V 7300,9000,CONT_DIF_P,*
V 7300,9400,CONT_DIF_P,*
V 7300,10200,CONT_DIF_P,*
V 7300,10600,CONT_DIF_P,*
V 7300,11400,CONT_DIF_P,*
V 7300,11800,CONT_DIF_P,*
V 6100,10200,CONT_DIF_P,*
V 6100,9400,CONT_DIF_P,*
V 6100,9000,CONT_DIF_P,*
V 6100,8200,CONT_DIF_P,*
V 6100,7800,CONT_DIF_P,*
V 6100,12200,CONT_DIF_P,*
V 6100,11800,CONT_DIF_P,*
V 7300,7000,CONT_DIF_P,*
V 4900,9000,CONT_DIF_P,*
V 4900,8200,CONT_DIF_P,*
V 4900,7800,CONT_DIF_P,*
V 4900,12200,CONT_DIF_P,*
V 4900,11800,CONT_DIF_P,*
V 6100,7000,CONT_DIF_P,*
V 6100,11400,CONT_DIF_P,*
V 6100,10600,CONT_DIF_P,*
V 3700,7800,CONT_DIF_P,*
V 3700,12200,CONT_DIF_P,*
V 3700,11800,CONT_DIF_P,*
V 4900,7000,CONT_DIF_P,*
V 4900,11400,CONT_DIF_P,*
V 4900,10600,CONT_DIF_P,*
V 4900,10200,CONT_DIF_P,*
V 4900,9400,CONT_DIF_P,*
V 3700,7000,CONT_DIF_P,*
V 3700,11400,CONT_DIF_P,*
V 3700,10600,CONT_DIF_P,*
V 3700,10200,CONT_DIF_P,*
V 3700,9400,CONT_DIF_P,*
V 3700,9000,CONT_DIF_P,*
V 3700,8200,CONT_DIF_P,*
V 9000,12800,CONT_BODY_N,*
V 9000,6000,CONT_BODY_N,*
V 9600,12800,CONT_BODY_N,*
V 7300,6000,CONT_BODY_N,*
V 1800,9700,CONT_BODY_N,*
V 1800,9200,CONT_BODY_N,*
V 1800,8700,CONT_BODY_N,*
V 1800,8200,CONT_BODY_N,*
V 1800,12200,CONT_BODY_N,*
V 4900,6000,CONT_BODY_N,*
V 3700,6000,CONT_BODY_N,*
V 1800,7700,CONT_BODY_N,*
V 1800,7200,CONT_BODY_N,*
V 1800,11700,CONT_BODY_N,*
V 1800,11200,CONT_BODY_N,*
V 1800,10700,CONT_BODY_N,*
V 1800,10200,CONT_BODY_N,*
V 3700,12800,CONT_BODY_N,*
V 4900,12800,CONT_BODY_N,*
V 6100,12800,CONT_BODY_N,*
V 7300,12800,CONT_BODY_N,*
V 2300,6000,CONT_BODY_N,*
V 1800,6200,CONT_BODY_N,*
V 1800,6700,CONT_BODY_N,*
V 6100,6000,CONT_BODY_N,*
V 6700,12800,CONT_BODY_N,*
V 5500,12800,CONT_BODY_N,*
V 4300,12800,CONT_BODY_N,*
V 3100,12800,CONT_BODY_N,*
V 2500,12800,CONT_BODY_N,*
V 1800,12800,CONT_BODY_N,*
V 9000,1100,CONT_BODY_P,*
V 9000,4900,CONT_BODY_P,*
V 6100,4900,CONT_BODY_P,*
V 4900,4900,CONT_BODY_P,*
V 3700,4900,CONT_BODY_P,*
V 7300,1100,CONT_BODY_P,*
V 6100,1100,CONT_BODY_P,*
V 4900,1100,CONT_BODY_P,*
V 3700,1100,CONT_BODY_P,*
V 2400,4900,CONT_BODY_P,*
V 1900,4100,CONT_BODY_P,*
V 1900,3700,CONT_BODY_P,*
V 1900,4500,CONT_BODY_P,*
V 1900,1300,CONT_BODY_P,*
V 1900,1700,CONT_BODY_P,*
V 1900,2900,CONT_BODY_P,*
V 2400,1100,CONT_BODY_P,*
V 7300,4900,CONT_BODY_P,*
V 1900,4900,CONT_BODY_P,*
V 1900,2100,CONT_BODY_P,*
V 1900,2500,CONT_BODY_P,*
V 1900,3300,CONT_BODY_P,*
V 8300,6400,CONT_POLY,*
V 7900,4500,CONT_POLY,*
V 8300,4500,CONT_POLY,*
V 7900,6400,CONT_POLY,*
V 9000,11000,CONT_VIA,*
V 9000,8600,CONT_VIA,*
V 9000,7400,CONT_VIA,*
V 9000,4000,CONT_VIA,*
V 9000,3000,CONT_VIA,*
V 9000,10200,CONT_VIA,*
V 9000,9400,CONT_VIA,*
V 7300,11000,CONT_VIA,*
V 7300,7400,CONT_VIA,*
V 7300,8600,CONT_VIA,*
V 7300,9800,CONT_VIA,*
V 6100,7400,CONT_VIA,*
V 6100,9800,CONT_VIA,*
V 6100,8600,CONT_VIA,*
V 6100,11000,CONT_VIA,*
V 4900,11000,CONT_VIA,*
V 4900,7400,CONT_VIA,*
V 4900,9800,CONT_VIA,*
V 4900,8600,CONT_VIA,*
V 3700,9800,CONT_VIA,*
V 3700,8600,CONT_VIA,*
V 3700,11000,CONT_VIA,*
V 3700,7400,CONT_VIA,*
V 3700,4000,CONT_VIA,*
V 3700,3000,CONT_VIA,*
V 4900,3000,CONT_VIA,*
V 4900,4000,CONT_VIA,*
V 6100,4000,CONT_VIA,*
V 6100,3000,CONT_VIA,*
V 7300,4000,CONT_VIA,*
V 7300,3000,CONT_VIA,*
V 6700,1100,CONT_VIA,*
V 5500,1100,CONT_VIA,*
V 4300,1100,CONT_VIA,*
V 3100,1100,CONT_VIA,*
V 3100,1800,CONT_VIA,*
V 4300,1800,CONT_VIA,*
V 5500,1800,CONT_VIA,*
V 6700,1800,CONT_VIA,*
V 9400,28500,CONT_DIF_N,*
V 9400,26900,CONT_DIF_N,*
V 9400,26500,CONT_DIF_N,*
V 9400,28100,CONT_DIF_N,*
V 9400,27700,CONT_DIF_N,*
V 9400,26100,CONT_DIF_N,*
V 9400,27300,CONT_VIA,*
V 9400,25700,CONT_VIA,*
V 9400,28900,CONT_VIA,*
V 8200,25700,CONT_VIA,*
V 8200,26100,CONT_DIF_N,*
V 8200,27700,CONT_DIF_N,*
V 8200,28100,CONT_DIF_N,*
V 8200,27300,CONT_DIF_N,*
V 8200,28900,CONT_DIF_N,*
V 8200,26500,CONT_DIF_N,*
V 8200,28500,CONT_VIA,*
V 8200,26900,CONT_VIA,*
V 9400,29500,CONT_BODY_P,*
V 8200,29500,CONT_BODY_P,*
V 7800,14400,CONT_BODY_N,*
V 7600,25800,CONT_DIF_N,*
V 7600,28200,CONT_DIF_N,*
V 7600,28600,CONT_DIF_N,*
V 7600,26200,CONT_DIF_N,*
V 7600,26600,CONT_DIF_N,*
V 7600,27000,CONT_DIF_N,*
V 7600,27400,CONT_DIF_N,*
V 7600,27800,CONT_DIF_N,*
V 8800,26600,CONT_DIF_N,*
V 8800,27000,CONT_DIF_N,*
V 8800,26200,CONT_DIF_N,*
V 8800,25800,CONT_DIF_N,*
V 8800,28600,CONT_DIF_N,*
V 8800,27400,CONT_DIF_N,*
V 8800,27800,CONT_DIF_N,*
V 8800,28200,CONT_DIF_N,*
V 8200,15100,CONT_DIF_P,*
V 7600,15500,CONT_DIF_P,*
V 8200,15500,CONT_DIF_P,*
V 7600,15900,CONT_DIF_P,*
V 7600,15100,CONT_DIF_P,*
V 8800,15100,CONT_DIF_P,*
V 9400,15100,CONT_DIF_P,*
V 8800,15500,CONT_DIF_P,*
V 9400,15500,CONT_DIF_P,*
V 8800,15900,CONT_DIF_P,*
V 8200,16300,CONT_DIF_P,*
V 7600,16300,CONT_DIF_P,*
V 7600,20300,CONT_DIF_P,*
V 7600,18700,CONT_DIF_P,*
V 8200,18700,CONT_DIF_P,*
V 7600,19100,CONT_DIF_P,*
V 8200,19100,CONT_DIF_P,*
V 7600,19500,CONT_DIF_P,*
V 7600,19900,CONT_DIF_P,*
V 8200,19900,CONT_DIF_P,*
V 8200,20300,CONT_DIF_P,*
V 7600,17100,CONT_DIF_P,*
V 7600,16700,CONT_DIF_P,*
V 8200,16700,CONT_DIF_P,*
V 7600,18300,CONT_DIF_P,*
V 7600,17900,CONT_DIF_P,*
V 7600,17500,CONT_DIF_P,*
V 8200,17500,CONT_DIF_P,*
V 8200,17900,CONT_DIF_P,*
V 8800,16300,CONT_DIF_P,*
V 9400,16300,CONT_DIF_P,*
V 9400,20300,CONT_DIF_P,*
V 8800,19100,CONT_DIF_P,*
V 8800,19500,CONT_DIF_P,*
V 8800,19900,CONT_DIF_P,*
V 9400,19900,CONT_DIF_P,*
V 8800,20300,CONT_DIF_P,*
V 8800,18300,CONT_DIF_P,*
V 8800,17900,CONT_DIF_P,*
V 8800,18700,CONT_DIF_P,*
V 9400,18700,CONT_DIF_P,*
V 9400,19100,CONT_DIF_P,*
V 8800,17100,CONT_DIF_P,*
V 8800,16700,CONT_DIF_P,*
V 9400,16700,CONT_DIF_P,*
V 9400,17900,CONT_DIF_P,*
V 9400,17500,CONT_DIF_P,*
V 8800,17500,CONT_DIF_P,*
V 8200,15900,CONT_VIA,*
V 8200,18300,CONT_VIA,*
V 8200,19500,CONT_VIA,*
V 8200,17100,CONT_VIA,*
V 7600,20700,CONT_DIF_P,*
V 8800,20700,CONT_DIF_P,*
V 8200,20700,CONT_VIA,*
V 7600,21100,CONT_DIF_P,*
V 8800,21100,CONT_DIF_P,*
V 8200,21100,CONT_DIF_P,*
V 9400,21100,CONT_DIF_P,*
V 8200,21500,CONT_DIF_P,*
V 9400,21500,CONT_DIF_P,*
V 8800,21500,CONT_DIF_P,*
V 7600,21500,CONT_DIF_P,*
V 7600,21900,CONT_DIF_P,*
V 8800,21900,CONT_DIF_P,*
V 8200,21900,CONT_VIA,*
V 7600,22300,CONT_DIF_P,*
V 8200,22300,CONT_DIF_P,*
V 8800,22300,CONT_DIF_P,*
V 9400,22300,CONT_DIF_P,*
V 8200,25100,CONT_BODY_P,*
V 9400,25100,CONT_BODY_P,*
V 9300,24600,CONT_POLY,*
V 8200,24600,CONT_VIA,*
V 9400,23300,CONT_BODY_N,*
V 8200,23300,CONT_BODY_N,*
V 9400,22700,CONT_DIF_P,*
V 8800,22700,CONT_DIF_P,*
V 8200,22700,CONT_DIF_P,*
V 7600,22700,CONT_DIF_P,*
V 8200,14400,CONT_VIA,*
V 7300,14400,CONT_BODY_N,*
V 7000,26500,CONT_DIF_N,*
V 7000,27700,CONT_DIF_N,*
V 7000,28500,CONT_DIF_N,*
V 7000,28100,CONT_DIF_N,*
V 7000,26900,CONT_DIF_N,*
V 7000,25700,CONT_DIF_N,*
V 7000,27300,CONT_DIF_N,*
V 7000,28900,CONT_DIF_N,*
V 7000,26100,CONT_DIF_N,*
V 7000,17100,CONT_DIF_P,*
V 7000,20700,CONT_DIF_P,*
V 7000,19500,CONT_DIF_P,*
V 7000,19900,CONT_DIF_P,*
V 7000,18700,CONT_DIF_P,*
V 7000,18300,CONT_DIF_P,*
V 7000,16700,CONT_DIF_P,*
V 7000,17500,CONT_DIF_P,*
V 7000,17900,CONT_DIF_P,*
V 7000,20300,CONT_DIF_P,*
V 7000,19100,CONT_DIF_P,*
V 7000,15100,CONT_DIF_P,*
V 7000,15500,CONT_DIF_P,*
V 7000,15900,CONT_DIF_P,*
V 7000,16300,CONT_DIF_P,*
V 7000,21900,CONT_DIF_P,*
V 7000,22300,CONT_DIF_P,*
V 7000,21100,CONT_DIF_P,*
V 7000,22700,CONT_DIF_P,*
V 7000,21500,CONT_DIF_P,*
V 6400,18000,CONT_BODY_N,*
V 6400,18800,CONT_BODY_N,*
V 6400,18400,CONT_BODY_N,*
V 6400,17200,CONT_BODY_N,*
V 6400,16400,CONT_BODY_N,*
V 6400,15600,CONT_BODY_N,*
V 6400,15200,CONT_BODY_N,*
V 6400,14800,CONT_BODY_N,*
V 6400,19600,CONT_BODY_N,*
V 6400,20800,CONT_BODY_N,*
V 6400,19200,CONT_BODY_N,*
V 6400,16800,CONT_BODY_N,*
V 6400,16000,CONT_BODY_N,*
V 6900,14400,CONT_BODY_N,*
V 6400,14400,CONT_BODY_N,*
V 6400,17600,CONT_BODY_N,*
V 6400,20400,CONT_BODY_N,*
V 6400,20000,CONT_BODY_N,*
V 6400,22400,CONT_BODY_N,*
V 6400,22800,CONT_BODY_N,*
V 6400,22000,CONT_BODY_N,*
V 6400,23300,CONT_BODY_N,*
V 6400,21200,CONT_BODY_N,*
V 7000,23300,CONT_BODY_N,*
V 6400,21600,CONT_BODY_N,*
V 6400,26700,CONT_BODY_P,*
V 6400,27900,CONT_BODY_P,*
V 7000,29500,CONT_BODY_P,*
V 7000,25100,CONT_BODY_P,*
V 10000,29100,CONT_BODY_P,*
V 6400,28300,CONT_BODY_P,*
V 6400,25500,CONT_BODY_P,*
V 6400,27100,CONT_BODY_P,*
V 6400,25100,CONT_BODY_P,*
V 6400,28700,CONT_BODY_P,*
V 6400,26300,CONT_BODY_P,*
V 10000,27900,CONT_BODY_P,*
V 10000,27500,CONT_BODY_P,*
V 6400,29100,CONT_BODY_P,*
V 6400,25900,CONT_BODY_P,*
V 6400,27500,CONT_BODY_P,*
V 10000,28700,CONT_BODY_P,*
V 6400,29500,CONT_BODY_P,*
V 10000,29500,CONT_VIA,*
V 10000,28300,CONT_VIA,*
V 9700,24600,CONT_VIA,*
V 10000,25100,CONT_VIA,*
V 10000,27100,CONT_VIA,*
V 10000,26700,CONT_BODY_P,*
V 10000,26300,CONT_BODY_P,*
V 10000,25900,CONT_VIA,*
V 10000,25500,CONT_BODY_P,*
V 9400,14400,CONT_BODY_N,*
V 10000,22800,CONT_BODY_N,*
V 10000,22000,CONT_BODY_N,*
V 10000,23300,CONT_BODY_N,*
V 10000,21200,CONT_BODY_N,*
V 10000,21600,CONT_BODY_N,*
V 10000,22400,CONT_BODY_N,*
V 10000,15600,CONT_BODY_N,*
V 10000,16800,CONT_BODY_N,*
V 10000,17200,CONT_BODY_N,*
V 10000,18400,CONT_BODY_N,*
V 10000,18800,CONT_BODY_N,*
V 10000,19200,CONT_BODY_N,*
V 10000,16400,CONT_BODY_N,*
V 10000,20800,CONT_BODY_N,*
V 10000,20400,CONT_BODY_N,*
V 10000,20000,CONT_BODY_N,*
V 10000,19600,CONT_BODY_N,*
V 10000,16000,CONT_BODY_N,*
V 10000,14400,CONT_BODY_N,*
V 10000,18000,CONT_BODY_N,*
V 10000,14800,CONT_BODY_N,*
V 10000,15200,CONT_BODY_N,*
V 10000,17600,CONT_BODY_N,*
V 9400,21900,CONT_DIF_P,*
V 9400,20700,CONT_DIF_P,*
V 9400,19500,CONT_DIF_P,*
V 9400,18300,CONT_DIF_P,*
V 9400,17100,CONT_DIF_P,*
V 9400,15900,CONT_DIF_P,*
V 7700,13800,CONT_VIA,*
V 8200,13800,CONT_POLY,*
EOF

533
alliance/share/cells/padlib/pali_sp.ap Normal file
View File

@ -0,0 +1,533 @@
V ALLIANCE : 6
H pali_sp,P, 9/10/2000,100
A 0,-700,17200,35600
C 0,29600,12000,vsse,0,WEST,ALU2
C 17200,29600,12000,vsse,1,EAST,ALU2
C 0,8400,4000,vddi,0,WEST,ALU2
C 0,4000,4000,vssi,0,WEST,ALU2
C 17200,4000,4000,vssi,1,EAST,ALU2
C 17200,8400,4000,vddi,1,EAST,ALU2
C 0,16800,12000,vdde,0,WEST,ALU2
C 17200,16800,12000,vdde,1,EAST,ALU2
C 17200,600,1200,ck,1,EAST,ALU2
C 0,600,1200,ck,0,WEST,ALU2
C 8200,-700,200,t,1,SOUTH,ALU2
C 8200,-700,200,t,0,SOUTH,ALU1
S 8400,12550,12400,12550,300,*,RIGHT,ALU1
S 12300,4600,12300,12600,300,*,UP,ALU1
S 7300,200,7300,4200,900,*,UP,ALU1
S 8800,200,8800,4200,200,*,UP,ALU1
S 10500,200,10500,4200,200,*,UP,ALU1
S 12000,200,12000,4200,800,*,UP,ALU1
S 11700,5300,11700,12000,200,*,UP,ALU1
S 10500,5200,10500,12000,200,*,UP,ALU1
S 8800,5200,8800,12000,200,*,UP,ALU1
S 6800,12000,11800,12000,200,*,RIGHT,ALU1
S 9900,13600,9900,22600,700,*,UP,ALU1
S 9100,13600,9100,22600,200,*,UP,ALU1
S 9000,13600,10100,13600,200,*,RIGHT,ALU1
S 7900,13800,7900,22600,200,*,UP,ALU1
S 8500,23800,9200,23800,300,*,RIGHT,POLY
S 9100,23800,9500,23800,200,*,RIGHT,ALU1
S 9700,24300,9700,28800,200,*,UP,ALU1
S 9100,24300,9100,28800,200,*,UP,ALU1
S 6400,24200,6400,28800,800,*,UP,ALU1
S 7900,23700,7900,28800,200,*,UP,ALU1
S 0,29600,17200,29600,12000,vsse,RIGHT,ALU2
S 8600,30100,8600,35600,1000,*,UP,ALU1
S 8200,-700,8200,-400,300,*,UP,ALU2
S 8500,12600,8500,13000,300,*,UP,ALU1
S 7200,29600,9100,29600,900,*,RIGHT,ALU1
S 100,600,17200,600,1200,ck,RIGHT,ALU2
S 6400,13500,6400,22600,800,*,UP,ALU1
S 6000,24300,6800,24300,300,*,RIGHT,PTIE
S 6100,24200,6100,28800,300,*,UP,PTIE
S 6000,28700,6800,28700,300,*,RIGHT,PTIE
S 9100,28700,9800,28700,300,*,RIGHT,PTIE
S 6100,22500,6700,22500,300,*,RIGHT,NTIE
S 6100,13600,6700,13600,300,*,RIGHT,NTIE
S 6100,13600,6100,22600,300,*,UP,NTIE
S 6700,14100,6700,22000,300,*,UP,PDIF
S 6700,24800,6700,28200,300,*,UP,NDIF
S 9600,13400,9600,22700,600,*,UP,NWELL
S 6400,13400,6400,22700,1000,*,UP,NWELL
S 11100,3600,11100,5700,300,*,UP,ALU1
S 11000,4700,12400,4700,300,*,RIGHT,ALU1
S 9300,5600,10000,5600,300,*,RIGHT,ALU1
S 9300,3700,10000,3700,300,*,RIGHT,ALU1
S 9900,4500,9900,8400,300,*,UP,ALU1
S 7200,5100,7200,12100,1000,*,UP,ALU1
S 9800,-300,11200,-300,300,*,RIGHT,ALU1
S 8200,-700,8200,11500,300,*,UP,ALU1
S 9900,-400,9900,4700,300,*,UP,ALU1
S 11100,-400,11100,3200,300,*,UP,ALU1
S 7900,600,8500,600,100,*,RIGHT,POLY
S 10200,5600,11200,5600,300,*,RIGHT,POLY
S 10200,5500,10200,5700,100,*,UP,POLY
S 10200,3700,11400,3700,300,*,RIGHT,POLY
S 7900,5600,9900,5600,300,*,RIGHT,POLY
S 7900,11700,8500,11700,100,*,RIGHT,POLY
S 7000,4100,12400,4100,300,*,RIGHT,PTIE
S 7000,400,7000,4200,300,*,UP,PTIE
S 6900,300,12400,300,300,*,RIGHT,PTIE
S 12300,200,12300,4200,300,*,UP,PTIE
S 11700,5100,11700,12100,300,*,UP,NTIE
S 6800,5200,11800,5200,300,*,RIGHT,NTIE
S 6900,5100,6900,12000,300,*,UP,NTIE
S 6800,12000,11800,12000,300,*,RIGHT,NTIE
S 8800,5900,8800,11500,400,*,UP,PDIF
S 8500,5700,8500,11700,100,*,UP,PTRANS
S 7900,5700,7900,11700,100,*,UP,PTRANS
S 10200,5700,10200,8700,100,*,UP,PTRANS
S 9900,5900,9900,8500,400,*,UP,PDIF
S 8200,5900,8200,11500,200,*,UP,PDIF
S 10500,5900,10500,8500,300,*,UP,PDIF
S 7600,5900,7600,11500,400,*,UP,PDIF
S 7900,600,7900,3600,100,*,UP,NTRANS
S 8500,600,8500,3600,100,*,UP,NTRANS
S 8800,800,8800,3400,400,*,UP,NDIF
S 7600,800,7600,3400,300,*,UP,NDIF
S 8200,800,8200,3400,200,*,UP,NDIF
S 11100,800,11100,3400,200,*,UP,NDIF
S 10500,800,10500,3400,200,*,UP,NDIF
S 11700,800,11700,3400,300,*,UP,NDIF
S 11700,800,11700,3400,200,*,UP,NDIF
S 10200,600,10200,3600,100,*,UP,NTRANS
S 9900,800,9900,3400,300,*,UP,NDIF
S 10800,600,10800,3600,100,*,UP,NTRANS
S 11400,600,11400,3600,100,*,UP,NTRANS
S 6700,8600,11900,8600,7200,*,RIGHT,NWELL
S 7900,3700,9900,3700,300,*,RIGHT,POLY
S 9700,24200,9700,28500,300,*,UP,PTIE
S 9100,24300,9700,24300,300,*,LEFT,PTIE
S 10000,13600,10000,22600,300,*,UP,NTIE
S 9900,13400,9900,22700,600,*,UP,NWELL
S 9500,13400,9500,22700,400,*,UP,NWELL
S 9300,13600,10000,13600,300,*,RIGHT,NTIE
S 9100,13100,9500,13100,200,*,RIGHT,ALU1
S 9100,22500,10000,22500,300,*,RIGHT,NTIE
S 8500,13000,8500,14300,300,*,DOWN,ALU1
S 6800,13600,8000,13600,300,*,RIGHT,ALU1
S 8500,13100,8500,13900,200,*,UP,POLY
S 6800,22500,9200,22500,300,*,RIGHT,NTIE
S 8500,23800,8500,24600,200,*,UP,POLY
S 7000,24600,8800,24600,100,*,RIGHT,POLY
S 8800,24300,9200,24300,300,*,RIGHT,PTIE
S 6800,24300,8200,24300,300,*,RIGHT,PTIE
S 8500,23700,8500,23900,200,*,DOWN,POLY
S 7000,13900,8800,13900,100,*,RIGHT,POLY
S 8800,13600,9200,13600,300,*,RIGHT,NTIE
S 6800,13600,8200,13600,300,*,RIGHT,NTIE
S 8100,13400,8100,22700,2800,*,UP,NWELL
S 8800,13900,8800,22200,100,*,UP,PTRANS
S 8200,13900,8200,22200,100,*,UP,PTRANS
S 7600,13900,7600,22200,100,*,UP,PTRANS
S 7000,13900,7000,22200,100,*,UP,PTRANS
S 7300,14100,7300,22000,200,*,UP,PDIF
S 7900,14100,7900,22000,200,*,UP,PDIF
S 8500,14100,8500,22000,200,*,UP,PDIF
S 9100,14100,9100,22000,300,*,UP,PDIF
S 6800,28700,9200,28700,300,*,RIGHT,PTIE
S 8800,24600,8800,28400,100,*,UP,NTRANS
S 8200,24600,8200,28400,100,*,UP,NTRANS
S 7600,24600,7600,28400,100,*,UP,NTRANS
S 7000,24600,7000,28400,100,*,UP,NTRANS
S 7300,24800,7300,28200,300,*,UP,NDIF
S 7900,24800,7900,28200,300,*,UP,NDIF
S 8500,24800,8500,28200,300,*,UP,NDIF
S 9100,24800,9100,28200,300,*,UP,NDIF
S 8500,14200,8500,29100,300,*,UP,ALU1
S 7300,14200,7300,29100,300,*,UP,ALU1
S 8500,13100,9100,13100,200,*,RIGHT,POLY
S 0,4000,17200,4000,4000,vssi,RIGHT,ALU2
S 0,8400,17200,8400,4000,vddi,RIGHT,ALU2
S 0,16800,17200,16800,12000,vdde,RIGHT,ALU2
V 10500,9500,CONT_VIA,*
B 7200,8400,1000,4000,CONT_VIA,*
B 12000,3100,700,2100,CONT_VIA,*
B 7300,3100,800,2100,CONT_VIA,*
B 9900,18050,600,9000,CONT_VIA,*
V 9100,13600,CONT_BODY_N,*
B 6400,26500,800,4600,CONT_VIA,*
B 6400,18000,800,9100,CONT_VIA,*
V 9100,23800,CONT_POLY,*
V 9500,23800,CONT_VIA,*
B 9400,26500,800,4600,CONT_VIA,*
V 8200,-500,CONT_VIA,*
V 6100,28700,CONT_BODY_P,*
V 9700,27900,CONT_BODY_P,*
V 6100,26700,CONT_BODY_P,*
V 6100,25100,CONT_BODY_P,*
V 6100,28300,CONT_BODY_P,*
V 9700,26700,CONT_BODY_P,*
V 9700,27100,CONT_BODY_P,*
V 6100,25500,CONT_BODY_P,*
V 6100,27900,CONT_BODY_P,*
V 6100,24300,CONT_BODY_P,*
V 6100,26300,CONT_BODY_P,*
V 6100,24700,CONT_BODY_P,*
V 6100,27500,CONT_BODY_P,*
V 9700,28300,CONT_BODY_P,*
V 6700,24300,CONT_BODY_P,*
V 6700,28700,CONT_BODY_P,*
V 6100,27100,CONT_BODY_P,*
V 6100,25900,CONT_BODY_P,*
V 6100,20800,CONT_BODY_N,*
V 6700,22500,CONT_BODY_N,*
V 6100,20400,CONT_BODY_N,*
V 6100,22500,CONT_BODY_N,*
V 6100,21200,CONT_BODY_N,*
V 6100,22000,CONT_BODY_N,*
V 6100,21600,CONT_BODY_N,*
V 6100,19200,CONT_BODY_N,*
V 6100,19600,CONT_BODY_N,*
V 6100,16800,CONT_BODY_N,*
V 6100,13600,CONT_BODY_N,*
V 6600,13600,CONT_BODY_N,*
V 6100,15200,CONT_BODY_N,*
V 6100,16000,CONT_BODY_N,*
V 6100,18400,CONT_BODY_N,*
V 6100,20000,CONT_BODY_N,*
V 6100,18800,CONT_BODY_N,*
V 6100,14000,CONT_BODY_N,*
V 6100,14400,CONT_BODY_N,*
V 6100,14800,CONT_BODY_N,*
V 6100,15600,CONT_BODY_N,*
V 6100,16400,CONT_BODY_N,*
V 6100,17600,CONT_BODY_N,*
V 6100,18000,CONT_BODY_N,*
V 6100,17200,CONT_BODY_N,*
V 6700,20700,CONT_DIF_P,*
V 6700,21900,CONT_DIF_P,*
V 6700,20300,CONT_DIF_P,*
V 6700,21500,CONT_DIF_P,*
V 6700,21100,CONT_DIF_P,*
V 6700,15500,CONT_DIF_P,*
V 6700,15100,CONT_DIF_P,*
V 6700,14700,CONT_DIF_P,*
V 6700,14300,CONT_DIF_P,*
V 6700,18300,CONT_DIF_P,*
V 6700,19500,CONT_DIF_P,*
V 6700,17100,CONT_DIF_P,*
V 6700,16700,CONT_DIF_P,*
V 6700,15900,CONT_DIF_P,*
V 6700,17500,CONT_DIF_P,*
V 6700,17900,CONT_DIF_P,*
V 6700,19100,CONT_DIF_P,*
V 6700,18700,CONT_DIF_P,*
V 6700,19900,CONT_DIF_P,*
V 6700,16300,CONT_DIF_P,*
V 6700,25300,CONT_DIF_N,*
V 6700,28100,CONT_DIF_N,*
V 6700,26500,CONT_DIF_N,*
V 6700,24900,CONT_DIF_N,*
V 6700,26100,CONT_DIF_N,*
V 6700,27300,CONT_DIF_N,*
V 6700,27700,CONT_DIF_N,*
V 6700,26900,CONT_DIF_N,*
V 6700,25700,CONT_DIF_N,*
V 10500,10200,CONT_VIA,*
V 8800,2200,CONT_VIA,*
V 8800,3200,CONT_VIA,*
V 10500,7800,CONT_VIA,*
V 11700,10200,CONT_VIA,*
V 11700,8600,CONT_VIA,*
V 11700,7100,CONT_VIA,*
V 10500,2200,CONT_VIA,*
V 10500,3200,CONT_VIA,*
V 10500,6600,CONT_VIA,*
V 8800,9000,CONT_VIA,*
V 8800,7800,CONT_VIA,*
V 8800,6600,CONT_VIA,*
V 8800,10200,CONT_VIA,*
V 10500,8700,CONT_VIA,*
V 11100,5600,CONT_POLY,*
V 9800,5600,CONT_POLY,*
V 9400,5600,CONT_POLY,*
V 9800,3700,CONT_POLY,*
V 11100,3700,CONT_POLY,*
V 9400,3700,CONT_POLY,*
V 7000,3700,CONT_BODY_P,*
V 7000,500,CONT_BODY_P,*
V 7000,900,CONT_BODY_P,*
V 7000,1700,CONT_BODY_P,*
V 12300,2900,CONT_BODY_P,*
V 7000,2100,CONT_BODY_P,*
V 8800,4100,CONT_BODY_P,*
V 12300,2500,CONT_BODY_P,*
V 7000,4100,CONT_BODY_P,*
V 7000,1300,CONT_BODY_P,*
V 7500,4100,CONT_BODY_P,*
V 12300,500,CONT_BODY_P,*
V 11700,4100,CONT_BODY_P,*
V 12300,3700,CONT_BODY_P,*
V 7000,3300,CONT_BODY_P,*
V 12300,3300,CONT_BODY_P,*
V 7000,2500,CONT_BODY_P,*
V 7000,2900,CONT_BODY_P,*
V 10500,4100,CONT_BODY_P,*
V 12300,900,CONT_BODY_P,*
V 12300,2100,CONT_BODY_P,*
V 12300,4100,CONT_BODY_P,*
V 12300,1300,CONT_BODY_P,*
V 12300,1700,CONT_BODY_P,*
V 11700,300,CONT_BODY_P,*
V 10500,300,CONT_BODY_P,*
V 8800,300,CONT_BODY_P,*
V 7500,300,CONT_BODY_P,*
V 11700,9200,CONT_BODY_N,*
V 11700,9700,CONT_BODY_N,*
V 6900,6900,CONT_BODY_N,*
V 6900,7900,CONT_BODY_N,*
V 6900,6400,CONT_BODY_N,*
V 6900,10900,CONT_BODY_N,*
V 6900,7400,CONT_BODY_N,*
V 11700,6100,CONT_BODY_N,*
V 11700,5300,CONT_BODY_N,*
V 8200,12000,CONT_BODY_N,*
V 6900,11400,CONT_BODY_N,*
V 6900,5900,CONT_BODY_N,*
V 6900,5400,CONT_BODY_N,*
V 6900,12000,CONT_BODY_N,*
V 6900,10400,CONT_BODY_N,*
V 8800,12000,CONT_BODY_N,*
V 6900,9900,CONT_BODY_N,*
V 6900,9400,CONT_BODY_N,*
V 6900,8900,CONT_BODY_N,*
V 6900,8400,CONT_BODY_N,*
V 7400,5200,CONT_BODY_N,*
V 7600,12000,CONT_BODY_N,*
V 11700,6600,CONT_BODY_N,*
V 11700,7600,CONT_BODY_N,*
V 11700,8100,CONT_BODY_N,*
V 11700,10900,CONT_BODY_N,*
V 11700,11400,CONT_BODY_N,*
V 8800,5200,CONT_BODY_N,*
V 11100,12000,CONT_BODY_N,*
V 11700,12000,CONT_BODY_N,*
V 10500,5200,CONT_BODY_N,*
V 10500,12000,CONT_BODY_N,*
V 8200,7400,CONT_DIF_P,*
V 8200,6600,CONT_DIF_P,*
V 8200,6200,CONT_DIF_P,*
V 7600,6900,CONT_DIF_P,*
V 8200,8200,CONT_DIF_P,*
V 7600,11400,CONT_DIF_P,*
V 7600,6400,CONT_DIF_P,*
V 7600,10900,CONT_DIF_P,*
V 8200,7800,CONT_DIF_P,*
V 8200,7000,CONT_DIF_P,*
V 8200,11400,CONT_DIF_P,*
V 8800,11400,CONT_DIF_P,*
V 9900,6700,CONT_DIF_P,*
V 8200,11000,CONT_DIF_P,*
V 8200,10600,CONT_DIF_P,*
V 8200,10200,CONT_DIF_P,*
V 9900,7300,CONT_DIF_P,*
V 9900,7800,CONT_DIF_P,*
V 9900,6200,CONT_DIF_P,*
V 9900,8300,CONT_DIF_P,*
V 10500,6200,CONT_DIF_P,*
V 10500,7000,CONT_DIF_P,*
V 10500,6200,CONT_DIF_P,*
V 10500,7400,CONT_DIF_P,*
V 10500,8200,CONT_DIF_P,*
V 8200,9800,CONT_DIF_P,*
V 7600,9900,CONT_DIF_P,*
V 7600,9400,CONT_DIF_P,*
V 7600,8900,CONT_DIF_P,*
V 8200,8600,CONT_DIF_P,*
V 8200,9000,CONT_DIF_P,*
V 8200,9400,CONT_DIF_P,*
V 8800,6200,CONT_DIF_P,*
V 7600,7900,CONT_DIF_P,*
V 7600,7400,CONT_DIF_P,*
V 7600,8400,CONT_DIF_P,*
V 7600,10400,CONT_DIF_P,*
V 8800,11000,CONT_DIF_P,*
V 8800,10600,CONT_DIF_P,*
V 8800,9800,CONT_DIF_P,*
V 8800,9400,CONT_DIF_P,*
V 8800,8600,CONT_DIF_P,*
V 8800,8200,CONT_DIF_P,*
V 8800,7400,CONT_DIF_P,*
V 8800,7000,CONT_DIF_P,*
V 8200,3100,CONT_DIF_N,*
V 7600,2600,CONT_DIF_N,*
V 11100,2600,CONT_DIF_N,*
V 8200,2100,CONT_DIF_N,*
V 9900,2100,CONT_DIF_N,*
V 7600,1600,CONT_DIF_N,*
V 7600,2100,CONT_DIF_N,*
V 11700,2600,CONT_DIF_N,*
V 11700,3100,CONT_DIF_N,*
V 7600,1100,CONT_DIF_N,*
V 9900,1100,CONT_DIF_N,*
V 11700,2100,CONT_DIF_N,*
V 11700,1600,CONT_DIF_N,*
V 7600,3100,CONT_DIF_N,*
V 11100,2100,CONT_DIF_N,*
V 11700,1100,CONT_DIF_N,*
V 10500,1700,CONT_DIF_N,*
V 11100,1100,CONT_DIF_N,*
V 8200,1600,CONT_DIF_N,*
V 8800,1200,CONT_DIF_N,*
V 8800,1700,CONT_DIF_N,*
V 8800,2700,CONT_DIF_N,*
V 10500,2700,CONT_DIF_N,*
V 10500,1200,CONT_DIF_N,*
V 9900,2600,CONT_DIF_N,*
V 9900,3100,CONT_DIF_N,*
V 11100,3100,CONT_DIF_N,*
V 8200,2600,CONT_DIF_N,*
V 9700,25900,CONT_BODY_P,*
V 9700,24700,CONT_BODY_P,*
V 9700,25500,CONT_BODY_P,*
V 9500,13100,CONT_VIA,*
V 10000,22500,CONT_BODY_N,*
V 10000,20800,CONT_BODY_N,*
V 10000,21600,CONT_BODY_N,*
V 10000,22000,CONT_BODY_N,*
V 10000,21200,CONT_BODY_N,*
V 10000,19200,CONT_BODY_N,*
V 10000,18800,CONT_BODY_N,*
V 10000,16800,CONT_BODY_N,*
V 10000,18400,CONT_BODY_N,*
V 10000,15600,CONT_BODY_N,*
V 10000,14800,CONT_BODY_N,*
V 10000,16000,CONT_BODY_N,*
V 10000,16400,CONT_BODY_N,*
V 10000,17600,CONT_BODY_N,*
V 10000,20000,CONT_BODY_N,*
V 10000,19600,CONT_BODY_N,*
V 10000,15200,CONT_BODY_N,*
V 9600,13600,CONT_BODY_N,*
V 10000,13600,CONT_BODY_N,*
V 10000,17200,CONT_BODY_N,*
V 10000,20400,CONT_BODY_N,*
V 10000,18000,CONT_BODY_N,*
V 10000,14000,CONT_BODY_N,*
V 10000,14400,CONT_BODY_N,*
V 7000,13600,CONT_BODY_N,*
V 7900,13600,CONT_VIA,*
V 7300,21900,CONT_DIF_P,*
V 7900,21900,CONT_DIF_P,*
V 8500,21900,CONT_DIF_P,*
V 9100,21900,CONT_DIF_P,*
V 7900,22500,CONT_BODY_N,*
V 9100,22500,CONT_BODY_N,*
V 7900,23800,CONT_VIA,*
V 9100,24300,CONT_BODY_P,*
V 7900,24300,CONT_BODY_P,*
V 9100,21500,CONT_DIF_P,*
V 8500,21500,CONT_DIF_P,*
V 7900,21500,CONT_DIF_P,*
V 7300,21500,CONT_DIF_P,*
V 7900,21100,CONT_VIA,*
V 9100,21100,CONT_VIA,*
V 8500,21100,CONT_DIF_P,*
V 7300,21100,CONT_DIF_P,*
V 7300,20700,CONT_DIF_P,*
V 8500,20700,CONT_DIF_P,*
V 9100,20700,CONT_DIF_P,*
V 7900,20700,CONT_DIF_P,*
V 9100,20300,CONT_DIF_P,*
V 7900,20300,CONT_DIF_P,*
V 8500,20300,CONT_DIF_P,*
V 7300,20300,CONT_DIF_P,*
V 9100,19900,CONT_VIA,*
V 7900,19900,CONT_VIA,*
V 8500,19900,CONT_DIF_P,*
V 7300,19900,CONT_DIF_P,*
V 9100,16300,CONT_VIA,*
V 9100,17500,CONT_VIA,*
V 9100,18700,CONT_VIA,*
V 7900,16300,CONT_VIA,*
V 7900,18700,CONT_VIA,*
V 7900,17500,CONT_VIA,*
V 9100,15100,CONT_VIA,*
V 7900,15100,CONT_VIA,*
V 8500,16700,CONT_DIF_P,*
V 9100,16700,CONT_DIF_P,*
V 9100,17100,CONT_DIF_P,*
V 9100,15900,CONT_DIF_P,*
V 8500,15900,CONT_DIF_P,*
V 8500,16300,CONT_DIF_P,*
V 9100,18300,CONT_DIF_P,*
V 9100,17900,CONT_DIF_P,*
V 8500,17900,CONT_DIF_P,*
V 8500,17100,CONT_DIF_P,*
V 8500,17500,CONT_DIF_P,*
V 8500,19500,CONT_DIF_P,*
V 9100,19100,CONT_DIF_P,*
V 8500,19100,CONT_DIF_P,*
V 8500,18700,CONT_DIF_P,*
V 8500,18300,CONT_DIF_P,*
V 9100,19500,CONT_DIF_P,*
V 9100,15500,CONT_DIF_P,*
V 8500,15500,CONT_DIF_P,*
V 7900,17100,CONT_DIF_P,*
V 7900,16700,CONT_DIF_P,*
V 7300,16700,CONT_DIF_P,*
V 7300,17100,CONT_DIF_P,*
V 7300,17500,CONT_DIF_P,*
V 7900,15900,CONT_DIF_P,*
V 7300,15900,CONT_DIF_P,*
V 7300,16300,CONT_DIF_P,*
V 7900,19500,CONT_DIF_P,*
V 7900,19100,CONT_DIF_P,*
V 7300,19100,CONT_DIF_P,*
V 7300,18700,CONT_DIF_P,*
V 7900,18300,CONT_DIF_P,*
V 7300,18300,CONT_DIF_P,*
V 7900,17900,CONT_DIF_P,*
V 7300,17900,CONT_DIF_P,*
V 7300,19500,CONT_DIF_P,*
V 7300,15500,CONT_DIF_P,*
V 7900,15500,CONT_DIF_P,*
V 8500,15100,CONT_DIF_P,*
V 9100,14700,CONT_DIF_P,*
V 8500,14700,CONT_DIF_P,*
V 9100,14300,CONT_DIF_P,*
V 8500,14300,CONT_DIF_P,*
V 7300,14300,CONT_DIF_P,*
V 7300,15100,CONT_DIF_P,*
V 7900,14700,CONT_DIF_P,*
V 7300,14700,CONT_DIF_P,*
V 7900,14300,CONT_DIF_P,*
V 8500,27400,CONT_DIF_N,*
V 8500,27000,CONT_DIF_N,*
V 8500,26600,CONT_DIF_N,*
V 8500,27800,CONT_DIF_N,*
V 8500,25000,CONT_DIF_N,*
V 8500,25400,CONT_DIF_N,*
V 8500,26200,CONT_DIF_N,*
V 8500,25800,CONT_DIF_N,*
V 7300,27000,CONT_DIF_N,*
V 7300,26600,CONT_DIF_N,*
V 7300,26200,CONT_DIF_N,*
V 7300,25800,CONT_DIF_N,*
V 7300,25400,CONT_DIF_N,*
V 7300,27800,CONT_DIF_N,*
V 7300,27400,CONT_DIF_N,*
V 7300,25000,CONT_DIF_N,*
V 7500,13600,CONT_BODY_N,*
V 7900,28700,CONT_BODY_P,*
V 9100,28700,CONT_BODY_P,*
V 7900,26100,CONT_VIA,*
V 7900,27700,CONT_VIA,*
V 7900,25700,CONT_DIF_N,*
V 7900,28100,CONT_DIF_N,*
V 7900,26500,CONT_DIF_N,*
V 7900,27300,CONT_DIF_N,*
V 7900,26900,CONT_DIF_N,*
V 7900,25300,CONT_DIF_N,*
V 7900,24900,CONT_VIA,*
V 9100,25300,CONT_DIF_N,*
V 9100,26900,CONT_DIF_N,*
V 9100,27300,CONT_DIF_N,*
V 9100,25700,CONT_DIF_N,*
V 9100,26100,CONT_DIF_N,*
V 9100,27700,CONT_DIF_N,*
V 9100,13100,CONT_POLY,*
EOF

2062
alliance/share/cells/padlib/paliot_sp.ap Normal file
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1623
alliance/share/cells/padlib/paliotw_sp.ap Normal file
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1512
alliance/share/cells/padlib/palo_sp.ap Normal file
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1946
alliance/share/cells/padlib/palot_sp.ap Normal file
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1502
alliance/share/cells/padlib/palotw_sp.ap Normal file
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1064
alliance/share/cells/padlib/palow_sp.ap Normal file
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140
alliance/share/cells/padlib/palvdde_sp.ap Normal file
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@ -0,0 +1,140 @@
V ALLIANCE : 3
H palvdde_sp,P,11/ 9/95
A 0,-7,172,356
C 172,168,120,vdde,1,EAST,ALU2
C 0,168,120,vdde,0,WEST,ALU2
C 172,84,40,vddi,1,EAST,ALU2
C 0,84,40,vddi,0,WEST,ALU2
C 172,40,40,vssi,1,EAST,ALU2
C 0,40,40,vssi,0,WEST,ALU2
C 172,6,12,ck,1,EAST,ALU2
C 0,6,12,ck,0,WEST,ALU2
C 172,296,120,vsse,1,EAST,ALU2
C 0,296,120,vsse,0,WEST,ALU2
S 0,40,172,40,40,vssi,RIGHT,ALU2
S 0,84,172,84,40,vddi,RIGHT,ALU2
S 0,168,172,168,120,vdde,RIGHT,ALU2
S 0,6,172,6,12,ck,RIGHT,ALU2
S 0,296,172,296,120,vsse,RIGHT,ALU2
S 86,108,86,356,100,*,UP,ALU1
V 42,110,CONT_VIA
V 62,110,CONT_VIA
V 82,110,CONT_VIA
V 102,110,CONT_VIA
V 122,110,CONT_VIA
V 132,115,CONT_VIA
V 132,125,CONT_VIA
V 132,145,CONT_VIA
V 132,175,CONT_VIA
V 132,185,CONT_VIA
V 132,195,CONT_VIA
V 122,150,CONT_VIA
V 122,180,CONT_VIA
V 122,190,CONT_VIA
V 122,120,CONT_VIA
V 132,135,CONT_VIA
V 112,155,CONT_VIA
V 112,145,CONT_VIA
V 132,155,CONT_VIA
V 132,165,CONT_VIA
V 112,125,CONT_VIA
V 112,115,CONT_VIA
V 122,130,CONT_VIA
V 122,140,CONT_VIA
V 92,115,CONT_VIA
V 112,135,CONT_VIA
V 122,160,CONT_VIA
V 122,170,CONT_VIA
V 112,195,CONT_VIA
V 112,185,CONT_VIA
V 112,175,CONT_VIA
V 112,165,CONT_VIA
V 92,195,CONT_VIA
V 92,185,CONT_VIA
V 92,175,CONT_VIA
V 102,180,CONT_VIA
V 102,190,CONT_VIA
V 102,120,CONT_VIA
V 92,125,CONT_VIA
V 82,190,CONT_VIA
V 82,180,CONT_VIA
V 102,130,CONT_VIA
V 102,140,CONT_VIA
V 102,150,CONT_VIA
V 102,160,CONT_VIA
V 102,170,CONT_VIA
V 82,130,CONT_VIA
V 72,115,CONT_VIA
V 72,125,CONT_VIA
V 92,165,CONT_VIA
V 92,155,CONT_VIA
V 92,145,CONT_VIA
V 92,135,CONT_VIA
V 82,120,CONT_VIA
V 72,165,CONT_VIA
V 72,175,CONT_VIA
V 72,185,CONT_VIA
V 72,195,CONT_VIA
V 82,170,CONT_VIA
V 82,160,CONT_VIA
V 82,150,CONT_VIA
V 82,140,CONT_VIA
V 52,125,CONT_VIA
V 62,120,CONT_VIA
V 62,190,CONT_VIA
V 62,180,CONT_VIA
V 72,135,CONT_VIA
V 72,145,CONT_VIA
V 72,155,CONT_VIA
V 52,185,CONT_VIA
V 52,195,CONT_VIA
V 62,170,CONT_VIA
V 62,160,CONT_VIA
V 62,150,CONT_VIA
V 62,140,CONT_VIA
V 62,130,CONT_VIA
V 52,115,CONT_VIA
V 42,190,CONT_VIA
V 42,120,CONT_VIA
V 52,135,CONT_VIA
V 52,145,CONT_VIA
V 52,155,CONT_VIA
V 52,165,CONT_VIA
V 52,175,CONT_VIA
V 42,130,CONT_VIA
V 42,140,CONT_VIA
V 42,150,CONT_VIA
V 42,160,CONT_VIA
V 42,170,CONT_VIA
V 42,180,CONT_VIA
V 122,200,CONT_VIA
V 132,205,CONT_VIA
V 132,215,CONT_VIA
V 132,225,CONT_VIA
V 112,225,CONT_VIA
V 112,215,CONT_VIA
V 92,205,CONT_VIA
V 82,200,CONT_VIA
V 102,200,CONT_VIA
V 112,205,CONT_VIA
V 122,210,CONT_VIA
V 122,220,CONT_VIA
V 102,220,CONT_VIA
V 82,220,CONT_VIA
V 82,210,CONT_VIA
V 72,205,CONT_VIA
V 72,215,CONT_VIA
V 72,225,CONT_VIA
V 92,225,CONT_VIA
V 92,215,CONT_VIA
V 62,220,CONT_VIA
V 62,210,CONT_VIA
V 52,205,CONT_VIA
V 52,215,CONT_VIA
V 52,225,CONT_VIA
V 62,200,CONT_VIA
V 102,210,CONT_VIA
V 42,200,CONT_VIA
V 42,210,CONT_VIA
V 42,220,CONT_VIA
EOF

290
alliance/share/cells/padlib/palvddeck_sp.ap Normal file
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@ -0,0 +1,290 @@
V ALLIANCE : 6
H palvddeck_sp,P,13/10/2000,100
A 0,-700,17200,35600
C 0,29600,12000,vsse,0,WEST,ALU2
C 17200,29600,12000,vsse,1,EAST,ALU2
C 0,600,1200,ck,0,WEST,ALU2
C 17200,600,1200,ck,1,EAST,ALU2
C 0,4000,4000,vssi,0,WEST,ALU2
C 17200,4000,4000,vssi,1,EAST,ALU2
C 0,8400,4000,vddi,0,WEST,ALU2
C 17200,8400,4000,vddi,1,EAST,ALU2
C 0,16800,12000,vdde,0,WEST,ALU2
C 17200,16800,12000,vdde,1,EAST,ALU2
C 6700,-700,200,cko,1,SOUTH,ALU2
C 6700,-700,200,cko,0,SOUTH,ALU1
C 7900,-700,200,cko,3,SOUTH,ALU2
C 7900,-700,200,cko,2,SOUTH,ALU1
C 9100,-700,200,cko,5,SOUTH,ALU2
C 9100,-700,200,cko,4,SOUTH,ALU1
S 8600,10900,8600,35600,10000,*,UP,ALU1
S 8500,2100,8500,4900,200,*,UP,ALU1
S 7300,2200,7300,4500,200,*,UP,ALU1
S 4300,2100,6100,2100,300,*,RIGHT,ALU1
S 4300,2000,4300,5100,200,*,UP,ALU1
S 6100,10400,9700,10400,200,*,RIGHT,ALU1
S 6700,6600,9100,6600,200,*,RIGHT,ALU1
S 6200,6100,7200,6100,200,*,RIGHT,ALU1
S 6200,6100,6200,6900,200,*,UP,ALU1
S 4300,6100,4300,10400,300,*,UP,ALU1
S 6200,5000,8500,5000,200,*,RIGHT,ALU1
S 3800,100,3800,5600,200,*,UP,ALU1
S 3800,5600,5200,5600,200,*,RIGHT,ALU1
S 6200,4400,6200,5000,200,*,UP,ALU1
S 9700,6000,9700,10400,200,*,UP,ALU1
S 4200,6100,5000,6100,200,*,RIGHT,ALU1
S 0,29600,17200,29600,12000,vsse,RIGHT,ALU2
S 5700,4900,5700,6200,200,*,UP,ALU1
S 5500,2800,5500,5100,200,*,UP,ALU1
S 4100,8500,9900,8500,5200,*,RIGHT,NWELL
S 5800,5600,7600,5600,200,*,RIGHT,ALU1
S 6100,6800,6100,10400,200,*,UP,ALU1
S 7300,7100,7300,10400,200,*,UP,ALU1
S 8500,7100,8500,10400,200,*,UP,ALU1
S 6000,10400,9800,10400,300,*,RIGHT,NTIE
S 6100,10300,6100,11100,300,*,UP,NTIE
S 9700,6100,9700,10500,300,*,UP,NTIE
S 7900,6700,7900,9600,200,*,UP,ALU1
S 6700,6700,6700,9600,200,*,UP,ALU1
S 9100,6600,9100,9900,300,*,UP,PDIF
S 8500,6600,8500,9900,200,*,UP,PDIF
S 7900,6600,7900,9900,200,*,UP,PDIF
S 7300,6600,7300,9900,200,*,UP,PDIF
S 6100,6600,6100,9900,300,*,UP,PDIF
S 6700,6600,6700,9900,200,*,UP,PDIF
S 6400,6400,6400,10100,100,*,UP,PTRANS
S 7000,6400,7000,10100,100,*,UP,PTRANS
S 7600,6400,7600,10100,100,*,UP,PTRANS
S 8200,6400,8200,10100,100,*,UP,PTRANS
S 8800,6400,8800,10100,100,*,UP,PTRANS
S 4200,6100,5000,6100,300,*,RIGHT,NTIE
S 4300,6000,4300,11000,300,*,UP,NTIE
S 4900,6600,4900,10400,300,*,UP,PDIF
S 4900,6800,4900,10400,200,*,UP,ALU1
S 6100,2000,6100,4500,200,*,UP,ALU1
S 9700,2000,9700,5100,300,*,UP,PTIE
S 9700,2000,9700,5100,300,*,UP,ALU1
S 4200,5000,5000,5000,300,*,RIGHT,PTIE
S 4200,2100,9800,2100,300,*,RIGHT,PTIE
S 9700,2000,9700,5100,300,*,UP,PTIE
S 4300,2000,4300,5100,300,*,UP,PTIE
S 8500,2600,8500,4500,200,*,UP,NDIF
S 7300,2600,7300,4400,200,*,UP,NDIF
S 4900,2600,4900,4400,300,*,UP,NDIF
S 6100,2600,6100,4400,300,*,UP,NDIF
S 7900,2600,7900,4400,300,*,UP,NDIF
S 5500,2600,5500,4500,300,*,UP,NDIF
S 9100,2600,9100,4500,300,*,UP,NDIF
S 5500,6600,5500,10500,300,*,UP,PDIF
S 6700,2600,6700,4500,200,*,UP,NDIF
S 4900,2000,4900,5100,200,*,UP,ALU1
S 7600,2400,7600,4700,100,*,UP,NTRANS
S 8200,2400,8200,4700,100,*,UP,NTRANS
S 8800,2400,8800,4700,100,*,UP,NTRANS
S 5200,2400,5200,4700,100,*,UP,NTRANS
S 6400,2400,6400,4700,100,*,UP,NTRANS
S 7000,2400,7000,4700,100,*,UP,NTRANS
S 5200,6400,5200,10700,100,*,UP,PTRANS
S 5400,6100,7200,6100,300,*,RIGHT,NTIE
S 8000,6100,9800,6100,300,*,RIGHT,NTIE
S 8000,5000,9800,5000,300,*,RIGHT,PTIE
S 5400,5000,7200,5000,300,*,RIGHT,PTIE
S 6400,6400,8800,6400,100,*,RIGHT,POLY
S 5200,4700,5200,6400,100,*,UP,POLY
S 6400,4700,8800,4700,100,*,RIGHT,POLY
S 7600,4700,7600,6400,500,*,UP,POLY
S 5500,6100,5500,10400,200,*,UP,ALU1
S 0,600,17200,600,1200,ck,RIGHT,ALU2
S 6700,-700,6700,4400,200,*,UP,ALU1
S 7900,-700,7900,4400,200,*,UP,ALU1
S 9100,-700,9100,9600,200,*,UP,ALU1
S 6700,1600,9100,1600,200,*,RIGHT,ALU1
S 0,16800,17200,16800,12000,vdde,RIGHT,ALU2
S 0,4000,17200,4000,4000,vssi,RIGHT,ALU2
S 0,8400,17200,8400,4000,vddi,RIGHT,ALU2
B 8600,16800,10000,12000,CONT_VIA,*
B 3800,5600,200,200,CONT_TURN1,*
V 4300,10300,CONT_BODY_N,*
V 4300,9700,CONT_VIA,*
V 4300,9300,CONT_BODY_N,*
V 4300,8900,CONT_BODY_N,*
V 4300,8500,CONT_VIA,*
V 4300,8100,CONT_BODY_N,*
V 4300,7700,CONT_BODY_N,*
V 5200,5600,CONT_POLY,*
V 4300,7300,CONT_BODY_N,*
V 4300,6900,CONT_VIA,*
V 4300,6500,CONT_BODY_N,*
V 4300,6100,CONT_BODY_N,*
V 4900,6100,CONT_BODY_N,*
V 6700,6100,CONT_BODY_N,*
V 6200,6100,CONT_BODY_N,*
V 7100,6100,CONT_BODY_N,*
V 7600,5600,CONT_POLY,*
V 9700,9600,CONT_VIA,*
V 9700,7000,CONT_VIA,*
V 9700,6500,CONT_BODY_N,*
V 9700,6100,CONT_BODY_N,*
V 9700,7600,CONT_BODY_N,*
V 9700,8000,CONT_BODY_N,*
V 9700,8400,CONT_BODY_N,*
V 9700,8800,CONT_BODY_N,*
V 9700,9200,CONT_BODY_N,*
V 9700,10000,CONT_BODY_N,*
V 9700,10400,CONT_BODY_N,*
V 9300,10400,CONT_BODY_N,*
V 8900,10400,CONT_BODY_N,*
V 8500,10400,CONT_BODY_N,*
V 8100,10400,CONT_BODY_N,*
V 7700,10400,CONT_BODY_N,*
V 7300,10400,CONT_BODY_N,*
V 6900,10400,CONT_BODY_N,*
V 6500,10400,CONT_BODY_N,*
V 6100,10400,CONT_BODY_N,*
V 8500,7100,CONT_DIF_P,*
V 8500,9600,CONT_DIF_P,*
V 8500,9200,CONT_DIF_P,*
V 8500,8800,CONT_DIF_P,*
V 8500,8000,CONT_DIF_P,*
V 8500,7600,CONT_DIF_P,*
V 8500,10000,CONT_VIA,*
V 8500,8400,CONT_VIA,*
V 7300,7100,CONT_DIF_P,*
V 7300,7600,CONT_DIF_P,*
V 7300,8000,CONT_DIF_P,*
V 7300,8800,CONT_DIF_P,*
V 7300,9200,CONT_DIF_P,*
V 7300,9600,CONT_DIF_P,*
V 7300,8400,CONT_VIA,*
V 7300,10000,CONT_VIA,*
V 4900,6800,CONT_DIF_P,*
V 4900,10400,CONT_DIF_P,*
V 4900,9600,CONT_DIF_P,*
V 4900,9200,CONT_DIF_P,*
V 4900,8800,CONT_DIF_P,*
V 4900,8000,CONT_DIF_P,*
V 4900,7600,CONT_DIF_P,*
V 4900,7200,CONT_VIA,*
V 4900,10000,CONT_VIA,*
V 4900,8400,CONT_VIA,*
V 6100,7200,CONT_VIA,*
V 6100,8400,CONT_VIA,*
V 6100,10000,CONT_VIA,*
V 6100,6800,CONT_DIF_P,*
V 6100,7600,CONT_DIF_P,*
V 6100,8000,CONT_DIF_P,*
V 6100,8800,CONT_DIF_P,*
V 6100,9200,CONT_DIF_P,*
V 6100,9600,CONT_DIF_P,*
V 6200,5000,CONT_BODY_P,*
V 6600,5000,CONT_VIA,*
V 8100,5000,CONT_BODY_P,*
V 7100,5000,CONT_BODY_P,*
V 9700,2500,CONT_BODY_P,*
V 9700,3300,CONT_BODY_P,*
V 9700,3700,CONT_BODY_P,*
V 9700,4100,CONT_BODY_P,*
V 9700,5000,CONT_BODY_P,*
V 9700,2100,CONT_BODY_P,*
V 9700,4500,CONT_VIA,*
V 9700,2900,CONT_VIA,*
V 4300,5000,CONT_BODY_P,*
V 4300,4500,CONT_VIA,*
V 4300,4100,CONT_BODY_P,*
V 4300,3700,CONT_BODY_P,*
V 4300,3300,CONT_BODY_P,*
V 4300,2900,CONT_VIA,*
V 4300,2500,CONT_BODY_P,*
V 4300,2100,CONT_BODY_P,*
V 5300,2100,CONT_BODY_P,*
V 5700,2100,CONT_BODY_P,*
V 4900,5000,CONT_BODY_P,*
V 8500,5000,CONT_BODY_P,*
V 4900,2100,CONT_BODY_P,*
V 6100,2100,CONT_BODY_P,*
V 7300,2100,CONT_BODY_P,*
V 8500,2100,CONT_BODY_P,*
V 8500,2400,CONT_VIA,*
V 7300,2400,CONT_VIA,*
V 6100,2400,CONT_VIA,*
V 4900,2400,CONT_VIA,*
V 8500,2800,CONT_DIF_N,*
V 7300,2800,CONT_DIF_N,*
V 6100,2800,CONT_DIF_N,*
V 4900,2800,CONT_DIF_N,*
V 4900,3200,CONT_DIF_N,*
V 6100,3200,CONT_DIF_N,*
V 7300,3200,CONT_DIF_N,*
V 8500,3200,CONT_DIF_N,*
V 8500,3600,CONT_DIF_N,*
V 7300,3600,CONT_DIF_N,*
V 6100,3600,CONT_DIF_N,*
V 4900,3600,CONT_DIF_N,*
V 4900,4400,CONT_DIF_N,*
V 4900,4000,CONT_VIA,*
V 8500,4000,CONT_VIA,*
V 7300,4000,CONT_VIA,*
V 6100,4000,CONT_VIA,*
V 8500,4400,CONT_DIF_N,*
V 6100,4400,CONT_DIF_N,*
V 7300,4400,CONT_DIF_N,*
V 9100,3600,CONT_DIF_N,*
V 9100,4000,CONT_DIF_N,*
V 9100,4400,CONT_DIF_N,*
V 9100,2800,CONT_DIF_N,*
V 7900,3600,CONT_DIF_N,*
V 7900,3200,CONT_DIF_N,*
V 7900,4400,CONT_DIF_N,*
V 7900,4000,CONT_DIF_N,*
V 6700,4000,CONT_DIF_N,*
V 6700,4400,CONT_DIF_N,*
V 6700,2800,CONT_DIF_N,*
V 6700,3200,CONT_DIF_N,*
V 6700,3600,CONT_DIF_N,*
V 9100,3200,CONT_DIF_N,*
V 7900,2800,CONT_DIF_N,*
V 5500,4000,CONT_DIF_N,*
V 5500,4400,CONT_DIF_N,*
V 5500,2800,CONT_DIF_N,*
V 5500,3200,CONT_DIF_N,*
V 5500,3600,CONT_DIF_N,*
V 9100,9200,CONT_DIF_P,*
V 9100,9600,CONT_DIF_P,*
V 9100,6800,CONT_DIF_P,*
V 9100,7200,CONT_DIF_P,*
V 9100,7600,CONT_DIF_P,*
V 9100,8000,CONT_DIF_P,*
V 7900,8800,CONT_DIF_P,*
V 7900,8400,CONT_DIF_P,*
V 9100,8400,CONT_DIF_P,*
V 9100,8800,CONT_DIF_P,*
V 7900,7200,CONT_DIF_P,*
V 7900,6800,CONT_DIF_P,*
V 7900,9600,CONT_DIF_P,*
V 7900,9200,CONT_DIF_P,*
V 6700,6800,CONT_DIF_P,*
V 6700,7200,CONT_DIF_P,*
V 6700,7600,CONT_DIF_P,*
V 6700,8000,CONT_DIF_P,*
V 6700,8400,CONT_DIF_P,*
V 6700,8800,CONT_DIF_P,*
V 7900,8000,CONT_DIF_P,*
V 7900,7600,CONT_DIF_P,*
V 6700,9200,CONT_DIF_P,*
V 6700,9600,CONT_DIF_P,*
V 5500,10000,CONT_DIF_P,*
V 5500,10400,CONT_DIF_P,*
V 5500,6800,CONT_DIF_P,*
V 5500,7200,CONT_DIF_P,*
V 5500,7600,CONT_DIF_P,*
V 5500,8000,CONT_DIF_P,*
V 5500,8400,CONT_DIF_P,*
V 5500,8800,CONT_DIF_P,*
V 5500,9200,CONT_DIF_P,*
V 5500,9600,CONT_DIF_P,*
V 3800,200,CONT_VIA,*
V 3800,1000,CONT_VIA,*
V 6700,-700,CONT_VIA,*
V 7900,-700,CONT_VIA,*
V 9100,-700,CONT_VIA,*
EOF

44
alliance/share/cells/padlib/palvddi_sp.ap Normal file
View File

@ -0,0 +1,44 @@
V ALLIANCE : 6
H palvddi_sp,P,13/10/2000,100
A 0,-700,17200,35600
C 8600,-700,10000,vddi,0,SOUTH,ALU1
C 8600,-700,10000,vddi,2,SOUTH,ALU2
C 17200,16800,12000,vdde,1,EAST,ALU2
C 0,16800,12000,vdde,0,WEST,ALU2
C 17200,8400,4000,vddi,4,EAST,ALU2
C 0,8400,4000,vddi,3,WEST,ALU2
C 17200,4000,4000,vssi,1,EAST,ALU2
C 0,4000,4000,vssi,0,WEST,ALU2
C 17200,600,1200,ck,1,EAST,ALU2
C 0,600,1200,ck,0,WEST,ALU2
C 17200,29600,12000,vsse,1,EAST,ALU2
C 0,29600,12000,vsse,0,WEST,ALU2
S 0,4000,17200,4000,4000,vssi,RIGHT,ALU2
S 0,16800,17200,16800,12000,vdde,RIGHT,ALU2
S 0,8400,17100,8400,4000,vddi,RIGHT,ALU2
S 0,600,17200,600,1200,ck,RIGHT,ALU2
S 0,29600,17200,29600,12000,vsse,RIGHT,ALU2
S 8600,-700,8600,35600,10000,*,UP,ALU1
V 5700,-400,CONT_VIA,*
V 5200,-400,CONT_VIA,*
V 4700,-400,CONT_VIA,*
V 4200,-400,CONT_VIA,*
V 3700,-400,CONT_VIA,*
V 9700,-400,CONT_VIA,*
V 10200,-400,CONT_VIA,*
V 7700,-400,CONT_VIA,*
V 8200,-400,CONT_VIA,*
V 8700,-400,CONT_VIA,*
V 9200,-400,CONT_VIA,*
V 6700,-400,CONT_VIA,*
V 7200,-400,CONT_VIA,*
V 6200,-400,CONT_VIA,*
V 10700,-400,CONT_VIA,*
V 11200,-400,CONT_VIA,*
V 11700,-400,CONT_VIA,*
V 12200,-400,CONT_VIA,*
V 13200,-400,CONT_VIA,*
V 12700,-400,CONT_VIA,*
B 8600,-500,10000,400,CONT_TURN2,*
B 8600,8400,10000,4000,CONT_VIA,*
EOF

411
alliance/share/cells/padlib/palvddick_sp.ap Normal file
View File

@ -0,0 +1,411 @@
V ALLIANCE : 6
H palvddick_sp,P,13/10/2000,100
A 0,-700,17200,35600
C 8600,-700,10000,vddi,0,SOUTH,ALU1
C 17200,600,1200,ck,1,EAST,ALU2
C 17200,4000,4000,vssi,1,EAST,ALU2
C 17200,8400,4000,vddi,4,EAST,ALU2
C 0,600,1200,ck,0,WEST,ALU2
C 0,4000,4000,vssi,0,WEST,ALU2
C 0,8400,4000,vddi,3,WEST,ALU2
C 0,16800,12000,vdde,0,WEST,ALU2
C 17200,16800,12000,vdde,1,EAST,ALU2
C 8600,-700,10000,vddi,1,SOUTH,ALU2
C 15500,-700,200,cko,3,SOUTH,ALU2
C 15500,-700,200,cko,2,SOUTH,ALU1
C 1700,-700,200,cko,1,SOUTH,ALU2
C 1700,-700,200,cko,0,SOUTH,ALU1
C 17200,29600,12000,vsse,1,EAST,ALU2
C 0,29600,12000,vsse,0,WEST,ALU2
S 0,8400,17200,8400,4000,vddi,RIGHT,ALU2
S 0,4000,17200,4000,4000,vssi,RIGHT,ALU2
S 0,16800,17200,16800,12000,vdde,RIGHT,ALU2
S 15500,-700,15500,1500,200,*,UP,ALU1
S 0,600,17200,600,1200,ck,RIGHT,ALU2
S 1700,-700,1700,1600,200,*,DOWN,ALU1
S 0,29600,17200,29600,12000,vsse,RIGHT,ALU2
S 8600,-700,8600,35600,10000,*,UP,ALU1
S 15200,5200,15800,5200,100,*,RIGHT,POLY
S 14900,7100,15500,7100,100,*,RIGHT,POLY
S 13600,5700,14100,5700,300,*,RIGHT,PTIE
S 14300,5200,14300,7100,100,*,DOWN,POLY
S 14300,5200,14600,5200,100,*,RIGHT,POLY
S 14200,2100,16800,2100,300,*,LEFT,PTIE
S 14300,2100,14300,3400,300,*,UP,PTIE
S 13300,6800,14100,6800,300,*,RIGHT,NTIE
S 14400,300,14400,3800,200,*,DOWN,ALU1
S 13600,3300,14300,3300,300,*,LEFT,PTIE
S 14300,4400,14300,6300,200,*,DOWN,ALU1
S 14600,3700,14600,3900,100,*,DOWN,POLY
S 13200,12700,16600,12700,400,*,RIGHT,NWELL
S 13200,9700,16600,9700,6200,*,RIGHT,NWELL
S 14300,7100,14300,9400,100,*,UP,PTRANS
S 14900,7100,14900,12400,100,*,UP,PTRANS
S 15500,7100,15500,12400,100,*,UP,PTRANS
S 13400,6700,13400,9800,300,*,UP,NTIE
S 13300,9700,14100,9700,300,*,RIGHT,NTIE
S 15200,7300,15200,12200,200,*,DOWN,PDIF
S 15800,7300,15800,12200,300,*,DOWN,PDIF
S 14600,7300,14600,12200,300,*,DOWN,PDIF
S 14000,7300,14000,9200,300,*,DOWN,PDIF
S 14000,9600,14000,12800,300,*,UP,NTIE
S 14000,12700,16500,12700,300,*,RIGHT,NTIE
S 16400,6700,16400,12800,300,*,UP,NTIE
S 14000,6300,14000,9100,200,*,DOWN,ALU1
S 15200,6300,15200,11900,200,*,DOWN,ALU1
S 16700,2100,16700,5800,300,*,DOWN,PTIE
S 15800,2400,15800,5200,100,*,DOWN,NTRANS
S 14600,3900,14600,5200,100,*,DOWN,NTRANS
S 15200,2400,15200,5200,100,*,DOWN,NTRANS
S 16100,2600,16100,5000,300,*,DOWN,NDIF
S 14300,4100,14300,5000,300,*,DOWN,NDIF
S 14900,2600,14900,5000,300,*,DOWN,NDIF
S 15500,2600,15500,5000,300,*,DOWN,NDIF
S 13700,3400,13700,5800,300,*,UP,PTIE
S 14900,2100,14900,5800,200,*,DOWN,ALU1
S 15500,1500,15500,6300,200,*,DOWN,ALU1
S 15400,5200,15400,7100,200,*,UP,POLY
S 14700,6300,15300,6300,300,*,LEFT,POLY
S 15700,5700,16700,5700,300,*,RIGHT,PTIE
S 14500,5700,15100,5700,300,*,RIGHT,PTIE
S 15700,6800,16400,6800,300,*,RIGHT,NTIE
S 14500,6800,15100,6800,300,*,RIGHT,NTIE
S 1400,5200,2000,5200,100,*,RIGHT,POLY
S 1700,7100,2300,7100,100,*,RIGHT,POLY
S 3100,5700,3600,5700,300,*,RIGHT,PTIE
S 2900,5200,2900,7100,100,*,UP,POLY
S 2600,5200,2900,5200,100,*,RIGHT,POLY
S 400,2100,3000,2100,300,*,LEFT,PTIE
S 2900,2100,2900,3400,300,*,DOWN,PTIE
S 3100,6800,3900,6800,300,*,RIGHT,NTIE
S 2800,300,2800,3800,200,*,UP,ALU1
S 2900,3300,3600,3300,300,*,LEFT,PTIE
S 2900,4400,2900,6300,200,*,UP,ALU1
S 2600,3700,2600,3900,100,*,UP,POLY
S 600,12700,4000,12700,400,*,RIGHT,NWELL
S 600,9700,4000,9700,6200,*,RIGHT,NWELL
S 2900,7100,2900,9400,100,*,DOWN,PTRANS
S 2300,7100,2300,12400,100,*,DOWN,PTRANS
S 1700,7100,1700,12400,100,*,DOWN,PTRANS
S 3800,6700,3800,9800,300,*,DOWN,NTIE
S 3100,9700,3900,9700,300,*,RIGHT,NTIE
S 2000,7300,2000,12200,200,*,UP,PDIF
S 1400,7300,1400,12200,300,*,UP,PDIF
S 2600,7300,2600,12200,300,*,UP,PDIF
S 3200,7300,3200,9200,300,*,UP,PDIF
S 3200,9600,3200,12800,300,*,DOWN,NTIE
S 700,12700,3200,12700,300,*,RIGHT,NTIE
S 800,6700,800,12800,300,*,DOWN,NTIE
S 3200,6300,3200,9100,200,*,UP,ALU1
S 2000,6300,2000,11900,200,*,UP,ALU1
S 500,2100,500,5800,300,*,UP,PTIE
S 1400,2400,1400,5200,100,*,UP,NTRANS
S 2600,3900,2600,5200,100,*,UP,NTRANS
S 2000,2400,2000,5200,100,*,UP,NTRANS
S 1100,2600,1100,5000,300,*,UP,NDIF
S 2900,4100,2900,5000,300,*,UP,NDIF
S 2300,2600,2300,5000,300,*,UP,NDIF
S 1700,2600,1700,5000,300,*,UP,NDIF
S 3500,3400,3500,5800,300,*,DOWN,PTIE
S 2300,2100,2300,5800,200,*,UP,ALU1
S 1700,1500,1700,6300,200,*,UP,ALU1
S 1800,5200,1800,7100,200,*,DOWN,POLY
S 1900,6300,2500,6300,300,*,LEFT,POLY
S 500,5700,1500,5700,300,*,RIGHT,PTIE
S 2100,5700,2700,5700,300,*,RIGHT,PTIE
S 800,6800,1500,6800,300,*,RIGHT,NTIE
S 2100,6800,2700,6800,300,*,RIGHT,NTIE
S 1700,1600,15700,1600,200,*,RIGHT,ALU2
S 3200,9600,3200,12800,200,*,UP,ALU1
S 14000,9600,14000,12800,200,*,DOWN,ALU1
S 14000,12600,16500,12600,500,*,LEFT,ALU1
S 700,12600,3200,12600,500,*,LEFT,ALU1
S 2500,6300,3200,6300,200,*,RIGHT,ALU1
S 14000,6300,14700,6300,200,*,RIGHT,ALU1
S 15200,6300,15500,6300,200,*,RIGHT,ALU1
S 1700,6300,2000,6300,200,*,RIGHT,ALU1
S 2600,6800,2600,12800,200,*,UP,ALU1
S 800,2100,800,5800,900,*,UP,ALU1
S 400,2100,1200,2100,200,*,LEFT,ALU1
S 14600,6800,14600,12800,200,*,DOWN,ALU1
S 15800,6800,15800,12800,200,*,DOWN,ALU1
S 16200,6800,16200,12800,700,*,UP,ALU1
S 15800,6800,16500,6800,200,*,LEFT,ALU1
S 1000,6800,1000,12800,700,*,DOWN,ALU1
S 1400,6800,1400,12800,200,*,UP,ALU1
S 700,6800,1400,6800,200,*,LEFT,ALU1
S 16400,2100,16400,5800,900,*,DOWN,ALU1
S 16000,2100,16800,2100,200,*,RIGHT,ALU1
S 1500,1600,2100,1600,200,*,LEFT,ALU1
S 15100,1600,15700,1600,200,*,LEFT,ALU1
V 5700,-400,CONT_VIA,*
V 5200,-400,CONT_VIA,*
V 4700,-400,CONT_VIA,*
V 4200,-400,CONT_VIA,*
V 3700,-400,CONT_VIA,*
V 9700,-400,CONT_VIA,*
V 10200,-400,CONT_VIA,*
V 7700,-400,CONT_VIA,*
V 8200,-400,CONT_VIA,*
V 8700,-400,CONT_VIA,*
V 9200,-400,CONT_VIA,*
V 6700,-400,CONT_VIA,*
V 7200,-400,CONT_VIA,*
V 6200,-400,CONT_VIA,*
V 10700,-400,CONT_VIA,*
V 11200,-400,CONT_VIA,*
V 11700,-400,CONT_VIA,*
V 12200,-400,CONT_VIA,*
V 13200,-400,CONT_VIA,*
V 12700,-400,CONT_VIA,*
B 8600,-500,10000,400,CONT_TURN2,*
V 1500,1600,CONT_VIA,*
V 15700,1600,CONT_VIA,*
V 15500,-700,CONT_VIA,*
V 1700,-700,CONT_VIA,*
V 16400,9900,CONT_VIA,*
V 16400,10300,CONT_BODY_N,*
V 14700,6300,CONT_POLY,*
V 16700,5700,CONT_BODY_P,*
V 16700,5300,CONT_VIA,*
V 16700,4900,CONT_BODY_P,*
V 16700,4500,CONT_BODY_P,*
V 16700,4100,CONT_BODY_P,*
V 16700,3700,CONT_VIA,*
V 16700,3300,CONT_BODY_P,*
V 16700,2900,CONT_BODY_P,*
V 16700,2500,CONT_BODY_P,*
V 16700,2100,CONT_BODY_P,*
V 14900,2100,CONT_BODY_P,*
V 16100,2100,CONT_BODY_P,*
V 14900,2500,CONT_VIA,*
V 16100,2500,CONT_VIA,*
V 16100,5300,CONT_VIA,*
V 14900,5300,CONT_VIA,*
V 14900,5700,CONT_BODY_P,*
V 16100,5700,CONT_BODY_P,*
V 16400,9100,CONT_BODY_N,*
V 16400,9500,CONT_BODY_N,*
V 14000,12300,CONT_BODY_N,*
V 14000,11900,CONT_BODY_N,*
V 14000,11500,CONT_BODY_N,*
V 14000,11100,CONT_BODY_N,*
V 14000,10700,CONT_BODY_N,*
V 16400,10700,CONT_BODY_N,*
V 16400,11100,CONT_BODY_N,*
V 16400,11500,CONT_BODY_N,*
V 16400,11900,CONT_BODY_N,*
V 16400,12300,CONT_BODY_N,*
V 16400,12700,CONT_BODY_N,*
V 16000,12700,CONT_BODY_N,*
V 15600,12700,CONT_BODY_N,*
V 15200,12700,CONT_BODY_N,*
V 14800,12700,CONT_BODY_N,*
V 14400,12700,CONT_BODY_N,*
V 14000,12700,CONT_BODY_N,*
V 14000,9700,CONT_BODY_N,*
V 16400,8300,CONT_BODY_N,*
V 16400,7900,CONT_BODY_N,*
V 16400,7500,CONT_BODY_N,*
V 16400,7100,CONT_VIA,*
V 16400,8700,CONT_VIA,*
V 14300,4400,CONT_DIF_N,*
V 14400,3800,CONT_POLY,*
V 16400,6800,CONT_BODY_N,*
V 14000,8300,CONT_DIF_P,*
V 14000,8700,CONT_DIF_P,*
V 14000,9100,CONT_DIF_P,*
V 14000,7500,CONT_DIF_P,*
V 14000,7900,CONT_DIF_P,*
V 14600,7100,CONT_VIA,*
V 14600,8700,CONT_VIA,*
V 14600,6800,CONT_BODY_N,*
V 14600,7900,CONT_DIF_P,*
V 14600,8300,CONT_DIF_P,*
V 14600,9100,CONT_DIF_P,*
V 14600,9500,CONT_DIF_P,*
V 14600,9900,CONT_DIF_P,*
V 14600,7500,CONT_DIF_P,*
V 15200,11900,CONT_DIF_P,*
V 15200,7500,CONT_DIF_P,*
V 15200,11500,CONT_DIF_P,*
V 15200,9500,CONT_DIF_P,*
V 15200,9100,CONT_DIF_P,*
V 15200,8700,CONT_DIF_P,*
V 15200,8300,CONT_DIF_P,*
V 15200,7900,CONT_DIF_P,*
V 15200,11100,CONT_DIF_P,*
V 15200,10700,CONT_DIF_P,*
V 15200,10300,CONT_DIF_P,*
V 15200,9900,CONT_DIF_P,*
V 15800,8700,CONT_VIA,*
V 15800,7100,CONT_VIA,*
V 15800,6800,CONT_BODY_N,*
V 15800,7500,CONT_DIF_P,*
V 15800,7900,CONT_DIF_P,*
V 15800,8300,CONT_DIF_P,*
V 15800,9100,CONT_DIF_P,*
V 15800,9500,CONT_DIF_P,*
V 15800,9900,CONT_DIF_P,*
V 16100,2900,CONT_DIF_N,*
V 16100,3300,CONT_DIF_N,*
V 16100,3700,CONT_DIF_N,*
V 16100,4100,CONT_DIF_N,*
V 16100,4500,CONT_DIF_N,*
V 16100,4900,CONT_DIF_N,*
V 14900,3200,CONT_DIF_N,*
V 14900,2800,CONT_DIF_N,*
V 15500,4800,CONT_DIF_N,*
V 15500,4400,CONT_DIF_N,*
V 15500,4000,CONT_DIF_N,*
V 15500,3600,CONT_DIF_N,*
V 15500,3200,CONT_DIF_N,*
V 15500,2800,CONT_DIF_N,*
V 14300,4900,CONT_DIF_N,*
V 14900,4800,CONT_DIF_N,*
V 14900,4400,CONT_DIF_N,*
V 14900,4000,CONT_DIF_N,*
V 14900,3600,CONT_DIF_N,*
V 14400,200,CONT_VIA,*
V 14400,1000,CONT_VIA,*
V 14000,10200,CONT_VIA,*
V 14600,10200,CONT_VIA,*
V 15800,10200,CONT_VIA,*
V 14600,11700,CONT_DIF_P,*
V 14600,10500,CONT_DIF_P,*
V 14600,10900,CONT_DIF_P,*
V 14600,11300,CONT_DIF_P,*
V 15800,10500,CONT_DIF_P,*
V 15800,10900,CONT_DIF_P,*
V 15800,11300,CONT_DIF_P,*
V 15800,11700,CONT_DIF_P,*
V 15800,12100,CONT_DIF_P,*
V 14600,12100,CONT_DIF_P,*
V 800,9900,CONT_VIA,*
V 800,10300,CONT_BODY_N,*
V 2500,6300,CONT_POLY,*
V 500,5700,CONT_BODY_P,*
V 500,5300,CONT_VIA,*
V 500,4900,CONT_BODY_P,*
V 500,4500,CONT_BODY_P,*
V 500,4100,CONT_BODY_P,*
V 500,3700,CONT_VIA,*
V 500,3300,CONT_BODY_P,*
V 500,2900,CONT_BODY_P,*
V 500,2500,CONT_BODY_P,*
V 500,2100,CONT_BODY_P,*
V 2300,2100,CONT_BODY_P,*
V 1100,2100,CONT_BODY_P,*
V 2300,2500,CONT_VIA,*
V 1100,2500,CONT_VIA,*
V 1100,5300,CONT_VIA,*
V 2300,5300,CONT_VIA,*
V 2300,5700,CONT_BODY_P,*
V 1100,5700,CONT_BODY_P,*
V 800,9100,CONT_BODY_N,*
V 800,9500,CONT_BODY_N,*
V 3200,12300,CONT_BODY_N,*
V 3200,11900,CONT_BODY_N,*
V 3200,11500,CONT_BODY_N,*
V 3200,11100,CONT_BODY_N,*
V 3200,10700,CONT_BODY_N,*
V 800,10700,CONT_BODY_N,*
V 800,11100,CONT_BODY_N,*
V 800,11500,CONT_BODY_N,*
V 800,11900,CONT_BODY_N,*
V 800,12300,CONT_BODY_N,*
V 800,12700,CONT_BODY_N,*
V 1200,12700,CONT_BODY_N,*
V 1600,12700,CONT_BODY_N,*
V 2000,12700,CONT_BODY_N,*
V 2400,12700,CONT_BODY_N,*
V 2800,12700,CONT_BODY_N,*
V 3200,12700,CONT_BODY_N,*
V 3200,9700,CONT_BODY_N,*
V 800,8300,CONT_BODY_N,*
V 800,7900,CONT_BODY_N,*
V 800,7500,CONT_BODY_N,*
V 800,7100,CONT_VIA,*
V 800,8700,CONT_VIA,*
V 2900,4400,CONT_DIF_N,*
V 2800,3800,CONT_POLY,*
V 800,6800,CONT_BODY_N,*
V 3200,8300,CONT_DIF_P,*
V 3200,8700,CONT_DIF_P,*
V 3200,9100,CONT_DIF_P,*
V 3200,7500,CONT_DIF_P,*
V 3200,7900,CONT_DIF_P,*
V 2600,7100,CONT_VIA,*
V 2600,8700,CONT_VIA,*
V 2600,6800,CONT_BODY_N,*
V 2600,7900,CONT_DIF_P,*
V 2600,8300,CONT_DIF_P,*
V 2600,9100,CONT_DIF_P,*
V 2600,9500,CONT_DIF_P,*
V 2600,9900,CONT_DIF_P,*
V 2600,7500,CONT_DIF_P,*
V 2000,11900,CONT_DIF_P,*
V 2000,7500,CONT_DIF_P,*
V 2000,11500,CONT_DIF_P,*
V 2000,9500,CONT_DIF_P,*
V 2000,9100,CONT_DIF_P,*
V 2000,8700,CONT_DIF_P,*
V 2000,8300,CONT_DIF_P,*
V 2000,7900,CONT_DIF_P,*
V 2000,11100,CONT_DIF_P,*
V 2000,10700,CONT_DIF_P,*
V 2000,10300,CONT_DIF_P,*
V 2000,9900,CONT_DIF_P,*
V 1400,8700,CONT_VIA,*
V 1400,7100,CONT_VIA,*
V 1400,6800,CONT_BODY_N,*
V 1400,7500,CONT_DIF_P,*
V 1400,7900,CONT_DIF_P,*
V 1400,8300,CONT_DIF_P,*
V 1400,9100,CONT_DIF_P,*
V 1400,9500,CONT_DIF_P,*
V 1400,9900,CONT_DIF_P,*
V 1100,2900,CONT_DIF_N,*
V 1100,3300,CONT_DIF_N,*
V 1100,3700,CONT_DIF_N,*
V 1100,4100,CONT_DIF_N,*
V 1100,4500,CONT_DIF_N,*
V 1100,4900,CONT_DIF_N,*
V 2300,3200,CONT_DIF_N,*
V 2300,2800,CONT_DIF_N,*
V 1700,4800,CONT_DIF_N,*
V 1700,4400,CONT_DIF_N,*
V 1700,4000,CONT_DIF_N,*
V 1700,3600,CONT_DIF_N,*
V 1700,3200,CONT_DIF_N,*
V 1700,2800,CONT_DIF_N,*
V 2900,4900,CONT_DIF_N,*
V 2300,4800,CONT_DIF_N,*
V 2300,4400,CONT_DIF_N,*
V 2300,4000,CONT_DIF_N,*
V 2300,3600,CONT_DIF_N,*
V 2800,200,CONT_VIA,*
V 2800,1000,CONT_VIA,*
V 3200,10200,CONT_VIA,*
V 2600,10200,CONT_VIA,*
V 1400,10200,CONT_VIA,*
V 2600,11700,CONT_DIF_P,*
V 2600,10500,CONT_DIF_P,*
V 2600,10900,CONT_DIF_P,*
V 2600,11300,CONT_DIF_P,*
V 1400,10500,CONT_DIF_P,*
V 1400,10900,CONT_DIF_P,*
V 1400,11300,CONT_DIF_P,*
V 1400,11700,CONT_DIF_P,*
V 1400,12100,CONT_DIF_P,*
V 2600,12100,CONT_DIF_P,*
B 8600,8400,10000,4000,CONT_VIA,*
B 3200,6300,200,200,CONT_TURN1,*
B 2000,6300,200,200,CONT_TURN1,*
B 1700,6300,200,200,CONT_TURN1,*
B 15500,6300,200,200,CONT_TURN1,*
B 15200,6300,200,200,CONT_TURN1,*
B 14000,6300,200,200,CONT_TURN1,*
V 2100,1600,CONT_VIA,*
V 15100,1600,CONT_VIA,*
EOF

21
alliance/share/cells/padlib/palvsse_sp.ap Normal file
View File

@ -0,0 +1,21 @@
V ALLIANCE : 6
H palvsse_sp,P,13/10/2000,100
A 0,-700,17200,35600
C 0,29600,12000,vsse,0,WEST,ALU2
C 17200,29600,12000,vsse,1,EAST,ALU2
C 0,600,1200,ck,0,WEST,ALU2
C 17200,600,1200,ck,1,EAST,ALU2
C 0,4000,4000,vssi,0,WEST,ALU2
C 17200,4000,4000,vssi,1,EAST,ALU2
C 0,8400,4000,vddi,0,WEST,ALU2
C 17200,8400,4000,vddi,1,EAST,ALU2
C 0,16800,12000,vdde,0,WEST,ALU2
C 17200,16800,12000,vdde,1,EAST,ALU2
S 8600,23600,8600,35600,10000,*,UP,ALU1
S 0,29600,17200,29600,12000,vsse,RIGHT,ALU2
S 0,600,17200,600,1200,ck,RIGHT,ALU2
S 0,16800,17200,16800,12000,vdde,RIGHT,ALU2
S 0,8400,17200,8400,4000,vddi,RIGHT,ALU2
S 0,4000,17200,4000,4000,vssi,RIGHT,ALU2
B 8600,29600,10000,12000,CONT_VIA,*
EOF

290
alliance/share/cells/padlib/palvsseck_sp.ap Normal file
View File

@ -0,0 +1,290 @@
V ALLIANCE : 6
H palvsseck_sp,P,13/10/2000,100
A 0,-700,17200,35600
C 9100,-700,200,cko,4,SOUTH,ALU1
C 9100,-700,200,cko,5,SOUTH,ALU2
C 7900,-700,200,cko,2,SOUTH,ALU1
C 7900,-700,200,cko,3,SOUTH,ALU2
C 6700,-700,200,cko,0,SOUTH,ALU1
C 6700,-700,200,cko,1,SOUTH,ALU2
C 17200,16800,12000,vdde,1,EAST,ALU2
C 0,16800,12000,vdde,0,WEST,ALU2
C 17200,8400,4000,vddi,1,EAST,ALU2
C 0,8400,4000,vddi,0,WEST,ALU2
C 17200,4000,4000,vssi,1,EAST,ALU2
C 0,4000,4000,vssi,0,WEST,ALU2
C 17200,600,1200,ck,1,EAST,ALU2
C 0,600,1200,ck,0,WEST,ALU2
C 17200,29600,12000,vsse,1,EAST,ALU2
C 0,29600,12000,vsse,0,WEST,ALU2
S 8600,23700,8600,35600,10000,*,UP,ALU1
S 0,8400,17200,8400,4000,vddi,RIGHT,ALU2
S 0,4000,17200,4000,4000,vssi,RIGHT,ALU2
S 0,16800,17200,16800,12000,vdde,RIGHT,ALU2
S 6700,1600,9100,1600,200,*,RIGHT,ALU1
S 9100,-700,9100,9600,200,*,UP,ALU1
S 7900,-700,7900,4400,200,*,UP,ALU1
S 6700,-700,6700,4400,200,*,UP,ALU1
S 0,600,17200,600,1200,ck,RIGHT,ALU2
S 5500,6100,5500,10400,200,*,UP,ALU1
S 7600,4700,7600,6400,500,*,UP,POLY
S 6400,4700,8800,4700,100,*,RIGHT,POLY
S 5200,4700,5200,6400,100,*,UP,POLY
S 6400,6400,8800,6400,100,*,RIGHT,POLY
S 5400,5000,7200,5000,300,*,RIGHT,PTIE
S 8000,5000,9800,5000,300,*,RIGHT,PTIE
S 8000,6100,9800,6100,300,*,RIGHT,NTIE
S 5400,6100,7200,6100,300,*,RIGHT,NTIE
S 5200,6400,5200,10700,100,*,UP,PTRANS
S 7000,2400,7000,4700,100,*,UP,NTRANS
S 6400,2400,6400,4700,100,*,UP,NTRANS
S 5200,2400,5200,4700,100,*,UP,NTRANS
S 8800,2400,8800,4700,100,*,UP,NTRANS
S 8200,2400,8200,4700,100,*,UP,NTRANS
S 7600,2400,7600,4700,100,*,UP,NTRANS
S 4900,2000,4900,5100,200,*,UP,ALU1
S 6700,2600,6700,4500,200,*,UP,NDIF
S 5500,6600,5500,10500,300,*,UP,PDIF
S 9100,2600,9100,4500,300,*,UP,NDIF
S 5500,2600,5500,4500,300,*,UP,NDIF
S 7900,2600,7900,4400,300,*,UP,NDIF
S 6100,2600,6100,4400,300,*,UP,NDIF
S 4900,2600,4900,4400,300,*,UP,NDIF
S 7300,2600,7300,4400,200,*,UP,NDIF
S 8500,2600,8500,4500,200,*,UP,NDIF
S 4300,2000,4300,5100,300,*,UP,PTIE
S 9700,2000,9700,5100,300,*,UP,PTIE
S 4200,2100,9800,2100,300,*,RIGHT,PTIE
S 4200,5000,5000,5000,300,*,RIGHT,PTIE
S 9700,2000,9700,5100,300,*,UP,ALU1
S 9700,2000,9700,5100,300,*,UP,PTIE
S 6100,2000,6100,4500,200,*,UP,ALU1
S 4900,6800,4900,10400,200,*,UP,ALU1
S 4900,6600,4900,10400,300,*,UP,PDIF
S 4300,6000,4300,11000,300,*,UP,NTIE
S 4200,6100,5000,6100,300,*,RIGHT,NTIE
S 8800,6400,8800,10100,100,*,UP,PTRANS
S 8200,6400,8200,10100,100,*,UP,PTRANS
S 7600,6400,7600,10100,100,*,UP,PTRANS
S 7000,6400,7000,10100,100,*,UP,PTRANS
S 6400,6400,6400,10100,100,*,UP,PTRANS
S 6700,6600,6700,9900,200,*,UP,PDIF
S 6100,6600,6100,9900,300,*,UP,PDIF
S 7300,6600,7300,9900,200,*,UP,PDIF
S 7900,6600,7900,9900,200,*,UP,PDIF
S 8500,6600,8500,9900,200,*,UP,PDIF
S 9100,6600,9100,9900,300,*,UP,PDIF
S 6700,6700,6700,9600,200,*,UP,ALU1
S 7900,6700,7900,9600,200,*,UP,ALU1
S 9700,6100,9700,10500,300,*,UP,NTIE
S 6100,10300,6100,11100,300,*,UP,NTIE
S 6000,10400,9800,10400,300,*,RIGHT,NTIE
S 8500,7100,8500,10400,200,*,UP,ALU1
S 7300,7100,7300,10400,200,*,UP,ALU1
S 6100,6800,6100,10400,200,*,UP,ALU1
S 5800,5600,7600,5600,200,*,RIGHT,ALU1
S 4100,8500,9900,8500,5200,*,RIGHT,NWELL
S 5500,2800,5500,5100,200,*,UP,ALU1
S 5700,4900,5700,6200,200,*,UP,ALU1
S 0,29600,17200,29600,12000,vsse,RIGHT,ALU2
S 4200,6100,5000,6100,200,*,RIGHT,ALU1
S 9700,6000,9700,10400,200,*,UP,ALU1
S 6200,4400,6200,5000,200,*,UP,ALU1
S 3800,5600,5200,5600,200,*,RIGHT,ALU1
S 3800,100,3800,5600,200,*,UP,ALU1
S 6200,5000,8500,5000,200,*,RIGHT,ALU1
S 4300,6100,4300,10400,300,*,UP,ALU1
S 6200,6100,6200,6900,200,*,UP,ALU1
S 6200,6100,7200,6100,200,*,RIGHT,ALU1
S 6700,6600,9100,6600,200,*,RIGHT,ALU1
S 6100,10400,9700,10400,200,*,RIGHT,ALU1
S 4300,2000,4300,5100,200,*,UP,ALU1
S 4300,2100,6100,2100,300,*,RIGHT,ALU1
S 7300,2200,7300,4500,200,*,UP,ALU1
S 8500,2100,8500,4900,200,*,UP,ALU1
B 8600,29600,10000,12000,CONT_VIA,*
V 9100,-700,CONT_VIA,*
V 7900,-700,CONT_VIA,*
V 6700,-700,CONT_VIA,*
V 3800,1000,CONT_VIA,*
V 3800,200,CONT_VIA,*
V 5500,9600,CONT_DIF_P,*
V 5500,9200,CONT_DIF_P,*
V 5500,8800,CONT_DIF_P,*
V 5500,8400,CONT_DIF_P,*
V 5500,8000,CONT_DIF_P,*
V 5500,7600,CONT_DIF_P,*
V 5500,7200,CONT_DIF_P,*
V 5500,6800,CONT_DIF_P,*
V 5500,10400,CONT_DIF_P,*
V 5500,10000,CONT_DIF_P,*
V 6700,9600,CONT_DIF_P,*
V 6700,9200,CONT_DIF_P,*
V 7900,7600,CONT_DIF_P,*
V 7900,8000,CONT_DIF_P,*
V 6700,8800,CONT_DIF_P,*
V 6700,8400,CONT_DIF_P,*
V 6700,8000,CONT_DIF_P,*
V 6700,7600,CONT_DIF_P,*
V 6700,7200,CONT_DIF_P,*
V 6700,6800,CONT_DIF_P,*
V 7900,9200,CONT_DIF_P,*
V 7900,9600,CONT_DIF_P,*
V 7900,6800,CONT_DIF_P,*
V 7900,7200,CONT_DIF_P,*
V 9100,8800,CONT_DIF_P,*
V 9100,8400,CONT_DIF_P,*
V 7900,8400,CONT_DIF_P,*
V 7900,8800,CONT_DIF_P,*
V 9100,8000,CONT_DIF_P,*
V 9100,7600,CONT_DIF_P,*
V 9100,7200,CONT_DIF_P,*
V 9100,6800,CONT_DIF_P,*
V 9100,9600,CONT_DIF_P,*
V 9100,9200,CONT_DIF_P,*
V 5500,3600,CONT_DIF_N,*
V 5500,3200,CONT_DIF_N,*
V 5500,2800,CONT_DIF_N,*
V 5500,4400,CONT_DIF_N,*
V 5500,4000,CONT_DIF_N,*
V 7900,2800,CONT_DIF_N,*
V 9100,3200,CONT_DIF_N,*
V 6700,3600,CONT_DIF_N,*
V 6700,3200,CONT_DIF_N,*
V 6700,2800,CONT_DIF_N,*
V 6700,4400,CONT_DIF_N,*
V 6700,4000,CONT_DIF_N,*
V 7900,4000,CONT_DIF_N,*
V 7900,4400,CONT_DIF_N,*
V 7900,3200,CONT_DIF_N,*
V 7900,3600,CONT_DIF_N,*
V 9100,2800,CONT_DIF_N,*
V 9100,4400,CONT_DIF_N,*
V 9100,4000,CONT_DIF_N,*
V 9100,3600,CONT_DIF_N,*
V 7300,4400,CONT_DIF_N,*
V 6100,4400,CONT_DIF_N,*
V 8500,4400,CONT_DIF_N,*
V 6100,4000,CONT_VIA,*
V 7300,4000,CONT_VIA,*
V 8500,4000,CONT_VIA,*
V 4900,4000,CONT_VIA,*
V 4900,4400,CONT_DIF_N,*
V 4900,3600,CONT_DIF_N,*
V 6100,3600,CONT_DIF_N,*
V 7300,3600,CONT_DIF_N,*
V 8500,3600,CONT_DIF_N,*
V 8500,3200,CONT_DIF_N,*
V 7300,3200,CONT_DIF_N,*
V 6100,3200,CONT_DIF_N,*
V 4900,3200,CONT_DIF_N,*
V 4900,2800,CONT_DIF_N,*
V 6100,2800,CONT_DIF_N,*
V 7300,2800,CONT_DIF_N,*
V 8500,2800,CONT_DIF_N,*
V 4900,2400,CONT_VIA,*
V 6100,2400,CONT_VIA,*
V 7300,2400,CONT_VIA,*
V 8500,2400,CONT_VIA,*
V 8500,2100,CONT_BODY_P,*
V 7300,2100,CONT_BODY_P,*
V 6100,2100,CONT_BODY_P,*
V 4900,2100,CONT_BODY_P,*
V 8500,5000,CONT_BODY_P,*
V 4900,5000,CONT_BODY_P,*
V 5700,2100,CONT_BODY_P,*
V 5300,2100,CONT_BODY_P,*
V 4300,2100,CONT_BODY_P,*
V 4300,2500,CONT_BODY_P,*
V 4300,2900,CONT_VIA,*
V 4300,3300,CONT_BODY_P,*
V 4300,3700,CONT_BODY_P,*
V 4300,4100,CONT_BODY_P,*
V 4300,4500,CONT_VIA,*
V 4300,5000,CONT_BODY_P,*
V 9700,2900,CONT_VIA,*
V 9700,4500,CONT_VIA,*
V 9700,2100,CONT_BODY_P,*
V 9700,5000,CONT_BODY_P,*
V 9700,4100,CONT_BODY_P,*
V 9700,3700,CONT_BODY_P,*
V 9700,3300,CONT_BODY_P,*
V 9700,2500,CONT_BODY_P,*
V 7100,5000,CONT_BODY_P,*
V 8100,5000,CONT_BODY_P,*
V 6600,5000,CONT_VIA,*
V 6200,5000,CONT_BODY_P,*
V 6100,9600,CONT_DIF_P,*
V 6100,9200,CONT_DIF_P,*
V 6100,8800,CONT_DIF_P,*
V 6100,8000,CONT_DIF_P,*
V 6100,7600,CONT_DIF_P,*
V 6100,6800,CONT_DIF_P,*
V 6100,10000,CONT_VIA,*
V 6100,8400,CONT_VIA,*
V 6100,7200,CONT_VIA,*
V 4900,8400,CONT_VIA,*
V 4900,10000,CONT_VIA,*
V 4900,7200,CONT_VIA,*
V 4900,7600,CONT_DIF_P,*
V 4900,8000,CONT_DIF_P,*
V 4900,8800,CONT_DIF_P,*
V 4900,9200,CONT_DIF_P,*
V 4900,9600,CONT_DIF_P,*
V 4900,10400,CONT_DIF_P,*
V 4900,6800,CONT_DIF_P,*
V 7300,10000,CONT_VIA,*
V 7300,8400,CONT_VIA,*
V 7300,9600,CONT_DIF_P,*
V 7300,9200,CONT_DIF_P,*
V 7300,8800,CONT_DIF_P,*
V 7300,8000,CONT_DIF_P,*
V 7300,7600,CONT_DIF_P,*
V 7300,7100,CONT_DIF_P,*
V 8500,8400,CONT_VIA,*
V 8500,10000,CONT_VIA,*
V 8500,7600,CONT_DIF_P,*
V 8500,8000,CONT_DIF_P,*
V 8500,8800,CONT_DIF_P,*
V 8500,9200,CONT_DIF_P,*
V 8500,9600,CONT_DIF_P,*
V 8500,7100,CONT_DIF_P,*
V 6100,10400,CONT_BODY_N,*
V 6500,10400,CONT_BODY_N,*
V 6900,10400,CONT_BODY_N,*
V 7300,10400,CONT_BODY_N,*
V 7700,10400,CONT_BODY_N,*
V 8100,10400,CONT_BODY_N,*
V 8500,10400,CONT_BODY_N,*
V 8900,10400,CONT_BODY_N,*
V 9300,10400,CONT_BODY_N,*
V 9700,10400,CONT_BODY_N,*
V 9700,10000,CONT_BODY_N,*
V 9700,9200,CONT_BODY_N,*
V 9700,8800,CONT_BODY_N,*
V 9700,8400,CONT_BODY_N,*
V 9700,8000,CONT_BODY_N,*
V 9700,7600,CONT_BODY_N,*
V 9700,6100,CONT_BODY_N,*
V 9700,6500,CONT_BODY_N,*
V 9700,7000,CONT_VIA,*
V 9700,9600,CONT_VIA,*
V 7600,5600,CONT_POLY,*
V 7100,6100,CONT_BODY_N,*
V 6200,6100,CONT_BODY_N,*
V 6700,6100,CONT_BODY_N,*
V 4900,6100,CONT_BODY_N,*
V 4300,6100,CONT_BODY_N,*
V 4300,6500,CONT_BODY_N,*
V 4300,6900,CONT_VIA,*
V 4300,7300,CONT_BODY_N,*
V 5200,5600,CONT_POLY,*
V 4300,7700,CONT_BODY_N,*
V 4300,8100,CONT_BODY_N,*
V 4300,8500,CONT_VIA,*
V 4300,8900,CONT_BODY_N,*
V 4300,9300,CONT_BODY_N,*
V 4300,9700,CONT_VIA,*
V 4300,10300,CONT_BODY_N,*
B 3800,5600,200,200,CONT_TURN1,*
EOF

44
alliance/share/cells/padlib/palvssi_sp.ap Normal file
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@ -0,0 +1,44 @@
V ALLIANCE : 6
H palvssi_sp,P,13/10/2000,100
A 0,0,17200,36300
C 8600,0,10000,vssi,2,SOUTH,ALU1
C 17200,17500,12000,vdde,3,EAST,ALU2
C 0,17500,12000,vdde,2,WEST,ALU2
C 17200,9100,4000,vddi,3,EAST,ALU2
C 0,9100,4000,vddi,2,WEST,ALU2
C 17200,4700,4000,vssi,9,EAST,ALU2
C 0,4700,4000,vssi,8,WEST,ALU2
C 17200,1300,1200,ck,3,EAST,ALU2
C 0,1300,1200,ck,2,WEST,ALU2
C 17200,30300,12000,vsse,3,EAST,ALU2
C 0,30300,12000,vsse,2,WEST,ALU2
C 8600,0,10000,vssi,3,SOUTH,ALU2
S 8600,0,8600,36300,10000,*,UP,ALU1
S 0,4700,17200,4700,4000,vssi,RIGHT,ALU2
S 0,9100,17200,9100,4000,vddi,RIGHT,ALU2
S 0,17500,17200,17500,12000,vdde,RIGHT,ALU2
S 0,1300,17200,1300,1200,ck,RIGHT,ALU2
S 0,30300,17200,30300,12000,vsse,RIGHT,ALU2
B 8600,200,10000,400,CONT_TURN2,*
V 10700,300,CONT_VIA,*
V 11200,300,CONT_VIA,*
V 11700,300,CONT_VIA,*
V 12200,300,CONT_VIA,*
V 13200,300,CONT_VIA,*
V 12700,300,CONT_VIA,*
V 9700,300,CONT_VIA,*
V 10200,300,CONT_VIA,*
V 7700,300,CONT_VIA,*
V 8200,300,CONT_VIA,*
V 8700,300,CONT_VIA,*
V 9200,300,CONT_VIA,*
V 6700,300,CONT_VIA,*
V 7200,300,CONT_VIA,*
V 6200,300,CONT_VIA,*
V 5700,300,CONT_VIA,*
V 5200,300,CONT_VIA,*
V 4700,300,CONT_VIA,*
V 4200,300,CONT_VIA,*
V 3700,300,CONT_VIA,*
B 8600,4700,10000,4000,CONT_VIA,*
EOF

411
alliance/share/cells/padlib/palvssick_sp.ap Normal file
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@ -0,0 +1,411 @@
V ALLIANCE : 6
H palvssick_sp,P,13/10/2000,100
A 0,0,17200,36300
C 8600,0,10000,vssi,2,SOUTH,ALU1
C 8600,0,10000,vssi,4,SOUTH,ALU2
C 17200,1300,1200,ck,3,EAST,ALU2
C 17200,4700,4000,vssi,8,EAST,ALU2
C 17200,9100,4000,vddi,3,EAST,ALU2
C 0,1300,1200,ck,2,WEST,ALU2
C 0,4700,4000,vssi,7,WEST,ALU2
C 0,9100,4000,vddi,2,WEST,ALU2
C 0,17500,12000,vdde,2,WEST,ALU2
C 17200,17500,12000,vdde,3,EAST,ALU2
C 15500,0,200,cko,7,SOUTH,ALU2
C 15500,0,200,cko,6,SOUTH,ALU1
C 1700,0,200,cko,5,SOUTH,ALU2
C 1700,0,200,cko,4,SOUTH,ALU1
C 17200,30300,12000,vsse,3,EAST,ALU2
C 0,30300,12000,vsse,2,WEST,ALU2
S 800,7500,1500,7500,300,*,RIGHT,NTIE
S 2100,7500,2700,7500,300,*,RIGHT,NTIE
S 3100,10400,3900,10400,300,*,RIGHT,NTIE
S 2000,8000,2000,12900,200,*,UP,PDIF
S 1400,8000,1400,12900,300,*,UP,PDIF
S 2600,8000,2600,12900,300,*,UP,PDIF
S 3200,8000,3200,9900,300,*,UP,PDIF
S 3200,10300,3200,13500,300,*,DOWN,NTIE
S 700,13400,3200,13400,300,*,RIGHT,NTIE
S 800,7400,800,13500,300,*,DOWN,NTIE
S 14500,7500,15100,7500,300,*,RIGHT,NTIE
S 3100,7500,3900,7500,300,*,RIGHT,NTIE
S 600,13400,4000,13400,400,*,RIGHT,NWELL
S 600,10400,4000,10400,6200,*,RIGHT,NWELL
S 2900,7800,2900,10100,100,*,DOWN,PTRANS
S 2300,7800,2300,13100,100,*,DOWN,PTRANS
S 1700,7800,1700,13100,100,*,DOWN,PTRANS
S 3800,7400,3800,10500,300,*,DOWN,NTIE
S 15200,8000,15200,12900,200,*,DOWN,PDIF
S 15800,8000,15800,12900,300,*,DOWN,PDIF
S 14600,8000,14600,12900,300,*,DOWN,PDIF
S 14000,8000,14000,9900,300,*,DOWN,PDIF
S 14000,10300,14000,13500,300,*,UP,NTIE
S 14000,13400,16500,13400,300,*,RIGHT,NTIE
S 16400,7400,16400,13500,300,*,UP,NTIE
S 15700,7500,16400,7500,300,*,RIGHT,NTIE
S 13300,7500,14100,7500,300,*,RIGHT,NTIE
S 13200,13400,16600,13400,400,*,RIGHT,NWELL
S 13200,10400,16600,10400,6200,*,RIGHT,NWELL
S 14300,7800,14300,10100,100,*,UP,PTRANS
S 14900,7800,14900,13100,100,*,UP,PTRANS
S 15500,7800,15500,13100,100,*,UP,PTRANS
S 13400,7400,13400,10500,300,*,UP,NTIE
S 13300,10400,14100,10400,300,*,RIGHT,NTIE
S 15800,3100,15800,5900,100,*,DOWN,NTRANS
S 14600,4600,14600,5900,100,*,DOWN,NTRANS
S 15200,3100,15200,5900,100,*,DOWN,NTRANS
S 1400,3100,1400,5900,100,*,UP,NTRANS
S 2600,4600,2600,5900,100,*,UP,NTRANS
S 2000,3100,2000,5900,100,*,UP,NTRANS
S 1100,3300,1100,5700,300,*,UP,NDIF
S 2900,4800,2900,5700,300,*,UP,NDIF
S 2300,3300,2300,5700,300,*,UP,NDIF
S 1700,3300,1700,5700,300,*,UP,NDIF
S 14900,3300,14900,5700,300,*,DOWN,NDIF
S 15500,3300,15500,5700,300,*,DOWN,NDIF
S 16100,3300,16100,5700,300,*,DOWN,NDIF
S 14300,4800,14300,5700,300,*,DOWN,NDIF
S 400,2800,3000,2800,300,*,LEFT,PTIE
S 500,2800,500,6500,300,*,UP,PTIE
S 500,6400,1500,6400,300,*,RIGHT,PTIE
S 3100,6400,3600,6400,300,*,RIGHT,PTIE
S 2900,2800,2900,4100,300,*,DOWN,PTIE
S 2900,4000,3600,4000,300,*,LEFT,PTIE
S 3500,4100,3500,6500,300,*,DOWN,PTIE
S 2100,6400,2700,6400,300,*,RIGHT,PTIE
S 13600,6400,14100,6400,300,*,RIGHT,PTIE
S 14200,2800,16800,2800,300,*,LEFT,PTIE
S 14300,2800,14300,4100,300,*,UP,PTIE
S 13600,4000,14300,4000,300,*,LEFT,PTIE
S 16700,2800,16700,6500,300,*,DOWN,PTIE
S 13700,4100,13700,6500,300,*,UP,PTIE
S 15700,6400,16700,6400,300,*,RIGHT,PTIE
S 14500,6400,15100,6400,300,*,RIGHT,PTIE
S 1800,5900,1800,7800,200,*,DOWN,POLY
S 1900,7000,2500,7000,300,*,LEFT,POLY
S 2600,5900,2900,5900,100,*,RIGHT,POLY
S 2600,4400,2600,4600,100,*,UP,POLY
S 15400,5900,15400,7800,200,*,UP,POLY
S 14700,7000,15300,7000,300,*,LEFT,POLY
S 1400,5900,2000,5900,100,*,RIGHT,POLY
S 1700,7800,2300,7800,100,*,RIGHT,POLY
S 2900,5900,2900,7800,100,*,UP,POLY
S 15200,5900,15800,5900,100,*,RIGHT,POLY
S 14900,7800,15500,7800,100,*,RIGHT,POLY
S 14300,5900,14300,7800,100,*,DOWN,POLY
S 14300,5900,14600,5900,100,*,RIGHT,POLY
S 14600,4400,14600,4600,100,*,DOWN,POLY
S 15500,0,15500,2200,200,*,UP,ALU1
S 1700,0,1700,2300,200,*,DOWN,ALU1
S 8600,0,8600,36300,10000,*,UP,ALU1
S 800,2800,800,6500,900,*,UP,ALU1
S 400,2800,1200,2800,200,*,LEFT,ALU1
S 700,7500,1400,7500,200,*,LEFT,ALU1
S 16400,2800,16400,6500,900,*,DOWN,ALU1
S 16000,2800,16800,2800,200,*,RIGHT,ALU1
S 1500,2300,2100,2300,200,*,LEFT,ALU1
S 15100,2300,15700,2300,200,*,LEFT,ALU1
S 14600,7500,14600,13500,200,*,DOWN,ALU1
S 15800,7500,15800,13500,200,*,DOWN,ALU1
S 16200,7500,16200,13500,700,*,UP,ALU1
S 15800,7500,16500,7500,200,*,LEFT,ALU1
S 1000,7500,1000,13500,700,*,DOWN,ALU1
S 1400,7500,1400,13500,200,*,UP,ALU1
S 14000,10300,14000,13500,200,*,DOWN,ALU1
S 14000,13300,16500,13300,500,*,LEFT,ALU1
S 700,13300,3200,13300,500,*,LEFT,ALU1
S 2500,7000,3200,7000,200,*,RIGHT,ALU1
S 14000,7000,14700,7000,200,*,RIGHT,ALU1
S 15200,7000,15500,7000,200,*,RIGHT,ALU1
S 1700,7000,2000,7000,200,*,RIGHT,ALU1
S 2600,7500,2600,13500,200,*,UP,ALU1
S 15500,2200,15500,7000,200,*,DOWN,ALU1
S 2800,1000,2800,4500,200,*,UP,ALU1
S 2900,5100,2900,7000,200,*,UP,ALU1
S 3200,7000,3200,9800,200,*,UP,ALU1
S 2000,7000,2000,12600,200,*,UP,ALU1
S 2300,2800,2300,6500,200,*,UP,ALU1
S 1700,2200,1700,7000,200,*,UP,ALU1
S 3200,10300,3200,13500,200,*,UP,ALU1
S 14400,1000,14400,4500,200,*,DOWN,ALU1
S 14300,5100,14300,7000,200,*,DOWN,ALU1
S 14000,7000,14000,9800,200,*,DOWN,ALU1
S 15200,7000,15200,12600,200,*,DOWN,ALU1
S 14900,2800,14900,6500,200,*,DOWN,ALU1
S 0,9100,17200,9100,4000,vddi,RIGHT,ALU2
S 0,4700,17200,4700,4000,vssi,RIGHT,ALU2
S 0,17500,17200,17500,12000,vdde,RIGHT,ALU2
S 0,1300,17200,1300,1200,ck,RIGHT,ALU2
S 1700,2300,15700,2300,200,*,RIGHT,ALU2
S 0,30300,17200,30300,12000,vsse,RIGHT,ALU2
V 4000,300,CONT_VIA,*
V 4500,300,CONT_VIA,*
V 8500,300,CONT_VIA,*
V 8000,300,CONT_VIA,*
V 7500,300,CONT_VIA,*
V 7000,300,CONT_VIA,*
V 6500,300,CONT_VIA,*
V 6000,300,CONT_VIA,*
V 5500,300,CONT_VIA,*
V 5000,300,CONT_VIA,*
V 9000,300,CONT_VIA,*
V 9500,300,CONT_VIA,*
V 10000,300,CONT_VIA,*
V 10500,300,CONT_VIA,*
V 11000,300,CONT_VIA,*
V 11500,300,CONT_VIA,*
V 12000,300,CONT_VIA,*
V 12500,300,CONT_VIA,*
V 13000,300,CONT_VIA,*
V 13500,300,CONT_VIA,*
B 8600,200,10000,400,CONT_TURN2,*
V 1400,11200,CONT_DIF_P,*
V 1400,11600,CONT_DIF_P,*
V 1400,12000,CONT_DIF_P,*
V 1400,12400,CONT_DIF_P,*
V 1400,12800,CONT_DIF_P,*
V 2600,12800,CONT_DIF_P,*
V 1400,9000,CONT_DIF_P,*
V 1400,9800,CONT_DIF_P,*
V 1400,10200,CONT_DIF_P,*
V 1400,10600,CONT_DIF_P,*
V 2600,12400,CONT_DIF_P,*
V 2600,11200,CONT_DIF_P,*
V 2600,11600,CONT_DIF_P,*
V 2600,12000,CONT_DIF_P,*
V 2000,8600,CONT_DIF_P,*
V 2000,11800,CONT_DIF_P,*
V 2000,11400,CONT_DIF_P,*
V 2000,11000,CONT_DIF_P,*
V 2000,10600,CONT_DIF_P,*
V 1400,7500,CONT_BODY_N,*
V 1400,8200,CONT_DIF_P,*
V 1400,8600,CONT_DIF_P,*
V 2600,8200,CONT_DIF_P,*
V 2000,12600,CONT_DIF_P,*
V 2000,8200,CONT_DIF_P,*
V 2000,12200,CONT_DIF_P,*
V 2000,10200,CONT_DIF_P,*
V 2000,9800,CONT_DIF_P,*
V 2000,9400,CONT_DIF_P,*
V 2000,9000,CONT_DIF_P,*
V 3200,8200,CONT_DIF_P,*
V 3200,8600,CONT_DIF_P,*
V 2600,7500,CONT_BODY_N,*
V 2600,8600,CONT_DIF_P,*
V 2600,9000,CONT_DIF_P,*
V 2600,9800,CONT_DIF_P,*
V 2600,10200,CONT_DIF_P,*
V 2600,10600,CONT_DIF_P,*
V 3200,10400,CONT_BODY_N,*
V 800,9000,CONT_BODY_N,*
V 800,8600,CONT_BODY_N,*
V 800,8200,CONT_BODY_N,*
V 800,7500,CONT_BODY_N,*
V 3200,9000,CONT_DIF_P,*
V 3200,9400,CONT_DIF_P,*
V 3200,9800,CONT_DIF_P,*
V 800,13000,CONT_BODY_N,*
V 800,13400,CONT_BODY_N,*
V 1200,13400,CONT_BODY_N,*
V 1600,13400,CONT_BODY_N,*
V 2000,13400,CONT_BODY_N,*
V 2400,13400,CONT_BODY_N,*
V 2800,13400,CONT_BODY_N,*
V 3200,13400,CONT_BODY_N,*
V 3200,12600,CONT_BODY_N,*
V 3200,12200,CONT_BODY_N,*
V 3200,11800,CONT_BODY_N,*
V 3200,11400,CONT_BODY_N,*
V 800,11400,CONT_BODY_N,*
V 800,11800,CONT_BODY_N,*
V 800,12200,CONT_BODY_N,*
V 800,12600,CONT_BODY_N,*
V 15800,12000,CONT_DIF_P,*
V 15800,12400,CONT_DIF_P,*
V 15800,12800,CONT_DIF_P,*
V 14600,12800,CONT_DIF_P,*
V 800,11000,CONT_BODY_N,*
V 800,9800,CONT_BODY_N,*
V 800,10200,CONT_BODY_N,*
V 3200,13000,CONT_BODY_N,*
V 15800,10200,CONT_DIF_P,*
V 15800,10600,CONT_DIF_P,*
V 14600,12400,CONT_DIF_P,*
V 14600,11200,CONT_DIF_P,*
V 14600,11600,CONT_DIF_P,*
V 14600,12000,CONT_DIF_P,*
V 15800,11200,CONT_DIF_P,*
V 15800,11600,CONT_DIF_P,*
V 15200,11400,CONT_DIF_P,*
V 15200,11000,CONT_DIF_P,*
V 15200,10600,CONT_DIF_P,*
V 15800,7500,CONT_BODY_N,*
V 15800,8200,CONT_DIF_P,*
V 15800,8600,CONT_DIF_P,*
V 15800,9000,CONT_DIF_P,*
V 15800,9800,CONT_DIF_P,*
V 15200,8200,CONT_DIF_P,*
V 15200,12200,CONT_DIF_P,*
V 15200,10200,CONT_DIF_P,*
V 15200,9800,CONT_DIF_P,*
V 15200,9400,CONT_DIF_P,*
V 15200,9000,CONT_DIF_P,*
V 15200,8600,CONT_DIF_P,*
V 15200,11800,CONT_DIF_P,*
V 14600,7500,CONT_BODY_N,*
V 14600,8600,CONT_DIF_P,*
V 14600,9000,CONT_DIF_P,*
V 14600,9800,CONT_DIF_P,*
V 14600,10200,CONT_DIF_P,*
V 14600,10600,CONT_DIF_P,*
V 14600,8200,CONT_DIF_P,*
V 15200,12600,CONT_DIF_P,*
V 16400,8600,CONT_BODY_N,*
V 16400,8200,CONT_BODY_N,*
V 16400,7500,CONT_BODY_N,*
V 14000,9000,CONT_DIF_P,*
V 14000,9400,CONT_DIF_P,*
V 14000,9800,CONT_DIF_P,*
V 14000,8200,CONT_DIF_P,*
V 14000,8600,CONT_DIF_P,*
V 16000,13400,CONT_BODY_N,*
V 15600,13400,CONT_BODY_N,*
V 15200,13400,CONT_BODY_N,*
V 14800,13400,CONT_BODY_N,*
V 14400,13400,CONT_BODY_N,*
V 14000,13400,CONT_BODY_N,*
V 14000,10400,CONT_BODY_N,*
V 16400,9000,CONT_BODY_N,*
V 14000,11800,CONT_BODY_N,*
V 14000,11400,CONT_BODY_N,*
V 16400,11400,CONT_BODY_N,*
V 16400,11800,CONT_BODY_N,*
V 16400,12200,CONT_BODY_N,*
V 16400,12600,CONT_BODY_N,*
V 16400,13000,CONT_BODY_N,*
V 16400,13400,CONT_BODY_N,*
V 16400,11000,CONT_BODY_N,*
V 16400,9800,CONT_BODY_N,*
V 16400,10200,CONT_BODY_N,*
V 14000,13000,CONT_BODY_N,*
V 14000,12600,CONT_BODY_N,*
V 14000,12200,CONT_BODY_N,*
V 2300,5500,CONT_DIF_N,*
V 2300,5100,CONT_DIF_N,*
V 2300,4700,CONT_DIF_N,*
V 2300,4300,CONT_DIF_N,*
V 2300,3500,CONT_DIF_N,*
V 1700,5500,CONT_DIF_N,*
V 1700,5100,CONT_DIF_N,*
V 1700,4700,CONT_DIF_N,*
V 1700,4300,CONT_DIF_N,*
V 1700,3900,CONT_DIF_N,*
V 1700,3500,CONT_DIF_N,*
V 2900,5600,CONT_DIF_N,*
V 2900,5100,CONT_DIF_N,*
V 1100,3600,CONT_DIF_N,*
V 1100,4000,CONT_DIF_N,*
V 1100,4400,CONT_DIF_N,*
V 1100,4800,CONT_DIF_N,*
V 1100,5200,CONT_DIF_N,*
V 1100,5600,CONT_DIF_N,*
V 2300,3900,CONT_DIF_N,*
V 15500,4300,CONT_DIF_N,*
V 15500,3900,CONT_DIF_N,*
V 15500,3500,CONT_DIF_N,*
V 14300,5600,CONT_DIF_N,*
V 14900,5500,CONT_DIF_N,*
V 14900,5100,CONT_DIF_N,*
V 14900,4700,CONT_DIF_N,*
V 14900,4300,CONT_DIF_N,*
V 16100,4800,CONT_DIF_N,*
V 16100,5200,CONT_DIF_N,*
V 16100,5600,CONT_DIF_N,*
V 14900,3900,CONT_DIF_N,*
V 14900,3500,CONT_DIF_N,*
V 15500,5500,CONT_DIF_N,*
V 15500,5100,CONT_DIF_N,*
V 15500,4700,CONT_DIF_N,*
V 14300,5100,CONT_DIF_N,*
V 16100,3600,CONT_DIF_N,*
V 16100,4000,CONT_DIF_N,*
V 16100,4400,CONT_DIF_N,*
V 500,3600,CONT_BODY_P,*
V 500,3200,CONT_BODY_P,*
V 500,2800,CONT_BODY_P,*
V 500,6400,CONT_BODY_P,*
V 500,5600,CONT_BODY_P,*
V 500,5200,CONT_BODY_P,*
V 500,4800,CONT_BODY_P,*
V 500,4000,CONT_BODY_P,*
V 2300,2800,CONT_BODY_P,*
V 1100,2800,CONT_BODY_P,*
V 2300,6400,CONT_BODY_P,*
V 1100,6400,CONT_BODY_P,*
V 14900,2800,CONT_BODY_P,*
V 16100,2800,CONT_BODY_P,*
V 14900,6400,CONT_BODY_P,*
V 16100,6400,CONT_BODY_P,*
V 16700,6400,CONT_BODY_P,*
V 16700,5600,CONT_BODY_P,*
V 16700,5200,CONT_BODY_P,*
V 16700,4800,CONT_BODY_P,*
V 16700,4000,CONT_BODY_P,*
V 16700,3600,CONT_BODY_P,*
V 16700,3200,CONT_BODY_P,*
V 16700,2800,CONT_BODY_P,*
V 14700,7000,CONT_POLY,*
V 14400,4500,CONT_POLY,*
V 2500,7000,CONT_POLY,*
V 2800,4500,CONT_POLY,*
V 15500,0,CONT_VIA,*
V 1700,0,CONT_VIA,*
V 500,6000,CONT_VIA,*
V 500,4400,CONT_VIA,*
B 15200,7000,200,200,CONT_TURN1,*
B 14000,7000,200,200,CONT_TURN1,*
V 2100,2300,CONT_VIA,*
V 15100,2300,CONT_VIA,*
B 3200,7000,200,200,CONT_TURN1,*
B 2000,7000,200,200,CONT_TURN1,*
B 1700,7000,200,200,CONT_TURN1,*
B 15500,7000,200,200,CONT_TURN1,*
V 2600,10900,CONT_VIA,*
V 1400,10900,CONT_VIA,*
V 2800,900,CONT_VIA,*
V 2800,1700,CONT_VIA,*
V 3200,10900,CONT_VIA,*
V 1400,9400,CONT_VIA,*
V 1400,7800,CONT_VIA,*
V 2600,7800,CONT_VIA,*
V 2600,9400,CONT_VIA,*
V 800,7800,CONT_VIA,*
V 800,9400,CONT_VIA,*
V 2300,6000,CONT_VIA,*
V 2300,3200,CONT_VIA,*
V 1100,3200,CONT_VIA,*
V 1100,6000,CONT_VIA,*
V 800,10600,CONT_VIA,*
V 14400,1700,CONT_VIA,*
V 14000,10900,CONT_VIA,*
V 14600,10900,CONT_VIA,*
V 15800,10900,CONT_VIA,*
V 14400,900,CONT_VIA,*
V 15800,9400,CONT_VIA,*
V 15800,7800,CONT_VIA,*
V 14600,7800,CONT_VIA,*
V 14600,9400,CONT_VIA,*
V 16400,7800,CONT_VIA,*
V 16400,9400,CONT_VIA,*
V 16100,3200,CONT_VIA,*
V 16100,6000,CONT_VIA,*
V 14900,6000,CONT_VIA,*
V 16700,4400,CONT_VIA,*
V 14900,3200,CONT_VIA,*
V 16400,10600,CONT_VIA,*
V 16700,6000,CONT_VIA,*
B 8600,4700,10000,4000,CONT_VIA,*
V 1500,2300,CONT_VIA,*
V 15700,2300,CONT_VIA,*
EOF

56
alliance/share/cells/padlib/pck_sp.al Normal file
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@ -0,0 +1,56 @@
V ALLIANCE : 4
H pck_sp,L,23/ 2/95
C pad,UNKNOWN,EXTERNAL,2
C ck,UNKNOWN,EXTERNAL,1
C vdde,UNKNOWN,EXTERNAL,3
C vddi,UNKNOWN,EXTERNAL,4
C vsse,UNKNOWN,EXTERNAL,5
C vssi,UNKNOWN,EXTERNAL,6
T N,1,27,6,2,7,0,0,0,0,147,29
T N,1,27,7,2,6,0,0,0,0,141,29
T N,1,27,7,2,6,0,0,0,0,153,29
T N,1,27,7,2,6,0,0,0,0,129,29
T N,1,27,6,2,7,0,0,0,0,123,29
T N,1,27,6,2,7,0,0,0,0,135,29
T N,1,27,6,2,7,0,0,0,0,111,29
T N,1,27,7,2,6,0,0,0,0,117,29
T N,1,27,7,2,6,0,0,0,0,105,29
T N,1,27,6,2,7,0,0,0,0,99,29
T N,1,27,7,2,6,0,0,0,0,93,29
T N,1,27,6,2,7,0,0,0,0,87,29
T N,1,27,1,7,6,0,0,0,0,52,29
T N,1,27,6,7,1,0,0,0,0,46,29
T N,1,27,1,7,6,0,0,0,0,28,29
T N,1,27,1,7,6,0,0,0,0,40,29
T N,1,27,6,7,1,0,0,0,0,34,29
T N,1,27,6,7,1,0,0,0,0,70,29
T N,1,27,1,7,6,0,0,0,0,64,29
T N,1,27,6,7,1,0,0,0,0,58,29
T N,1,35,2,5,5,0,0,0,0,73,273
T N,1,35,5,5,2,0,0,0,0,79,273
T N,1,35,2,5,5,0,0,0,0,85,273
T N,1,35,5,5,2,0,0,0,0,91,273
T P,1,27,7,2,4,0,0,0,0,105,80
T P,1,27,4,2,7,0,0,0,0,99,80
T P,1,27,7,2,4,0,0,0,0,93,80
T P,1,27,4,2,7,0,0,0,0,87,80
T P,1,57,4,7,1,0,0,0,0,70,95
T P,1,57,4,7,1,0,0,0,0,46,95
T P,1,57,1,7,4,0,0,0,0,52,95
T P,1,57,4,7,1,0,0,0,0,58,95
T P,1,57,1,7,4,0,0,0,0,64,95
T P,1,57,1,7,4,0,0,0,0,28,95
T P,1,57,4,7,1,0,0,0,0,34,95
T P,1,57,1,7,4,0,0,0,0,40,95
T P,1,80,2,3,3,0,0,0,0,73,188.5
T P,1,80,3,3,2,0,0,0,0,79,188.5
T P,1,80,2,3,3,0,0,0,0,85,188.5
T P,1,80,3,3,2,0,0,0,0,91,188.5
S 7,INTERNAL,0,mbk_sig3
S 6,EXTERNAL,0,vssi
S 5,EXTERNAL,0,vsse
S 4,EXTERNAL,0,vddi
S 3,EXTERNAL,0,vdde
S 2,EXTERNAL,0,pad
S 1,EXTERNAL,0,ck
EOF

17
alliance/share/cells/padlib/pck_sp.ap Normal file
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@ -0,0 +1,17 @@
V ALLIANCE : 3
H pck_sp,P,30/ 0/95
A 3,1,175,501
C 3,48,40,vssi,0,WEST,ALU2
C 3,92,40,vddi,0,WEST,ALU2
C 3,14,12,ck,0,WEST,ALU2
C 175,14,12,ck,1,EAST,ALU2
C 175,48,40,vssi,1,EAST,ALU2
C 175,92,40,vddi,1,EAST,ALU2
C 175,176,120,vdde,1,EAST,ALU2
C 175,304,120,vsse,1,EAST,ALU2
C 3,304,120,vsse,0,WEST,ALU2
C 3,176,120,vdde,0,WEST,ALU2
C 91,501,1,pad,0,NORTH,ALU1
I 3,1,palck_sp,log,NOSYM
I 3,364,padreal,pad,NOSYM
EOF

38
alliance/share/cells/padlib/pck_sp.vbe Normal file
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@ -0,0 +1,38 @@
-- VHDL data flow description generated from `pck_sp`
-- date : Thu Feb 23 17:05:59 1995
-- Entity Declaration
ENTITY pck_sp IS
GENERIC (
CONSTANT area : NATURAL := 86000; -- area
CONSTANT cin_pad : NATURAL := 1326; -- cin_pad
CONSTANT tpll_pad : NATURAL := 1443; -- tpll_pad
CONSTANT rdown_pad : NATURAL := 58; -- rdown_pad
CONSTANT tphh_pad : NATURAL := 228; -- tphh_pad
CONSTANT rup_pad : NATURAL := 68 -- rup_pad
);
PORT (
pad : in BIT; -- pad
ck : out BIT; -- ck
vdde : in BIT; -- vdde
vddi : in BIT; -- vddi
vsse : in BIT; -- vsse
vssi : in BIT -- vssi
);
END pck_sp;
-- Architecture Declaration
ARCHITECTURE behaviour_data_flow OF pck_sp IS
BEGIN
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on pck_sp"
SEVERITY WARNING;
ck <= pad;
END;

34
alliance/share/cells/padlib/pi_sp.al Normal file
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@ -0,0 +1,34 @@
V ALLIANCE : 4
H pi_sp,L,23/ 2/95
C pad,UNKNOWN,EXTERNAL,2
C t,UNKNOWN,EXTERNAL,3
C ck,UNKNOWN,EXTERNAL,1
C vdde,UNKNOWN,EXTERNAL,4
C vddi,UNKNOWN,EXTERNAL,5
C vsse,UNKNOWN,EXTERNAL,6
C vssi,UNKNOWN,EXTERNAL,7
T N,1,27,3,8,7,0,0,0,0,88,29
T N,1,27,7,8,3,0,0,0,0,94,29
T N,1,27,7,2,8,0,0,0,0,111,29
T N,1,27,8,2,7,0,0,0,0,117,29
T N,1,27,7,2,8,0,0,0,0,123,29
T N,1,35,6,6,2,0,0,0,0,97,273
T N,1,35,2,6,6,0,0,0,0,91,273
T N,1,35,6,6,2,0,0,0,0,85,273
T N,1,35,2,6,6,0,0,0,0,79,273
T P,1,57,5,8,3,0,0,0,0,94,95
T P,1,57,3,8,5,0,0,0,0,88,95
T P,1,27,5,2,8,0,0,0,0,111,80
T P,1,80,4,4,2,0,0,0,0,97,188.5
T P,1,80,2,4,4,0,0,0,0,91,188.5
T P,1,80,4,4,2,0,0,0,0,85,188.5
T P,1,80,2,4,4,0,0,0,0,79,188.5
S 8,INTERNAL,0,mbk_sig4
S 7,EXTERNAL,0,vssi
S 6,EXTERNAL,0,vsse
S 5,EXTERNAL,0,vddi
S 4,EXTERNAL,0,vdde
S 3,EXTERNAL,0,t
S 2,EXTERNAL,0,pad
S 1,EXTERNAL,0,ck
EOF

19
alliance/share/cells/padlib/pi_sp.ap Normal file
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@ -0,0 +1,19 @@
V ALLIANCE : 3
H pi_sp,P,30/ 0/95
A 9,1,181,501
C 91,1,2,t,1,SOUTH,ALU2
C 91,1,2,t,0,SOUTH,ALU1
C 9,14,12,ck,0,WEST,ALU2
C 181,14,12,ck,1,EAST,ALU2
C 181,48,40,vssi,1,EAST,ALU2
C 181,92,40,vddi,1,EAST,ALU2
C 181,176,120,vdde,1,EAST,ALU2
C 9,304,120,vsse,0,WEST,ALU2
C 181,304,120,vsse,1,EAST,ALU2
C 9,176,120,vdde,0,WEST,ALU2
C 9,92,40,vddi,0,WEST,ALU2
C 9,48,40,vssi,0,WEST,ALU2
C 97,501,1,pad,0,NORTH,ALU1
I 9,364,padreal,pad,NOSYM
I 9,1,pali_sp,log,NOSYM
EOF

39
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-- VHDL data flow description generated from `pi_sp`
-- date : Thu Feb 23 17:06:23 1995
-- Entity Declaration
ENTITY pi_sp IS
GENERIC (
CONSTANT area : NATURAL := 86000; -- area
CONSTANT cin_pad : NATURAL := 654; -- cin_pad
CONSTANT tpll_pad : NATURAL := 1487; -- tpll_pad
CONSTANT rdown_pad : NATURAL := 234; -- rdown_pad
CONSTANT tphh_pad : NATURAL := 233; -- tphh_pad
CONSTANT rup_pad : NATURAL := 273 -- rup_pad
);
PORT (
pad : in BIT; -- pad
t : out BIT; -- t
ck : in BIT; -- ck
vdde : in BIT; -- vdde
vddi : in BIT; -- vddi
vsse : in BIT; -- vsse
vssi : in BIT -- vssi
);
END pi_sp;
-- Architecture Declaration
ARCHITECTURE behaviour_data_flow OF pi_sp IS
BEGIN
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on pi_sp"
SEVERITY WARNING;
t <= pad;
END;

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V ALLIANCE : 4
H piot_sp,L,23/ 2/95
C i,UNKNOWN,EXTERNAL,3
C b,UNKNOWN,EXTERNAL,1
C t,UNKNOWN,EXTERNAL,5
C pad,UNKNOWN,EXTERNAL,4
C ck,UNKNOWN,EXTERNAL,2
C vdde,UNKNOWN,EXTERNAL,6
C vddi,UNKNOWN,EXTERNAL,7
C vsse,UNKNOWN,EXTERNAL,8
C vssi,UNKNOWN,EXTERNAL,9
T N,1,10,9,17,16,0,0,0,0,149,30.5
T N,1,10,17,1,9,0,0,0,0,155,30.5
T N,1,29,14,16,15,0,0,0,0,119,20
T N,1,29,15,16,14,0,0,0,0,125,20
T N,1,29,14,16,15,0,0,0,0,131,20
T N,1,29,15,16,14,0,0,0,0,137,20
T N,1,30,9,13,15,0,0,0,0,83,20.5
T N,1,30,15,13,9,0,0,0,0,77,20.5
T N,1,30,9,13,15,0,0,0,0,71,20.5
T N,1,30,15,13,9,0,0,0,0,65,20.5
T N,1,30,9,12,13,0,0,0,0,59,20.5
T N,1,30,15,17,9,0,0,0,0,89,20.5
T N,1,30,9,17,15,0,0,0,0,107,20.5
T N,1,30,12,3,9,0,0,0,0,47,20.5
T N,1,30,15,17,9,0,0,0,0,101,20.5
T N,1,30,9,17,15,0,0,0,0,95,20.5
T N,1,30,9,4,11,0,0,0,0,29,20.5
T N,1,30,5,11,9,0,0,0,0,35,20.5
T N,1,30,9,11,5,0,0,0,0,41,20.5
T N,1,30,9,4,11,0,0,0,0,17,20.5
T N,1,30,11,4,9,0,0,0,0,23,20.5
T N,1,35,4,15,8,0,0,0,0,137,265
T N,1,35,8,15,4,0,0,0,0,143,265
T N,1,35,4,15,8,0,0,0,0,149,265
T N,1,35,8,15,4,0,0,0,0,155,265
T N,1,35,4,15,8,0,0,0,0,113,265
T N,1,35,8,15,4,0,0,0,0,119,265
T N,1,35,4,15,8,0,0,0,0,125,265
T N,1,35,8,15,4,0,0,0,0,131,265
T N,1,35,4,15,8,0,0,0,0,89,265
T N,1,35,8,15,4,0,0,0,0,95,265
T N,1,35,4,15,8,0,0,0,0,101,265
T N,1,35,8,15,4,0,0,0,0,107,265
T N,1,35,4,15,8,0,0,0,0,65,265
T N,1,35,8,15,4,0,0,0,0,71,265
T N,1,35,4,15,8,0,0,0,0,77,265
T N,1,35,8,15,4,0,0,0,0,83,265
T N,1,35,4,15,8,0,0,0,0,41,265
T N,1,35,8,15,4,0,0,0,0,47,265
T N,1,35,4,15,8,0,0,0,0,53,265
T N,1,35,8,15,4,0,0,0,0,59,265
T N,1,35,8,15,4,0,0,0,0,35,265
T N,1,35,4,15,8,0,0,0,0,29,265
T N,1,35,8,15,4,0,0,0,0,23,265
T N,1,35,4,15,8,0,0,0,0,17,265
T P,1,59,15,17,14,0,0,0,0,131,86
T P,1,59,14,17,15,0,0,0,0,137,86
T P,1,60,14,13,7,0,0,0,0,77,85.5
T P,1,59,15,17,14,0,0,0,0,119,86
T P,1,59,14,17,15,0,0,0,0,125,86
T P,1,60,7,13,14,0,0,0,0,83,85.5
T P,1,60,7,13,14,0,0,0,0,71,85.5
T P,1,60,14,13,7,0,0,0,0,65,85.5
T P,1,60,7,12,13,0,0,0,0,59,85.5
T P,1,60,14,16,7,0,0,0,0,101,85.5
T P,1,60,7,16,14,0,0,0,0,95,85.5
T P,1,60,14,16,7,0,0,0,0,89,85.5
T P,1,60,7,11,5,0,0,0,0,41,85.5
T P,1,60,12,3,7,0,0,0,0,47,85.5
T P,1,60,7,16,14,0,0,0,0,107,85.5
T P,40,3,7,9,4,0,0,0,0,14,91
T P,1,30,7,4,11,0,0,0,0,29,70.5
T P,1,60,5,11,7,0,0,0,0,35,85.5
T P,1,20,7,17,16,0,0,0,0,149,66.5
T P,1,20,17,1,7,0,0,0,0,155,66.5
T P,1,80,4,14,6,0,0,0,0,137,180.5
T P,1,80,6,14,4,0,0,0,0,143,180.5
T P,1,80,4,14,6,0,0,0,0,149,180.5
T P,1,80,6,14,4,0,0,0,0,155,180.5
T P,1,80,4,14,6,0,0,0,0,113,180.5
T P,1,80,6,14,4,0,0,0,0,119,180.5
T P,1,80,4,14,6,0,0,0,0,125,180.5
T P,1,80,6,14,4,0,0,0,0,131,180.5
T P,1,80,4,14,6,0,0,0,0,89,180.5
T P,1,80,6,14,4,0,0,0,0,95,180.5
T P,1,80,4,14,6,0,0,0,0,101,180.5
T P,1,80,6,14,4,0,0,0,0,107,180.5
T P,1,80,4,14,6,0,0,0,0,65,180.5
T P,1,80,6,14,4,0,0,0,0,71,180.5
T P,1,80,4,14,6,0,0,0,0,77,180.5
T P,1,80,6,14,4,0,0,0,0,83,180.5
T P,1,80,4,14,6,0,0,0,0,41,180.5
T P,1,80,6,14,4,0,0,0,0,47,180.5
T P,1,80,4,14,6,0,0,0,0,53,180.5
T P,1,80,6,14,4,0,0,0,0,59,180.5
T P,1,80,6,14,4,0,0,0,0,35,180.5
T P,1,80,4,14,6,0,0,0,0,29,180.5
T P,1,80,6,14,4,0,0,0,0,23,180.5
T P,1,80,4,14,6,0,0,0,0,17,180.5
S 17,INTERNAL,0,mbk_sig10
S 16,INTERNAL,0,mbk_sig12
S 15,INTERNAL,0,mbk_sig9
S 14,INTERNAL,0,mbk_sig11
S 13,INTERNAL,0,mbk_sig6
S 12,INTERNAL,0,mbk_sig7
S 11,INTERNAL,0,mbk_sig2
S 10,INTERNAL,0,mbk_sig15
S 9,EXTERNAL,0,vssi
S 8,EXTERNAL,0,vsse
S 7,EXTERNAL,0,vddi
S 6,EXTERNAL,0,vdde
S 5,EXTERNAL,0,t
S 4,EXTERNAL,0,pad
S 3,EXTERNAL,0,i
S 2,EXTERNAL,0,ck
S 1,EXTERNAL,0,b
EOF

23
alliance/share/cells/padlib/piot_sp.ap Normal file
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@ -0,0 +1,23 @@
V ALLIANCE : 3
H piot_sp,P,23/ 1/95
A 0,-7,172,493
C 157,-7,2,b,2,SOUTH,ALU1
C 157,-7,2,b,3,SOUTH,ALU2
C 49,-7,2,i,2,SOUTH,ALU1
C 38,-7,2,t,2,SOUTH,ALU1
C 49,-7,2,i,3,SOUTH,ALU2
C 38,-7,2,t,3,SOUTH,ALU2
C 88,493,1,pad,0,NORTH,ALU1
C 0,296,120,vsse,0,WEST,ALU2
C 172,296,120,vsse,1,EAST,ALU2
C 172,6,12,ck,1,EAST,ALU2
C 172,40,40,vssi,1,EAST,ALU2
C 172,84,40,vddi,1,EAST,ALU2
C 172,168,120,vdde,1,EAST,ALU2
C 0,6,12,ck,0,WEST,ALU2
C 0,40,40,vssi,0,WEST,ALU2
C 0,84,40,vddi,0,WEST,ALU2
C 0,168,120,vdde,0,WEST,ALU2
I 0,356,padreal,pad,NOSYM
I 0,-7,paliot_sp,logic,NOSYM
EOF

54
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@ -0,0 +1,54 @@
-- VHDL data flow description generated from `piot_sp`
-- date : Thu Feb 23 17:07:10 1995
-- Entity Declaration
ENTITY piot_sp IS
GENERIC (
CONSTANT area : NATURAL := 86000; -- area
CONSTANT rup : NATURAL := 402; -- rup
CONSTANT rdown : NATURAL := 0 -- rdown
);
PORT (
i : in BIT; -- i
b : in BIT; -- b
t : out BIT; -- t
pad : inout MUX_BIT BUS; -- pad
ck : in BIT; -- ck
vdde : in BIT; -- vdde
vddi : in BIT; -- vddi
vsse : in BIT; -- vsse
vssi : in BIT -- vssi
);
END piot_sp;
-- Architecture Declaration
ARCHITECTURE behaviour_data_flow OF piot_sp IS
SIGNAL b1 : BIT; -- b1
SIGNAL b2 : BIT; -- b2
SIGNAL b3 : BIT; -- b3
SIGNAL b4 : BIT; -- b4
SIGNAL b5 : BIT; -- b5
SIGNAL b6 : BIT; -- b6
BEGIN
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on piot_sp"
SEVERITY WARNING;
b6 <= b5;
b5 <= b4;
b4 <= b3;
b3 <= b2;
b2 <= b1;
b1 <= b;
label0 : BLOCK (b6 = '1')
BEGIN
pad <= GUARDED i;
END BLOCK label0;
t <= pad;
END;

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@ -0,0 +1,94 @@
V ALLIANCE : 4
H piotw_sp,L,23/ 2/95
C i,UNKNOWN,EXTERNAL,3
C b,UNKNOWN,EXTERNAL,1
C t,UNKNOWN,EXTERNAL,5
C pad,UNKNOWN,EXTERNAL,4
C ck,UNKNOWN,EXTERNAL,2
C vdde,UNKNOWN,EXTERNAL,6
C vddi,UNKNOWN,EXTERNAL,7
C vsse,UNKNOWN,EXTERNAL,8
C vssi,UNKNOWN,EXTERNAL,9
T N,1,10,9,17,16,0,0,0,0,149,30.5
T N,1,10,17,1,9,0,0,0,0,155,30.5
T N,1,29,14,16,15,0,0,0,0,119,20
T N,1,29,15,16,14,0,0,0,0,125,20
T N,1,29,14,16,15,0,0,0,0,131,20
T N,1,29,15,16,14,0,0,0,0,137,20
T N,1,30,9,13,15,0,0,0,0,83,20.5
T N,1,30,15,13,9,0,0,0,0,77,20.5
T N,1,30,9,13,15,0,0,0,0,71,20.5
T N,1,30,15,13,9,0,0,0,0,65,20.5
T N,1,30,9,12,13,0,0,0,0,59,20.5
T N,1,30,15,17,9,0,0,0,0,89,20.5
T N,1,30,9,17,15,0,0,0,0,107,20.5
T N,1,30,12,3,9,0,0,0,0,47,20.5
T N,1,30,15,17,9,0,0,0,0,101,20.5
T N,1,30,9,17,15,0,0,0,0,95,20.5
T N,1,30,9,4,11,0,0,0,0,29,20.5
T N,1,30,5,11,9,0,0,0,0,35,20.5
T N,1,30,9,11,5,0,0,0,0,41,20.5
T N,1,30,9,4,11,0,0,0,0,17,20.5
T N,1,30,11,4,9,0,0,0,0,23,20.5
T N,1,35,4,15,8,0,0,0,0,92,265
T N,1,35,8,15,4,0,0,0,0,98,265
T N,1,35,4,15,8,0,0,0,0,104,265
T N,1,35,8,15,4,0,0,0,0,110,265
T N,1,35,4,15,8,0,0,0,0,68,265
T N,1,35,8,15,4,0,0,0,0,74,265
T N,1,35,4,15,8,0,0,0,0,80,265
T N,1,35,8,15,4,0,0,0,0,86,265
T N,1,35,8,15,4,0,0,0,0,62,265
T N,1,35,4,15,8,0,0,0,0,56,265
T N,1,35,8,15,4,0,0,0,0,50,265
T N,1,35,4,15,8,0,0,0,0,44,265
T P,1,59,15,17,14,0,0,0,0,131,86
T P,1,59,14,17,15,0,0,0,0,137,86
T P,1,60,7,13,14,0,0,0,0,83,85.5
T P,1,60,14,13,7,0,0,0,0,77,85.5
T P,1,59,15,17,14,0,0,0,0,119,86
T P,1,59,14,17,15,0,0,0,0,125,86
T P,1,60,7,12,13,0,0,0,0,59,85.5
T P,1,60,7,13,14,0,0,0,0,71,85.5
T P,1,60,14,13,7,0,0,0,0,65,85.5
T P,1,60,7,16,14,0,0,0,0,107,85.5
T P,1,60,14,16,7,0,0,0,0,101,85.5
T P,1,60,7,16,14,0,0,0,0,95,85.5
T P,1,60,14,16,7,0,0,0,0,89,85.5
T P,1,60,5,11,7,0,0,0,0,35,85.5
T P,1,60,7,11,5,0,0,0,0,41,85.5
T P,1,60,12,3,7,0,0,0,0,47,85.5
T P,40,3,7,9,4,0,0,0,0,14,91
T P,1,30,7,4,11,0,0,0,0,29,70.5
T P,1,20,7,17,16,0,0,0,0,149,66.5
T P,1,20,17,1,7,0,0,0,0,155,66.5
T P,1,80,4,14,6,0,0,0,0,92,180.5
T P,1,80,6,14,4,0,0,0,0,98,180.5
T P,1,80,4,14,6,0,0,0,0,104,180.5
T P,1,80,6,14,4,0,0,0,0,110,180.5
T P,1,80,4,14,6,0,0,0,0,68,180.5
T P,1,80,6,14,4,0,0,0,0,74,180.5
T P,1,80,4,14,6,0,0,0,0,80,180.5
T P,1,80,6,14,4,0,0,0,0,86,180.5
T P,1,80,6,14,4,0,0,0,0,62,180.5
T P,1,80,4,14,6,0,0,0,0,56,180.5
T P,1,80,6,14,4,0,0,0,0,50,180.5
T P,1,80,4,14,6,0,0,0,0,44,180.5
S 17,INTERNAL,0,mbk_sig10
S 16,INTERNAL,0,mbk_sig12
S 15,INTERNAL,0,mbk_sig9
S 14,INTERNAL,0,mbk_sig11
S 13,INTERNAL,0,mbk_sig6
S 12,INTERNAL,0,mbk_sig7
S 11,INTERNAL,0,mbk_sig2
S 10,INTERNAL,0,mbk_sig15
S 9,EXTERNAL,0,vssi
S 8,EXTERNAL,0,vsse
S 7,EXTERNAL,0,vddi
S 6,EXTERNAL,0,vdde
S 5,EXTERNAL,0,t
S 4,EXTERNAL,0,pad
S 3,EXTERNAL,0,i
S 2,EXTERNAL,0,ck
S 1,EXTERNAL,0,b
EOF

23
alliance/share/cells/padlib/piotw_sp.ap Normal file
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@ -0,0 +1,23 @@
V ALLIANCE : 3
H piotw_sp,P,23/ 1/95
A 0,-7,172,493
C 157,-7,2,b,2,SOUTH,ALU1
C 157,-7,2,b,3,SOUTH,ALU2
C 49,-7,2,i,2,SOUTH,ALU1
C 49,-7,2,i,3,SOUTH,ALU2
C 38,-7,2,t,2,SOUTH,ALU1
C 38,-7,2,t,3,SOUTH,ALU2
C 88,493,1,pad,0,NORTH,ALU1
C 172,296,120,vsse,1,EAST,ALU2
C 0,296,120,vsse,0,WEST,ALU2
C 0,168,120,vdde,0,WEST,ALU2
C 0,84,40,vddi,0,WEST,ALU2
C 0,40,40,vssi,0,WEST,ALU2
C 0,6,12,ck,0,WEST,ALU2
C 172,168,120,vdde,1,EAST,ALU2
C 172,84,40,vddi,1,EAST,ALU2
C 172,40,40,vssi,1,EAST,ALU2
C 172,6,12,ck,1,EAST,ALU2
I 0,356,padreal,pad,NOSYM
I 0,-7,paliotw_sp,logic,NOSYM
EOF

54
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@ -0,0 +1,54 @@
-- VHDL data flow description generated from `piotw_sp`
-- date : Thu Feb 23 17:07:47 1995
-- Entity Declaration
ENTITY piotw_sp IS
GENERIC (
CONSTANT area : NATURAL := 86000; -- area
CONSTANT rup : NATURAL := 402; -- rup
CONSTANT rdown : NATURAL := 0 -- rdown
);
PORT (
i : in BIT; -- i
b : in BIT; -- b
t : out BIT; -- t
pad : inout MUX_BIT BUS; -- pad
ck : in BIT; -- ck
vdde : in BIT; -- vdde
vddi : in BIT; -- vddi
vsse : in BIT; -- vsse
vssi : in BIT -- vssi
);
END piotw_sp;
-- Architecture Declaration
ARCHITECTURE behaviour_data_flow OF piotw_sp IS
SIGNAL b1 : BIT; -- b1
SIGNAL b2 : BIT; -- b2
SIGNAL b3 : BIT; -- b3
SIGNAL b4 : BIT; -- b4
SIGNAL b5 : BIT; -- b5
SIGNAL b6 : BIT; -- b6
BEGIN
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on piotw_sp"
SEVERITY WARNING;
b6 <= b5;
b5 <= b4;
b4 <= b3;
b3 <= b2;
b2 <= b1;
b1 <= b;
label0 : BLOCK (b6 = '1')
BEGIN
pad <= GUARDED i;
END BLOCK label0;
t <= pad;
END;

80
alliance/share/cells/padlib/po_sp.al Normal file
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@ -0,0 +1,80 @@
V ALLIANCE : 4
H po_sp,L,23/ 2/95
C i,UNKNOWN,EXTERNAL,2
C pad,UNKNOWN,EXTERNAL,3
C ck,UNKNOWN,EXTERNAL,1
C vdde,UNKNOWN,EXTERNAL,4
C vddi,UNKNOWN,EXTERNAL,5
C vsse,UNKNOWN,EXTERNAL,6
C vssi,UNKNOWN,EXTERNAL,7
T N,1,30,10,2,7,0,0,0,0,45,20.5
T N,1,30,7,10,9,0,0,0,0,57,20.5
T N,1,30,8,9,7,0,0,0,0,63,20.5
T N,1,30,7,9,8,0,0,0,0,69,20.5
T N,1,30,8,9,7,0,0,0,0,75,20.5
T N,1,30,7,9,8,0,0,0,0,81,20.5
T N,1,35,3,8,6,0,0,0,0,17,265
T N,1,35,6,8,3,0,0,0,0,23,265
T N,1,35,3,8,6,0,0,0,0,29,265
T N,1,35,6,8,3,0,0,0,0,35,265
T N,1,35,3,8,6,0,0,0,0,41,265
T N,1,35,6,8,3,0,0,0,0,47,265
T N,1,35,3,8,6,0,0,0,0,53,265
T N,1,35,6,8,3,0,0,0,0,59,265
T N,1,35,3,8,6,0,0,0,0,65,265
T N,1,35,6,8,3,0,0,0,0,71,265
T N,1,35,3,8,6,0,0,0,0,77,265
T N,1,35,6,8,3,0,0,0,0,83,265
T N,1,35,3,8,6,0,0,0,0,89,265
T N,1,35,6,8,3,0,0,0,0,95,265
T N,1,35,3,8,6,0,0,0,0,101,265
T N,1,35,6,8,3,0,0,0,0,107,265
T N,1,35,3,8,6,0,0,0,0,113,265
T N,1,35,6,8,3,0,0,0,0,119,265
T N,1,35,3,8,6,0,0,0,0,125,265
T N,1,35,6,8,3,0,0,0,0,131,265
T N,1,35,3,8,6,0,0,0,0,137,265
T N,1,35,6,8,3,0,0,0,0,143,265
T N,1,35,3,8,6,0,0,0,0,149,265
T N,1,35,6,8,3,0,0,0,0,155,265
T P,1,60,10,2,5,0,0,0,0,45,85.5
T P,1,60,5,9,8,0,0,0,0,69,85.5
T P,1,60,5,10,9,0,0,0,0,57,85.5
T P,1,60,8,9,5,0,0,0,0,63,85.5
T P,1,60,8,9,5,0,0,0,0,75,85.5
T P,1,60,5,9,8,0,0,0,0,81,85.5
T P,1,80,3,8,4,0,0,0,0,17,180.5
T P,1,80,4,8,3,0,0,0,0,23,180.5
T P,1,80,3,8,4,0,0,0,0,29,180.5
T P,1,80,4,8,3,0,0,0,0,35,180.5
T P,1,80,3,8,4,0,0,0,0,41,180.5
T P,1,80,4,8,3,0,0,0,0,47,180.5
T P,1,80,3,8,4,0,0,0,0,53,180.5
T P,1,80,4,8,3,0,0,0,0,59,180.5
T P,1,80,3,8,4,0,0,0,0,65,180.5
T P,1,80,4,8,3,0,0,0,0,71,180.5
T P,1,80,3,8,4,0,0,0,0,77,180.5
T P,1,80,4,8,3,0,0,0,0,83,180.5
T P,1,80,3,8,4,0,0,0,0,89,180.5
T P,1,80,4,8,3,0,0,0,0,95,180.5
T P,1,80,3,8,4,0,0,0,0,101,180.5
T P,1,80,4,8,3,0,0,0,0,107,180.5
T P,1,80,3,8,4,0,0,0,0,113,180.5
T P,1,80,4,8,3,0,0,0,0,119,180.5
T P,1,80,3,8,4,0,0,0,0,125,180.5
T P,1,80,4,8,3,0,0,0,0,131,180.5
T P,1,80,3,8,4,0,0,0,0,137,180.5
T P,1,80,4,8,3,0,0,0,0,143,180.5
T P,1,80,3,8,4,0,0,0,0,149,180.5
T P,1,80,4,8,3,0,0,0,0,155,180.5
S 10,INTERNAL,0,mbk_sig3
S 9,INTERNAL,0,mbk_sig4
S 8,INTERNAL,0,mbk_sig6
S 7,EXTERNAL,0,vssi
S 6,EXTERNAL,0,vsse
S 5,EXTERNAL,0,vddi
S 4,EXTERNAL,0,vdde
S 3,EXTERNAL,0,pad
S 2,EXTERNAL,0,i
S 1,EXTERNAL,0,ck
EOF

19
alliance/share/cells/padlib/po_sp.ap Normal file
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@ -0,0 +1,19 @@
V ALLIANCE : 3
H po_sp,P,30/ 0/95
A 0,-7,172,493
C 172,6,12,ck,1,EAST,ALU2
C 172,40,40,vssi,1,EAST,ALU2
C 172,84,40,vddi,1,EAST,ALU2
C 172,168,120,vdde,1,EAST,ALU2
C 0,168,120,vdde,0,WEST,ALU2
C 0,84,40,vddi,0,WEST,ALU2
C 0,6,12,ck,0,WEST,ALU2
C 0,40,40,vssi,0,WEST,ALU2
C 47,-7,2,i,1,SOUTH,ALU2
C 47,-7,2,i,0,SOUTH,ALU1
C 88,493,1,pad,0,NORTH,ALU1
C 172,296,120,vsse,1,EAST,ALU2
C 0,296,120,vsse,0,WEST,ALU2
I 0,-7,palo_sp,logic,NOSYM
I 0,356,padreal,pad,NOSYM
EOF

39
alliance/share/cells/padlib/po_sp.vbe Normal file
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@ -0,0 +1,39 @@
-- VHDL data flow description generated from `po_sp`
-- date : Thu Feb 23 17:08:20 1995
-- Entity Declaration
ENTITY po_sp IS
GENERIC (
CONSTANT area : NATURAL := 86000; -- area
CONSTANT cin_i : NATURAL := 191; -- cin_i
CONSTANT tpll_i : NATURAL := 2176; -- tpll_i
CONSTANT rdown_i : NATURAL := 15; -- rdown_i
CONSTANT tphh_i : NATURAL := 2032; -- tphh_i
CONSTANT rup_i : NATURAL := 16 -- rup_i
);
PORT (
i : in BIT; -- i
pad : out BIT; -- pad
ck : in BIT; -- ck
vdde : in BIT; -- vdde
vddi : in BIT; -- vddi
vsse : in BIT; -- vsse
vssi : in BIT -- vssi
);
END po_sp;
-- Architecture Declaration
ARCHITECTURE behaviour_data_flow OF po_sp IS
BEGIN
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on po_sp"
SEVERITY WARNING;
pad <= i;
END;

107
alliance/share/cells/padlib/pot_sp.al Normal file
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@ -0,0 +1,107 @@
V ALLIANCE : 4
H pot_sp,L,23/ 2/95
C i,UNKNOWN,EXTERNAL,3
C b,UNKNOWN,EXTERNAL,1
C pad,UNKNOWN,EXTERNAL,4
C ck,UNKNOWN,EXTERNAL,2
C vdde,UNKNOWN,EXTERNAL,5
C vddi,UNKNOWN,EXTERNAL,6
C vsse,UNKNOWN,EXTERNAL,7
C vssi,UNKNOWN,EXTERNAL,8
T N,1,30,15,3,8,0,0,0,0,44,20.5
T N,1,30,13,14,8,0,0,0,0,98,20.5
T N,1,30,8,14,13,0,0,0,0,92,20.5
T N,1,30,13,14,8,0,0,0,0,86,20.5
T N,1,30,8,14,13,0,0,0,0,104,20.5
T N,1,30,8,12,13,0,0,0,0,68,20.5
T N,1,30,13,12,8,0,0,0,0,62,20.5
T N,1,30,8,15,12,0,0,0,0,56,20.5
T N,1,30,8,12,13,0,0,0,0,80,20.5
T N,1,30,13,12,8,0,0,0,0,74,20.5
T N,1,29,10,11,13,0,0,0,0,116,20
T N,1,29,13,11,10,0,0,0,0,122,20
T N,1,29,10,11,13,0,0,0,0,128,20
T N,1,29,13,11,10,0,0,0,0,134,20
T N,1,10,14,1,8,0,0,0,0,152,30.5
T N,1,10,8,14,11,0,0,0,0,146,30.5
T N,1,35,4,13,7,0,0,0,0,137,265
T N,1,35,7,13,4,0,0,0,0,143,265
T N,1,35,4,13,7,0,0,0,0,149,265
T N,1,35,7,13,4,0,0,0,0,155,265
T N,1,35,4,13,7,0,0,0,0,113,265
T N,1,35,7,13,4,0,0,0,0,119,265
T N,1,35,4,13,7,0,0,0,0,125,265
T N,1,35,7,13,4,0,0,0,0,131,265
T N,1,35,4,13,7,0,0,0,0,89,265
T N,1,35,7,13,4,0,0,0,0,95,265
T N,1,35,4,13,7,0,0,0,0,101,265
T N,1,35,7,13,4,0,0,0,0,107,265
T N,1,35,4,13,7,0,0,0,0,65,265
T N,1,35,7,13,4,0,0,0,0,71,265
T N,1,35,4,13,7,0,0,0,0,77,265
T N,1,35,7,13,4,0,0,0,0,83,265
T N,1,35,4,13,7,0,0,0,0,41,265
T N,1,35,7,13,4,0,0,0,0,47,265
T N,1,35,4,13,7,0,0,0,0,53,265
T N,1,35,7,13,4,0,0,0,0,59,265
T N,1,35,7,13,4,0,0,0,0,35,265
T N,1,35,4,13,7,0,0,0,0,29,265
T N,1,35,7,13,4,0,0,0,0,23,265
T N,1,35,4,13,7,0,0,0,0,17,265
T P,40,3,6,8,4,0,0,0,0,27,91
T P,1,20,6,14,11,0,0,0,0,146,66.5
T P,1,20,14,1,6,0,0,0,0,152,66.5
T P,1,60,15,3,6,0,0,0,0,44,85.5
T P,1,60,6,11,10,0,0,0,0,104,85.5
T P,1,60,10,11,6,0,0,0,0,98,85.5
T P,1,60,6,11,10,0,0,0,0,92,85.5
T P,1,60,10,11,6,0,0,0,0,86,85.5
T P,1,60,6,12,10,0,0,0,0,68,85.5
T P,1,60,10,12,6,0,0,0,0,62,85.5
T P,1,60,6,15,12,0,0,0,0,56,85.5
T P,1,60,6,12,10,0,0,0,0,80,85.5
T P,1,60,10,12,6,0,0,0,0,74,85.5
T P,1,59,13,14,10,0,0,0,0,116,86
T P,1,59,10,14,13,0,0,0,0,122,86
T P,1,59,13,14,10,0,0,0,0,128,86
T P,1,59,10,14,13,0,0,0,0,134,86
T P,1,80,4,10,5,0,0,0,0,137,180.5
T P,1,80,5,10,4,0,0,0,0,143,180.5
T P,1,80,4,10,5,0,0,0,0,149,180.5
T P,1,80,5,10,4,0,0,0,0,155,180.5
T P,1,80,4,10,5,0,0,0,0,113,180.5
T P,1,80,5,10,4,0,0,0,0,119,180.5
T P,1,80,4,10,5,0,0,0,0,125,180.5
T P,1,80,5,10,4,0,0,0,0,131,180.5
T P,1,80,4,10,5,0,0,0,0,89,180.5
T P,1,80,5,10,4,0,0,0,0,95,180.5
T P,1,80,4,10,5,0,0,0,0,101,180.5
T P,1,80,5,10,4,0,0,0,0,107,180.5
T P,1,80,4,10,5,0,0,0,0,65,180.5
T P,1,80,5,10,4,0,0,0,0,71,180.5
T P,1,80,4,10,5,0,0,0,0,77,180.5
T P,1,80,5,10,4,0,0,0,0,83,180.5
T P,1,80,4,10,5,0,0,0,0,41,180.5
T P,1,80,5,10,4,0,0,0,0,47,180.5
T P,1,80,4,10,5,0,0,0,0,53,180.5
T P,1,80,5,10,4,0,0,0,0,59,180.5
T P,1,80,5,10,4,0,0,0,0,35,180.5
T P,1,80,4,10,5,0,0,0,0,29,180.5
T P,1,80,5,10,4,0,0,0,0,23,180.5
T P,1,80,4,10,5,0,0,0,0,17,180.5
S 15,INTERNAL,0,mbk_sig4
S 14,INTERNAL,0,mbk_sig7
S 13,INTERNAL,0,mbk_sig6
S 12,INTERNAL,0,mbk_sig3
S 11,INTERNAL,0,mbk_sig9
S 10,INTERNAL,0,mbk_sig8
S 9,INTERNAL,0,mbk_sig12
S 8,EXTERNAL,0,vssi
S 7,EXTERNAL,0,vsse
S 6,EXTERNAL,0,vddi
S 5,EXTERNAL,0,vdde
S 4,EXTERNAL,0,pad
S 3,EXTERNAL,0,i
S 2,EXTERNAL,0,ck
S 1,EXTERNAL,0,b
EOF

21
alliance/share/cells/padlib/pot_sp.ap Normal file
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@ -0,0 +1,21 @@
V ALLIANCE : 3
H pot_sp,P,30/ 0/95
A 0,-7,172,493
C 154,-7,2,b,0,SOUTH,ALU1
C 154,-7,2,b,1,SOUTH,ALU2
C 46,-7,2,i,0,SOUTH,ALU1
C 46,-7,2,i,1,SOUTH,ALU2
C 0,168,120,vdde,0,WEST,ALU2
C 0,84,40,vddi,0,WEST,ALU2
C 0,40,40,vssi,0,WEST,ALU2
C 0,6,12,ck,0,WEST,ALU2
C 172,168,120,vdde,1,EAST,ALU2
C 172,84,40,vddi,1,EAST,ALU2
C 172,40,40,vssi,1,EAST,ALU2
C 172,6,12,ck,1,EAST,ALU2
C 172,296,120,vsse,1,EAST,ALU2
C 0,296,120,vsse,0,WEST,ALU2
C 88,493,1,pad,0,NORTH,ALU1
I 0,-7,palot_sp,logic,NOSYM
I 0,356,padreal,pad,NOSYM
EOF

51
alliance/share/cells/padlib/pot_sp.vbe Normal file
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@ -0,0 +1,51 @@
-- VHDL data flow description generated from `pot_sp`
-- date : Thu Feb 23 17:09:25 1995
-- Entity Declaration
ENTITY pot_sp IS
GENERIC (
CONSTANT area : NATURAL := 86000; -- area
CONSTANT rup : NATURAL := 684404; -- rup
CONSTANT rdown : NATURAL := 24 -- rdown
);
PORT (
i : in BIT; -- i
b : in BIT; -- b
pad : out MUX_BIT BUS; -- pad
ck : in BIT; -- ck
vdde : in BIT; -- vdde
vddi : in BIT; -- vddi
vsse : in BIT; -- vsse
vssi : in BIT -- vssi
);
END pot_sp;
-- Architecture Declaration
ARCHITECTURE behaviour_data_flow OF pot_sp IS
SIGNAL b1 : BIT; -- b1
SIGNAL b2 : BIT; -- b2
SIGNAL b3 : BIT; -- b3
SIGNAL b4 : BIT; -- b4
SIGNAL b5 : BIT; -- b5
SIGNAL b6 : BIT; -- b6
BEGIN
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on pot_sp"
SEVERITY WARNING;
b6 <= b5;
b5 <= b4;
b4 <= b3;
b3 <= b2;
b2 <= b1;
b1 <= b;
label0 : BLOCK (b6 = '1')
BEGIN
pad <= GUARDED i;
END BLOCK label0;
END;

83
alliance/share/cells/padlib/potw_sp.al Normal file
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@ -0,0 +1,83 @@
V ALLIANCE : 4
H potw_sp,L,23/ 2/95
C i,UNKNOWN,EXTERNAL,3
C b,UNKNOWN,EXTERNAL,1
C pad,UNKNOWN,EXTERNAL,4
C ck,UNKNOWN,EXTERNAL,2
C vdde,UNKNOWN,EXTERNAL,5
C vddi,UNKNOWN,EXTERNAL,6
C vsse,UNKNOWN,EXTERNAL,7
C vssi,UNKNOWN,EXTERNAL,8
T N,1,10,8,15,14,0,0,0,0,146,30.5
T N,1,10,15,1,8,0,0,0,0,152,30.5
T N,1,29,12,14,13,0,0,0,0,134,20
T N,1,29,13,14,12,0,0,0,0,128,20
T N,1,29,12,14,13,0,0,0,0,122,20
T N,1,29,13,14,12,0,0,0,0,116,20
T N,1,30,12,11,8,0,0,0,0,74,20.5
T N,1,30,8,11,12,0,0,0,0,80,20.5
T N,1,30,8,10,11,0,0,0,0,56,20.5
T N,1,30,12,11,8,0,0,0,0,62,20.5
T N,1,30,8,11,12,0,0,0,0,68,20.5
T N,1,30,8,15,12,0,0,0,0,104,20.5
T N,1,30,12,15,8,0,0,0,0,86,20.5
T N,1,30,8,15,12,0,0,0,0,92,20.5
T N,1,30,12,15,8,0,0,0,0,98,20.5
T N,1,30,10,3,8,0,0,0,0,44,20.5
T N,1,35,7,12,4,0,0,0,0,62,265
T N,1,35,4,12,7,0,0,0,0,56,265
T N,1,35,7,12,4,0,0,0,0,50,265
T N,1,35,4,12,7,0,0,0,0,44,265
T N,1,35,4,12,7,0,0,0,0,68,265
T N,1,35,7,12,4,0,0,0,0,74,265
T N,1,35,4,12,7,0,0,0,0,80,265
T N,1,35,7,12,4,0,0,0,0,86,265
T N,1,35,4,12,7,0,0,0,0,92,265
T N,1,35,7,12,4,0,0,0,0,98,265
T N,1,35,4,12,7,0,0,0,0,104,265
T N,1,35,7,12,4,0,0,0,0,110,265
T P,1,59,13,15,12,0,0,0,0,134,86
T P,1,59,12,15,13,0,0,0,0,128,86
T P,1,59,13,15,12,0,0,0,0,122,86
T P,1,59,12,15,13,0,0,0,0,116,86
T P,1,60,13,11,6,0,0,0,0,74,85.5
T P,1,60,6,11,13,0,0,0,0,80,85.5
T P,1,60,6,10,11,0,0,0,0,56,85.5
T P,1,60,13,11,6,0,0,0,0,62,85.5
T P,1,60,6,11,13,0,0,0,0,68,85.5
T P,1,60,13,14,6,0,0,0,0,86,85.5
T P,1,60,6,14,13,0,0,0,0,92,85.5
T P,1,60,13,14,6,0,0,0,0,98,85.5
T P,1,60,6,14,13,0,0,0,0,104,85.5
T P,1,60,10,3,6,0,0,0,0,44,85.5
T P,1,20,15,1,6,0,0,0,0,152,66.5
T P,1,20,6,15,14,0,0,0,0,146,66.5
T P,40,3,6,8,4,0,0,0,0,27,91
T P,1,80,5,13,4,0,0,0,0,62,180.5
T P,1,80,4,13,5,0,0,0,0,56,180.5
T P,1,80,5,13,4,0,0,0,0,50,180.5
T P,1,80,4,13,5,0,0,0,0,44,180.5
T P,1,80,4,13,5,0,0,0,0,68,180.5
T P,1,80,5,13,4,0,0,0,0,74,180.5
T P,1,80,4,13,5,0,0,0,0,80,180.5
T P,1,80,5,13,4,0,0,0,0,86,180.5
T P,1,80,4,13,5,0,0,0,0,92,180.5
T P,1,80,5,13,4,0,0,0,0,98,180.5
T P,1,80,4,13,5,0,0,0,0,104,180.5
T P,1,80,5,13,4,0,0,0,0,110,180.5
S 15,INTERNAL,0,mbk_sig7
S 14,INTERNAL,0,mbk_sig9
S 13,INTERNAL,0,mbk_sig8
S 12,INTERNAL,0,mbk_sig6
S 11,INTERNAL,0,mbk_sig4
S 10,INTERNAL,0,mbk_sig3
S 9,INTERNAL,0,mbk_sig12
S 8,EXTERNAL,0,vssi
S 7,EXTERNAL,0,vsse
S 6,EXTERNAL,0,vddi
S 5,EXTERNAL,0,vdde
S 4,EXTERNAL,0,pad
S 3,EXTERNAL,0,i
S 2,EXTERNAL,0,ck
S 1,EXTERNAL,0,b
EOF

21
alliance/share/cells/padlib/potw_sp.ap Normal file
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@ -0,0 +1,21 @@
V ALLIANCE : 3
H potw_sp,P,30/ 0/95
A 0,-7,172,493
C 154,-7,2,b,0,SOUTH,ALU1
C 154,-7,2,b,1,SOUTH,ALU2
C 46,-7,2,i,1,SOUTH,ALU2
C 46,-7,2,i,0,SOUTH,ALU1
C 172,6,12,ck,1,EAST,ALU2
C 172,40,40,vssi,1,EAST,ALU2
C 172,84,40,vddi,1,EAST,ALU2
C 172,168,120,vdde,1,EAST,ALU2
C 0,6,12,ck,0,WEST,ALU2
C 0,40,40,vssi,0,WEST,ALU2
C 0,84,40,vddi,0,WEST,ALU2
C 0,168,120,vdde,0,WEST,ALU2
C 0,296,120,vsse,0,WEST,ALU2
C 172,296,120,vsse,1,EAST,ALU2
C 88,493,1,pad,0,NORTH,ALU1
I 0,-7,palotw_sp,logic,NOSYM
I 0,356,padreal,pad,NOSYM
EOF

51
alliance/share/cells/padlib/potw_sp.vbe Normal file
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@ -0,0 +1,51 @@
-- VHDL data flow description generated from `potw_sp`
-- date : Thu Feb 23 17:09:58 1995
-- Entity Declaration
ENTITY potw_sp IS
GENERIC (
CONSTANT area : NATURAL := 86000; -- area
CONSTANT rup : NATURAL := 684404; -- rup
CONSTANT rdown : NATURAL := 49 -- rdown
);
PORT (
i : in BIT; -- i
b : in BIT; -- b
pad : out MUX_BIT BUS; -- pad
ck : in BIT; -- ck
vdde : in BIT; -- vdde
vddi : in BIT; -- vddi
vsse : in BIT; -- vsse
vssi : in BIT -- vssi
);
END potw_sp;
-- Architecture Declaration
ARCHITECTURE behaviour_data_flow OF potw_sp IS
SIGNAL b1 : BIT; -- b1
SIGNAL b2 : BIT; -- b2
SIGNAL b3 : BIT; -- b3
SIGNAL b4 : BIT; -- b4
SIGNAL b5 : BIT; -- b5
SIGNAL b6 : BIT; -- b6
BEGIN
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on potw_sp"
SEVERITY WARNING;
b6 <= b5;
b5 <= b4;
b4 <= b3;
b3 <= b2;
b2 <= b1;
b1 <= b;
label0 : BLOCK (b6 = '1')
BEGIN
pad <= GUARDED i;
END BLOCK label0;
END;

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V ALLIANCE : 4
H pow_sp,L,23/ 2/95
C i,UNKNOWN,EXTERNAL,2
C pad,UNKNOWN,EXTERNAL,3
C ck,UNKNOWN,EXTERNAL,1
C vdde,UNKNOWN,EXTERNAL,4
C vddi,UNKNOWN,EXTERNAL,5
C vsse,UNKNOWN,EXTERNAL,6
C vssi,UNKNOWN,EXTERNAL,7
T N,1,30,7,10,9,0,0,0,0,85,20.5
T N,1,30,10,2,7,0,0,0,0,73,20.5
T N,1,30,8,9,7,0,0,0,0,103,20.5
T N,1,30,7,9,8,0,0,0,0,97,20.5
T N,1,30,8,9,7,0,0,0,0,91,20.5
T N,1,30,7,9,8,0,0,0,0,109,20.5
T N,1,35,3,8,6,0,0,0,0,56,265
T N,1,35,6,8,3,0,0,0,0,62,265
T N,1,35,3,8,6,0,0,0,0,68,265
T N,1,35,6,8,3,0,0,0,0,74,265
T N,1,35,3,8,6,0,0,0,0,104,265
T N,1,35,6,8,3,0,0,0,0,110,265
T N,1,35,3,8,6,0,0,0,0,116,265
T N,1,35,6,8,3,0,0,0,0,122,265
T N,1,35,3,8,6,0,0,0,0,80,265
T N,1,35,6,8,3,0,0,0,0,86,265
T N,1,35,3,8,6,0,0,0,0,92,265
T N,1,35,6,8,3,0,0,0,0,98,265
T P,1,60,5,9,8,0,0,0,0,97,85.5
T P,1,60,10,2,5,0,0,0,0,73,85.5
T P,1,60,8,9,5,0,0,0,0,103,85.5
T P,1,60,8,9,5,0,0,0,0,91,85.5
T P,1,60,5,10,9,0,0,0,0,85,85.5
T P,1,60,5,9,8,0,0,0,0,109,85.5
T P,1,80,3,8,4,0,0,0,0,56,180.5
T P,1,80,4,8,3,0,0,0,0,62,180.5
T P,1,80,3,8,4,0,0,0,0,68,180.5
T P,1,80,4,8,3,0,0,0,0,74,180.5
T P,1,80,3,8,4,0,0,0,0,104,180.5
T P,1,80,4,8,3,0,0,0,0,110,180.5
T P,1,80,3,8,4,0,0,0,0,116,180.5
T P,1,80,4,8,3,0,0,0,0,122,180.5
T P,1,80,3,8,4,0,0,0,0,80,180.5
T P,1,80,4,8,3,0,0,0,0,86,180.5
T P,1,80,3,8,4,0,0,0,0,92,180.5
T P,1,80,4,8,3,0,0,0,0,98,180.5
S 10,INTERNAL,0,mbk_sig5
S 9,INTERNAL,0,mbk_sig4
S 8,INTERNAL,0,mbk_sig3
S 7,EXTERNAL,0,vssi
S 6,EXTERNAL,0,vsse
S 5,EXTERNAL,0,vddi
S 4,EXTERNAL,0,vdde
S 3,EXTERNAL,0,pad
S 2,EXTERNAL,0,i
S 1,EXTERNAL,0,ck
EOF

19
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V ALLIANCE : 3
H pow_sp,P,30/ 0/95
A 0,-7,172,493
C 75,-7,2,i,0,SOUTH,ALU1
C 75,-7,2,i,1,SOUTH,ALU2
C 172,6,12,ck,1,EAST,ALU2
C 172,40,40,vssi,1,EAST,ALU2
C 172,84,40,vddi,1,EAST,ALU2
C 172,168,120,vdde,1,EAST,ALU2
C 0,168,120,vdde,0,WEST,ALU2
C 0,84,40,vddi,0,WEST,ALU2
C 0,6,12,ck,0,WEST,ALU2
C 0,40,40,vssi,0,WEST,ALU2
C 0,296,120,vsse,0,WEST,ALU2
C 172,296,120,vsse,1,EAST,ALU2
C 88,493,1,pad,0,NORTH,ALU1
I 0,-7,palow_sp,logic,NOSYM
I 0,356,padreal,pad,NOSYM
EOF

39
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-- VHDL data flow description generated from `pow_sp`
-- date : Thu Feb 23 17:08:48 1995
-- Entity Declaration
ENTITY pow_sp IS
GENERIC (
CONSTANT area : NATURAL := 86000; -- area
CONSTANT cin_i : NATURAL := 191; -- cin_i
CONSTANT tpll_i : NATURAL := 1777; -- tpll_i
CONSTANT rdown_i : NATURAL := 30; -- rdown_i
CONSTANT tphh_i : NATURAL := 1608; -- tphh_i
CONSTANT rup_i : NATURAL := 32 -- rup_i
);
PORT (
i : in BIT; -- i
pad : out BIT; -- pad
ck : in BIT; -- ck
vdde : in BIT; -- vdde
vddi : in BIT; -- vddi
vsse : in BIT; -- vsse
vssi : in BIT -- vssi
);
END pow_sp;
-- Architecture Declaration
ARCHITECTURE behaviour_data_flow OF pow_sp IS
BEGIN
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on pow_sp"
SEVERITY WARNING;
pad <= i;
END;

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V ALLIANCE : 4
H pvdde_sp,L,23/ 2/95
C ck,UNKNOWN,EXTERNAL,1
C vdde,UNKNOWN,EXTERNAL,2
C vddi,UNKNOWN,EXTERNAL,3
C vsse,UNKNOWN,EXTERNAL,4
C vssi,UNKNOWN,EXTERNAL,5
S 5,EXTERNAL,0,vssi
S 4,EXTERNAL,0,vsse
S 3,EXTERNAL,0,vddi
S 2,EXTERNAL,0,vdde
S 1,EXTERNAL,0,ck
EOF

17
alliance/share/cells/padlib/pvdde_sp.ap Normal file
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@ -0,0 +1,17 @@
V ALLIANCE : 3
H pvdde_sp,P,30/ 0/95
A 0,0,172,500
C 172,13,12,ck,1,EAST,ALU2
C 172,47,40,vssi,1,EAST,ALU2
C 172,91,40,vddi,1,EAST,ALU2
C 172,175,120,vdde,1,EAST,ALU2
C 0,175,120,vdde,0,WEST,ALU2
C 0,91,40,vddi,0,WEST,ALU2
C 0,47,40,vssi,0,WEST,ALU2
C 0,13,12,ck,0,WEST,ALU2
C 0,303,120,vsse,0,WEST,ALU2
C 172,303,120,vsse,1,EAST,ALU2
C 88,500,1,vdde,2,NORTH,ALU1
I 0,0,palvdde_sp,logic,NOSYM
I 0,363,padreal,pad,NOSYM
EOF

30
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@ -0,0 +1,30 @@
-- VHDL data flow description generated from `pvdde_sp`
-- date : Thu Feb 23 17:10:19 1995
-- Entity Declaration
ENTITY pvdde_sp IS
GENERIC (
CONSTANT area : NATURAL := 86000 -- area
);
PORT (
ck : in BIT; -- ck
vdde : in BIT; -- vdde
vddi : in BIT; -- vddi
vsse : in BIT; -- vsse
vssi : in BIT -- vssi
);
END pvdde_sp;
-- Architecture Declaration
ARCHITECTURE behaviour_data_flow OF pvdde_sp IS
BEGIN
ASSERT ((((not (vssi) and not (vsse)) and vddi) and vdde) = '1')
REPORT "power supply is missing on pvdde_sp"
SEVERITY WARNING;
END;

28
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V ALLIANCE : 4
H pvddeck_sp,L,23/ 2/95
C cko,UNKNOWN,EXTERNAL,2
C ck,UNKNOWN,EXTERNAL,1
C vdde,UNKNOWN,EXTERNAL,3
C vddi,UNKNOWN,EXTERNAL,4
C vsse,UNKNOWN,EXTERNAL,5
C vssi,UNKNOWN,EXTERNAL,6
T N,1,20,6,7,2,0,0,0,0,70,42.5
T N,1,20,2,7,6,0,0,0,0,64,42.5
T N,1,20,7,1,6,0,0,0,0,52,42.5
T N,1,20,2,7,6,0,0,0,0,88,42.5
T N,1,20,6,7,2,0,0,0,0,82,42.5
T N,1,20,2,7,6,0,0,0,0,76,42.5
T P,1,40,7,1,4,0,0,0,0,52,92.5
T P,1,34,2,7,4,0,0,0,0,88,89.5
T P,1,34,4,7,2,0,0,0,0,82,89.5
T P,1,34,2,7,4,0,0,0,0,76,89.5
T P,1,34,4,7,2,0,0,0,0,70,89.5
T P,1,34,2,7,4,0,0,0,0,64,89.5
S 7,INTERNAL,0,mbk_sig4
S 6,EXTERNAL,0,vssi
S 5,EXTERNAL,0,vsse
S 4,EXTERNAL,0,vddi
S 3,EXTERNAL,0,vdde
S 2,EXTERNAL,0,cko
S 1,EXTERNAL,0,ck
EOF

23
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@ -0,0 +1,23 @@
V ALLIANCE : 3
H pvddeck_sp,P,30/ 0/95
A 0,0,172,500
C 172,13,12,ck,1,EAST,ALU2
C 172,47,40,vssi,1,EAST,ALU2
C 172,91,40,vddi,1,EAST,ALU2
C 172,175,120,vdde,1,EAST,ALU2
C 0,175,120,vdde,0,WEST,ALU2
C 0,91,40,vddi,0,WEST,ALU2
C 0,47,40,vssi,0,WEST,ALU2
C 0,13,12,ck,0,WEST,ALU2
C 67,0,2,cko,1,SOUTH,ALU2
C 67,0,2,cko,0,SOUTH,ALU1
C 79,0,2,cko,3,SOUTH,ALU2
C 79,0,2,cko,2,SOUTH,ALU1
C 91,0,2,cko,5,SOUTH,ALU2
C 91,0,2,cko,4,SOUTH,ALU1
C 172,303,120,vsse,1,EAST,ALU2
C 0,303,120,vsse,0,WEST,ALU2
C 88,500,1,vdde,2,NORTH,ALU1
I 0,0,palvddeck_sp,logic,NOSYM
I 0,363,padreal,pad,NOSYM
EOF

40
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@ -0,0 +1,40 @@
-- VHDL data flow description generated from `pvddeck_sp`
-- date : Thu Feb 23 17:11:45 1995
-- Entity Declaration
ENTITY pvddeck_sp IS
GENERIC (
CONSTANT area : NATURAL := 86000; -- area
CONSTANT cin_ck : NATURAL := 127; -- cin_ck
CONSTANT tpll_ck : NATURAL := 1055; -- tpll_ck
CONSTANT rdown_ck : NATURAL := 126; -- rdown_ck
CONSTANT tphh_ck : NATURAL := 963; -- tphh_ck
CONSTANT rup_ck : NATURAL := 183 -- rup_ck
);
PORT (
cko : out WOR_BIT BUS; -- cko
ck : in BIT; -- ck
vdde : in BIT; -- vdde
vddi : in BIT; -- vddi
vsse : in BIT; -- vsse
vssi : in BIT -- vssi
);
END pvddeck_sp;
-- Architecture Declaration
ARCHITECTURE behaviour_data_flow OF pvddeck_sp IS
BEGIN
ASSERT ((((not (vssi) and not (vsse)) and vddi) and vdde) = '1')
REPORT "power supply is missing on pvddeck_sp"
SEVERITY WARNING;
label0 : BLOCK ('1' = '1')
BEGIN
cko <= GUARDED ck;
END BLOCK label0;
END;

13
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V ALLIANCE : 4
H pvddi_sp,L,23/ 2/95
C ck,UNKNOWN,EXTERNAL,1
C vdde,UNKNOWN,EXTERNAL,2
C vddi,UNKNOWN,EXTERNAL,3
C vsse,UNKNOWN,EXTERNAL,4
C vssi,UNKNOWN,EXTERNAL,5
S 5,EXTERNAL,0,vssi
S 4,EXTERNAL,0,vsse
S 3,EXTERNAL,0,vddi
S 2,EXTERNAL,0,vdde
S 1,EXTERNAL,0,ck
EOF

19
alliance/share/cells/padlib/pvddi_sp.ap Normal file
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@ -0,0 +1,19 @@
V ALLIANCE : 3
H pvddi_sp,P,30/ 0/95
A 0,0,172,500
C 86,0,100,vddi,0,SOUTH,ALU1
C 86,0,100,vddi,1,SOUTH,ALU2
C 0,47,40,vssi,0,WEST,ALU2
C 0,175,120,vdde,0,WEST,ALU2
C 0,91,40,vddi,2,WEST,ALU2
C 0,13,12,ck,0,WEST,ALU2
C 172,175,120,vdde,1,EAST,ALU2
C 172,91,40,vddi,3,EAST,ALU2
C 172,47,40,vssi,1,EAST,ALU2
C 172,13,12,ck,1,EAST,ALU2
C 0,303,120,vsse,0,WEST,ALU2
C 172,303,120,vsse,1,EAST,ALU2
C 88,500,1,vddi,4,NORTH,ALU1
I 0,0,palvddi_sp,logic,NOSYM
I 0,363,padreal,pad,NOSYM
EOF

30
alliance/share/cells/padlib/pvddi_sp.vbe Normal file
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@ -0,0 +1,30 @@
-- VHDL data flow description generated from `pvddi_sp`
-- date : Thu Feb 23 17:11:01 1995
-- Entity Declaration
ENTITY pvddi_sp IS
GENERIC (
CONSTANT area : NATURAL := 86000 -- area
);
PORT (
ck : in BIT; -- ck
vdde : in BIT; -- vdde
vddi : in BIT; -- vddi
vsse : in BIT; -- vsse
vssi : in BIT -- vssi
);
END pvddi_sp;
-- Architecture Declaration
ARCHITECTURE behaviour_data_flow OF pvddi_sp IS
BEGIN
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on pvddi_sp"
SEVERITY WARNING;
END;

29
alliance/share/cells/padlib/pvddick_sp.al Normal file
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@ -0,0 +1,29 @@
V ALLIANCE : 4
H pvddick_sp,L,23/ 2/95
C cko,UNKNOWN,EXTERNAL,2
C ck,UNKNOWN,EXTERNAL,1
C vdde,UNKNOWN,EXTERNAL,3
C vddi,UNKNOWN,EXTERNAL,4
C vsse,UNKNOWN,EXTERNAL,5
C vssi,UNKNOWN,EXTERNAL,6
T N,1,25,2,8,6,0,0,0,0,158,45
T N,1,10,8,1,6,0,0,0,0,146,52.5
T N,1,25,6,8,2,0,0,0,0,152,45
T N,1,25,2,7,6,0,0,0,0,14,45
T N,1,10,7,1,6,0,0,0,0,26,52.5
T N,1,25,6,7,2,0,0,0,0,20,45
T P,1,20,4,1,8,0,0,0,0,143,89.5
T P,1,50,2,8,4,0,0,0,0,149,104.5
T P,1,50,4,8,2,0,0,0,0,155,104.5
T P,1,20,4,1,7,0,0,0,0,29,89.5
T P,1,50,2,7,4,0,0,0,0,23,104.5
T P,1,50,4,7,2,0,0,0,0,17,104.5
S 8,INTERNAL,0,mbk_sig6
S 7,INTERNAL,0,mbk_sig5
S 6,EXTERNAL,0,vssi
S 5,EXTERNAL,0,vsse
S 4,EXTERNAL,0,vddi
S 3,EXTERNAL,0,vdde
S 2,EXTERNAL,0,cko
S 1,EXTERNAL,0,ck
EOF

23
alliance/share/cells/padlib/pvddick_sp.ap Normal file
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@ -0,0 +1,23 @@
V ALLIANCE : 3
H pvddick_sp,P,30/ 0/95
A 0,0,172,500
C 86,0,100,vddi,1,SOUTH,ALU2
C 86,0,100,vddi,0,SOUTH,ALU1
C 17,0,2,cko,0,SOUTH,ALU1
C 17,0,2,cko,1,SOUTH,ALU2
C 172,13,12,ck,1,EAST,ALU2
C 172,47,40,vssi,1,EAST,ALU2
C 172,91,40,vddi,3,EAST,ALU2
C 172,175,120,vdde,1,EAST,ALU2
C 0,175,120,vdde,0,WEST,ALU2
C 0,91,40,vddi,2,WEST,ALU2
C 0,47,40,vssi,0,WEST,ALU2
C 0,13,12,ck,0,WEST,ALU2
C 155,0,1,cko,2,SOUTH,ALU1
C 155,0,2,cko,2,SOUTH,ALU2
C 172,303,120,vsse,1,EAST,ALU2
C 0,303,120,vsse,0,WEST,ALU2
C 88,500,1,vddi,4,NORTH,ALU1
I 0,0,palvddick_sp,logic,NOSYM
I 0,363,padreal,pad,NOSYM
EOF

40
alliance/share/cells/padlib/pvddick_sp.vbe Normal file
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@ -0,0 +1,40 @@
-- VHDL data flow description generated from `pvddick_sp`
-- date : Thu Feb 23 17:12:35 1995
-- Entity Declaration
ENTITY pvddick_sp IS
GENERIC (
CONSTANT area : NATURAL := 86000; -- area
CONSTANT cin_ck : NATURAL := 127; -- cin_ck
CONSTANT tpll_ck : NATURAL := 1235; -- tpll_ck
CONSTANT rdown_ck : NATURAL := 253; -- rdown_ck
CONSTANT tphh_ck : NATURAL := 1109; -- tphh_ck
CONSTANT rup_ck : NATURAL := 311 -- rup_ck
);
PORT (
cko : out WOR_BIT BUS; -- cko
ck : in BIT; -- ck
vdde : in BIT; -- vdde
vddi : in BIT; -- vddi
vsse : in BIT; -- vsse
vssi : in BIT -- vssi
);
END pvddick_sp;
-- Architecture Declaration
ARCHITECTURE behaviour_data_flow OF pvddick_sp IS
BEGIN
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on pvddick_sp"
SEVERITY WARNING;
label0 : BLOCK ('1' = '1')
BEGIN
cko <= GUARDED ck;
END BLOCK label0;
END;

13
alliance/share/cells/padlib/pvsse_sp.al Normal file
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@ -0,0 +1,13 @@
V ALLIANCE : 4
H pvsse_sp,L,23/ 2/95
C ck,UNKNOWN,EXTERNAL,1
C vdde,UNKNOWN,EXTERNAL,2
C vddi,UNKNOWN,EXTERNAL,3
C vsse,UNKNOWN,EXTERNAL,4
C vssi,UNKNOWN,EXTERNAL,5
S 5,EXTERNAL,0,vssi
S 4,EXTERNAL,0,vsse
S 3,EXTERNAL,0,vddi
S 2,EXTERNAL,0,vdde
S 1,EXTERNAL,0,ck
EOF

17
alliance/share/cells/padlib/pvsse_sp.ap Normal file
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@ -0,0 +1,17 @@
V ALLIANCE : 3
H pvsse_sp,P,30/ 0/95
A 0,0,172,500
C 172,13,12,ck,1,EAST,ALU2
C 172,47,40,vssi,1,EAST,ALU2
C 172,91,40,vddi,1,EAST,ALU2
C 172,175,120,vdde,1,EAST,ALU2
C 0,175,120,vdde,0,WEST,ALU2
C 0,91,40,vddi,0,WEST,ALU2
C 0,47,40,vssi,0,WEST,ALU2
C 0,13,12,ck,0,WEST,ALU2
C 0,303,120,vsse,0,WEST,ALU2
C 172,303,120,vsse,1,EAST,ALU2
C 88,500,1,vsse,2,NORTH,ALU1
I 0,0,palvsse_sp,logic,NOSYM
I 0,363,padreal,pad,NOSYM
EOF

30
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@ -0,0 +1,30 @@
-- VHDL data flow description generated from `pvsse_sp`
-- date : Thu Feb 23 17:10:40 1995
-- Entity Declaration
ENTITY pvsse_sp IS
GENERIC (
CONSTANT area : NATURAL := 86000 -- area
);
PORT (
ck : in BIT; -- ck
vdde : in BIT; -- vdde
vddi : in BIT; -- vddi
vsse : in BIT; -- vsse
vssi : in BIT -- vssi
);
END pvsse_sp;
-- Architecture Declaration
ARCHITECTURE behaviour_data_flow OF pvsse_sp IS
BEGIN
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on pvsse_sp"
SEVERITY WARNING;
END;

28
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@ -0,0 +1,28 @@
V ALLIANCE : 4
H pvsseck_sp,L,23/ 2/95
C cko,UNKNOWN,EXTERNAL,2
C ck,UNKNOWN,EXTERNAL,1
C vdde,UNKNOWN,EXTERNAL,3
C vddi,UNKNOWN,EXTERNAL,4
C vsse,UNKNOWN,EXTERNAL,5
C vssi,UNKNOWN,EXTERNAL,6
T N,1,20,6,7,2,0,0,0,0,70,42.5
T N,1,20,2,7,6,0,0,0,0,64,42.5
T N,1,20,7,1,6,0,0,0,0,52,42.5
T N,1,20,2,7,6,0,0,0,0,88,42.5
T N,1,20,6,7,2,0,0,0,0,82,42.5
T N,1,20,2,7,6,0,0,0,0,76,42.5
T P,1,40,7,1,4,0,0,0,0,52,92.5
T P,1,34,2,7,4,0,0,0,0,88,89.5
T P,1,34,4,7,2,0,0,0,0,82,89.5
T P,1,34,2,7,4,0,0,0,0,76,89.5
T P,1,34,4,7,2,0,0,0,0,70,89.5
T P,1,34,2,7,4,0,0,0,0,64,89.5
S 7,INTERNAL,0,mbk_sig4
S 6,EXTERNAL,0,vssi
S 5,EXTERNAL,0,vsse
S 4,EXTERNAL,0,vddi
S 3,EXTERNAL,0,vdde
S 2,EXTERNAL,0,cko
S 1,EXTERNAL,0,ck
EOF

23
alliance/share/cells/padlib/pvsseck_sp.ap Normal file
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V ALLIANCE : 3
H pvsseck_sp,P,30/ 0/95
A 0,0,172,500
C 172,13,12,ck,1,EAST,ALU2
C 172,47,40,vssi,1,EAST,ALU2
C 172,91,40,vddi,1,EAST,ALU2
C 172,175,120,vdde,1,EAST,ALU2
C 0,175,120,vdde,0,WEST,ALU2
C 0,91,40,vddi,0,WEST,ALU2
C 0,47,40,vssi,0,WEST,ALU2
C 0,13,12,ck,0,WEST,ALU2
C 67,0,2,cko,1,SOUTH,ALU2
C 67,0,2,cko,0,SOUTH,ALU1
C 79,0,2,cko,3,SOUTH,ALU2
C 79,0,2,cko,2,SOUTH,ALU1
C 91,0,2,cko,5,SOUTH,ALU2
C 91,0,2,cko,4,SOUTH,ALU1
C 0,303,120,vsse,0,WEST,ALU2
C 172,303,120,vsse,1,EAST,ALU2
C 88,500,1,vsse,2,NORTH,ALU1
I 0,0,palvsseck_sp,logic,NOSYM
I 0,363,padreal,pad,NOSYM
EOF

40
alliance/share/cells/padlib/pvsseck_sp.vbe Normal file
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-- VHDL data flow description generated from `pvsseck_sp`
-- date : Thu Feb 23 17:12:08 1995
-- Entity Declaration
ENTITY pvsseck_sp IS
GENERIC (
CONSTANT area : NATURAL := 86000; -- area
CONSTANT cin_ck : NATURAL := 127; -- cin_ck
CONSTANT tpll_ck : NATURAL := 1055; -- tpll_ck
CONSTANT rdown_ck : NATURAL := 126; -- rdown_ck
CONSTANT tphh_ck : NATURAL := 963; -- tphh_ck
CONSTANT rup_ck : NATURAL := 183 -- rup_ck
);
PORT (
cko : out WOR_BIT BUS; -- cko
ck : in BIT; -- ck
vdde : in BIT; -- vdde
vddi : in BIT; -- vddi
vsse : in BIT; -- vsse
vssi : in BIT -- vssi
);
END pvsseck_sp;
-- Architecture Declaration
ARCHITECTURE behaviour_data_flow OF pvsseck_sp IS
BEGIN
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on pvsseck_sp"
SEVERITY WARNING;
label0 : BLOCK ('1' = '1')
BEGIN
cko <= GUARDED ck;
END BLOCK label0;
END;

13
alliance/share/cells/padlib/pvssi_sp.al Normal file
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V ALLIANCE : 4
H pvssi_sp,L,23/ 2/95
C ck,UNKNOWN,EXTERNAL,1
C vdde,UNKNOWN,EXTERNAL,2
C vddi,UNKNOWN,EXTERNAL,3
C vsse,UNKNOWN,EXTERNAL,4
C vssi,UNKNOWN,EXTERNAL,5
S 5,EXTERNAL,0,vssi
S 4,EXTERNAL,0,vsse
S 3,EXTERNAL,0,vddi
S 2,EXTERNAL,0,vdde
S 1,EXTERNAL,0,ck
EOF

19
alliance/share/cells/padlib/pvssi_sp.ap Normal file
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V ALLIANCE : 3
H pvssi_sp,P,30/ 0/95
A 0,0,172,500
C 86,0,100,vssi,1,SOUTH,ALU2
C 86,0,100,vssi,0,SOUTH,ALU1
C 0,13,12,ck,0,WEST,ALU2
C 0,47,40,vssi,2,WEST,ALU2
C 0,91,40,vddi,0,WEST,ALU2
C 0,175,120,vdde,0,WEST,ALU2
C 172,175,120,vdde,1,EAST,ALU2
C 172,91,40,vddi,1,EAST,ALU2
C 172,47,40,vssi,3,EAST,ALU2
C 172,13,12,ck,1,EAST,ALU2
C 0,303,120,vsse,0,WEST,ALU2
C 172,303,120,vsse,1,EAST,ALU2
C 88,500,1,vssi,4,NORTH,ALU1
I 0,0,palvssi_sp,logic,NOSYM
I 0,363,padreal,pad,NOSYM
EOF

30
alliance/share/cells/padlib/pvssi_sp.vbe Normal file
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-- VHDL data flow description generated from `pvssi_sp`
-- date : Thu Feb 23 17:11:22 1995
-- Entity Declaration
ENTITY pvssi_sp IS
GENERIC (
CONSTANT area : NATURAL := 86000 -- area
);
PORT (
ck : in BIT; -- ck
vdde : in BIT; -- vdde
vddi : in BIT; -- vddi
vsse : in BIT; -- vsse
vssi : in BIT -- vssi
);
END pvssi_sp;
-- Architecture Declaration
ARCHITECTURE behaviour_data_flow OF pvssi_sp IS
BEGIN
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on pvssi_sp"
SEVERITY WARNING;
END;

29
alliance/share/cells/padlib/pvssick_sp.al Normal file
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V ALLIANCE : 4
H pvssick_sp,L,23/ 2/95
C cko,UNKNOWN,EXTERNAL,2
C ck,UNKNOWN,EXTERNAL,1
C vdde,UNKNOWN,EXTERNAL,3
C vddi,UNKNOWN,EXTERNAL,4
C vsse,UNKNOWN,EXTERNAL,5
C vssi,UNKNOWN,EXTERNAL,6
T N,1,25,2,8,6,0,0,0,0,158,45
T N,1,10,8,1,6,0,0,0,0,146,52.5
T N,1,25,6,8,2,0,0,0,0,152,45
T N,1,25,2,7,6,0,0,0,0,14,45
T N,1,10,7,1,6,0,0,0,0,26,52.5
T N,1,25,6,7,2,0,0,0,0,20,45
T P,1,20,4,1,8,0,0,0,0,143,89.5
T P,1,50,2,8,4,0,0,0,0,149,104.5
T P,1,50,4,8,2,0,0,0,0,155,104.5
T P,1,20,4,1,7,0,0,0,0,29,89.5
T P,1,50,2,7,4,0,0,0,0,23,104.5
T P,1,50,4,7,2,0,0,0,0,17,104.5
S 8,INTERNAL,0,mbk_sig5
S 7,INTERNAL,0,mbk_sig4
S 6,EXTERNAL,0,vssi
S 5,EXTERNAL,0,vsse
S 4,EXTERNAL,0,vddi
S 3,EXTERNAL,0,vdde
S 2,EXTERNAL,0,cko
S 1,EXTERNAL,0,ck
EOF

23
alliance/share/cells/padlib/pvssick_sp.ap Normal file
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V ALLIANCE : 3
H pvssick_sp,P,30/ 0/95
A 0,0,172,500
C 86,0,100,vssi,1,SOUTH,ALU2
C 86,0,100,vssi,0,SOUTH,ALU1
C 17,0,2,cko,0,SOUTH,ALU1
C 17,0,2,cko,1,SOUTH,ALU2
C 172,91,40,vddi,1,EAST,ALU2
C 172,47,40,vssi,3,EAST,ALU2
C 172,13,12,ck,1,EAST,ALU2
C 172,175,120,vdde,1,EAST,ALU2
C 0,175,120,vdde,0,WEST,ALU2
C 0,91,40,vddi,0,WEST,ALU2
C 0,47,40,vssi,2,WEST,ALU2
C 0,13,12,ck,0,WEST,ALU2
C 155,0,2,cko,2,SOUTH,ALU1
C 155,0,2,cko,3,SOUTH,ALU2
C 172,303,120,vsse,1,EAST,ALU2
C 0,303,120,vsse,0,WEST,ALU2
C 88,500,1,vssi,4,NORTH,ALU1
I 0,0,palvssick_sp,logic,NOSYM
I 0,363,padreal,pad,NOSYM
EOF

40
alliance/share/cells/padlib/pvssick_sp.vbe Normal file
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-- VHDL data flow description generated from `pvssick_sp`
-- date : Thu Feb 23 17:13:01 1995
-- Entity Declaration
ENTITY pvssick_sp IS
GENERIC (
CONSTANT area : NATURAL := 86000; -- area
CONSTANT cin_ck : NATURAL := 127; -- cin_ck
CONSTANT tpll_ck : NATURAL := 1235; -- tpll_ck
CONSTANT rdown_ck : NATURAL := 253; -- rdown_ck
CONSTANT tphh_ck : NATURAL := 1109; -- tphh_ck
CONSTANT rup_ck : NATURAL := 311 -- rup_ck
);
PORT (
cko : out WOR_BIT BUS; -- cko
ck : in BIT; -- ck
vdde : in BIT; -- vdde
vddi : in BIT; -- vddi
vsse : in BIT; -- vsse
vssi : in BIT -- vssi
);
END pvssick_sp;
-- Architecture Declaration
ARCHITECTURE behaviour_data_flow OF pvssick_sp IS
BEGIN
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on pvssick_sp"
SEVERITY WARNING;
label0 : BLOCK ('1' = '1')
BEGIN
cko <= GUARDED ck;
END BLOCK label0;
END;