Adding documentation on the shift/rotation operator.
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@ -31,25 +31,24 @@
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<refsect1>
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<title> Description </title>
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<para> Generate a &N; bits shifter named &modelname;.
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<para> Generate a &N; bits shifter with name &modelname;.
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</para>
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<para> How it works :
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<itemizedlist>
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<listitem>
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<para> if <literal>op[0]</literal> signal is set to &one; perform
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a right shift, left shift otherwise.
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<para> if the <literal>op[0]</literal> signal is set to &one; performs
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a right shift, performs a left shift otherwise.
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</para>
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</listitem>
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<listitem>
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<para> if <literal>op[1]</literal> signal is set to &one; perform
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a sign extention, i.e. an arithmetic shift (only meaningful in case
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of a right shift).
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<para> if the <literal>op[1]</literal> signal is set to &one; performs
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an arithmetic shift (only meaningful in case of a right shift).
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</para>
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</listitem>
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<listitem>
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<para> &shamt; : specify the shift amount. The wide of this signal
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(&Y;) is computed from the operator's wide :
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<literal>Y = log<subscript>2</subscript>(N) - 1</literal>.
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<para> &shamt; : specifies the shift amount. The width of this signal
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(&Y;) is computed from the operator's width :
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<literal>Y = ceil(log<subscript>2</subscript>(N)) - 1</literal>.
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</para>
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</listitem>
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</itemizedlist>
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@ -67,10 +66,10 @@
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<para> &shamt; : the shift amount (input, &Y; bits). </para>
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</listitem>
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<listitem>
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<para> &i0; : value to shift (input, &N; bits). </para>
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<para> &i; : value to shift (input, &N; bits). </para>
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</listitem>
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<listitem>
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<para> &q; : output (&N; bits). </para>
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<para> &o; : output (&N; bits). </para>
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</listitem>
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<listitem>
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<para> <literal>vdd</literal> : power. </para>
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@ -89,20 +88,17 @@
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<para>
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<programlisting>
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GENLIB_MACRO(DPGEN_SHIFT, "model_shift_32"
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, F_BEHAV|F_PLACE
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, 32
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);
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GENLIB_MACRO(DPGEN_SHIFT, "model_shift_32",
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F_BEHAV|F_PLACE,
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32);
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GENLIB_LOINS( "model_shift_32"
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, "instance1_shift_32"
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, "add_sub"
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, "op[1:0]"
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, "shamt[4:0]"
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, "i0[31:0]"
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, "q[31:0]"
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, "vdd", "vss", NULL
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);
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GENLIB_LOINS("model_shift_32",
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"instance1_shift_32",
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"op[1:0]",
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"shamt[4:0]",
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"x[31:0]",
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"y[31:0]",
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"vdd", "vss", NULL);
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</programlisting>
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</para>
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@ -0,0 +1,115 @@
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<refentry id="DPGEN-SHROT">
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<?dbhtml filename="man_dpgen_shrot.html">
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<refmeta>
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<refentrytitle>DPGEN_SHROT</refentrytitle>
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<manvolnum>3</manvolnum>
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<refmiscinfo>ASIM/LIP6</refmiscinfo>
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</refmeta>
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<refnamediv>
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<refname> DPGEN_SHROT </refname>
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<refpurpose> Shift/Rotation Macro-Generator </refpurpose>
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</refnamediv>
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<refsynopsisdiv>
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<funcsynopsis>
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<funcsynopsisinfo>#include <genlib.h></funcsynopsisinfo>
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<funcprototype>
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<funcdef>void <function>GENLIB_MACRO</function></funcdef>
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<paramdef>DPGEN_SHROT</paramdef>
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<paramdef>char *<parameter>modelname</parameter></paramdef>
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<paramdef>long <parameter>flags</parameter></paramdef>
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<paramdef>long <parameter>N</parameter></paramdef>
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</funcprototype>
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</funcsynopsis>
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</refsynopsisdiv>
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<refsect1>
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<title> Description </title>
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<para> Generate a &N; bits shift/rotation operator with name &modelname;.
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</para>
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<para> How it works :
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<itemizedlist>
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<listitem>
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<para> if the <literal>op[0]</literal> signal is set to &one;
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right shift/rotation occurs, otherwise left shift/rotation
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occurs.
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</para>
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</listitem>
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<listitem>
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<para> if the <literal>op[1]</literal> signal is set to &one; performs
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an arithmetic shift (only meaningful in case of a right shift).
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</para>
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</listitem>
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<listitem>
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<para> if the <literal>op[2]</literal> signal is set to &one; performs
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a rotation, otherwise performs a shift.
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</para>
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</listitem>
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<listitem>
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<para> &shamt; : specifies the shift amount. The width of this signal
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(&Y;) is computed from the operator's width :
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<literal>Y = ceil(log<subscript>2</subscript>(N)) - 1</literal>.
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</para>
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</listitem>
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</itemizedlist>
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</para>
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<refsect2>
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<title> Terminal Names </title>
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<orderedlist>
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<listitem>
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<para> &op; : select the kind of shift/rotation (input, 3 bit).
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</para>
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</listitem>
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<listitem>
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<para> &shamt; : the shift amount (input, &Y; bits). </para>
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</listitem>
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<listitem>
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<para> &i; : value to shift (input, &N; bits). </para>
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</listitem>
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<listitem>
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<para> &o; : output (&N; bits). </para>
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</listitem>
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<listitem>
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<para> <literal>vdd</literal> : power. </para>
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</listitem>
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<listitem>
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<para> <literal>vss</literal> : ground. </para>
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</listitem>
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</orderedlist>
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</refsect2>
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</refsect1>
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<refsect1>
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<title> Example </title>
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<para>
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<programlisting>
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GENLIB_MACRO(DPGEN_SHROT, "rot25",
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F_BEHAV|F_PLACE,
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25);
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GENLIB_LOINS("rot25",
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"instance1_rot25",
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"op[2:0]",
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"shamt[4:0]",
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"x[31:0]",
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"y[31:0]",
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"vdd", "vss", NULL);
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</programlisting>
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</para>
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</refsect1>
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&man-dpgen-see-also;
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</refentry>
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@ -258,6 +258,10 @@
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<refentrytitle>DPGEN_SHIFT</refentrytitle>
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<manvolnum>3</manvolnum>
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</citerefentry></link></para></listitem>
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<listitem><para><link linkend="DPGEN-SHROT"><citerefentry>
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<refentrytitle>DPGEN_SHROT</refentrytitle>
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<manvolnum>3</manvolnum>
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</citerefentry></link></para></listitem>
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</itemizedlist>
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</para>
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</listitem>
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