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@ -11,13 +11,56 @@ MOKA \- Model checker ancestor
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.SH DESCRIPTION
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.br
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\fBmoka\fp is a CTL model checker.
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\fBmoka\fP is a CTL model checker.
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.br
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Made to run on FSM or RTL descriptions, \fBmoka\fP supports the same VHDL subset
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as syf or boom (for further informations about this subset see SYF(1), FSM(5), VBE(5) ).
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\fBmoka\fP uses a Reduced Ordered Binary Decision Diagrams representation and
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verifies CTL formulae (see CTL(5) for CTL file format details).
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as syf or boom (for further informations about this subset see SYF(1), BOOM(1), FSM(5), VBE(5) ).
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Nevertheless \fBmoka\fP imposes that each register of the behavioral description have
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the same clock condition and that there are no tristate or multiplexed buses.
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In particular VHDL type MUX_BIT and WOR_BIT aren't not supported.
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.br
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First of all \fBmoka\fP build the fonction transition of the FSM using
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a Reduced Ordered Binary Decision Diagrams representation.
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.br
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It then applies the initial condition to find the first state (keyword INITIAL
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in the CTL(5) file format).
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.br
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After it computes a symbolic simulation of the FSM in order
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to find all reachable states. This computation takes into account the
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assumptions conditions (ASSUME keyword in the CTL(5) file format).
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.br
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\fBmoka\fP finally verifies one by one each CTL formulae.
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(see CTL(5) for CTL file format details).
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.SH CTL OPERATORS
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.PP
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For each CTL sub-expression \fBmoka\fP will return the set of states that verifies
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the formula. For example EX(p) will return the set of reachable states that verifies
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EX(p).
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.br
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CTL operators :
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.RS
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.br
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EX(p) : returns all states which have almost one primary state successor that
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verifies \fBp\fP.
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.br
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EU(p,q) : returns all states that are the root of almost one path, such that \fBp\fP is true
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until \fBq\fP is always true.
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.br
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EG(p) : returns all states that are the root of almost one path, such that \fBp\fP is always true.
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AX(p) : returns all states which have all their primary state successor that
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verifies \fBp\fP.
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AU(p,q) : returns all states that are the root of only pathes from which \fBp\fP is true
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until \fBq\fP is always true.
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.br
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AG(p) : returns all states that are the root of only pathes, such that \fBp\fP is always true.
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.RE
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.br
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.SH ENVIRONMENT VARIABLES
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.br
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@ -40,7 +83,8 @@ standard output.
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\-D
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Sets debug mode on. Each step of the model checking is detailed on the
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standard output.
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standard output. In particular all states set are displayed for each
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CTL sub-expression.
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.br
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\-B
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