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Replacement of padlib (for ring). Ring reads the MBK_WIRESETTING. 

* Bug: In Nero & Ocp, fix small compilation issues under Cygwing.
* Bug: In alc_env.sh.in & alc_env.csh.in, the man pages are under
    TOP/share/man and no longer TOP/man.
* Change: In all the supplied RDS files, add the MBK_WIRESETTING
    table (cmos.rds, techno-symb.rds, techno-035.rds).
* New: In ring, make uses of the MBK_WIRESETTING_TABLE.
* New: In cells/pxlib, add the '_sp' variant of the pads to emulate
    the old padlib. This way we have only one "true" to maintain,
    not two kind. The '_sp' variant is an encapsulation of the '_px'
    one. Basically it provides connectors *on* the abutment box
    instead of over-the-cell (and inside AB) terminals.

Contributed by N. Shimizu & F. Wajsburt.

ATTENTION: At this point there is a problem between ring and the
           '_sp' emulated version of the pad. Ring doesn't seem
           to see correctly the the power rails from the pads and
           made short circuits with ordinary signals...
             It is very risky to use this version until this issue
           is resolved.
This commit is contained in:
Jean-Paul Chaput 2014-09-11 18:03:54 +02:00
parent 9a6dcc9cc9
commit 91220e7782
52 changed files with 10312 additions and 9273 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
alliance/src/cells/src/pxlib/CATAL
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@ -11,3 +11,16 @@ pvsseck_px C
pvsse_px C
pvssick_px C
pvssi_px C
pck_sp C
piot_sp C
pi_sp C
po_sp C
pot_sp C
pvddeck_sp C
pvdde_sp C
pvddick_sp C
pvddi_sp C
pvsseck_sp C
pvsse_sp C
pvssick_sp C
pvssi_sp C

28
alliance/src/cells/src/pxlib/Makefile.am
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@ -29,7 +29,33 @@ pxlib_DATA=CATAL \
pvssick_px.ap \
pvssick_px.vbe \
pvssi_px.ap \
pvssi_px.vbe
pvssi_px.vbe \
pck_sp.ap \
pck_sp.vbe \
piot_sp.ap \
piot_sp.vbe \
pi_sp.ap \
pi_sp.vbe \
po_sp.ap \
po_sp.vbe \
pot_sp.ap \
pot_sp.vbe \
pvddeck_sp.ap \
pvddeck_sp.vbe \
pvdde_sp.ap \
pvdde_sp.vbe \
pvddick_sp.ap \
pvddick_sp.vbe \
pvddi_sp.ap \
pvddi_sp.vbe \
pvsseck_sp.ap \
pvsseck_sp.vbe \
pvsse_sp.ap \
pvsse_sp.vbe \
pvssick_sp.ap \
pvssick_sp.vbe \
pvssi_sp.ap \
pvssi_sp.vbe
EXTRA_DIST=$(pxlib_DATA)

2742
alliance/src/cells/src/pxlib/pck_px.ap
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File diff suppressed because it is too large Load Diff

55
alliance/src/cells/src/pxlib/pck_sp.ap Normal file
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@ -0,0 +1,55 @@
V ALLIANCE : 6
H pck_sp,P, 4/ 9/2014,100
A 0,0,20000,40000
C 20000,2000,500,ck,3,EAST,ALU3
C 0,2000,500,ck,2,WEST,ALU3
C 20000,5000,1200,vddi,1,EAST,ALU3
C 20000,3500,1200,vssi,1,EAST,ALU3
C 20000,17000,1200,vdde,5,EAST,ALU3
C 20000,14000,1200,vdde,3,EAST,ALU3
C 20000,11000,1200,vdde,1,EAST,ALU3
C 20000,9500,1200,vsse,1,EAST,ALU3
C 20000,12500,1200,vsse,3,EAST,ALU3
C 20000,15500,1200,vsse,5,EAST,ALU3
C 20000,18500,1200,vsse,7,EAST,ALU3
C 0,17000,1200,vdde,4,WEST,ALU3
C 0,14000,1200,vdde,2,WEST,ALU3
C 0,11000,1200,vdde,0,WEST,ALU3
C 0,9500,1200,vsse,0,WEST,ALU3
C 0,5000,1200,vddi,0,WEST,ALU3
C 0,3500,1200,vssi,0,WEST,ALU3
C 0,12500,1200,vsse,2,WEST,ALU3
C 0,15500,1200,vsse,4,WEST,ALU3
C 0,18500,1200,vsse,6,WEST,ALU3
C 20000,8000,1200,vddi,3,EAST,ALU3
C 20000,6500,1200,vssi,3,EAST,ALU3
C 0,6500,1200,vssi,2,WEST,ALU3
C 0,8000,1200,vddi,2,WEST,ALU3
C 10000,40000,100,pad,0,NORTH,ALU1
S 0,6500,400,6500,1200,*,RIGHT,ALU3
S 0,5000,400,5000,1200,*,RIGHT,ALU3
S 0,3500,400,3500,1200,*,RIGHT,ALU3
S 0,2000,400,2000,500,*,RIGHT,ALU3
S 0,18500,400,18500,1200,*,RIGHT,ALU3
S 0,17000,400,17000,1200,*,RIGHT,ALU3
S 0,12500,400,12500,1200,*,RIGHT,ALU3
S 0,15500,400,15500,1200,*,RIGHT,ALU3
S 0,14000,400,14000,1200,*,RIGHT,ALU3
S 0,11000,400,11000,1200,*,RIGHT,ALU3
S 0,9500,400,9500,1200,*,RIGHT,ALU3
S 0,8000,400,8000,1200,*,RIGHT,ALU3
S 19600,2000,20000,2000,500,*,RIGHT,ALU3
S 19600,3500,20000,3500,1200,*,RIGHT,ALU3
S 19600,5000,20000,5000,1200,*,RIGHT,ALU3
S 19600,6500,20000,6500,1200,*,RIGHT,ALU3
S 19600,8000,20000,8000,1200,*,RIGHT,ALU3
S 19600,9500,20000,9500,1200,*,RIGHT,ALU3
S 19600,11000,20000,11000,1200,*,RIGHT,ALU3
S 19600,12500,20000,12500,1200,*,RIGHT,ALU3
S 19600,14000,20000,14000,1200,*,RIGHT,ALU3
S 19600,15500,20000,15500,1200,*,RIGHT,ALU3
S 19600,17000,20000,17000,1200,*,RIGHT,ALU3
S 19600,18500,20000,18500,1200,*,RIGHT,ALU3
S 10000,30000,10000,40000,100,*,DOWN,ALU1
I 0,0,pck_px,a,NOSYM
EOF

29
alliance/src/cells/src/pxlib/pck_sp.vbe Normal file
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@ -0,0 +1,29 @@
ENTITY pck_sp IS
GENERIC (
CONSTANT area : NATURAL := 80000;
CONSTANT cin_pad : NATURAL := 1326;
CONSTANT tpll_pad : NATURAL := 1443;
CONSTANT rdown_pad : NATURAL := 58;
CONSTANT tphh_pad : NATURAL := 228;
CONSTANT rup_pad : NATURAL := 68
);
PORT (
pad : in BIT;
ck : out BIT;
vdde : in BIT;
vddi : in BIT;
vsse : in BIT;
vssi : in BIT
);
END pck_sp;
ARCHITECTURE behaviour_data_flow OF pck_sp IS
BEGIN
ck <= pad;
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on pck_sp"
SEVERITY WARNING;
END;

3073
alliance/src/cells/src/pxlib/pi_px.ap
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File diff suppressed because it is too large Load Diff

58
alliance/src/cells/src/pxlib/pi_sp.ap Normal file
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@ -0,0 +1,58 @@
V ALLIANCE : 6
H pi_sp,P, 4/ 9/2014,100
A 0,0,20000,40000
C 10000,40000,100,pad,0,NORTH,ALU1
C 4000,0,200,t,0,SOUTH,ALU1
C 4000,0,200,t,1,SOUTH,ALU2
C 0,8000,1200,vddi,6,WEST,ALU3
C 0,6500,1200,vssi,6,WEST,ALU3
C 20000,6500,1200,vssi,7,EAST,ALU3
C 20000,8000,1200,vddi,7,EAST,ALU3
C 0,18500,1200,vsse,6,WEST,ALU3
C 0,15500,1200,vsse,4,WEST,ALU3
C 0,12500,1200,vsse,2,WEST,ALU3
C 0,3500,1200,vssi,4,WEST,ALU3
C 0,5000,1200,vddi,4,WEST,ALU3
C 0,9500,1200,vsse,0,WEST,ALU3
C 0,11000,1200,vdde,0,WEST,ALU3
C 0,14000,1200,vdde,2,WEST,ALU3
C 0,17000,1200,vdde,4,WEST,ALU3
C 20000,18500,1200,vsse,7,EAST,ALU3
C 20000,15500,1200,vsse,5,EAST,ALU3
C 20000,12500,1200,vsse,3,EAST,ALU3
C 20000,9500,1200,vsse,1,EAST,ALU3
C 20000,11000,1200,vdde,1,EAST,ALU3
C 20000,14000,1200,vdde,3,EAST,ALU3
C 20000,17000,1200,vdde,5,EAST,ALU3
C 20000,3500,1200,vssi,5,EAST,ALU3
C 20000,5000,1200,vddi,5,EAST,ALU3
C 0,2000,500,ck,0,WEST,ALU3
C 20000,2000,500,ck,1,EAST,ALU3
S 10000,30000,10000,40000,100,*,DOWN,ALU1
S 19600,18500,20000,18500,1200,*,RIGHT,ALU3
S 19600,17000,20000,17000,1200,*,RIGHT,ALU3
S 19600,15500,20000,15500,1200,*,RIGHT,ALU3
S 19600,14000,20000,14000,1200,*,RIGHT,ALU3
S 19600,12500,20000,12500,1200,*,RIGHT,ALU3
S 19600,11000,20000,11000,1200,*,RIGHT,ALU3
S 19600,9500,20000,9500,1200,*,RIGHT,ALU3
S 19600,8000,20000,8000,1200,*,RIGHT,ALU3
S 19600,6500,20000,6500,1200,*,RIGHT,ALU3
S 19600,5000,20000,5000,1200,*,RIGHT,ALU3
S 19600,3500,20000,3500,1200,*,RIGHT,ALU3
S 19600,2000,20000,2000,500,*,RIGHT,ALU3
S 0,8000,400,8000,1200,*,RIGHT,ALU3
S 0,9500,400,9500,1200,*,RIGHT,ALU3
S 0,11000,400,11000,1200,*,RIGHT,ALU3
S 0,14000,400,14000,1200,*,RIGHT,ALU3
S 0,15500,400,15500,1200,*,RIGHT,ALU3
S 0,12500,400,12500,1200,*,RIGHT,ALU3
S 0,17000,400,17000,1200,*,RIGHT,ALU3
S 0,18500,400,18500,1200,*,RIGHT,ALU3
S 0,2000,400,2000,500,*,RIGHT,ALU3
S 0,3500,400,3500,1200,*,RIGHT,ALU3
S 0,5000,400,5000,1200,*,RIGHT,ALU3
S 0,6500,400,6500,1200,*,RIGHT,ALU3
I 0,0,pi_px,a,NOSYM
V 4000,0,CONT_VIA,*
EOF

30
alliance/src/cells/src/pxlib/pi_sp.vbe Normal file
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@ -0,0 +1,30 @@
ENTITY pi_sp IS
GENERIC (
CONSTANT area : NATURAL := 80000;
CONSTANT cin_pad : NATURAL := 654;
CONSTANT tpll_pad : NATURAL := 1487;
CONSTANT rdown_pad : NATURAL := 234;
CONSTANT tphh_pad : NATURAL := 233;
CONSTANT rup_pad : NATURAL := 273
);
PORT (
pad : in BIT;
t : out BIT;
ck : in BIT;
vdde : in BIT;
vddi : in BIT;
vsse : in BIT;
vssi : in BIT
);
END pi_sp;
ARCHITECTURE behaviour_data_flow OF pi_sp IS
BEGIN
t <= pad;
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on pi_sp"
SEVERITY WARNING;
END;

3104
alliance/src/cells/src/pxlib/piot_px.ap
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65
alliance/src/cells/src/pxlib/piot_sp.ap Normal file
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@ -0,0 +1,65 @@
V ALLIANCE : 6
H piot_sp,P, 5/ 9/2014,100
A 0,0,20000,40000
C 10100,30100,100,pad,0,NORTH,ALU1
C 10000,40000,100,t,2,NORTH,ALU1
C 4000,0,200,t,0,SOUTH,ALU1
C 4000,0,200,t,1,SOUTH,ALU2
C 14000,0,200,i,0,SOUTH,ALU1
C 14000,0,200,i,1,SOUTH,ALU2
C 0,8000,1200,vddi,2,WEST,ALU3
C 0,6500,1200,vssi,2,WEST,ALU3
C 20000,6500,1200,vssi,3,EAST,ALU3
C 20000,8000,1200,vddi,3,EAST,ALU3
C 0,18500,1200,vsse,6,WEST,ALU3
C 0,15500,1200,vsse,4,WEST,ALU3
C 0,12500,1200,vsse,2,WEST,ALU3
C 0,3500,1200,vssi,0,WEST,ALU3
C 0,5000,1200,vddi,0,WEST,ALU3
C 0,9500,1200,vsse,0,WEST,ALU3
C 0,11000,1200,vdde,0,WEST,ALU3
C 0,14000,1200,vdde,2,WEST,ALU3
C 0,17000,1200,vdde,4,WEST,ALU3
C 20000,18500,1200,vsse,7,EAST,ALU3
C 20000,15500,1200,vsse,5,EAST,ALU3
C 20000,12500,1200,vsse,3,EAST,ALU3
C 20000,9500,1200,vsse,1,EAST,ALU3
C 20000,11000,1200,vdde,1,EAST,ALU3
C 20000,14000,1200,vdde,3,EAST,ALU3
C 20000,17000,1200,vdde,5,EAST,ALU3
C 20000,3500,1200,vssi,1,EAST,ALU3
C 20000,5000,1200,vddi,1,EAST,ALU3
C 0,2000,500,ck,0,WEST,ALU3
C 20000,2000,500,ck,1,EAST,ALU3
C 15000,0,200,b,1,SOUTH,ALU2
C 15000,0,200,b,0,SOUTH,ALU1
S 10000,30000,10000,40000,100,*,DOWN,ALU1
S 19600,18500,20000,18500,1200,*,RIGHT,ALU3
S 19600,17000,20000,17000,1200,*,RIGHT,ALU3
S 19600,15500,20000,15500,1200,*,RIGHT,ALU3
S 19600,14000,20000,14000,1200,*,RIGHT,ALU3
S 19600,12500,20000,12500,1200,*,RIGHT,ALU3
S 19600,11000,20000,11000,1200,*,RIGHT,ALU3
S 19600,9500,20000,9500,1200,*,RIGHT,ALU3
S 19600,8000,20000,8000,1200,*,RIGHT,ALU3
S 19600,6500,20000,6500,1200,*,RIGHT,ALU3
S 19600,5000,20000,5000,1200,*,RIGHT,ALU3
S 19600,3500,20000,3500,1200,*,RIGHT,ALU3
S 19600,2000,20000,2000,500,*,RIGHT,ALU3
S 0,8000,400,8000,1200,*,RIGHT,ALU3
S 0,9500,400,9500,1200,*,RIGHT,ALU3
S 0,11000,400,11000,1200,*,RIGHT,ALU3
S 0,14000,400,14000,1200,*,RIGHT,ALU3
S 0,15500,400,15500,1200,*,RIGHT,ALU3
S 0,12500,400,12500,1200,*,RIGHT,ALU3
S 0,17000,400,17000,1200,*,RIGHT,ALU3
S 0,18500,400,18500,1200,*,RIGHT,ALU3
S 0,2000,400,2000,500,*,RIGHT,ALU3
S 0,3500,400,3500,1200,*,RIGHT,ALU3
S 0,5000,400,5000,1200,*,RIGHT,ALU3
S 0,6500,400,6500,1200,*,RIGHT,ALU3
I 0,0,piot_px,a,NOSYM
V 4000,0,CONT_VIA,*
V 14000,0,CONT_VIA,*
V 15000,0,CONT_VIA,b
EOF

44
alliance/src/cells/src/pxlib/piot_sp.vbe Normal file
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@ -0,0 +1,44 @@
ENTITY piot_sp IS
GENERIC (
CONSTANT area : NATURAL := 80000;
CONSTANT rup : NATURAL := 402;
CONSTANT rdown : NATURAL := 0
);
PORT (
i : in BIT;
b : in BIT;
t : out BIT;
pad : inout MUX_BIT BUS;
ck : in BIT;
vdde : in BIT;
vddi : in BIT;
vsse : in BIT;
vssi : in BIT
);
END piot_sp;
ARCHITECTURE behaviour_data_flow OF piot_sp IS
SIGNAL b1 : BIT;
SIGNAL b2 : BIT;
SIGNAL b3 : BIT;
SIGNAL b4 : BIT;
SIGNAL b5 : BIT;
SIGNAL b6 : BIT;
BEGIN
b6 <= b5;
b5 <= b4;
b4 <= b3;
b3 <= b2;
b2 <= b1;
b1 <= b;
label0 : BLOCK (b6 = '1')
BEGIN
pad <= GUARDED i;
END BLOCK label0;
t <= pad;
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on piot_sp"
SEVERITY WARNING;
END;

3050
alliance/src/cells/src/pxlib/po_px.ap
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58
alliance/src/cells/src/pxlib/po_sp.ap Normal file
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@ -0,0 +1,58 @@
V ALLIANCE : 6
H po_sp,P, 4/ 9/2014,100
A 0,0,20000,40000
C 10000,40000,100,pad,0,NORTH,ALU1
C 14000,0,200,i,0,SOUTH,ALU1
C 14000,0,200,i,1,SOUTH,ALU2
C 0,8000,1200,vddi,6,WEST,ALU3
C 0,6500,1200,vssi,6,WEST,ALU3
C 20000,6500,1200,vssi,7,EAST,ALU3
C 20000,8000,1200,vddi,7,EAST,ALU3
C 0,18500,1200,vsse,6,WEST,ALU3
C 0,15500,1200,vsse,4,WEST,ALU3
C 0,12500,1200,vsse,2,WEST,ALU3
C 0,3500,1200,vssi,4,WEST,ALU3
C 0,5000,1200,vddi,4,WEST,ALU3
C 0,9500,1200,vsse,0,WEST,ALU3
C 0,11000,1200,vdde,0,WEST,ALU3
C 0,14000,1200,vdde,2,WEST,ALU3
C 0,17000,1200,vdde,4,WEST,ALU3
C 20000,18500,1200,vsse,7,EAST,ALU3
C 20000,15500,1200,vsse,5,EAST,ALU3
C 20000,12500,1200,vsse,3,EAST,ALU3
C 20000,9500,1200,vsse,1,EAST,ALU3
C 20000,11000,1200,vdde,1,EAST,ALU3
C 20000,14000,1200,vdde,3,EAST,ALU3
C 20000,17000,1200,vdde,5,EAST,ALU3
C 20000,3500,1200,vssi,5,EAST,ALU3
C 20000,5000,1200,vddi,5,EAST,ALU3
C 0,2000,500,ck,0,WEST,ALU3
C 20000,2000,500,ck,1,EAST,ALU3
S 10000,30000,10000,40000,100,*,DOWN,ALU1
S 19600,18500,20000,18500,1200,*,RIGHT,ALU3
S 19600,17000,20000,17000,1200,*,RIGHT,ALU3
S 19600,15500,20000,15500,1200,*,RIGHT,ALU3
S 19600,14000,20000,14000,1200,*,RIGHT,ALU3
S 19600,12500,20000,12500,1200,*,RIGHT,ALU3
S 19600,11000,20000,11000,1200,*,RIGHT,ALU3
S 19600,9500,20000,9500,1200,*,RIGHT,ALU3
S 19600,8000,20000,8000,1200,*,RIGHT,ALU3
S 19600,6500,20000,6500,1200,*,RIGHT,ALU3
S 19600,5000,20000,5000,1200,*,RIGHT,ALU3
S 19600,3500,20000,3500,1200,*,RIGHT,ALU3
S 19600,2000,20000,2000,500,*,RIGHT,ALU3
S 0,8000,400,8000,1200,*,RIGHT,ALU3
S 0,9500,400,9500,1200,*,RIGHT,ALU3
S 0,11000,400,11000,1200,*,RIGHT,ALU3
S 0,14000,400,14000,1200,*,RIGHT,ALU3
S 0,15500,400,15500,1200,*,RIGHT,ALU3
S 0,12500,400,12500,1200,*,RIGHT,ALU3
S 0,17000,400,17000,1200,*,RIGHT,ALU3
S 0,18500,400,18500,1200,*,RIGHT,ALU3
S 0,2000,400,2000,500,*,RIGHT,ALU3
S 0,3500,400,3500,1200,*,RIGHT,ALU3
S 0,5000,400,5000,1200,*,RIGHT,ALU3
S 0,6500,400,6500,1200,*,RIGHT,ALU3
I 0,0,po_px,a,NOSYM
V 14000,0,CONT_VIA,*
EOF

29
alliance/src/cells/src/pxlib/po_sp.vbe Normal file
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@ -0,0 +1,29 @@
ENTITY po_sp IS
GENERIC (
CONSTANT area : NATURAL := 80000;
CONSTANT cin_i : NATURAL := 191;
CONSTANT tpll_i : NATURAL := 2176;
CONSTANT rdown_i : NATURAL := 15;
CONSTANT tphh_i : NATURAL := 2032;
CONSTANT rup_i : NATURAL := 16
);
PORT (
i : in BIT;
pad : out BIT;
ck : in BIT;
vdde : in BIT;
vddi : in BIT;
vsse : in BIT;
vssi : in BIT
);
END po_sp;
ARCHITECTURE behaviour_data_flow OF po_sp IS
BEGIN
pad <= i;
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on po_sp"
SEVERITY WARNING;
END;

3068
alliance/src/cells/src/pxlib/pot_px.ap
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61
alliance/src/cells/src/pxlib/pot_sp.ap Normal file
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@ -0,0 +1,61 @@
V ALLIANCE : 6
H pot_sp,P, 4/ 9/2014,100
A 0,0,20000,40000
C 10000,40000,100,pad,0,NORTH,ALU1
C 14000,0,200,i,0,SOUTH,ALU1
C 14000,0,200,i,1,SOUTH,ALU2
C 0,8000,1200,vddi,6,WEST,ALU3
C 0,6500,1200,vssi,6,WEST,ALU3
C 20000,6500,1200,vssi,7,EAST,ALU3
C 20000,8000,1200,vddi,7,EAST,ALU3
C 0,18500,1200,vsse,6,WEST,ALU3
C 0,15500,1200,vsse,4,WEST,ALU3
C 0,12500,1200,vsse,2,WEST,ALU3
C 0,3500,1200,vssi,4,WEST,ALU3
C 0,5000,1200,vddi,4,WEST,ALU3
C 0,9500,1200,vsse,0,WEST,ALU3
C 0,11000,1200,vdde,0,WEST,ALU3
C 0,14000,1200,vdde,2,WEST,ALU3
C 0,17000,1200,vdde,4,WEST,ALU3
C 20000,18500,1200,vsse,7,EAST,ALU3
C 20000,15500,1200,vsse,5,EAST,ALU3
C 20000,12500,1200,vsse,3,EAST,ALU3
C 20000,9500,1200,vsse,1,EAST,ALU3
C 20000,11000,1200,vdde,1,EAST,ALU3
C 20000,14000,1200,vdde,3,EAST,ALU3
C 20000,17000,1200,vdde,5,EAST,ALU3
C 20000,3500,1200,vssi,5,EAST,ALU3
C 20000,5000,1200,vddi,5,EAST,ALU3
C 0,2000,500,ck,0,WEST,ALU3
C 20000,2000,500,ck,1,EAST,ALU3
C 15000,0,200,b,1,SOUTH,ALU2
C 15000,0,200,b,0,SOUTH,ALU1
S 10000,30000,10000,40000,100,*,DOWN,ALU1
S 19600,18500,20000,18500,1200,*,RIGHT,ALU3
S 19600,17000,20000,17000,1200,*,RIGHT,ALU3
S 19600,15500,20000,15500,1200,*,RIGHT,ALU3
S 19600,14000,20000,14000,1200,*,RIGHT,ALU3
S 19600,12500,20000,12500,1200,*,RIGHT,ALU3
S 19600,11000,20000,11000,1200,*,RIGHT,ALU3
S 19600,9500,20000,9500,1200,*,RIGHT,ALU3
S 19600,8000,20000,8000,1200,*,RIGHT,ALU3
S 19600,6500,20000,6500,1200,*,RIGHT,ALU3
S 19600,5000,20000,5000,1200,*,RIGHT,ALU3
S 19600,3500,20000,3500,1200,*,RIGHT,ALU3
S 19600,2000,20000,2000,500,*,RIGHT,ALU3
S 0,8000,400,8000,1200,*,RIGHT,ALU3
S 0,9500,400,9500,1200,*,RIGHT,ALU3
S 0,11000,400,11000,1200,*,RIGHT,ALU3
S 0,14000,400,14000,1200,*,RIGHT,ALU3
S 0,15500,400,15500,1200,*,RIGHT,ALU3
S 0,12500,400,12500,1200,*,RIGHT,ALU3
S 0,17000,400,17000,1200,*,RIGHT,ALU3
S 0,18500,400,18500,1200,*,RIGHT,ALU3
S 0,2000,400,2000,500,*,RIGHT,ALU3
S 0,3500,400,3500,1200,*,RIGHT,ALU3
S 0,5000,400,5000,1200,*,RIGHT,ALU3
S 0,6500,400,6500,1200,*,RIGHT,ALU3
I 0,0,pot_px,a,NOSYM
V 14000,0,CONT_VIA,*
V 15000,0,CONT_VIA,b
EOF

42
alliance/src/cells/src/pxlib/pot_sp.vbe Normal file
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@ -0,0 +1,42 @@
ENTITY pot_sp IS
GENERIC (
CONSTANT area : NATURAL := 80000;
CONSTANT rup : NATURAL := 684404;
CONSTANT rdown : NATURAL := 24
);
PORT (
i : in BIT;
b : in BIT;
pad : out MUX_BIT BUS;
ck : in BIT;
vdde : in BIT;
vddi : in BIT;
vsse : in BIT;
vssi : in BIT
);
END pot_sp;
ARCHITECTURE behaviour_data_flow OF pot_sp IS
SIGNAL b1 : BIT;
SIGNAL b2 : BIT;
SIGNAL b3 : BIT;
SIGNAL b4 : BIT;
SIGNAL b5 : BIT;
SIGNAL b6 : BIT;
BEGIN
b6 <= b5;
b5 <= b4;
b4 <= b3;
b3 <= b2;
b2 <= b1;
b1 <= b;
label0 : BLOCK (b6 = '1')
BEGIN
pad <= GUARDED i;
END BLOCK label0;
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on pot_sp"
SEVERITY WARNING;
END;

140
alliance/src/cells/src/pxlib/pvdde_px.ap
View File

@ -1,92 +1,68 @@
V ALLIANCE : 6
H pvdde_px,P,20/11/2010,100
H pvdde_px,P,10/10/2005,100
A 0,0,20000,40000
I 0,20000,padreal,padreal,NOSYM
S 10000,1500,10000,6500,20000,blockagenet,UP,TALU5
S 0,8500,20000,8500,5000,blockagenet,RIGHT,TALU4
S 0,8500,20000,8500,5000,blockagenet,RIGHT,TALU2
S 18500,3000,20000,3000,6000,14onymous_,RIGHT,TALU2
S 19200,100,19200,1500,1600,9nonymous_,UP,TALU5
S 19200,100,19200,1000,1600,4nonymous_,UP,TALU3
S 4000,100,4000,1500,1200,6nonymous_,UP,TALU5
S 800,100,800,1000,1600,0nonymous_,UP,TALU3
S 4000,100,4000,1000,1200,1nonymous_,UP,TALU3
S 18500,3000,20000,3000,6000,19onymous_,RIGHT,TALU4
S 3500,3000,4500,3000,6000,11onymous_,RIGHT,TALU2
S 10000,24000,10000,36000,12200,vdde,UP,CALU1
S 500,17000,19500,17000,1200,vdde,RIGHT,CALU3
S 500,14000,19500,14000,1200,vdde,RIGHT,CALU3
S 500,11000,19500,11000,1200,vdde,RIGHT,CALU3
S 500,9500,19500,9500,1200,vsse,RIGHT,CALU3
S 500,18500,19500,18500,1200,vsse,RIGHT,CALU3
S 500,15500,19500,15500,1200,vsse,RIGHT,CALU3
S 500,12500,19500,12500,1200,vsse,RIGHT,CALU3
S 3500,3000,4500,3000,6000,16onymous_,RIGHT,TALU4
S 11500,9000,11500,30000,2200,21onymous_,UP,ALU1
S 16000,100,16000,1500,1200,8nonymous_,UP,TALU5
S 10000,24000,10000,36000,12200,vdde,DOWN,CALU1
S 8500,9000,8500,30000,2200,*,DOWN,ALU1
S 5500,0,5500,8500,1200,vddi,UP,CALU2
S 5500,0,5500,1000,1200,vddi,UP,CALU3
S 5500,0,5500,1000,1200,vddi,UP,CALU5
S 5500,0,5500,1000,1200,vddi,UP,CALU4
S 500,8000,19500,8000,1200,vddi,RIGHT,CALU3
S 500,5000,19500,5000,1200,vddi,RIGHT,CALU3
S 17500,0,17500,8500,1200,vddi,UP,CALU2
S 17500,0,17500,1000,1200,vddi,UP,CALU3
S 17500,0,17500,1000,1200,vddi,UP,CALU5
S 17500,0,17500,1000,1200,vddi,UP,CALU4
S 16000,100,16000,1000,1200,3nonymous_,UP,TALU3
S 15500,3000,16500,3000,6000,13onymous_,RIGHT,TALU2
S 15500,3000,16500,3000,6000,18onymous_,RIGHT,TALU4
S 0,3000,1500,3000,6000,15onymous_,RIGHT,TALU4
S 0,3000,1500,3000,6000,10onymous_,RIGHT,TALU2
S 5500,0,5500,1000,1200,vddi,DOWN,CALU5
S 5500,0,5500,1000,1200,vddi,DOWN,CALU4
S 500,9500,19500,9500,1200,vsse,LEFT,CALU3
S 500,8000,19500,8000,1200,vddi,LEFT,CALU3
S 500,6500,19500,6500,1200,vssi,RIGHT,CALU3
S 500,3500,19500,3500,1200,vssi,RIGHT,CALU3
S 500,5000,19500,5000,1200,vddi,LEFT,CALU3
S 500,3500,19500,3500,1200,vssi,LEFT,CALU3
S 500,2000,19500,2000,500,ck,RIGHT,CALU3
S 500,18500,19500,18500,1200,vsse,LEFT,CALU3
S 500,17000,19500,17000,1200,vdde,LEFT,CALU3
S 500,15500,19500,15500,1200,vsse,LEFT,CALU3
S 500,14000,19500,14000,1200,vdde,LEFT,CALU3
S 500,12500,19500,12500,1200,vsse,LEFT,CALU3
S 500,11000,19500,11000,1200,vdde,LEFT,CALU3
S 2500,0,2500,8500,1200,vssi,UP,CALU2
S 2500,0,2500,1000,1200,vssi,UP,CALU3
S 2500,0,2500,1000,1200,vssi,UP,CALU5
S 2500,0,2500,1000,1200,vssi,UP,CALU4
S 2500,0,2500,1000,1200,vssi,DOWN,CALU5
S 2500,0,2500,1000,1200,vssi,DOWN,CALU4
S 17500,0,17500,8500,1200,vddi,UP,CALU2
S 17500,0,17500,1000,1200,vddi,UP,CALU3
S 17500,0,17500,1000,1200,vddi,DOWN,CALU5
S 17500,0,17500,1000,1200,vddi,DOWN,CALU4
S 14500,0,14500,8500,1200,vssi,UP,CALU2
S 14500,0,14500,1000,1200,vssi,UP,CALU3
S 14500,0,14500,1000,1200,vssi,UP,CALU5
S 14500,0,14500,1000,1200,vssi,UP,CALU4
S 800,100,800,1500,1600,5nonymous_,UP,TALU5
S 0,3000,20000,3000,6000,20onymous_,RIGHT,TALU6
S 10000,100,10000,1500,7200,7nonymous_,UP,TALU5
S 10000,100,10000,1000,7200,2nonymous_,UP,TALU3
S 6500,3000,13500,3000,6000,12onymous_,RIGHT,TALU2
S 500,2000,19500,2000,500,ck,RIGHT,CALU3
S 6500,3000,13500,3000,6000,17onymous_,RIGHT,TALU4
S 8500,9000,8500,30000,2200,22onymous_,UP,ALU1
B 2500,500,1200,1200,CONT_VIA3,41onymous_
B 17500,500,1200,1200,CONT_VIA3,36onymous_
B 14500,500,1200,1200,CONT_VIA3,31onymous_
B 8500,17000,2200,1200,CONT_VIA,53onymous_
B 5500,8000,1200,1200,CONT_VIA2,48onymous_
B 2500,6500,1200,1200,CONT_VIA2,43onymous_
B 17500,8000,1200,1200,CONT_VIA2,38onymous_
B 8500,11000,2200,1200,CONT_VIA2,50onymous_
B 11500,11000,2200,1200,CONT_VIA,23onymous_
B 11500,11000,2200,1200,CONT_VIA2,24onymous_
B 11500,17000,2200,1200,CONT_VIA2,28onymous_
B 14500,6500,1200,1200,CONT_VIA2,33onymous_
B 5500,500,1200,1200,CONT_VIA2,45onymous_
B 2500,500,1200,1200,CONT_VIA2,40onymous_
B 11500,14000,2200,1200,CONT_VIA,25onymous_
B 14500,500,1200,1200,CONT_VIA2,30onymous_
B 17500,500,1200,1200,CONT_VIA2,35onymous_
B 8500,14000,2200,1200,CONT_VIA2,52onymous_
B 5500,500,1200,1200,CONT_VIA4,47onymous_
B 2500,500,1200,1200,CONT_VIA4,42onymous_
B 11500,17000,2200,1200,CONT_VIA,27onymous_
B 8500,17000,2200,1200,CONT_VIA2,54onymous_
B 17500,500,1200,1200,CONT_VIA4,37onymous_
B 14500,500,1200,1200,CONT_VIA4,32onymous_
B 8500,11000,2200,1200,CONT_VIA,49onymous_
B 5500,5000,1200,1200,CONT_VIA2,44onymous_
B 2500,3500,1200,1200,CONT_VIA2,39onymous_
B 17500,5000,1200,1200,CONT_VIA2,34onymous_
B 8500,14000,2200,1200,CONT_VIA,51onymous_
B 5500,500,1200,1200,CONT_VIA3,46onymous_
B 11500,14000,2200,1200,CONT_VIA2,26onymous_
B 14500,3500,1200,1200,CONT_VIA2,29onymous_
S 14500,0,14500,1000,1200,vssi,DOWN,CALU5
S 14500,0,14500,1000,1200,vssi,DOWN,CALU4
S 11500,9000,11500,30000,2200,*,DOWN,ALU1
I 0,20000,padreal,padreal,NOSYM
B 8500,17000,2200,1200,CONT_VIA2,*
B 8500,17000,2200,1200,CONT_VIA,*
B 8500,14000,2200,1200,CONT_VIA2,*
B 8500,14000,2200,1200,CONT_VIA,*
B 8500,11000,2200,1200,CONT_VIA2,*
B 8500,11000,2200,1200,CONT_VIA,*
B 5500,8000,1200,1200,CONT_VIA2,*
B 5500,500,1200,1200,CONT_VIA4,*
B 5500,500,1200,1200,CONT_VIA3,*
B 5500,500,1200,1200,CONT_VIA2,*
B 5500,5000,1200,1200,CONT_VIA2,*
B 2500,6500,1200,1200,CONT_VIA2,*
B 2500,500,1200,1200,CONT_VIA4,*
B 2500,500,1200,1200,CONT_VIA3,*
B 2500,500,1200,1200,CONT_VIA2,*
B 2500,3500,1200,1200,CONT_VIA2,*
B 17500,8000,1200,1200,CONT_VIA2,*
B 17500,500,1200,1200,CONT_VIA4,*
B 17500,500,1200,1200,CONT_VIA3,*
B 17500,500,1200,1200,CONT_VIA2,*
B 17500,5000,1200,1200,CONT_VIA2,*
B 14500,6500,1200,1200,CONT_VIA2,*
B 14500,500,1200,1200,CONT_VIA4,*
B 14500,500,1200,1200,CONT_VIA3,*
B 14500,500,1200,1200,CONT_VIA2,*
B 14500,3500,1200,1200,CONT_VIA2,*
B 11500,17000,2200,1200,CONT_VIA2,*
B 11500,17000,2200,1200,CONT_VIA,*
B 11500,14000,2200,1200,CONT_VIA2,*
B 11500,14000,2200,1200,CONT_VIA,*
B 11500,11000,2200,1200,CONT_VIA2,*
B 11500,11000,2200,1200,CONT_VIA,*
EOF

55
alliance/src/cells/src/pxlib/pvdde_sp.ap Normal file
View File

@ -0,0 +1,55 @@
V ALLIANCE : 6
H pvdde_sp,P, 4/ 9/2014,100
A 0,0,20000,40000
C 10000,40000,100,vdde,6,NORTH,ALU1
C 0,8000,1200,vddi,6,WEST,ALU3
C 0,6500,1200,vssi,6,WEST,ALU3
C 20000,6500,1200,vssi,7,EAST,ALU3
C 20000,8000,1200,vddi,7,EAST,ALU3
C 0,18500,1200,vsse,6,WEST,ALU3
C 0,15500,1200,vsse,4,WEST,ALU3
C 0,12500,1200,vsse,2,WEST,ALU3
C 0,3500,1200,vssi,4,WEST,ALU3
C 0,5000,1200,vddi,4,WEST,ALU3
C 0,9500,1200,vsse,0,WEST,ALU3
C 0,11000,1200,vdde,0,WEST,ALU3
C 0,14000,1200,vdde,2,WEST,ALU3
C 0,17000,1200,vdde,4,WEST,ALU3
C 20000,18500,1200,vsse,7,EAST,ALU3
C 20000,15500,1200,vsse,5,EAST,ALU3
C 20000,12500,1200,vsse,3,EAST,ALU3
C 20000,9500,1200,vsse,1,EAST,ALU3
C 20000,11000,1200,vdde,1,EAST,ALU3
C 20000,14000,1200,vdde,3,EAST,ALU3
C 20000,17000,1200,vdde,5,EAST,ALU3
C 20000,3500,1200,vssi,5,EAST,ALU3
C 20000,5000,1200,vddi,5,EAST,ALU3
C 0,2000,500,ck,0,WEST,ALU3
C 20000,2000,500,ck,1,EAST,ALU3
S 10000,30000,10000,40000,100,*,DOWN,ALU1
S 19600,18500,20000,18500,1200,*,RIGHT,ALU3
S 19600,17000,20000,17000,1200,*,RIGHT,ALU3
S 19600,15500,20000,15500,1200,*,RIGHT,ALU3
S 19600,14000,20000,14000,1200,*,RIGHT,ALU3
S 19600,12500,20000,12500,1200,*,RIGHT,ALU3
S 19600,11000,20000,11000,1200,*,RIGHT,ALU3
S 19600,9500,20000,9500,1200,*,RIGHT,ALU3
S 19600,8000,20000,8000,1200,*,RIGHT,ALU3
S 19600,6500,20000,6500,1200,*,RIGHT,ALU3
S 19600,5000,20000,5000,1200,*,RIGHT,ALU3
S 19600,3500,20000,3500,1200,*,RIGHT,ALU3
S 19600,2000,20000,2000,500,*,RIGHT,ALU3
S 0,8000,400,8000,1200,*,RIGHT,ALU3
S 0,9500,400,9500,1200,*,RIGHT,ALU3
S 0,11000,400,11000,1200,*,RIGHT,ALU3
S 0,14000,400,14000,1200,*,RIGHT,ALU3
S 0,15500,400,15500,1200,*,RIGHT,ALU3
S 0,12500,400,12500,1200,*,RIGHT,ALU3
S 0,17000,400,17000,1200,*,RIGHT,ALU3
S 0,18500,400,18500,1200,*,RIGHT,ALU3
S 0,2000,400,2000,500,*,RIGHT,ALU3
S 0,3500,400,3500,1200,*,RIGHT,ALU3
S 0,5000,400,5000,1200,*,RIGHT,ALU3
S 0,6500,400,6500,1200,*,RIGHT,ALU3
I 0,0,pvdde_px,a,NOSYM
EOF

20
alliance/src/cells/src/pxlib/pvdde_sp.vbe Normal file
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@ -0,0 +1,20 @@
ENTITY pvdde_sp IS
GENERIC (
CONSTANT area : NATURAL := 80000
);
PORT (
ck : in BIT;
vdde : in BIT;
vddi : in BIT;
vsse : in BIT;
vssi : in BIT
);
END pvdde_sp;
ARCHITECTURE behaviour_data_flow OF pvdde_sp IS
BEGIN
ASSERT ((((not (vssi) and not (vsse)) and vddi) and vdde) = '1')
REPORT "power supply is missing on pvdde_sp"
SEVERITY WARNING;
END;

660
alliance/src/cells/src/pxlib/pvddeck_px.ap
View File

@ -1,350 +1,320 @@
V ALLIANCE : 6
H pvddeck_px,P,20/11/2010,100
H pvddeck_px,P, 8/11/2005,100
A 0,0,20000,40000
I 0,20000,padreal,padreal,NOSYM
S 5500,5400,5500,7700,100,55onymous_,UP,PTRANS
S 12800,6900,16200,6900,2800,87onymous_,RIGHT,NWELL
S 7000,5600,7000,7500,300,37onymous_,UP,PDIF
S 14500,5400,14500,7700,100,107nymous_,UP,PTRANS
S 16000,3800,16000,4700,300,120nymous_,UP,NDIF
S 4600,3800,4600,4700,200,62onymous_,UP,NDIF
S 0,3000,1500,3000,6000,6nonymous_,RIGHT,TALU4
S 500,8000,19500,8000,1200,vddi,RIGHT,CALU3
S 4000,7800,7000,7800,800,vddi,RIGHT,ALU1
S 17500,0,17500,1000,1200,vddi,UP,CALU4
S 17500,0,17500,1000,1200,vddi,UP,CALU5
S 17500,0,17500,1000,1200,vddi,UP,CALU3
S 17500,0,17500,8500,1200,vddi,UP,CALU2
S 4500,0,4500,1000,1200,vddi,UP,CALU4
S 4500,0,4500,1000,1200,vddi,UP,CALU5
S 4500,0,4500,1000,1200,vddi,UP,CALU3
S 4500,0,4500,8500,1200,vddi,UP,CALU2
S 13000,7800,16000,7800,800,vddi,RIGHT,ALU1
S 500,5000,19500,5000,1200,vddi,RIGHT,CALU3
S 16500,100,16500,1500,200,19onymous_,UP,TALU5
S 4600,6000,4600,7500,200,75onymous_,UP,ALU1
S 16500,2000,16500,5100,200,81onymous_,UP,ALU2
S 13600,3800,13600,4700,200,94onymous_,UP,NDIF
S 4000,5100,6400,5100,200,44onymous_,RIGHT,ALU1
S 0,3000,1500,3000,6000,0nonymous_,RIGHT,TALU2
S 6400,4200,6400,4600,200,31onymous_,UP,ALU1
S 15400,3800,15400,4700,200,114nymous_,UP,NDIF
S 15400,6000,15400,7500,200,127nymous_,UP,ALU1
S 4000,5600,4000,7500,300,69onymous_,UP,PDIF
S 5200,3800,5200,4700,200,56onymous_,UP,NDIF
S 16500,100,16500,1000,200,13onymous_,UP,TALU3
S 5800,1000,14200,1000,200,26onymous_,RIGHT,ALU3
S 13900,4900,13900,5400,100,101nymous_,UP,POLY
S 6700,3600,6700,4900,100,38onymous_,UP,NTRANS
S 13000,3800,13000,4700,300,88onymous_,UP,NDIF
S 16000,5600,16000,7500,300,121nymous_,UP,PDIF
S 12500,100,12500,1500,4200,20onymous_,UP,TALU5
S 14800,3800,14800,4700,200,108nymous_,UP,NDIF
S 4600,5600,4600,7500,300,63onymous_,UP,PDIF
S 3500,3000,3500,3000,6000,7nonymous_,RIGHT,TALU4
S 5800,6100,5800,7500,200,76onymous_,UP,ALU1
S 13000,3100,16000,3100,300,82onymous_,RIGHT,PTIE
S 13600,4600,14800,4600,200,95onymous_,RIGHT,ALU1
S 6400,5600,6400,7000,200,45onymous_,UP,ALU1
S 5800,8100,7000,8100,400,27onymous_,RIGHT,ALU2
S 5200,4200,5200,4600,200,32onymous_,UP,ALU1
S 15400,5600,15400,7500,300,115nymous_,UP,PDIF
S 14200,6100,14200,7500,200,128nymous_,UP,ALU1
S 10000,1500,10000,6500,20000,blockagenet,UP,TALU5
S 0,8500,20000,8500,5000,blockagenet,RIGHT,TALU4
S 0,8500,20000,8500,5000,blockagenet,RIGHT,TALU2
S 4600,3700,4600,4600,200,70onymous_,UP,ALU1
S 5200,5600,5200,7000,200,57onymous_,UP,ALU1
S 12500,100,12500,1000,4200,14onymous_,UP,TALU3
S 13000,5600,13000,7500,300,89onymous_,UP,PDIF
S 13900,5400,13900,7700,100,102nymous_,UP,PTRANS
S 6700,4900,6700,5400,100,39onymous_,UP,POLY
S 3500,3000,3500,3000,6000,1nonymous_,RIGHT,TALU2
S 15400,3700,15400,4600,200,122nymous_,UP,ALU1
S 8500,9000,8500,30000,2200,132nymous_,UP,ALU1
S 4300,3600,4300,4900,100,64onymous_,UP,NTRANS
S 7000,100,7000,1500,3200,21onymous_,UP,TALU5
S 14800,5600,14800,7000,200,109nymous_,UP,ALU1
S 5800,3800,5800,4700,300,51onymous_,UP,NDIF
S 6400,5600,6400,7500,300,46onymous_,UP,PDIF
S 5500,3000,8500,3000,6000,8nonymous_,RIGHT,TALU4
S 500,2000,19500,2000,500,ck,RIGHT,CALU3
S 4000,4200,4000,6400,200,33onymous_,UP,ALU1
S 5800,500,5800,5600,200,77onymous_,UP,ALU2
S 13600,4200,13600,4600,200,83onymous_,UP,ALU1
S 13600,5100,16000,5100,200,96onymous_,RIGHT,ALU1
S 14200,500,14200,5600,200,129nymous_,UP,ALU2
S 15700,3600,15700,4900,100,116nymous_,UP,NTRANS
S 7000,3700,7000,4100,200,71onymous_,UP,ALU1
S 5200,5600,5200,7500,300,58onymous_,UP,PDIF
S 500,9500,19500,9500,1200,vsse,RIGHT,CALU3
S 500,18500,19500,18500,1200,vsse,RIGHT,CALU3
S 500,15500,19500,15500,1200,vsse,RIGHT,CALU3
S 500,12500,19500,12500,1200,vsse,RIGHT,CALU3
S 7000,100,7000,1000,3200,15onymous_,UP,TALU3
S 13300,3600,13300,4900,100,90onymous_,UP,NTRANS
S 14200,3800,14200,4700,300,103nymous_,UP,NDIF
S 4900,5100,6700,5100,300,40onymous_,RIGHT,POLY
S 5500,3000,8500,3000,6000,2nonymous_,RIGHT,TALU2
S 13000,3700,13000,4100,200,123nymous_,UP,ALU1
S 4300,4900,4300,5400,100,65onymous_,UP,POLY
S 9500,0,9500,1000,1200,cko,UP,CALU5
S 9500,0,9500,1000,1200,cko,UP,CALU4
S 3500,100,3500,1500,200,22onymous_,UP,TALU5
S 13600,5600,13600,7000,200,97onymous_,UP,ALU1
S 14800,5600,14800,7500,300,110nymous_,UP,PDIF
S 5800,5600,5800,7500,300,52onymous_,UP,PDIF
S 5200,5600,6400,5600,200,47onymous_,RIGHT,ALU1
S 10500,3000,14500,3000,6000,9nonymous_,RIGHT,TALU4
S 9500,0,9500,1000,1200,cko,DOWN,CALU5
S 9500,0,9500,1000,1200,cko,DOWN,CALU4
S 8500,9000,8500,30000,2200,*,DOWN,ALU1
S 500,9500,19500,9500,1200,vsse,LEFT,CALU3
S 500,8000,19500,8000,1200,vddi,LEFT,CALU3
S 500,6500,19500,6500,1200,vssi,RIGHT,CALU3
S 4000,3400,7000,3400,800,vssi,RIGHT,ALU1
S 13000,3400,16000,3400,800,vssi,RIGHT,ALU1
S 15500,0,15500,1000,1200,vssi,UP,CALU5
S 15500,0,15500,1000,1200,vssi,UP,CALU3
S 15500,0,15500,8500,1200,vssi,UP,CALU2
S 15500,0,15500,1000,1200,vssi,UP,CALU4
S 2500,0,2500,1000,1200,vssi,UP,CALU4
S 2500,0,2500,1000,1200,vssi,UP,CALU5
S 2500,0,2500,1000,1200,vssi,UP,CALU3
S 500,5000,19500,5000,1200,vddi,LEFT,CALU3
S 500,3500,19500,3500,1200,vssi,LEFT,CALU3
S 500,2000,19500,2000,500,ck,RIGHT,CALU3
S 500,18500,19500,18500,1200,vsse,LEFT,CALU3
S 500,17000,19500,17000,1200,vdde,LEFT,CALU3
S 500,15500,19500,15500,1200,vsse,LEFT,CALU3
S 500,14000,19500,14000,1200,vdde,LEFT,CALU3
S 500,12500,19500,12500,1200,vsse,LEFT,CALU3
S 500,11000,19500,11000,1200,vdde,LEFT,CALU3
S 4500,0,4500,8500,1200,vddi,UP,CALU2
S 4500,0,4500,1000,1200,vddi,UP,CALU3
S 4500,0,4500,1000,1200,vddi,DOWN,CALU5
S 4500,0,4500,1000,1200,vddi,DOWN,CALU4
S 2500,0,2500,8500,1200,vssi,UP,CALU2
S 500,3500,19500,3500,1200,vssi,RIGHT,CALU3
S 4000,8100,7000,8100,300,34onymous_,RIGHT,NTIE
S 6400,500,6400,5600,200,78onymous_,UP,ALU2
S 14800,4200,14800,4600,200,84onymous_,UP,ALU1
S 13600,500,13600,5600,200,130nymous_,UP,ALU2
S 5800,3700,5800,4100,200,72onymous_,UP,ALU1
S 15700,4900,15700,5400,100,117nymous_,UP,POLY
S 4900,3600,4900,4900,100,59onymous_,UP,NTRANS
S 10500,3000,14500,3000,6000,3nonymous_,RIGHT,TALU2
S 3500,100,3500,1000,200,16onymous_,UP,TALU3
S 13300,4900,13300,5400,100,91onymous_,UP,POLY
S 14200,5600,14200,7500,300,104nymous_,UP,PDIF
S 6700,5400,6700,7700,100,41onymous_,UP,PTRANS
S 7000,3100,7000,3700,200,28onymous_,UP,ALU2
S 14200,3700,14200,4100,200,124nymous_,UP,ALU1
S 3500,5100,4300,5100,300,66onymous_,RIGHT,POLY
S 19200,100,19200,1500,1600,23onymous_,UP,TALU5
S 13600,5600,13600,7500,300,98onymous_,UP,PDIF
S 15100,3600,15100,4900,100,111nymous_,UP,NTRANS
S 5500,3600,5500,4900,100,53onymous_,UP,NTRANS
S 6100,3600,6100,4900,100,48onymous_,UP,NTRANS
S 16500,3000,16500,3000,6000,10onymous_,RIGHT,TALU4
S 13000,8100,14200,8100,400,79onymous_,RIGHT,ALU2
S 16000,4200,16000,6400,200,85onymous_,UP,ALU1
S 11500,9000,11500,30000,2200,131nymous_,UP,ALU1
S 4600,3700,7000,3700,200,73onymous_,RIGHT,ALU1
S 3800,6900,7200,6900,2800,35onymous_,RIGHT,NWELL
S 14500,3600,14500,4900,100,105nymous_,UP,NTRANS
S 15700,5100,16500,5100,300,118nymous_,RIGHT,POLY
S 4900,4900,4900,5400,100,60onymous_,UP,POLY
S 16500,3000,16500,3000,6000,4nonymous_,RIGHT,TALU2
S 19200,100,19200,1000,1600,17onymous_,UP,TALU3
S 13300,5100,15100,5100,300,92onymous_,RIGHT,POLY
S 6400,3800,6400,4700,200,42onymous_,UP,NDIF
S 3500,2000,3500,5100,200,29onymous_,UP,ALU2
S 13000,3700,15400,3700,200,125nymous_,RIGHT,ALU1
S 4300,5400,4300,7700,100,67onymous_,UP,PTRANS
S 18500,3000,20000,3000,6000,11onymous_,RIGHT,TALU4
S 800,100,800,1500,1600,24onymous_,UP,TALU5
S 13600,5600,14800,5600,200,99onymous_,RIGHT,ALU1
S 15100,4900,15100,5400,100,112nymous_,UP,POLY
S 5500,4900,5500,5400,100,54onymous_,UP,POLY
S 6100,4900,6100,5400,100,49onymous_,UP,POLY
S 13000,8100,16000,8100,300,86onymous_,RIGHT,NTIE
S 7000,6100,7000,7500,200,74onymous_,UP,ALU1
S 6100,5400,6100,7700,100,50onymous_,UP,PTRANS
S 7000,3800,7000,4700,300,36onymous_,UP,NDIF
S 14500,4900,14500,5400,100,106nymous_,UP,POLY
S 15700,5400,15700,7700,100,119nymous_,UP,PTRANS
S 4900,5400,4900,7700,100,61onymous_,UP,PTRANS
S 18500,3000,20000,3000,6000,5nonymous_,RIGHT,TALU2
S 800,100,800,1000,1600,18onymous_,UP,TALU3
S 13300,5400,13300,7700,100,93onymous_,UP,PTRANS
S 5200,4600,6400,4600,200,43onymous_,RIGHT,ALU1
S 500,17000,19500,17000,1200,vdde,RIGHT,CALU3
S 500,14000,19500,14000,1200,vdde,RIGHT,CALU3
S 500,11000,19500,11000,1200,vdde,RIGHT,CALU3
S 10000,24000,10000,36000,12200,vdde,UP,CALU1
S 4000,3100,7000,3100,300,30onymous_,RIGHT,PTIE
S 13000,3100,13000,3700,200,80onymous_,UP,ALU2
S 15100,5400,15100,7700,100,113nymous_,UP,PTRANS
S 13000,6100,13000,7500,200,126nymous_,UP,ALU1
S 4000,3800,4000,4700,300,68onymous_,UP,NDIF
S 0,3000,20000,3000,6000,12onymous_,RIGHT,TALU6
S 5800,500,14200,500,200,25onymous_,RIGHT,ALU3
S 13900,3600,13900,4900,100,100nymous_,UP,NTRANS
B 17500,8000,1200,1200,CONT_VIA2,288nymous_
V 15400,7000,CONT_DIF_P,261nymous_
V 14800,4200,CONT_DIF_N,214nymous_
V 4600,4100,CONT_DIF_N,187nymous_
V 7000,3700,CONT_DIF_N,160nymous_
V 4000,3100,CONT_BODY_P,147nymous_
B 4500,500,1200,1200,CONT_VIA2,295nymous_
V 15400,3700,CONT_DIF_N,268nymous_
V 13600,6500,CONT_DIF_P,241nymous_
V 4000,5900,CONT_DIF_P,194nymous_
V 6400,4600,CONT_VIA,167nymous_
V 4000,8100,CONT_BODY_N,154nymous_
B 8500,14000,2200,1200,CONT_VIA2,302nymous_
B 11500,14000,2200,1200,CONT_VIA,275nymous_
V 14200,6100,CONT_DIF_P,248nymous_
V 13600,3100,CONT_BODY_P,221nymous_
V 5800,4100,CONT_DIF_N,174nymous_
B 15500,500,1200,1200,CONT_VIA4,282nymous_
V 14800,6500,CONT_DIF_P,255nymous_
V 13000,8100,CONT_BODY_N,228nymous_
V 5800,500,CONT_VIA2,201nymous_
V 15400,7500,CONT_DIF_P,262nymous_
V 13000,7500,CONT_DIF_P,235nymous_
V 13000,8100,CONT_VIA2,208nymous_
V 5800,7500,CONT_DIF_P,181nymous_
V 7000,3700,CONT_VIA,141nymous_
B 2500,3500,1200,1200,CONT_VIA2,289nymous_
V 13600,7000,CONT_DIF_P,242nymous_
V 16000,4200,CONT_DIF_N,215nymous_
V 4600,4600,CONT_DIF_N,188nymous_
V 7000,4100,CONT_DIF_N,161nymous_
V 4600,3100,CONT_BODY_P,148nymous_
B 4500,500,1200,1200,CONT_VIA3,296nymous_
V 14200,1000,CONT_VIA2,269nymous_
V 13000,3100,CONT_BODY_P,222nymous_
V 4000,6400,CONT_DIF_P,195nymous_
V 6400,5100,CONT_POLY,168nymous_
V 7000,8100,CONT_VIA,133nymous_
V 6400,8100,CONT_VIA,134nymous_
B 8500,17000,2200,1200,CONT_VIA,303nymous_
B 11500,14000,2200,1200,CONT_VIA2,276nymous_
V 14200,6500,CONT_DIF_P,249nymous_
V 6400,500,CONT_VIA2,202nymous_
V 5800,4600,CONT_VIA,175nymous_
V 5800,8100,CONT_VIA,135nymous_
B 15500,6500,1200,1200,CONT_VIA2,283nymous_
V 14800,7000,CONT_DIF_P,256nymous_
V 14800,5600,CONT_TURN1,229nymous_
V 5200,4600,CONT_DIF_N,182nymous_
V 5200,8100,CONT_BODY_N,155nymous_
V 7000,3100,CONT_VIA,142nymous_
B 2500,500,1200,1200,CONT_VIA2,290nymous_
V 16000,4600,CONT_DIF_N,263nymous_
V 13600,4600,CONT_DIF_N,236nymous_
V 13000,3100,CONT_VIA2,209nymous_
V 7000,6100,CONT_DIF_P,162nymous_
V 13600,1000,CONT_VIA2,270nymous_
V 14200,3700,CONT_DIF_N,243nymous_
V 13600,4200,CONT_DIF_N,216nymous_
V 4600,6000,CONT_DIF_P,189nymous_
V 5200,3100,CONT_BODY_P,149nymous_
B 4500,500,1200,1200,CONT_VIA4,297nymous_
V 14200,7000,CONT_DIF_P,250nymous_
V 15400,8100,CONT_BODY_N,223nymous_
V 3500,5100,CONT_POLY,196nymous_
V 6400,5600,CONT_VIA,169nymous_
B 8500,17000,2200,1200,CONT_VIA2,304nymous_
B 11500,17000,2200,1200,CONT_VIA,277nymous_
V 13000,3700,CONT_DIF_N,230nymous_
V 13000,8100,CONT_VIA,203nymous_
V 5800,5100,CONT_POLY,176nymous_
V 5800,8100,CONT_VIA2,136nymous_
B 17500,5000,1200,1200,CONT_VIA2,284nymous_
V 15400,4100,CONT_DIF_N,257nymous_
V 13000,3700,CONT_VIA2,210nymous_
V 5200,5100,CONT_POLY,183nymous_
V 5800,8100,CONT_BODY_N,156nymous_
V 3500,2000,CONT_VIA2,143nymous_
B 2500,500,1200,1200,CONT_VIA3,291nymous_
V 16000,5900,CONT_DIF_P,264nymous_
V 13600,4600,CONT_VIA,237nymous_
V 4600,6500,CONT_DIF_P,190nymous_
V 7000,6500,CONT_DIF_P,163nymous_
V 5800,3100,CONT_BODY_P,150nymous_
B 4500,8000,1200,1200,CONT_VIA2,298nymous_
V 14200,500,CONT_VIA2,271nymous_
V 14200,4100,CONT_DIF_N,244nymous_
V 16000,3100,CONT_BODY_P,217nymous_
V 6400,6000,CONT_DIF_P,170nymous_
B 11500,17000,2200,1200,CONT_VIA2,278nymous_
V 14200,7500,CONT_DIF_P,251nymous_
V 16000,8100,CONT_BODY_N,224nymous_
V 3500,5100,CONT_VIA,197nymous_
B 9500,500,1200,1200,CONT_VIA3,305nymous_
V 15400,4600,CONT_DIF_N,258nymous_
V 13000,4100,CONT_DIF_N,231nymous_
V 13600,8100,CONT_VIA,204nymous_
V 5800,5600,CONT_VIA,177nymous_
V 6400,8100,CONT_VIA2,137nymous_
B 17500,500,1200,1200,CONT_VIA2,285nymous_
V 13600,5100,CONT_POLY,238nymous_
V 13000,3700,CONT_VIA,211nymous_
V 5200,6000,CONT_DIF_P,184nymous_
V 6400,8100,CONT_BODY_N,157nymous_
V 5200,4200,CONT_DIF_N,144nymous_
B 2500,500,1200,1200,CONT_VIA4,292nymous_
V 16000,6400,CONT_DIF_P,265nymous_
V 15400,3100,CONT_BODY_P,218nymous_
V 4600,7000,CONT_DIF_P,191nymous_
V 7000,7000,CONT_DIF_P,164nymous_
V 6400,3100,CONT_BODY_P,151nymous_
B 8500,11000,2200,1200,CONT_VIA,299nymous_
V 13600,500,CONT_VIA2,272nymous_
V 14200,4600,CONT_VIA,245nymous_
V 4600,3700,CONT_DIF_N,198nymous_
V 6400,6500,CONT_DIF_P,171nymous_
B 9500,500,1200,1200,CONT_VIA4,306nymous_
B 15500,3500,1200,1200,CONT_VIA2,279nymous_
V 14800,4600,CONT_DIF_N,252nymous_
V 14800,8100,CONT_BODY_N,225nymous_
V 5800,6100,CONT_DIF_P,178nymous_
V 7000,8100,CONT_VIA2,138nymous_
B 17500,500,1200,1200,CONT_VIA3,286nymous_
V 15400,6000,CONT_DIF_P,259nymous_
V 13000,6100,CONT_DIF_P,232nymous_
V 14200,8100,CONT_VIA,205nymous_
V 7000,8100,CONT_BODY_N,158nymous_
V 16500,5100,CONT_POLY,266nymous_
V 13600,5600,CONT_VIA,239nymous_
V 13000,3100,CONT_VIA,212nymous_
V 5200,6500,CONT_DIF_P,185nymous_
V 4000,4200,CONT_DIF_N,145nymous_
B 2500,6500,1200,1200,CONT_VIA2,293nymous_
V 14200,5100,CONT_POLY,246nymous_
V 14800,3100,CONT_BODY_P,219nymous_
V 4600,7500,CONT_DIF_P,192nymous_
V 7000,7500,CONT_DIF_P,165nymous_
V 7000,3100,CONT_BODY_P,152nymous_
B 8500,11000,2200,1200,CONT_VIA2,300nymous_
B 11500,11000,2200,1200,CONT_VIA,273nymous_
V 14200,8100,CONT_BODY_N,226nymous_
V 5800,1000,CONT_VIA2,199nymous_
V 6400,7000,CONT_DIF_P,172nymous_
B 15500,500,1200,1200,CONT_VIA2,280nymous_
V 14800,5100,CONT_POLY,253nymous_
V 14200,8100,CONT_VIA2,206nymous_
V 5800,6500,CONT_DIF_P,179nymous_
V 7000,3100,CONT_VIA2,139nymous_
B 17500,500,1200,1200,CONT_VIA4,287nymous_
V 15400,6500,CONT_DIF_P,260nymous_
V 13000,6500,CONT_DIF_P,233nymous_
V 5200,7000,CONT_DIF_P,186nymous_
V 5200,5600,CONT_TURN1,159nymous_
V 6400,4200,CONT_DIF_N,146nymous_
B 4500,5000,1200,1200,CONT_VIA2,294nymous_
V 16500,5100,CONT_VIA,267nymous_
V 13600,6000,CONT_DIF_P,240nymous_
V 16500,2000,CONT_VIA2,213nymous_
V 6400,4600,CONT_DIF_N,166nymous_
B 11500,11000,2200,1200,CONT_VIA2,274nymous_
V 14200,5600,CONT_VIA,247nymous_
V 14200,3100,CONT_BODY_P,220nymous_
V 4000,4600,CONT_DIF_N,193nymous_
V 4600,8100,CONT_BODY_N,153nymous_
B 8500,14000,2200,1200,CONT_VIA,301nymous_
V 14800,6000,CONT_DIF_P,254nymous_
V 13600,8100,CONT_BODY_N,227nymous_
V 6400,1000,CONT_VIA2,200nymous_
V 5800,3700,CONT_DIF_N,173nymous_
B 15500,500,1200,1200,CONT_VIA3,281nymous_
V 13000,7000,CONT_DIF_P,234nymous_
V 13600,8100,CONT_VIA2,207nymous_
V 5800,7000,CONT_DIF_P,180nymous_
V 7000,3700,CONT_VIA2,140nymous_
S 2500,0,2500,1000,1200,vssi,UP,CALU3
S 2500,0,2500,1000,1200,vssi,DOWN,CALU5
S 2500,0,2500,1000,1200,vssi,DOWN,CALU4
S 17500,0,17500,8500,1200,vddi,UP,CALU2
S 17500,0,17500,1000,1200,vddi,UP,CALU3
S 17500,0,17500,1000,1200,vddi,DOWN,CALU5
S 17500,0,17500,1000,1200,vddi,DOWN,CALU4
S 15500,0,15500,8500,1200,vssi,UP,CALU2
S 15500,0,15500,1000,1200,vssi,UP,CALU3
S 15500,0,15500,1000,1200,vssi,DOWN,CALU5
S 15500,0,15500,1000,1200,vssi,DOWN,CALU4
S 11500,9000,11500,30000,2200,*,DOWN,ALU1
S 13600,500,13600,5600,200,*,DOWN,ALU2
S 14200,500,14200,5600,200,*,DOWN,ALU2
S 14200,6100,14200,7500,200,*,UP,ALU1
S 15400,6000,15400,7500,200,*,DOWN,ALU1
S 13000,6100,13000,7500,200,*,UP,ALU1
S 13000,3700,15400,3700,200,*,RIGHT,ALU1
S 14200,3700,14200,4100,200,*,DOWN,ALU1
S 13000,3700,13000,4100,200,*,DOWN,ALU1
S 15400,3700,15400,4600,200,*,DOWN,ALU1
S 16000,5600,16000,7500,300,*,UP,PDIF
S 16000,3800,16000,4700,300,*,DOWN,NDIF
S 15700,5400,15700,7700,100,*,UP,PTRANS
S 15700,5100,16500,5100,300,*,LEFT,POLY
S 15700,4900,15700,5400,100,*,DOWN,POLY
S 15700,3600,15700,4900,100,*,DOWN,NTRANS
S 15400,5600,15400,7500,300,*,UP,PDIF
S 15400,3800,15400,4700,200,*,DOWN,NDIF
S 15100,5400,15100,7700,100,*,UP,PTRANS
S 15100,4900,15100,5400,100,*,DOWN,POLY
S 15100,3600,15100,4900,100,*,UP,NTRANS
S 14800,5600,14800,7500,300,*,UP,PDIF
S 14800,5600,14800,7000,200,*,UP,ALU1
S 14800,3800,14800,4700,200,*,DOWN,NDIF
S 14500,5400,14500,7700,100,*,UP,PTRANS
S 14500,4900,14500,5400,100,*,DOWN,POLY
S 14500,3600,14500,4900,100,*,UP,NTRANS
S 14200,5600,14200,7500,300,*,UP,PDIF
S 14200,3800,14200,4700,300,*,DOWN,NDIF
S 13900,5400,13900,7700,100,*,DOWN,PTRANS
S 13900,4900,13900,5400,100,*,UP,POLY
S 13900,3600,13900,4900,100,*,DOWN,NTRANS
S 13600,5600,14800,5600,200,*,LEFT,ALU1
S 13600,5600,13600,7500,300,*,DOWN,PDIF
S 13600,5600,13600,7000,200,*,UP,ALU1
S 13600,5100,16000,5100,200,*,LEFT,ALU1
S 13600,4600,14800,4600,200,*,LEFT,ALU1
S 13600,3800,13600,4700,200,*,UP,NDIF
S 13300,5400,13300,7700,100,*,DOWN,PTRANS
S 13300,5100,15100,5100,300,*,LEFT,POLY
S 13300,4900,13300,5400,100,*,UP,POLY
S 13300,3600,13300,4900,100,*,DOWN,NTRANS
S 13000,5600,13000,7500,300,*,UP,PDIF
S 13000,3800,13000,4700,300,*,DOWN,NDIF
S 12800,6900,16200,6900,2800,*,LEFT,NWELL
S 13000,8100,16000,8100,300,*,RIGHT,NTIE
S 16000,4200,16000,6400,200,*,DOWN,ALU1
S 14800,4200,14800,4600,200,*,DOWN,ALU1
S 13600,4200,13600,4600,200,*,DOWN,ALU1
S 13000,3100,16000,3100,300,*,RIGHT,PTIE
S 16500,2000,16500,5100,200,*,DOWN,ALU2
S 13000,3100,13000,3700,200,*,DOWN,ALU2
S 13000,8100,14200,8100,400,*,RIGHT,ALU2
S 13000,7800,16000,7800,800,vddi,RIGHT,ALU1
S 13000,3400,16000,3400,800,vssi,RIGHT,ALU1
S 6400,500,6400,5600,200,*,UP,ALU2
S 5800,500,5800,5600,200,*,UP,ALU2
S 5800,6100,5800,7500,200,*,DOWN,ALU1
S 4600,6000,4600,7500,200,*,UP,ALU1
S 7000,6100,7000,7500,200,*,DOWN,ALU1
S 4600,3700,7000,3700,200,*,RIGHT,ALU1
S 5800,3700,5800,4100,200,*,UP,ALU1
S 7000,3700,7000,4100,200,*,UP,ALU1
S 4600,3700,4600,4600,200,*,UP,ALU1
S 4000,5600,4000,7500,300,*,DOWN,PDIF
S 4000,3800,4000,4700,300,*,UP,NDIF
S 4300,5400,4300,7700,100,*,DOWN,PTRANS
S 3500,5100,4300,5100,300,*,LEFT,POLY
S 4300,4900,4300,5400,100,*,UP,POLY
S 4300,3600,4300,4900,100,*,UP,NTRANS
S 4600,5600,4600,7500,300,*,DOWN,PDIF
S 4600,3800,4600,4700,200,*,UP,NDIF
S 4900,5400,4900,7700,100,*,DOWN,PTRANS
S 4900,4900,4900,5400,100,*,UP,POLY
S 4900,3600,4900,4900,100,*,DOWN,NTRANS
S 5200,5600,5200,7500,300,*,DOWN,PDIF
S 5200,5600,5200,7000,200,*,DOWN,ALU1
S 5200,3800,5200,4700,200,*,UP,NDIF
S 5500,5400,5500,7700,100,*,DOWN,PTRANS
S 5500,4900,5500,5400,100,*,UP,POLY
S 5500,3600,5500,4900,100,*,DOWN,NTRANS
S 5800,5600,5800,7500,300,*,DOWN,PDIF
S 5800,3800,5800,4700,300,*,UP,NDIF
S 6100,5400,6100,7700,100,*,UP,PTRANS
S 6100,4900,6100,5400,100,*,DOWN,POLY
S 6100,3600,6100,4900,100,*,UP,NTRANS
S 5200,5600,6400,5600,200,*,LEFT,ALU1
S 6400,5600,6400,7500,300,*,UP,PDIF
S 6400,5600,6400,7000,200,*,DOWN,ALU1
S 4000,5100,6400,5100,200,*,LEFT,ALU1
S 5200,4600,6400,4600,200,*,LEFT,ALU1
S 6400,3800,6400,4700,200,*,DOWN,NDIF
S 6700,5400,6700,7700,100,*,UP,PTRANS
S 4900,5100,6700,5100,300,*,LEFT,POLY
S 6700,4900,6700,5400,100,*,DOWN,POLY
S 6700,3600,6700,4900,100,*,UP,NTRANS
S 7000,5600,7000,7500,300,*,DOWN,PDIF
S 7000,3800,7000,4700,300,*,UP,NDIF
S 3800,6900,7200,6900,2800,*,LEFT,NWELL
S 4000,8100,7000,8100,300,*,RIGHT,NTIE
S 4000,4200,4000,6400,200,*,UP,ALU1
S 5200,4200,5200,4600,200,*,UP,ALU1
S 6400,4200,6400,4600,200,*,UP,ALU1
S 4000,3100,7000,3100,300,*,RIGHT,PTIE
S 3500,2000,3500,5100,200,*,UP,ALU2
S 7000,3100,7000,3700,200,*,UP,ALU2
S 5800,8100,7000,8100,400,*,RIGHT,ALU2
S 4000,7800,7000,7800,800,vddi,RIGHT,ALU1
S 4000,3400,7000,3400,800,vssi,RIGHT,ALU1
S 10000,24000,10000,36000,12200,vdde,DOWN,CALU1
I 0,20000,padreal,padreal,NOSYM
B 9500,500,1200,1200,CONT_VIA4,*
B 9500,500,1200,1200,CONT_VIA3,*
B 8500,17000,2200,1200,CONT_VIA2,*
B 8500,17000,2200,1200,CONT_VIA,*
B 8500,14000,2200,1200,CONT_VIA2,*
B 8500,14000,2200,1200,CONT_VIA,*
B 8500,11000,2200,1200,CONT_VIA2,*
B 8500,11000,2200,1200,CONT_VIA,*
B 4500,8000,1200,1200,CONT_VIA2,*
B 4500,500,1200,1200,CONT_VIA4,*
B 4500,500,1200,1200,CONT_VIA3,*
B 4500,500,1200,1200,CONT_VIA2,*
B 4500,5000,1200,1200,CONT_VIA2,*
B 2500,6500,1200,1200,CONT_VIA2,*
B 2500,500,1200,1200,CONT_VIA4,*
B 2500,500,1200,1200,CONT_VIA3,*
B 2500,500,1200,1200,CONT_VIA2,*
B 2500,3500,1200,1200,CONT_VIA2,*
B 17500,8000,1200,1200,CONT_VIA2,*
B 17500,500,1200,1200,CONT_VIA4,*
B 17500,500,1200,1200,CONT_VIA3,*
B 17500,500,1200,1200,CONT_VIA2,*
B 17500,5000,1200,1200,CONT_VIA2,*
B 15500,6500,1200,1200,CONT_VIA2,*
B 15500,500,1200,1200,CONT_VIA4,*
B 15500,500,1200,1200,CONT_VIA3,*
B 15500,500,1200,1200,CONT_VIA2,*
B 15500,3500,1200,1200,CONT_VIA2,*
B 11500,17000,2200,1200,CONT_VIA2,*
B 11500,17000,2200,1200,CONT_VIA,*
B 11500,14000,2200,1200,CONT_VIA2,*
B 11500,14000,2200,1200,CONT_VIA,*
B 11500,11000,2200,1200,CONT_VIA2,*
B 11500,11000,2200,1200,CONT_VIA,*
V 13600,500,CONT_VIA2,*
V 14200,500,CONT_VIA2,*
V 13600,1000,CONT_VIA2,*
V 14200,1000,CONT_VIA2,*
V 15400,3700,CONT_DIF_N,*
V 16500,5100,CONT_VIA,*
V 16500,5100,CONT_POLY,*
V 16000,6400,CONT_DIF_P,*
V 16000,5900,CONT_DIF_P,*
V 16000,4600,CONT_DIF_N,*
V 15400,7500,CONT_DIF_P,*
V 15400,7000,CONT_DIF_P,*
V 15400,6500,CONT_DIF_P,*
V 15400,6000,CONT_DIF_P,*
V 15400,4600,CONT_DIF_N,*
V 15400,4100,CONT_DIF_N,*
V 14800,7000,CONT_DIF_P,*
V 14800,6500,CONT_DIF_P,*
V 14800,6000,CONT_DIF_P,*
V 14800,5100,CONT_POLY,*
V 14800,4600,CONT_DIF_N,*
V 14200,7500,CONT_DIF_P,*
V 14200,7000,CONT_DIF_P,*
V 14200,6500,CONT_DIF_P,*
V 14200,6100,CONT_DIF_P,*
V 14200,5600,CONT_VIA,*
V 14200,5100,CONT_POLY,*
V 14200,4600,CONT_VIA,*
V 14200,4100,CONT_DIF_N,*
V 14200,3700,CONT_DIF_N,*
V 13600,7000,CONT_DIF_P,*
V 13600,6500,CONT_DIF_P,*
V 13600,6000,CONT_DIF_P,*
V 13600,5600,CONT_VIA,*
V 13600,5100,CONT_POLY,*
V 13600,4600,CONT_VIA,*
V 13600,4600,CONT_DIF_N,*
V 13000,7500,CONT_DIF_P,*
V 13000,7000,CONT_DIF_P,*
V 13000,6500,CONT_DIF_P,*
V 13000,6100,CONT_DIF_P,*
V 13000,4100,CONT_DIF_N,*
V 13000,3700,CONT_DIF_N,*
B 14800,5600,200,200,CONT_TURN1,*
V 13000,8100,CONT_BODY_N,*
V 13600,8100,CONT_BODY_N,*
V 14200,8100,CONT_BODY_N,*
V 14800,8100,CONT_BODY_N,*
V 16000,8100,CONT_BODY_N,*
V 15400,8100,CONT_BODY_N,*
V 13000,3100,CONT_BODY_P,*
V 13600,3100,CONT_BODY_P,*
V 14200,3100,CONT_BODY_P,*
V 14800,3100,CONT_BODY_P,*
V 15400,3100,CONT_BODY_P,*
V 16000,3100,CONT_BODY_P,*
V 13600,4200,CONT_DIF_N,*
V 16000,4200,CONT_DIF_N,*
V 14800,4200,CONT_DIF_N,*
V 16500,2000,CONT_VIA2,*
V 13000,3100,CONT_VIA,*
V 13000,3700,CONT_VIA,*
V 13000,3700,CONT_VIA2,*
V 13000,3100,CONT_VIA2,*
V 13000,8100,CONT_VIA2,*
V 13600,8100,CONT_VIA2,*
V 14200,8100,CONT_VIA2,*
V 14200,8100,CONT_VIA,*
V 13600,8100,CONT_VIA,*
V 13000,8100,CONT_VIA,*
V 6400,500,CONT_VIA2,*
V 5800,500,CONT_VIA2,*
V 6400,1000,CONT_VIA2,*
V 5800,1000,CONT_VIA2,*
V 4600,3700,CONT_DIF_N,*
V 3500,5100,CONT_VIA,*
V 3500,5100,CONT_POLY,*
V 4000,6400,CONT_DIF_P,*
V 4000,5900,CONT_DIF_P,*
V 4000,4600,CONT_DIF_N,*
V 4600,7500,CONT_DIF_P,*
V 4600,7000,CONT_DIF_P,*
V 4600,6500,CONT_DIF_P,*
V 4600,6000,CONT_DIF_P,*
V 4600,4600,CONT_DIF_N,*
V 4600,4100,CONT_DIF_N,*
V 5200,7000,CONT_DIF_P,*
V 5200,6500,CONT_DIF_P,*
V 5200,6000,CONT_DIF_P,*
V 5200,5100,CONT_POLY,*
V 5200,4600,CONT_DIF_N,*
V 5800,7500,CONT_DIF_P,*
V 5800,7000,CONT_DIF_P,*
V 5800,6500,CONT_DIF_P,*
V 5800,6100,CONT_DIF_P,*
V 5800,5600,CONT_VIA,*
V 5800,5100,CONT_POLY,*
V 5800,4600,CONT_VIA,*
V 5800,4100,CONT_DIF_N,*
V 5800,3700,CONT_DIF_N,*
V 6400,7000,CONT_DIF_P,*
V 6400,6500,CONT_DIF_P,*
V 6400,6000,CONT_DIF_P,*
V 6400,5600,CONT_VIA,*
V 6400,5100,CONT_POLY,*
V 6400,4600,CONT_VIA,*
V 6400,4600,CONT_DIF_N,*
V 7000,7500,CONT_DIF_P,*
V 7000,7000,CONT_DIF_P,*
V 7000,6500,CONT_DIF_P,*
V 7000,6100,CONT_DIF_P,*
V 7000,4100,CONT_DIF_N,*
V 7000,3700,CONT_DIF_N,*
B 5200,5600,200,200,CONT_TURN1,*
V 7000,8100,CONT_BODY_N,*
V 6400,8100,CONT_BODY_N,*
V 5800,8100,CONT_BODY_N,*
V 5200,8100,CONT_BODY_N,*
V 4000,8100,CONT_BODY_N,*
V 4600,8100,CONT_BODY_N,*
V 7000,3100,CONT_BODY_P,*
V 6400,3100,CONT_BODY_P,*
V 5800,3100,CONT_BODY_P,*
V 5200,3100,CONT_BODY_P,*
V 4600,3100,CONT_BODY_P,*
V 4000,3100,CONT_BODY_P,*
V 6400,4200,CONT_DIF_N,*
V 4000,4200,CONT_DIF_N,*
V 5200,4200,CONT_DIF_N,*
V 3500,2000,CONT_VIA2,*
V 7000,3100,CONT_VIA,*
V 7000,3700,CONT_VIA,*
V 7000,3700,CONT_VIA2,*
V 7000,3100,CONT_VIA2,*
V 7000,8100,CONT_VIA2,*
V 6400,8100,CONT_VIA2,*
V 5800,8100,CONT_VIA2,*
V 5800,8100,CONT_VIA,*
V 6400,8100,CONT_VIA,*
V 7000,8100,CONT_VIA,*
EOF

59
alliance/src/cells/src/pxlib/pvddeck_sp.ap Normal file
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@ -0,0 +1,59 @@
V ALLIANCE : 6
H pvddeck_sp,P, 4/ 9/2014,100
A 0,0,20000,40000
C 20000,2000,500,ck,5,EAST,ALU3
C 0,2000,500,ck,4,WEST,ALU3
C 20000,5000,1200,vddi,1,EAST,ALU3
C 20000,3500,1200,vssi,1,EAST,ALU3
C 20000,17000,1200,vdde,5,EAST,ALU3
C 20000,14000,1200,vdde,3,EAST,ALU3
C 20000,11000,1200,vdde,1,EAST,ALU3
C 20000,9500,1200,vsse,1,EAST,ALU3
C 20000,12500,1200,vsse,3,EAST,ALU3
C 20000,15500,1200,vsse,5,EAST,ALU3
C 20000,18500,1200,vsse,7,EAST,ALU3
C 0,17000,1200,vdde,4,WEST,ALU3
C 0,14000,1200,vdde,2,WEST,ALU3
C 0,11000,1200,vdde,0,WEST,ALU3
C 0,9500,1200,vsse,0,WEST,ALU3
C 0,5000,1200,vddi,0,WEST,ALU3
C 0,3500,1200,vssi,0,WEST,ALU3
C 0,12500,1200,vsse,2,WEST,ALU3
C 0,15500,1200,vsse,4,WEST,ALU3
C 0,18500,1200,vsse,6,WEST,ALU3
C 20000,8000,1200,vddi,3,EAST,ALU3
C 20000,6500,1200,vssi,3,EAST,ALU3
C 0,6500,1200,vssi,2,WEST,ALU3
C 0,8000,1200,vddi,2,WEST,ALU3
C 10000,40000,100,vdde,6,NORTH,ALU1
C 9500,0,200,cko,1,SOUTH,ALU2
C 9500,0,200,cko,0,SOUTH,ALU1
S 5800,700,14200,700,800,cko,RIGHT,ALU2
S 0,6500,400,6500,1200,*,RIGHT,ALU3
S 0,5000,400,5000,1200,*,RIGHT,ALU3
S 0,3500,400,3500,1200,*,RIGHT,ALU3
S 0,2000,400,2000,500,*,RIGHT,ALU3
S 0,18500,400,18500,1200,*,RIGHT,ALU3
S 0,17000,400,17000,1200,*,RIGHT,ALU3
S 0,12500,400,12500,1200,*,RIGHT,ALU3
S 0,15500,400,15500,1200,*,RIGHT,ALU3
S 0,14000,400,14000,1200,*,RIGHT,ALU3
S 0,11000,400,11000,1200,*,RIGHT,ALU3
S 0,9500,400,9500,1200,*,RIGHT,ALU3
S 0,8000,400,8000,1200,*,RIGHT,ALU3
S 19600,2000,20000,2000,500,*,RIGHT,ALU3
S 19600,3500,20000,3500,1200,*,RIGHT,ALU3
S 19600,5000,20000,5000,1200,*,RIGHT,ALU3
S 19600,6500,20000,6500,1200,*,RIGHT,ALU3
S 19600,8000,20000,8000,1200,*,RIGHT,ALU3
S 19600,9500,20000,9500,1200,*,RIGHT,ALU3
S 19600,11000,20000,11000,1200,*,RIGHT,ALU3
S 19600,12500,20000,12500,1200,*,RIGHT,ALU3
S 19600,14000,20000,14000,1200,*,RIGHT,ALU3
S 19600,15500,20000,15500,1200,*,RIGHT,ALU3
S 19600,17000,20000,17000,1200,*,RIGHT,ALU3
S 19600,18500,20000,18500,1200,*,RIGHT,ALU3
S 10000,30000,10000,40000,100,*,DOWN,ALU1
I 0,0,pvddeck_px,a,NOSYM
B 9500,500,1200,1200,CONT_VIA,*
EOF

31
alliance/src/cells/src/pxlib/pvddeck_sp.vbe Normal file
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@ -0,0 +1,31 @@
ENTITY pvddeck_sp IS
GENERIC (
CONSTANT area : NATURAL := 80000;
CONSTANT cin_ck : NATURAL := 127;
CONSTANT tpll_ck : NATURAL := 1055;
CONSTANT rdown_ck : NATURAL := 126;
CONSTANT tphh_ck : NATURAL := 963;
CONSTANT rup_ck : NATURAL := 183
);
PORT (
cko : out WOR_BIT BUS;
ck : in BIT;
vdde : in BIT;
vddi : in BIT;
vsse : in BIT;
vssi : in BIT
);
END pvddeck_sp;
ARCHITECTURE behaviour_data_flow OF pvddeck_sp IS
BEGIN
label0 : BLOCK ('1' = '1')
BEGIN
cko <= GUARDED ck;
END BLOCK label0;
ASSERT ((((not (vssi) and not (vsse)) and vddi) and vdde) = '1')
REPORT "power supply is missing on pvddeck_sp"
SEVERITY WARNING;
END;

138
alliance/src/cells/src/pxlib/pvddi_px.ap
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@ -1,88 +1,64 @@
V ALLIANCE : 6
H pvddi_px,P,20/11/2010,100
H pvddi_px,P,10/10/2005,100
A 0,0,20000,40000
I 0,20000,padreal,padreal,NOSYM
S 10000,1500,10000,6500,20000,blockagenet,UP,TALU5
S 0,8500,20000,8500,5000,blockagenet,RIGHT,TALU4
S 0,8500,20000,8500,5000,blockagenet,RIGHT,TALU2
S 18500,3000,20000,3000,6000,14onymous_,RIGHT,TALU2
S 19200,100,19200,1500,1600,9nonymous_,UP,TALU5
S 19200,100,19200,1000,1600,4nonymous_,UP,TALU3
S 4000,100,4000,1500,1200,6nonymous_,UP,TALU5
S 800,100,800,1000,1600,0nonymous_,UP,TALU3
S 4000,100,4000,1000,1200,1nonymous_,UP,TALU3
S 18500,3000,20000,3000,6000,19onymous_,RIGHT,TALU4
S 3500,3000,4500,3000,6000,11onymous_,RIGHT,TALU2
S 500,11000,19500,11000,1200,vdde,RIGHT,CALU3
S 500,14000,19500,14000,1200,vdde,RIGHT,CALU3
S 500,17000,19500,17000,1200,vdde,RIGHT,CALU3
S 500,12500,19500,12500,1200,vsse,RIGHT,CALU3
S 500,15500,19500,15500,1200,vsse,RIGHT,CALU3
S 500,18500,19500,18500,1200,vsse,RIGHT,CALU3
S 500,9500,19500,9500,1200,vsse,RIGHT,CALU3
S 3500,3000,4500,3000,6000,16onymous_,RIGHT,TALU4
S 8500,3000,8500,30000,2200,21onymous_,UP,ALU1
S 16000,100,16000,1500,1200,8nonymous_,UP,TALU5
S 5500,0,5500,1000,1200,vddi,UP,CALU5
S 5500,0,5500,1000,1200,vddi,UP,CALU4
S 500,8000,19500,8000,1200,vddi,RIGHT,CALU3
S 500,5000,19500,5000,1200,vddi,RIGHT,CALU3
S 17500,0,17500,8500,1200,vddi,UP,CALU2
S 17500,0,17500,1000,1200,vddi,UP,CALU3
S 17500,0,17500,1000,1200,vddi,UP,CALU5
S 17500,0,17500,1000,1200,vddi,UP,CALU4
S 10000,24000,10000,36000,12200,vddi,UP,CALU1
S 10000,24000,10000,36000,12200,vddi,DOWN,CALU1
S 8500,3000,8500,30000,2200,*,DOWN,ALU1
S 5500,0,5500,8500,1200,vddi,UP,CALU2
S 5500,0,5500,1000,1200,vddi,UP,CALU3
S 16000,100,16000,1000,1200,3nonymous_,UP,TALU3
S 11500,3000,11500,30000,2200,22onymous_,UP,ALU1
S 15500,3000,16500,3000,6000,13onymous_,RIGHT,TALU2
S 15500,3000,16500,3000,6000,18onymous_,RIGHT,TALU4
S 0,3000,1500,3000,6000,15onymous_,RIGHT,TALU4
S 0,3000,1500,3000,6000,10onymous_,RIGHT,TALU2
S 14500,0,14500,1000,1200,vssi,UP,CALU4
S 14500,0,14500,1000,1200,vssi,UP,CALU5
S 14500,0,14500,1000,1200,vssi,UP,CALU3
S 14500,0,14500,8500,1200,vssi,UP,CALU2
S 2500,0,2500,1000,1200,vssi,UP,CALU4
S 2500,0,2500,1000,1200,vssi,UP,CALU5
S 2500,0,2500,1000,1200,vssi,UP,CALU3
S 2500,0,2500,8500,1200,vssi,UP,CALU2
S 500,3500,19500,3500,1200,vssi,RIGHT,CALU3
S 5500,0,5500,1000,1200,vddi,DOWN,CALU5
S 5500,0,5500,1000,1200,vddi,DOWN,CALU4
S 500,9500,19500,9500,1200,vsse,LEFT,CALU3
S 500,8000,19500,8000,1200,vddi,LEFT,CALU3
S 500,6500,19500,6500,1200,vssi,RIGHT,CALU3
S 800,100,800,1500,1600,5nonymous_,UP,TALU5
S 0,3000,20000,3000,6000,20onymous_,RIGHT,TALU6
S 10000,100,10000,1500,7200,7nonymous_,UP,TALU5
S 10000,100,10000,1000,7200,2nonymous_,UP,TALU3
S 6500,3000,13500,3000,6000,12onymous_,RIGHT,TALU2
S 500,5000,19500,5000,1200,vddi,LEFT,CALU3
S 500,3500,19500,3500,1200,vssi,LEFT,CALU3
S 500,2000,19500,2000,500,ck,RIGHT,CALU3
S 6500,3000,13500,3000,6000,17onymous_,RIGHT,TALU4
B 17500,5000,1200,1200,CONT_VIA2,41onymous_
B 2500,3500,1200,1200,CONT_VIA2,36onymous_
B 5500,5000,1200,1200,CONT_VIA2,31onymous_
B 11500,8000,2200,1200,CONT_VIA,48onymous_
B 14500,500,1200,1200,CONT_VIA4,43onymous_
B 17500,500,1200,1200,CONT_VIA4,38onymous_
B 11500,5000,2200,1200,CONT_VIA,50onymous_
B 8500,8000,2200,1200,CONT_VIA2,23onymous_
B 8500,8000,2200,1200,CONT_VIA,24onymous_
B 5500,500,1200,1200,CONT_VIA4,28onymous_
B 2500,500,1200,1200,CONT_VIA4,33onymous_
B 14500,500,1200,1200,CONT_VIA2,45onymous_
B 17500,500,1200,1200,CONT_VIA2,40onymous_
B 8500,5000,2200,1200,CONT_VIA2,25onymous_
B 5500,500,1200,1200,CONT_VIA2,30onymous_
B 2500,500,1200,1200,CONT_VIA2,35onymous_
B 11500,8000,2200,1200,CONT_VIA2,47onymous_
B 14500,6500,1200,1200,CONT_VIA2,42onymous_
B 5500,8000,1200,1200,CONT_VIA2,27onymous_
B 17500,8000,1200,1200,CONT_VIA2,37onymous_
B 2500,6500,1200,1200,CONT_VIA2,32onymous_
B 11500,5000,2200,1200,CONT_VIA2,49onymous_
B 14500,500,1200,1200,CONT_VIA3,44onymous_
B 17500,500,1200,1200,CONT_VIA3,39onymous_
B 2500,500,1200,1200,CONT_VIA3,34onymous_
B 14500,3500,1200,1200,CONT_VIA2,46onymous_
B 8500,5000,2200,1200,CONT_VIA,26onymous_
B 5500,500,1200,1200,CONT_VIA3,29onymous_
S 500,18500,19500,18500,1200,vsse,LEFT,CALU3
S 500,17000,19500,17000,1200,vdde,LEFT,CALU3
S 500,15500,19500,15500,1200,vsse,LEFT,CALU3
S 500,14000,19500,14000,1200,vdde,LEFT,CALU3
S 500,12500,19500,12500,1200,vsse,LEFT,CALU3
S 500,11000,19500,11000,1200,vdde,LEFT,CALU3
S 2500,0,2500,8500,1200,vssi,UP,CALU2
S 2500,0,2500,1000,1200,vssi,UP,CALU3
S 2500,0,2500,1000,1200,vssi,DOWN,CALU5
S 2500,0,2500,1000,1200,vssi,DOWN,CALU4
S 17500,0,17500,8500,1200,vddi,UP,CALU2
S 17500,0,17500,1000,1200,vddi,UP,CALU3
S 17500,0,17500,1000,1200,vddi,DOWN,CALU5
S 17500,0,17500,1000,1200,vddi,DOWN,CALU4
S 14500,0,14500,8500,1200,vssi,UP,CALU2
S 14500,0,14500,1000,1200,vssi,UP,CALU3
S 14500,0,14500,1000,1200,vssi,DOWN,CALU5
S 14500,0,14500,1000,1200,vssi,DOWN,CALU4
S 11500,3000,11500,30000,2200,*,DOWN,ALU1
I 0,20000,padreal,padreal,NOSYM
B 8500,8000,2200,1200,CONT_VIA2,*
B 8500,8000,2200,1200,CONT_VIA,*
B 8500,5000,2200,1200,CONT_VIA2,*
B 8500,5000,2200,1200,CONT_VIA,*
B 5500,8000,1200,1200,CONT_VIA2,*
B 5500,500,1200,1200,CONT_VIA4,*
B 5500,500,1200,1200,CONT_VIA3,*
B 5500,500,1200,1200,CONT_VIA2,*
B 5500,5000,1200,1200,CONT_VIA2,*
B 2500,6500,1200,1200,CONT_VIA2,*
B 2500,500,1200,1200,CONT_VIA4,*
B 2500,500,1200,1200,CONT_VIA3,*
B 2500,500,1200,1200,CONT_VIA2,*
B 2500,3500,1200,1200,CONT_VIA2,*
B 17500,8000,1200,1200,CONT_VIA2,*
B 17500,500,1200,1200,CONT_VIA4,*
B 17500,500,1200,1200,CONT_VIA3,*
B 17500,500,1200,1200,CONT_VIA2,*
B 17500,5000,1200,1200,CONT_VIA2,*
B 14500,6500,1200,1200,CONT_VIA2,*
B 14500,500,1200,1200,CONT_VIA4,*
B 14500,500,1200,1200,CONT_VIA3,*
B 14500,500,1200,1200,CONT_VIA2,*
B 14500,3500,1200,1200,CONT_VIA2,*
B 11500,8000,2200,1200,CONT_VIA2,*
B 11500,8000,2200,1200,CONT_VIA,*
B 11500,5000,2200,1200,CONT_VIA2,*
B 11500,5000,2200,1200,CONT_VIA,*
EOF

61
alliance/src/cells/src/pxlib/pvddi_sp.ap Normal file
View File

@ -0,0 +1,61 @@
V ALLIANCE : 6
H pvddi_sp,P, 4/ 9/2014,100
A 0,0,20000,40000
C 10000,0,5200,vddi,10,SOUTH,ALU2
C 10000,0,5200,vddi,8,SOUTH,ALU1
S 10000,0,10000,8500,5200,*,UP,ALU2
B 10000,1100,5200,2400,CONT_VIA,*
C 20000,2000,500,ck,1,EAST,ALU3
C 0,2000,500,ck,0,WEST,ALU3
C 20000,5000,1200,vddi,14,EAST,ALU3
C 20000,3500,1200,vssi,1,EAST,ALU3
C 20000,17000,1200,vdde,5,EAST,ALU3
C 20000,14000,1200,vdde,3,EAST,ALU3
C 20000,11000,1200,vdde,1,EAST,ALU3
C 20000,9500,1200,vsse,1,EAST,ALU3
C 20000,12500,1200,vsse,3,EAST,ALU3
C 20000,15500,1200,vsse,5,EAST,ALU3
C 20000,18500,1200,vsse,7,EAST,ALU3
C 0,17000,1200,vdde,4,WEST,ALU3
C 0,14000,1200,vdde,2,WEST,ALU3
C 0,11000,1200,vdde,0,WEST,ALU3
C 0,9500,1200,vsse,0,WEST,ALU3
C 0,5000,1200,vddi,13,WEST,ALU3
C 0,3500,1200,vssi,0,WEST,ALU3
C 0,12500,1200,vsse,2,WEST,ALU3
C 0,15500,1200,vsse,4,WEST,ALU3
C 0,18500,1200,vsse,6,WEST,ALU3
C 20000,8000,1200,vddi,16,EAST,ALU3
C 20000,6500,1200,vssi,3,EAST,ALU3
C 0,6500,1200,vssi,2,WEST,ALU3
C 0,8000,1200,vddi,15,WEST,ALU3
C 10000,40000,100,vddi,17,NORTH,ALU1
S 0,6500,400,6500,1200,*,RIGHT,ALU3
S 0,5000,400,5000,1200,*,RIGHT,ALU3
S 0,3500,400,3500,1200,*,RIGHT,ALU3
S 0,2000,400,2000,500,*,RIGHT,ALU3
S 0,18500,400,18500,1200,*,RIGHT,ALU3
S 0,17000,400,17000,1200,*,RIGHT,ALU3
S 0,12500,400,12500,1200,*,RIGHT,ALU3
S 0,15500,400,15500,1200,*,RIGHT,ALU3
S 0,14000,400,14000,1200,*,RIGHT,ALU3
S 0,11000,400,11000,1200,*,RIGHT,ALU3
S 0,9500,400,9500,1200,*,RIGHT,ALU3
S 0,8000,400,8000,1200,*,RIGHT,ALU3
S 19600,2000,20000,2000,500,*,RIGHT,ALU3
S 19600,3500,20000,3500,1200,*,RIGHT,ALU3
S 19600,5000,20000,5000,1200,*,RIGHT,ALU3
S 19600,6500,20000,6500,1200,*,RIGHT,ALU3
S 19600,8000,20000,8000,1200,*,RIGHT,ALU3
S 19600,9500,20000,9500,1200,*,RIGHT,ALU3
S 19600,11000,20000,11000,1200,*,RIGHT,ALU3
S 19600,12500,20000,12500,1200,*,RIGHT,ALU3
S 19600,14000,20000,14000,1200,*,RIGHT,ALU3
S 19600,15500,20000,15500,1200,*,RIGHT,ALU3
S 19600,17000,20000,17000,1200,*,RIGHT,ALU3
S 19600,18500,20000,18500,1200,*,RIGHT,ALU3
S 10000,30000,10000,40000,100,*,DOWN,ALU1
S 10000,0,10000,8500,5200,*,UP,ALU2
B 10000,1100,5200,2400,CONT_VIA,*
I 0,0,pvddi_px,a,NOSYM
EOF

20
alliance/src/cells/src/pxlib/pvddi_sp.vbe Normal file
View File

@ -0,0 +1,20 @@
ENTITY pvddi_sp IS
GENERIC (
CONSTANT area : NATURAL := 80000
);
PORT (
ck : in BIT;
vdde : in BIT;
vddi : in BIT;
vsse : in BIT;
vssi : in BIT
);
END pvddi_sp;
ARCHITECTURE behaviour_data_flow OF pvddi_sp IS
BEGIN
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on pvddi_sp"
SEVERITY WARNING;
END;

652
alliance/src/cells/src/pxlib/pvddick_px.ap
View File

@ -1,346 +1,316 @@
V ALLIANCE : 6
H pvddick_px,P,20/11/2010,100
H pvddick_px,P, 8/11/2005,100
A 0,0,20000,40000
I 0,20000,padreal,padreal,NOSYM
S 14500,3600,14500,4900,100,29onymous_,UP,NTRANS
S 5500,5400,5500,7700,100,79onymous_,UP,PTRANS
S 3500,3000,3500,3000,6000,131nymous_,RIGHT,TALU2
S 4900,5400,4900,7700,100,73onymous_,UP,PTRANS
S 15700,5100,16500,5100,300,16onymous_,RIGHT,POLY
S 3800,6900,7200,6900,2800,99onymous_,RIGHT,NWELL
S 12500,100,12500,1000,4200,118nymous_,UP,TALU3
S 7000,6100,7000,7500,200,60onymous_,UP,ALU1
S 13000,3100,13000,3700,200,54onymous_,UP,ALU2
S 13300,5400,13300,7700,100,41onymous_,UP,PTRANS
S 13000,7800,16000,7800,800,vddi,RIGHT,ALU1
S 4500,0,4500,8500,1200,vddi,UP,CALU2
S 4500,0,4500,1000,1200,vddi,UP,CALU3
S 4500,0,4500,1000,1200,vddi,UP,CALU5
S 4500,0,4500,1000,1200,vddi,UP,CALU4
S 17500,0,17500,8500,1200,vddi,UP,CALU2
S 17500,0,17500,1000,1200,vddi,UP,CALU3
S 17500,0,17500,1000,1200,vddi,UP,CALU5
S 17500,0,17500,1000,1200,vddi,UP,CALU4
S 4000,7800,7000,7800,800,vddi,RIGHT,ALU1
S 10000,24000,10000,36000,12200,vddi,UP,CALU1
S 500,8000,19500,8000,1200,vddi,RIGHT,CALU3
S 500,5000,19500,5000,1200,vddi,RIGHT,CALU3
S 6100,3600,6100,4900,100,86onymous_,UP,NTRANS
S 5800,500,14200,500,200,0nonymous_,RIGHT,ALU3
S 15100,3600,15100,4900,100,23onymous_,UP,NTRANS
S 7000,3100,7000,3700,200,106nymous_,UP,ALU2
S 12500,100,12500,1500,4200,112nymous_,UP,TALU5
S 3500,3000,3500,3000,6000,125nymous_,RIGHT,TALU4
S 4300,5400,4300,7700,100,67onymous_,UP,PTRANS
S 13000,8100,16000,8100,300,48onymous_,RIGHT,NTIE
S 14200,3700,14200,4100,200,10onymous_,UP,ALU1
S 5500,4900,5500,5400,100,80onymous_,UP,POLY
S 6700,5400,6700,7700,100,93onymous_,UP,PTRANS
S 14200,5600,14200,7500,300,30onymous_,UP,PDIF
S 0,3000,1500,3000,6000,132nymous_,RIGHT,TALU2
S 4900,4900,4900,5400,100,74onymous_,UP,POLY
S 13000,8100,14200,8100,400,55onymous_,RIGHT,ALU2
S 13600,500,13600,5600,200,4nonymous_,UP,ALU2
S 15700,4900,15700,5400,100,17onymous_,UP,POLY
S 4000,8100,7000,8100,300,100nymous_,RIGHT,NTIE
S 16500,100,16500,1000,200,119nymous_,UP,TALU3
S 4600,3700,7000,3700,200,61onymous_,RIGHT,ALU1
S 13300,5100,15100,5100,300,42onymous_,RIGHT,POLY
S 5200,5600,6400,5600,200,87onymous_,RIGHT,ALU1
S 13000,3700,13000,4100,200,11onymous_,UP,ALU1
S 14800,5600,14800,7500,300,24onymous_,UP,PDIF
S 5800,8100,7000,8100,400,107nymous_,RIGHT,ALU2
S 16500,100,16500,1500,200,113nymous_,UP,TALU5
S 0,3000,1500,3000,6000,126nymous_,RIGHT,TALU4
S 10000,1500,10000,6500,20000,blockagenet,UP,TALU5
S 0,8500,20000,8500,5000,blockagenet,RIGHT,TALU4
S 0,8500,20000,8500,5000,blockagenet,RIGHT,TALU2
S 3500,5100,4300,5100,300,68onymous_,RIGHT,POLY
S 16000,4200,16000,6400,200,49onymous_,UP,ALU1
S 5500,3600,5500,4900,100,81onymous_,UP,NTRANS
S 4900,5100,6700,5100,300,94onymous_,RIGHT,POLY
S 13600,5600,13600,7500,300,36onymous_,UP,PDIF
S 5800,1000,14200,1000,200,1nonymous_,RIGHT,ALU3
S 14200,3800,14200,4700,300,31onymous_,UP,NDIF
S 0,3000,20000,3000,6000,120nymous_,RIGHT,TALU6
S 6400,500,6400,5600,200,56onymous_,UP,ALU2
S 14200,500,14200,5600,200,5nonymous_,UP,ALU2
S 15700,3600,15700,4900,100,18onymous_,UP,NTRANS
S 6400,5600,6400,7500,300,88onymous_,UP,PDIF
S 4000,4200,4000,6400,200,101nymous_,UP,ALU1
S 5800,3700,5800,4100,200,62onymous_,UP,ALU1
S 13300,4900,13300,5400,100,43onymous_,UP,POLY
S 500,2000,19500,2000,500,ck,RIGHT,CALU3
S 4900,3600,4900,4900,100,75onymous_,UP,NTRANS
S 15400,3700,15400,4600,200,12onymous_,UP,ALU1
S 14800,5600,14800,7000,200,25onymous_,UP,ALU1
S 800,100,800,1500,1600,108nymous_,UP,TALU5
S 800,100,800,1000,1600,114nymous_,UP,TALU3
S 18500,3000,20000,3000,6000,127nymous_,RIGHT,TALU2
S 4300,4900,4300,5400,100,69onymous_,UP,POLY
S 14800,4200,14800,4600,200,50onymous_,UP,ALU1
S 500,12500,19500,12500,1200,vsse,RIGHT,CALU3
S 500,15500,19500,15500,1200,vsse,RIGHT,CALU3
S 500,18500,19500,18500,1200,vsse,RIGHT,CALU3
S 500,9500,19500,9500,1200,vsse,RIGHT,CALU3
S 8500,3000,8500,30000,2200,2nonymous_,UP,ALU1
S 5800,5600,5800,7500,300,82onymous_,UP,PDIF
S 6700,4900,6700,5400,100,95onymous_,UP,POLY
S 13600,5600,13600,7000,200,37onymous_,UP,ALU1
S 13900,5400,13900,7700,100,32onymous_,UP,PTRANS
S 18500,3000,20000,3000,6000,121nymous_,RIGHT,TALU4
S 7000,3700,7000,4100,200,63onymous_,UP,ALU1
S 14200,6100,14200,7500,200,6nonymous_,UP,ALU1
S 9500,0,9500,1000,1200,cko,UP,CALU4
S 9500,0,9500,1000,1200,cko,UP,CALU5
S 15400,5600,15400,7500,300,19onymous_,UP,PDIF
S 6400,5600,6400,7000,200,89onymous_,UP,ALU1
S 5200,4200,5200,4600,200,102nymous_,UP,ALU1
S 13300,3600,13300,4900,100,44onymous_,UP,NTRANS
S 4000,3400,7000,3400,800,vssi,RIGHT,ALU1
S 500,6500,19500,6500,1200,vssi,RIGHT,CALU3
S 500,3500,19500,3500,1200,vssi,RIGHT,CALU3
S 2500,0,2500,8500,1200,vssi,UP,CALU2
S 2500,0,2500,1000,1200,vssi,UP,CALU3
S 2500,0,2500,1000,1200,vssi,UP,CALU5
S 2500,0,2500,1000,1200,vssi,UP,CALU4
S 15500,0,15500,8500,1200,vssi,UP,CALU2
S 15500,0,15500,1000,1200,vssi,UP,CALU3
S 15500,0,15500,1000,1200,vssi,UP,CALU5
S 15500,0,15500,1000,1200,vssi,UP,CALU4
S 4000,7800,7000,7800,800,vddi,RIGHT,ALU1
S 5800,8100,7000,8100,400,*,RIGHT,ALU2
S 7000,3100,7000,3700,200,*,UP,ALU2
S 3500,2000,3500,5100,200,*,UP,ALU2
S 4000,3100,7000,3100,300,*,RIGHT,PTIE
S 6400,4200,6400,4600,200,*,UP,ALU1
S 5200,4200,5200,4600,200,*,UP,ALU1
S 4000,4200,4000,6400,200,*,UP,ALU1
S 4000,8100,7000,8100,300,*,RIGHT,NTIE
S 3800,6900,7200,6900,2800,*,LEFT,NWELL
S 7000,3800,7000,4700,300,*,UP,NDIF
S 7000,5600,7000,7500,300,*,DOWN,PDIF
S 6700,3600,6700,4900,100,*,UP,NTRANS
S 6700,4900,6700,5400,100,*,DOWN,POLY
S 4900,5100,6700,5100,300,*,LEFT,POLY
S 6700,5400,6700,7700,100,*,UP,PTRANS
S 6400,3800,6400,4700,200,*,DOWN,NDIF
S 5200,4600,6400,4600,200,*,LEFT,ALU1
S 4000,5100,6400,5100,200,*,LEFT,ALU1
S 6400,5600,6400,7000,200,*,DOWN,ALU1
S 6400,5600,6400,7500,300,*,UP,PDIF
S 5200,5600,6400,5600,200,*,LEFT,ALU1
S 6100,3600,6100,4900,100,*,UP,NTRANS
S 6100,4900,6100,5400,100,*,DOWN,POLY
S 6100,5400,6100,7700,100,*,UP,PTRANS
S 5800,3800,5800,4700,300,*,UP,NDIF
S 5800,5600,5800,7500,300,*,DOWN,PDIF
S 5500,3600,5500,4900,100,*,DOWN,NTRANS
S 5500,4900,5500,5400,100,*,UP,POLY
S 5500,5400,5500,7700,100,*,DOWN,PTRANS
S 5200,3800,5200,4700,200,*,UP,NDIF
S 5200,5600,5200,7000,200,*,DOWN,ALU1
S 5200,5600,5200,7500,300,*,DOWN,PDIF
S 4900,3600,4900,4900,100,*,DOWN,NTRANS
S 4900,4900,4900,5400,100,*,UP,POLY
S 4900,5400,4900,7700,100,*,DOWN,PTRANS
S 4600,3800,4600,4700,200,*,UP,NDIF
S 4600,5600,4600,7500,300,*,DOWN,PDIF
S 4300,3600,4300,4900,100,*,UP,NTRANS
S 4300,4900,4300,5400,100,*,UP,POLY
S 3500,5100,4300,5100,300,*,LEFT,POLY
S 4300,5400,4300,7700,100,*,DOWN,PTRANS
S 4000,3800,4000,4700,300,*,UP,NDIF
S 4000,5600,4000,7500,300,*,DOWN,PDIF
S 4600,3700,4600,4600,200,*,UP,ALU1
S 7000,3700,7000,4100,200,*,UP,ALU1
S 5800,3700,5800,4100,200,*,UP,ALU1
S 4600,3700,7000,3700,200,*,RIGHT,ALU1
S 7000,6100,7000,7500,200,*,DOWN,ALU1
S 4600,6000,4600,7500,200,*,UP,ALU1
S 5800,6100,5800,7500,200,*,DOWN,ALU1
S 5800,500,5800,5600,200,*,UP,ALU2
S 6400,500,6400,5600,200,*,UP,ALU2
S 13000,3400,16000,3400,800,vssi,RIGHT,ALU1
S 5200,5600,5200,7500,300,76onymous_,UP,PDIF
S 16500,3000,16500,3000,6000,128nymous_,RIGHT,TALU2
S 16000,5600,16000,7500,300,13onymous_,UP,PDIF
S 14800,3800,14800,4700,200,26onymous_,UP,NDIF
S 6700,3600,6700,4900,100,96onymous_,UP,NTRANS
S 19200,100,19200,1000,1600,115nymous_,UP,TALU3
S 4300,3600,4300,4900,100,70onymous_,UP,NTRANS
S 5800,500,5800,5600,200,57onymous_,UP,ALU2
S 13600,4200,13600,4600,200,51onymous_,UP,ALU1
S 5800,3800,5800,4700,300,83onymous_,UP,NDIF
S 13600,5100,16000,5100,200,38onymous_,RIGHT,ALU1
S 15400,3800,15400,4700,200,20onymous_,UP,NDIF
S 13900,4900,13900,5400,100,33onymous_,UP,POLY
S 16500,3000,16500,3000,6000,122nymous_,RIGHT,TALU4
S 4600,3700,4600,4600,200,64onymous_,UP,ALU1
S 15400,6000,15400,7500,200,7nonymous_,UP,ALU1
S 4000,5100,6400,5100,200,90onymous_,RIGHT,ALU1
S 6400,4200,6400,4600,200,103nymous_,UP,ALU1
S 19200,100,19200,1500,1600,109nymous_,UP,TALU5
S 13000,5600,13000,7500,300,45onymous_,UP,PDIF
S 5200,5600,5200,7000,200,77onymous_,UP,ALU1
S 10500,3000,14500,3000,6000,129nymous_,RIGHT,TALU2
S 4600,5600,4600,7500,300,71onymous_,UP,PDIF
S 16000,3800,16000,4700,300,14onymous_,UP,NDIF
S 14500,5400,14500,7700,100,27onymous_,UP,PTRANS
S 7000,5600,7000,7500,300,97onymous_,UP,PDIF
S 3500,100,3500,1000,200,116nymous_,UP,TALU3
S 5800,6100,5800,7500,200,58onymous_,UP,ALU1
S 13000,3100,16000,3100,300,52onymous_,RIGHT,PTIE
S 13600,4600,14800,4600,200,39onymous_,RIGHT,ALU1
S 6100,5400,6100,7700,100,84onymous_,UP,PTRANS
S 15100,5400,15100,7700,100,21onymous_,UP,PTRANS
S 13900,3600,13900,4900,100,34onymous_,UP,NTRANS
S 4000,3100,7000,3100,300,104nymous_,RIGHT,PTIE
S 10500,3000,14500,3000,6000,123nymous_,RIGHT,TALU4
S 4000,5600,4000,7500,300,65onymous_,UP,PDIF
S 13000,6100,13000,7500,200,8nonymous_,UP,ALU1
S 5200,4600,6400,4600,200,91onymous_,RIGHT,ALU1
S 3500,100,3500,1500,200,110nymous_,UP,TALU5
S 13000,3800,13000,4700,300,46onymous_,UP,NDIF
S 14500,4900,14500,5400,100,28onymous_,UP,POLY
S 5200,3800,5200,4700,200,78onymous_,UP,NDIF
S 5500,3000,8500,3000,6000,130nymous_,RIGHT,TALU2
S 4600,3800,4600,4700,200,72onymous_,UP,NDIF
S 13600,5600,14800,5600,200,35onymous_,RIGHT,ALU1
S 15700,5400,15700,7700,100,15onymous_,UP,PTRANS
S 7000,3800,7000,4700,300,98onymous_,UP,NDIF
S 7000,100,7000,1000,3200,117nymous_,UP,TALU3
S 4600,6000,4600,7500,200,59onymous_,UP,ALU1
S 16500,2000,16500,5100,200,53onymous_,UP,ALU2
S 13600,3800,13600,4700,200,40onymous_,UP,NDIF
S 11500,3000,11500,30000,2200,3nonymous_,UP,ALU1
S 6100,4900,6100,5400,100,85onymous_,UP,POLY
S 500,11000,19500,11000,1200,vdde,RIGHT,CALU3
S 500,14000,19500,14000,1200,vdde,RIGHT,CALU3
S 500,17000,19500,17000,1200,vdde,RIGHT,CALU3
S 15100,4900,15100,5400,100,22onymous_,UP,POLY
S 3500,2000,3500,5100,200,105nymous_,UP,ALU2
S 5500,3000,8500,3000,6000,124nymous_,RIGHT,TALU4
S 4000,3800,4000,4700,300,66onymous_,UP,NDIF
S 12800,6900,16200,6900,2800,47onymous_,RIGHT,NWELL
S 13000,3700,15400,3700,200,9nonymous_,RIGHT,ALU1
S 6400,3800,6400,4700,200,92onymous_,UP,NDIF
S 7000,100,7000,1500,3200,111nymous_,UP,TALU5
V 4000,3100,CONT_BODY_P,288nymous_
V 5800,4100,CONT_DIF_N,261nymous_
V 13600,3100,CONT_BODY_P,214nymous_
V 14200,6100,CONT_DIF_P,187nymous_
B 11500,8000,2200,1200,CONT_VIA,160nymous_
B 2500,500,1200,1200,CONT_VIA2,147nymous_
V 7000,3700,CONT_VIA2,295nymous_
V 6400,4600,CONT_VIA,268nymous_
V 4000,5900,CONT_DIF_P,241nymous_
V 13600,6500,CONT_DIF_P,194nymous_
V 15400,3700,CONT_DIF_N,167nymous_
B 15500,6500,1200,1200,CONT_VIA2,154nymous_
V 7000,8100,CONT_VIA,302nymous_
V 7000,3700,CONT_DIF_N,275nymous_
V 4600,4100,CONT_DIF_N,248nymous_
V 14800,4200,CONT_DIF_N,221nymous_
V 15400,7000,CONT_DIF_P,174nymous_
V 4600,8100,CONT_BODY_N,282nymous_
V 5800,7000,CONT_DIF_P,255nymous_
V 13600,8100,CONT_VIA2,228nymous_
V 13000,7000,CONT_DIF_P,201nymous_
V 5800,3700,CONT_DIF_N,262nymous_
V 6400,1000,CONT_VIA2,235nymous_
V 13600,8100,CONT_BODY_N,208nymous_
V 14800,6000,CONT_DIF_P,181nymous_
B 4500,500,1200,1200,CONT_VIA3,141nymous_
V 6400,4200,CONT_DIF_N,289nymous_
V 4000,4600,CONT_DIF_N,242nymous_
V 14200,3100,CONT_BODY_P,215nymous_
V 14200,5600,CONT_VIA,188nymous_
B 11500,5000,2200,1200,CONT_VIA2,161nymous_
B 2500,3500,1200,1200,CONT_VIA2,148nymous_
V 7000,3100,CONT_VIA2,296nymous_
V 6400,4600,CONT_DIF_N,269nymous_
V 16500,2000,CONT_VIA2,222nymous_
V 13600,6000,CONT_DIF_P,195nymous_
V 16500,5100,CONT_VIA,168nymous_
B 9500,500,1200,1200,CONT_VIA4,133nymous_
B 9500,500,1200,1200,CONT_VIA3,134nymous_
V 5200,5600,CONT_TURN1,276nymous_
V 5200,7000,CONT_DIF_P,249nymous_
V 13000,6500,CONT_DIF_P,202nymous_
V 15400,6500,CONT_DIF_P,175nymous_
B 8500,8000,2200,1200,CONT_VIA2,135nymous_
V 7000,3100,CONT_BODY_P,283nymous_
V 5800,6500,CONT_DIF_P,256nymous_
V 14200,8100,CONT_VIA2,229nymous_
V 14800,5100,CONT_POLY,182nymous_
B 15500,500,1200,1200,CONT_VIA4,155nymous_
B 4500,500,1200,1200,CONT_VIA2,142nymous_
V 4000,4200,CONT_DIF_N,290nymous_
V 6400,7000,CONT_DIF_P,263nymous_
V 5800,1000,CONT_VIA2,236nymous_
V 14200,8100,CONT_BODY_N,209nymous_
B 11500,5000,2200,1200,CONT_VIA,162nymous_
V 7000,7500,CONT_DIF_P,270nymous_
V 4600,7500,CONT_DIF_P,243nymous_
V 14800,3100,CONT_BODY_P,216nymous_
V 14200,5100,CONT_POLY,189nymous_
B 17500,8000,1200,1200,CONT_VIA2,149nymous_
V 7000,8100,CONT_VIA2,297nymous_
V 5200,6500,CONT_DIF_P,250nymous_
V 13000,3100,CONT_VIA,223nymous_
V 13600,5600,CONT_VIA,196nymous_
V 16500,5100,CONT_POLY,169nymous_
V 7000,8100,CONT_BODY_N,277nymous_
V 14200,8100,CONT_VIA,230nymous_
V 13000,6100,CONT_DIF_P,203nymous_
V 15400,6000,CONT_DIF_P,176nymous_
B 8500,8000,2200,1200,CONT_VIA,136nymous_
V 6400,3100,CONT_BODY_P,284nymous_
V 5800,6100,CONT_DIF_P,257nymous_
V 14800,8100,CONT_BODY_N,210nymous_
V 14800,4600,CONT_DIF_N,183nymous_
B 15500,500,1200,1200,CONT_VIA3,156nymous_
B 4500,5000,1200,1200,CONT_VIA2,143nymous_
V 5200,4200,CONT_DIF_N,291nymous_
V 6400,6500,CONT_DIF_P,264nymous_
V 4600,3700,CONT_DIF_N,237nymous_
V 14200,4600,CONT_VIA,190nymous_
V 13600,500,CONT_VIA2,163nymous_
B 17500,500,1200,1200,CONT_VIA4,150nymous_
V 6400,8100,CONT_VIA2,298nymous_
V 7000,7000,CONT_DIF_P,271nymous_
V 4600,7000,CONT_DIF_P,244nymous_
V 15400,3100,CONT_BODY_P,217nymous_
V 16000,6400,CONT_DIF_P,170nymous_
V 6400,8100,CONT_BODY_N,278nymous_
V 5200,6000,CONT_DIF_P,251nymous_
V 13000,3700,CONT_VIA,224nymous_
V 13600,5100,CONT_POLY,197nymous_
V 5800,5600,CONT_VIA,258nymous_
V 13600,8100,CONT_VIA,231nymous_
V 13000,4100,CONT_DIF_N,204nymous_
V 15400,4600,CONT_DIF_N,177nymous_
B 8500,5000,2200,1200,CONT_VIA2,137nymous_
V 5800,3100,CONT_BODY_P,285nymous_
V 3500,5100,CONT_VIA,238nymous_
V 16000,8100,CONT_BODY_N,211nymous_
V 14200,7500,CONT_DIF_P,184nymous_
B 15500,500,1200,1200,CONT_VIA2,157nymous_
B 2500,6500,1200,1200,CONT_VIA2,144nymous_
V 3500,2000,CONT_VIA2,292nymous_
V 6400,6000,CONT_DIF_P,265nymous_
V 16000,3100,CONT_BODY_P,218nymous_
V 14200,4100,CONT_DIF_N,191nymous_
V 14200,500,CONT_VIA2,164nymous_
B 17500,500,1200,1200,CONT_VIA3,151nymous_
V 5800,8100,CONT_VIA2,299nymous_
V 7000,6500,CONT_DIF_P,272nymous_
V 4600,6500,CONT_DIF_P,245nymous_
V 13600,4600,CONT_VIA,198nymous_
V 16000,5900,CONT_DIF_P,171nymous_
V 5800,8100,CONT_BODY_N,279nymous_
V 5200,5100,CONT_POLY,252nymous_
V 13000,3700,CONT_VIA2,225nymous_
V 15400,4100,CONT_DIF_N,178nymous_
B 8500,5000,2200,1200,CONT_VIA,138nymous_
V 5200,3100,CONT_BODY_P,286nymous_
V 5800,5100,CONT_POLY,259nymous_
V 13000,8100,CONT_VIA,232nymous_
V 13000,3700,CONT_DIF_N,205nymous_
B 15500,3500,1200,1200,CONT_VIA2,158nymous_
V 6400,5600,CONT_VIA,266nymous_
V 3500,5100,CONT_POLY,239nymous_
V 15400,8100,CONT_BODY_N,212nymous_
V 14200,7000,CONT_DIF_P,185nymous_
B 2500,500,1200,1200,CONT_VIA4,145nymous_
V 7000,3100,CONT_VIA,293nymous_
V 4600,6000,CONT_DIF_P,246nymous_
V 13600,4200,CONT_DIF_N,219nymous_
V 14200,3700,CONT_DIF_N,192nymous_
V 13600,1000,CONT_VIA2,165nymous_
B 17500,500,1200,1200,CONT_VIA2,152nymous_
V 5800,8100,CONT_VIA,300nymous_
V 7000,6100,CONT_DIF_P,273nymous_
V 13000,3100,CONT_VIA2,226nymous_
V 13600,4600,CONT_DIF_N,199nymous_
V 16000,4600,CONT_DIF_N,172nymous_
V 5200,8100,CONT_BODY_N,280nymous_
V 5200,4600,CONT_DIF_N,253nymous_
V 14800,5600,CONT_TURN1,206nymous_
V 14800,7000,CONT_DIF_P,179nymous_
B 4500,8000,1200,1200,CONT_VIA2,139nymous_
V 4600,3100,CONT_BODY_P,287nymous_
V 5800,4600,CONT_VIA,260nymous_
V 6400,500,CONT_VIA2,233nymous_
V 14200,6500,CONT_DIF_P,186nymous_
B 11500,8000,2200,1200,CONT_VIA2,159nymous_
B 2500,500,1200,1200,CONT_VIA3,146nymous_
V 7000,3700,CONT_VIA,294nymous_
V 6400,5100,CONT_POLY,267nymous_
V 4000,6400,CONT_DIF_P,240nymous_
V 13000,3100,CONT_BODY_P,213nymous_
V 14200,1000,CONT_VIA2,166nymous_
V 7000,4100,CONT_DIF_N,274nymous_
V 4600,4600,CONT_DIF_N,247nymous_
V 16000,4200,CONT_DIF_N,220nymous_
V 13600,7000,CONT_DIF_P,193nymous_
B 17500,5000,1200,1200,CONT_VIA2,153nymous_
V 6400,8100,CONT_VIA,301nymous_
V 5800,7500,CONT_DIF_P,254nymous_
V 13000,8100,CONT_VIA2,227nymous_
V 13000,7500,CONT_DIF_P,200nymous_
V 15400,7500,CONT_DIF_P,173nymous_
V 4000,8100,CONT_BODY_N,281nymous_
V 5800,500,CONT_VIA2,234nymous_
V 13000,8100,CONT_BODY_N,207nymous_
V 14800,6500,CONT_DIF_P,180nymous_
B 4500,500,1200,1200,CONT_VIA4,140nymous_
S 13000,7800,16000,7800,800,vddi,RIGHT,ALU1
S 13000,8100,14200,8100,400,*,RIGHT,ALU2
S 13000,3100,13000,3700,200,*,DOWN,ALU2
S 16500,2000,16500,5100,200,*,DOWN,ALU2
S 13000,3100,16000,3100,300,*,RIGHT,PTIE
S 13600,4200,13600,4600,200,*,DOWN,ALU1
S 14800,4200,14800,4600,200,*,DOWN,ALU1
S 16000,4200,16000,6400,200,*,DOWN,ALU1
S 13000,8100,16000,8100,300,*,RIGHT,NTIE
S 12800,6900,16200,6900,2800,*,LEFT,NWELL
S 13000,3800,13000,4700,300,*,DOWN,NDIF
S 13000,5600,13000,7500,300,*,UP,PDIF
S 13300,3600,13300,4900,100,*,DOWN,NTRANS
S 13300,4900,13300,5400,100,*,UP,POLY
S 13300,5100,15100,5100,300,*,LEFT,POLY
S 13300,5400,13300,7700,100,*,DOWN,PTRANS
S 13600,3800,13600,4700,200,*,UP,NDIF
S 13600,4600,14800,4600,200,*,LEFT,ALU1
S 13600,5100,16000,5100,200,*,LEFT,ALU1
S 13600,5600,13600,7000,200,*,UP,ALU1
S 13600,5600,13600,7500,300,*,DOWN,PDIF
S 13600,5600,14800,5600,200,*,LEFT,ALU1
S 13900,3600,13900,4900,100,*,DOWN,NTRANS
S 13900,4900,13900,5400,100,*,UP,POLY
S 13900,5400,13900,7700,100,*,DOWN,PTRANS
S 14200,3800,14200,4700,300,*,DOWN,NDIF
S 14200,5600,14200,7500,300,*,UP,PDIF
S 14500,3600,14500,4900,100,*,UP,NTRANS
S 14500,4900,14500,5400,100,*,DOWN,POLY
S 14500,5400,14500,7700,100,*,UP,PTRANS
S 14800,3800,14800,4700,200,*,DOWN,NDIF
S 14800,5600,14800,7000,200,*,UP,ALU1
S 14800,5600,14800,7500,300,*,UP,PDIF
S 15100,3600,15100,4900,100,*,UP,NTRANS
S 15100,4900,15100,5400,100,*,DOWN,POLY
S 15100,5400,15100,7700,100,*,UP,PTRANS
S 15400,3800,15400,4700,200,*,DOWN,NDIF
S 15400,5600,15400,7500,300,*,UP,PDIF
S 15700,3600,15700,4900,100,*,DOWN,NTRANS
S 15700,4900,15700,5400,100,*,DOWN,POLY
S 15700,5100,16500,5100,300,*,LEFT,POLY
S 15700,5400,15700,7700,100,*,UP,PTRANS
S 16000,3800,16000,4700,300,*,DOWN,NDIF
S 16000,5600,16000,7500,300,*,UP,PDIF
S 15400,3700,15400,4600,200,*,DOWN,ALU1
S 13000,3700,13000,4100,200,*,DOWN,ALU1
S 14200,3700,14200,4100,200,*,DOWN,ALU1
S 13000,3700,15400,3700,200,*,RIGHT,ALU1
S 13000,6100,13000,7500,200,*,UP,ALU1
S 15400,6000,15400,7500,200,*,DOWN,ALU1
S 14200,6100,14200,7500,200,*,UP,ALU1
S 14200,500,14200,5600,200,*,DOWN,ALU2
S 13600,500,13600,5600,200,*,DOWN,ALU2
S 11500,3000,11500,30000,2200,*,DOWN,ALU1
S 15500,0,15500,1000,1200,vssi,DOWN,CALU4
S 15500,0,15500,1000,1200,vssi,DOWN,CALU5
S 15500,0,15500,1000,1200,vssi,UP,CALU3
S 15500,0,15500,8500,1200,vssi,UP,CALU2
S 17500,0,17500,1000,1200,vddi,DOWN,CALU4
S 17500,0,17500,1000,1200,vddi,DOWN,CALU5
S 17500,0,17500,1000,1200,vddi,UP,CALU3
S 17500,0,17500,8500,1200,vddi,UP,CALU2
S 2500,0,2500,1000,1200,vssi,DOWN,CALU4
S 2500,0,2500,1000,1200,vssi,DOWN,CALU5
S 2500,0,2500,1000,1200,vssi,UP,CALU3
S 2500,0,2500,8500,1200,vssi,UP,CALU2
S 4500,0,4500,1000,1200,vddi,DOWN,CALU4
S 4500,0,4500,1000,1200,vddi,DOWN,CALU5
S 4500,0,4500,1000,1200,vddi,UP,CALU3
S 4500,0,4500,8500,1200,vddi,UP,CALU2
S 500,11000,19500,11000,1200,vdde,LEFT,CALU3
S 500,12500,19500,12500,1200,vsse,LEFT,CALU3
S 500,14000,19500,14000,1200,vdde,LEFT,CALU3
S 500,15500,19500,15500,1200,vsse,LEFT,CALU3
S 500,17000,19500,17000,1200,vdde,LEFT,CALU3
S 500,18500,19500,18500,1200,vsse,LEFT,CALU3
S 500,2000,19500,2000,500,ck,RIGHT,CALU3
S 500,3500,19500,3500,1200,vssi,LEFT,CALU3
S 500,5000,19500,5000,1200,vddi,LEFT,CALU3
S 500,6500,19500,6500,1200,vssi,RIGHT,CALU3
S 500,8000,19500,8000,1200,vddi,LEFT,CALU3
S 500,9500,19500,9500,1200,vsse,LEFT,CALU3
S 8500,3000,8500,30000,2200,*,DOWN,ALU1
S 9500,0,9500,1000,1200,cko,DOWN,CALU4
S 9500,0,9500,1000,1200,cko,DOWN,CALU5
S 10000,24000,10000,36000,12200,vddi,DOWN,CALU1
I 0,20000,padreal,padreal,NOSYM
V 7000,8100,CONT_VIA,*
V 6400,8100,CONT_VIA,*
V 5800,8100,CONT_VIA,*
V 5800,8100,CONT_VIA2,*
V 6400,8100,CONT_VIA2,*
V 7000,8100,CONT_VIA2,*
V 7000,3100,CONT_VIA2,*
V 7000,3700,CONT_VIA2,*
V 7000,3700,CONT_VIA,*
V 7000,3100,CONT_VIA,*
V 3500,2000,CONT_VIA2,*
V 5200,4200,CONT_DIF_N,*
V 4000,4200,CONT_DIF_N,*
V 6400,4200,CONT_DIF_N,*
V 4000,3100,CONT_BODY_P,*
V 4600,3100,CONT_BODY_P,*
V 5200,3100,CONT_BODY_P,*
V 5800,3100,CONT_BODY_P,*
V 6400,3100,CONT_BODY_P,*
V 7000,3100,CONT_BODY_P,*
V 4600,8100,CONT_BODY_N,*
V 4000,8100,CONT_BODY_N,*
V 5200,8100,CONT_BODY_N,*
V 5800,8100,CONT_BODY_N,*
V 6400,8100,CONT_BODY_N,*
V 7000,8100,CONT_BODY_N,*
B 5200,5600,200,200,CONT_TURN1,*
V 7000,3700,CONT_DIF_N,*
V 7000,4100,CONT_DIF_N,*
V 7000,6100,CONT_DIF_P,*
V 7000,6500,CONT_DIF_P,*
V 7000,7000,CONT_DIF_P,*
V 7000,7500,CONT_DIF_P,*
V 6400,4600,CONT_DIF_N,*
V 6400,4600,CONT_VIA,*
V 6400,5100,CONT_POLY,*
V 6400,5600,CONT_VIA,*
V 6400,6000,CONT_DIF_P,*
V 6400,6500,CONT_DIF_P,*
V 6400,7000,CONT_DIF_P,*
V 5800,3700,CONT_DIF_N,*
V 5800,4100,CONT_DIF_N,*
V 5800,4600,CONT_VIA,*
V 5800,5100,CONT_POLY,*
V 5800,5600,CONT_VIA,*
V 5800,6100,CONT_DIF_P,*
V 5800,6500,CONT_DIF_P,*
V 5800,7000,CONT_DIF_P,*
V 5800,7500,CONT_DIF_P,*
V 5200,4600,CONT_DIF_N,*
V 5200,5100,CONT_POLY,*
V 5200,6000,CONT_DIF_P,*
V 5200,6500,CONT_DIF_P,*
V 5200,7000,CONT_DIF_P,*
V 4600,4100,CONT_DIF_N,*
V 4600,4600,CONT_DIF_N,*
V 4600,6000,CONT_DIF_P,*
V 4600,6500,CONT_DIF_P,*
V 4600,7000,CONT_DIF_P,*
V 4600,7500,CONT_DIF_P,*
V 4000,4600,CONT_DIF_N,*
V 4000,5900,CONT_DIF_P,*
V 4000,6400,CONT_DIF_P,*
V 3500,5100,CONT_POLY,*
V 3500,5100,CONT_VIA,*
V 4600,3700,CONT_DIF_N,*
V 5800,1000,CONT_VIA2,*
V 6400,1000,CONT_VIA2,*
V 5800,500,CONT_VIA2,*
V 6400,500,CONT_VIA2,*
V 13000,8100,CONT_VIA,*
V 13600,8100,CONT_VIA,*
V 14200,8100,CONT_VIA,*
V 14200,8100,CONT_VIA2,*
V 13600,8100,CONT_VIA2,*
V 13000,8100,CONT_VIA2,*
V 13000,3100,CONT_VIA2,*
V 13000,3700,CONT_VIA2,*
V 13000,3700,CONT_VIA,*
V 13000,3100,CONT_VIA,*
V 16500,2000,CONT_VIA2,*
V 14800,4200,CONT_DIF_N,*
V 16000,4200,CONT_DIF_N,*
V 13600,4200,CONT_DIF_N,*
V 16000,3100,CONT_BODY_P,*
V 15400,3100,CONT_BODY_P,*
V 14800,3100,CONT_BODY_P,*
V 14200,3100,CONT_BODY_P,*
V 13600,3100,CONT_BODY_P,*
V 13000,3100,CONT_BODY_P,*
V 15400,8100,CONT_BODY_N,*
V 16000,8100,CONT_BODY_N,*
V 14800,8100,CONT_BODY_N,*
V 14200,8100,CONT_BODY_N,*
V 13600,8100,CONT_BODY_N,*
V 13000,8100,CONT_BODY_N,*
B 14800,5600,200,200,CONT_TURN1,*
V 13000,3700,CONT_DIF_N,*
V 13000,4100,CONT_DIF_N,*
V 13000,6100,CONT_DIF_P,*
V 13000,6500,CONT_DIF_P,*
V 13000,7000,CONT_DIF_P,*
V 13000,7500,CONT_DIF_P,*
V 13600,4600,CONT_DIF_N,*
V 13600,4600,CONT_VIA,*
V 13600,5100,CONT_POLY,*
V 13600,5600,CONT_VIA,*
V 13600,6000,CONT_DIF_P,*
V 13600,6500,CONT_DIF_P,*
V 13600,7000,CONT_DIF_P,*
V 14200,3700,CONT_DIF_N,*
V 14200,4100,CONT_DIF_N,*
V 14200,4600,CONT_VIA,*
V 14200,5100,CONT_POLY,*
V 14200,5600,CONT_VIA,*
V 14200,6100,CONT_DIF_P,*
V 14200,6500,CONT_DIF_P,*
V 14200,7000,CONT_DIF_P,*
V 14200,7500,CONT_DIF_P,*
V 14800,4600,CONT_DIF_N,*
V 14800,5100,CONT_POLY,*
V 14800,6000,CONT_DIF_P,*
V 14800,6500,CONT_DIF_P,*
V 14800,7000,CONT_DIF_P,*
V 15400,4100,CONT_DIF_N,*
V 15400,4600,CONT_DIF_N,*
V 15400,6000,CONT_DIF_P,*
V 15400,6500,CONT_DIF_P,*
V 15400,7000,CONT_DIF_P,*
V 15400,7500,CONT_DIF_P,*
V 16000,4600,CONT_DIF_N,*
V 16000,5900,CONT_DIF_P,*
V 16000,6400,CONT_DIF_P,*
V 16500,5100,CONT_POLY,*
V 16500,5100,CONT_VIA,*
V 15400,3700,CONT_DIF_N,*
V 14200,1000,CONT_VIA2,*
V 13600,1000,CONT_VIA2,*
V 14200,500,CONT_VIA2,*
V 13600,500,CONT_VIA2,*
B 11500,5000,2200,1200,CONT_VIA,*
B 11500,5000,2200,1200,CONT_VIA2,*
B 11500,8000,2200,1200,CONT_VIA,*
B 11500,8000,2200,1200,CONT_VIA2,*
B 15500,3500,1200,1200,CONT_VIA2,*
B 15500,500,1200,1200,CONT_VIA2,*
B 15500,500,1200,1200,CONT_VIA3,*
B 15500,500,1200,1200,CONT_VIA4,*
B 15500,6500,1200,1200,CONT_VIA2,*
B 17500,5000,1200,1200,CONT_VIA2,*
B 17500,500,1200,1200,CONT_VIA2,*
B 17500,500,1200,1200,CONT_VIA3,*
B 17500,500,1200,1200,CONT_VIA4,*
B 17500,8000,1200,1200,CONT_VIA2,*
B 2500,3500,1200,1200,CONT_VIA2,*
B 2500,500,1200,1200,CONT_VIA2,*
B 2500,500,1200,1200,CONT_VIA3,*
B 2500,500,1200,1200,CONT_VIA4,*
B 2500,6500,1200,1200,CONT_VIA2,*
B 4500,5000,1200,1200,CONT_VIA2,*
B 4500,500,1200,1200,CONT_VIA2,*
B 4500,500,1200,1200,CONT_VIA3,*
B 4500,500,1200,1200,CONT_VIA4,*
B 4500,8000,1200,1200,CONT_VIA2,*
B 8500,5000,2200,1200,CONT_VIA,*
B 8500,5000,2200,1200,CONT_VIA2,*
B 8500,8000,2200,1200,CONT_VIA,*
B 8500,8000,2200,1200,CONT_VIA2,*
B 9500,500,1200,1200,CONT_VIA3,*
B 9500,500,1200,1200,CONT_VIA4,*
EOF

70
alliance/src/cells/src/pxlib/pvddick_sp.ap Normal file
View File

@ -0,0 +1,70 @@
V ALLIANCE : 6
H pvddick_sp,P, 5/ 9/2014,100
A 0,0,20000,40000
C 6500,0,200,cko,4,SOUTH,ALU2
C 5500,0,200,cko,0,SOUTH,ALU2
C 10000,40000,100,vddi,6,NORTH,ALU1
C 0,8000,1200,vddi,4,WEST,ALU3
C 0,6500,1200,vssi,2,WEST,ALU3
C 20000,6500,1200,vssi,3,EAST,ALU3
C 20000,8000,1200,vddi,5,EAST,ALU3
C 0,18500,1200,vsse,6,WEST,ALU3
C 0,15500,1200,vsse,4,WEST,ALU3
C 0,12500,1200,vsse,2,WEST,ALU3
C 0,3500,1200,vssi,0,WEST,ALU3
C 0,5000,1200,vddi,2,WEST,ALU3
C 0,9500,1200,vsse,0,WEST,ALU3
C 0,11000,1200,vdde,0,WEST,ALU3
C 0,14000,1200,vdde,2,WEST,ALU3
C 0,17000,1200,vdde,4,WEST,ALU3
C 20000,18500,1200,vsse,7,EAST,ALU3
C 20000,15500,1200,vsse,5,EAST,ALU3
C 20000,12500,1200,vsse,3,EAST,ALU3
C 20000,9500,1200,vsse,1,EAST,ALU3
C 20000,11000,1200,vdde,1,EAST,ALU3
C 20000,14000,1200,vdde,3,EAST,ALU3
C 20000,17000,1200,vdde,5,EAST,ALU3
C 20000,3500,1200,vssi,1,EAST,ALU3
C 20000,5000,1200,vddi,3,EAST,ALU3
C 0,2000,500,ck,0,WEST,ALU3
C 20000,2000,500,ck,1,EAST,ALU3
C 10000,0,5200,vddi,0,SOUTH,ALU1
C 10000,0,5200,vddi,1,SOUTH,ALU2
S 6500,0,6500,1000,200,*,DOWN,ALU2
S 5500,500,5500,1000,200,*,UP,ALU2
S 5500,0,5500,500,200,*,DOWN,ALU2
S 5500,1000,5700,1000,200,*,LEFT,ALU3
S 5500,500,5700,500,200,*,LEFT,ALU3
S 6000,0,6000,1000,1200,cko,DOWN,ALU3
S 10000,30000,10000,40000,100,*,DOWN,ALU1
S 19600,18500,20000,18500,1200,*,RIGHT,ALU3
S 19600,17000,20000,17000,1200,*,RIGHT,ALU3
S 19600,15500,20000,15500,1200,*,RIGHT,ALU3
S 19600,14000,20000,14000,1200,*,RIGHT,ALU3
S 19600,12500,20000,12500,1200,*,RIGHT,ALU3
S 19600,11000,20000,11000,1200,*,RIGHT,ALU3
S 19600,9500,20000,9500,1200,*,RIGHT,ALU3
S 19600,8000,20000,8000,1200,*,RIGHT,ALU3
S 19600,6500,20000,6500,1200,*,RIGHT,ALU3
S 19600,5000,20000,5000,1200,*,RIGHT,ALU3
S 19600,3500,20000,3500,1200,*,RIGHT,ALU3
S 19600,2000,20000,2000,500,*,RIGHT,ALU3
S 0,8000,400,8000,1200,*,RIGHT,ALU3
S 0,9500,400,9500,1200,*,RIGHT,ALU3
S 0,11000,400,11000,1200,*,RIGHT,ALU3
S 0,14000,400,14000,1200,*,RIGHT,ALU3
S 0,15500,400,15500,1200,*,RIGHT,ALU3
S 0,12500,400,12500,1200,*,RIGHT,ALU3
S 0,17000,400,17000,1200,*,RIGHT,ALU3
S 0,18500,400,18500,1200,*,RIGHT,ALU3
S 0,2000,400,2000,500,*,RIGHT,ALU3
S 0,3500,400,3500,1200,*,RIGHT,ALU3
S 0,5000,400,5000,1200,*,RIGHT,ALU3
S 0,6500,400,6500,1200,*,RIGHT,ALU3
S 5800,1000,14200,1000,200,*,RIGHT,ALU3
S 5800,500,14200,500,200,*,RIGHT,ALU3
S 10000,0,10000,8500,5200,*,UP,ALU2
I 0,0,pvddick_px,a,NOSYM
B 6000,500,1200,1200,CONT_VIA,*
B 10000,1100,5200,2400,CONT_VIA,*
EOF

31
alliance/src/cells/src/pxlib/pvddick_sp.vbe Normal file
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@ -0,0 +1,31 @@
ENTITY pvddick_sp IS
GENERIC (
CONSTANT area : NATURAL := 80000;
CONSTANT cin_ck : NATURAL := 127;
CONSTANT tpll_ck : NATURAL := 1235;
CONSTANT rdown_ck : NATURAL := 253;
CONSTANT tphh_ck : NATURAL := 1109;
CONSTANT rup_ck : NATURAL := 311
);
PORT (
cko : out WOR_BIT BUS;
ck : in BIT;
vdde : in BIT;
vddi : in BIT;
vsse : in BIT;
vssi : in BIT
);
END pvddick_sp;
ARCHITECTURE behaviour_data_flow OF pvddick_sp IS
BEGIN
label0 : BLOCK ('1' = '1')
BEGIN
cko <= GUARDED ck;
END BLOCK label0;
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on pvddick_sp"
SEVERITY WARNING;
END;

156
alliance/src/cells/src/pxlib/pvsse_px.ap
View File

@ -1,96 +1,72 @@
V ALLIANCE : 6
H pvsse_px,P,20/11/2010,100
H pvsse_px,P,10/10/2005,100
A 0,0,20000,40000
I 0,20000,padreal,padreal,NOSYM
S 10000,1500,10000,6500,20000,blockagenet,UP,TALU5
S 0,8500,20000,8500,5000,blockagenet,RIGHT,TALU4
S 0,8500,20000,8500,5000,blockagenet,RIGHT,TALU2
S 18500,3000,20000,3000,6000,14onymous_,RIGHT,TALU2
S 19200,100,19200,1500,1600,9nonymous_,UP,TALU5
S 19200,100,19200,1000,1600,4nonymous_,UP,TALU3
S 4000,100,4000,1500,1200,6nonymous_,UP,TALU5
S 800,100,800,1000,1600,0nonymous_,UP,TALU3
S 4000,100,4000,1000,1200,1nonymous_,UP,TALU3
S 18500,3000,20000,3000,6000,19onymous_,RIGHT,TALU4
S 3500,3000,4500,3000,6000,11onymous_,RIGHT,TALU2
S 500,11000,19500,11000,1200,vdde,RIGHT,CALU3
S 500,14000,19500,14000,1200,vdde,RIGHT,CALU3
S 500,17000,19500,17000,1200,vdde,RIGHT,CALU3
S 500,12500,19500,12500,1200,vsse,RIGHT,CALU3
S 500,15500,19500,15500,1200,vsse,RIGHT,CALU3
S 500,18500,19500,18500,1200,vsse,RIGHT,CALU3
S 500,9500,19500,9500,1200,vsse,RIGHT,CALU3
S 10000,24000,10000,36000,12200,vsse,UP,CALU1
S 3500,3000,4500,3000,6000,16onymous_,RIGHT,TALU4
S 8500,9000,8500,30000,2200,21onymous_,UP,ALU1
S 16000,100,16000,1500,1200,8nonymous_,UP,TALU5
S 17500,0,17500,1000,1200,vddi,UP,CALU4
S 17500,0,17500,1000,1200,vddi,UP,CALU5
S 17500,0,17500,1000,1200,vddi,UP,CALU3
S 17500,0,17500,8500,1200,vddi,UP,CALU2
S 500,5000,19500,5000,1200,vddi,RIGHT,CALU3
S 500,8000,19500,8000,1200,vddi,RIGHT,CALU3
S 5500,0,5500,1000,1200,vddi,UP,CALU4
S 5500,0,5500,1000,1200,vddi,UP,CALU5
S 5500,0,5500,1000,1200,vddi,UP,CALU3
S 10000,24000,10000,36000,12200,vsse,DOWN,CALU1
S 8500,9000,8500,30000,2200,*,DOWN,ALU1
S 5500,0,5500,8500,1200,vddi,UP,CALU2
S 16000,100,16000,1000,1200,3nonymous_,UP,TALU3
S 11500,9000,11500,30000,2200,22onymous_,UP,ALU1
S 15500,3000,16500,3000,6000,13onymous_,RIGHT,TALU2
S 15500,3000,16500,3000,6000,18onymous_,RIGHT,TALU4
S 0,3000,1500,3000,6000,15onymous_,RIGHT,TALU4
S 0,3000,1500,3000,6000,10onymous_,RIGHT,TALU2
S 14500,0,14500,1000,1200,vssi,UP,CALU4
S 14500,0,14500,1000,1200,vssi,UP,CALU5
S 14500,0,14500,1000,1200,vssi,UP,CALU3
S 14500,0,14500,8500,1200,vssi,UP,CALU2
S 2500,0,2500,1000,1200,vssi,UP,CALU4
S 2500,0,2500,1000,1200,vssi,UP,CALU5
S 2500,0,2500,1000,1200,vssi,UP,CALU3
S 2500,0,2500,8500,1200,vssi,UP,CALU2
S 500,3500,19500,3500,1200,vssi,RIGHT,CALU3
S 5500,0,5500,1000,1200,vddi,UP,CALU3
S 5500,0,5500,1000,1200,vddi,DOWN,CALU5
S 5500,0,5500,1000,1200,vddi,DOWN,CALU4
S 500,9500,19500,9500,1200,vsse,LEFT,CALU3
S 500,8000,19500,8000,1200,vddi,LEFT,CALU3
S 500,6500,19500,6500,1200,vssi,RIGHT,CALU3
S 800,100,800,1500,1600,5nonymous_,UP,TALU5
S 0,3000,20000,3000,6000,20onymous_,RIGHT,TALU6
S 10000,100,10000,1500,7200,7nonymous_,UP,TALU5
S 10000,100,10000,1000,7200,2nonymous_,UP,TALU3
S 6500,3000,13500,3000,6000,12onymous_,RIGHT,TALU2
S 500,5000,19500,5000,1200,vddi,LEFT,CALU3
S 500,3500,19500,3500,1200,vssi,LEFT,CALU3
S 500,2000,19500,2000,500,ck,RIGHT,CALU3
S 6500,3000,13500,3000,6000,17onymous_,RIGHT,TALU4
B 11500,12500,2200,1200,CONT_VIA,58onymous_
B 17500,8000,1200,1200,CONT_VIA2,41onymous_
B 2500,6500,1200,1200,CONT_VIA2,36onymous_
B 5500,8000,1200,1200,CONT_VIA2,31onymous_
B 11500,18500,2200,1200,CONT_VIA2,53onymous_
B 14500,500,1200,1200,CONT_VIA3,48onymous_
B 17500,500,1200,1200,CONT_VIA3,43onymous_
B 2500,500,1200,1200,CONT_VIA3,38onymous_
B 11500,15500,2200,1200,CONT_VIA2,55onymous_
B 14500,3500,1200,1200,CONT_VIA2,50onymous_
B 8500,9500,2200,1200,CONT_VIA2,23onymous_
B 8500,9500,2200,1200,CONT_VIA,24onymous_
B 8500,15500,2200,1200,CONT_VIA,28onymous_
B 5500,500,1200,1200,CONT_VIA3,33onymous_
B 17500,5000,1200,1200,CONT_VIA2,45onymous_
B 2500,3500,1200,1200,CONT_VIA2,40onymous_
B 8500,18500,2200,1200,CONT_VIA2,25onymous_
B 8500,12500,2200,1200,CONT_VIA,30onymous_
B 5500,5000,1200,1200,CONT_VIA2,35onymous_
B 11500,12500,2200,1200,CONT_VIA2,57onymous_
B 11500,9500,2200,1200,CONT_VIA,52onymous_
B 14500,500,1200,1200,CONT_VIA4,47onymous_
B 17500,500,1200,1200,CONT_VIA4,42onymous_
B 8500,15500,2200,1200,CONT_VIA2,27onymous_
B 11500,18500,2200,1200,CONT_VIA,54onymous_
B 2500,500,1200,1200,CONT_VIA4,37onymous_
B 5500,500,1200,1200,CONT_VIA4,32onymous_
B 14500,500,1200,1200,CONT_VIA2,49onymous_
B 17500,500,1200,1200,CONT_VIA2,44onymous_
B 2500,500,1200,1200,CONT_VIA2,39onymous_
B 5500,500,1200,1200,CONT_VIA2,34onymous_
B 11500,15500,2200,1200,CONT_VIA,56onymous_
B 11500,9500,2200,1200,CONT_VIA2,51onymous_
B 14500,6500,1200,1200,CONT_VIA2,46onymous_
B 8500,18500,2200,1200,CONT_VIA,26onymous_
B 8500,12500,2200,1200,CONT_VIA2,29onymous_
S 500,18500,19500,18500,1200,vsse,LEFT,CALU3
S 500,17000,19500,17000,1200,vdde,LEFT,CALU3
S 500,15500,19500,15500,1200,vsse,LEFT,CALU3
S 500,14000,19500,14000,1200,vdde,LEFT,CALU3
S 500,12500,19500,12500,1200,vsse,LEFT,CALU3
S 500,11000,19500,11000,1200,vdde,LEFT,CALU3
S 2500,0,2500,8500,1200,vssi,UP,CALU2
S 2500,0,2500,1000,1200,vssi,UP,CALU3
S 2500,0,2500,1000,1200,vssi,DOWN,CALU5
S 2500,0,2500,1000,1200,vssi,DOWN,CALU4
S 17500,0,17500,8500,1200,vddi,UP,CALU2
S 17500,0,17500,1000,1200,vddi,UP,CALU3
S 17500,0,17500,1000,1200,vddi,DOWN,CALU5
S 17500,0,17500,1000,1200,vddi,DOWN,CALU4
S 14500,0,14500,8500,1200,vssi,UP,CALU2
S 14500,0,14500,1000,1200,vssi,UP,CALU3
S 14500,0,14500,1000,1200,vssi,DOWN,CALU5
S 14500,0,14500,1000,1200,vssi,DOWN,CALU4
S 11500,9000,11500,30000,2200,*,DOWN,ALU1
I 0,20000,padreal,padreal,NOSYM
B 8500,9500,2200,1200,CONT_VIA2,*
B 8500,9500,2200,1200,CONT_VIA,*
B 8500,18500,2200,1200,CONT_VIA2,*
B 8500,18500,2200,1200,CONT_VIA,*
B 8500,15500,2200,1200,CONT_VIA2,*
B 8500,15500,2200,1200,CONT_VIA,*
B 8500,12500,2200,1200,CONT_VIA2,*
B 8500,12500,2200,1200,CONT_VIA,*
B 5500,8000,1200,1200,CONT_VIA2,*
B 5500,500,1200,1200,CONT_VIA4,*
B 5500,500,1200,1200,CONT_VIA3,*
B 5500,500,1200,1200,CONT_VIA2,*
B 5500,5000,1200,1200,CONT_VIA2,*
B 2500,6500,1200,1200,CONT_VIA2,*
B 2500,500,1200,1200,CONT_VIA4,*
B 2500,500,1200,1200,CONT_VIA3,*
B 2500,500,1200,1200,CONT_VIA2,*
B 2500,3500,1200,1200,CONT_VIA2,*
B 17500,8000,1200,1200,CONT_VIA2,*
B 17500,500,1200,1200,CONT_VIA4,*
B 17500,500,1200,1200,CONT_VIA3,*
B 17500,500,1200,1200,CONT_VIA2,*
B 17500,5000,1200,1200,CONT_VIA2,*
B 14500,6500,1200,1200,CONT_VIA2,*
B 14500,500,1200,1200,CONT_VIA4,*
B 14500,500,1200,1200,CONT_VIA3,*
B 14500,500,1200,1200,CONT_VIA2,*
B 14500,3500,1200,1200,CONT_VIA2,*
B 11500,9500,2200,1200,CONT_VIA2,*
B 11500,9500,2200,1200,CONT_VIA,*
B 11500,18500,2200,1200,CONT_VIA2,*
B 11500,18500,2200,1200,CONT_VIA,*
B 11500,15500,2200,1200,CONT_VIA2,*
B 11500,15500,2200,1200,CONT_VIA,*
B 11500,12500,2200,1200,CONT_VIA2,*
B 11500,12500,2200,1200,CONT_VIA,*
EOF

55
alliance/src/cells/src/pxlib/pvsse_sp.ap Normal file
View File

@ -0,0 +1,55 @@
V ALLIANCE : 6
H pvsse_sp,P, 4/ 9/2014,100
A 0,0,20000,40000
C 10000,40000,100,vsse,8,NORTH,ALU1
C 0,8000,1200,vddi,6,WEST,ALU3
C 0,6500,1200,vssi,6,WEST,ALU3
C 20000,6500,1200,vssi,7,EAST,ALU3
C 20000,8000,1200,vddi,7,EAST,ALU3
C 0,18500,1200,vsse,6,WEST,ALU3
C 0,15500,1200,vsse,4,WEST,ALU3
C 0,12500,1200,vsse,2,WEST,ALU3
C 0,3500,1200,vssi,4,WEST,ALU3
C 0,5000,1200,vddi,4,WEST,ALU3
C 0,9500,1200,vsse,0,WEST,ALU3
C 0,11000,1200,vdde,0,WEST,ALU3
C 0,14000,1200,vdde,2,WEST,ALU3
C 0,17000,1200,vdde,4,WEST,ALU3
C 20000,18500,1200,vsse,7,EAST,ALU3
C 20000,15500,1200,vsse,5,EAST,ALU3
C 20000,12500,1200,vsse,3,EAST,ALU3
C 20000,9500,1200,vsse,1,EAST,ALU3
C 20000,11000,1200,vdde,1,EAST,ALU3
C 20000,14000,1200,vdde,3,EAST,ALU3
C 20000,17000,1200,vdde,5,EAST,ALU3
C 20000,3500,1200,vssi,5,EAST,ALU3
C 20000,5000,1200,vddi,5,EAST,ALU3
C 0,2000,500,ck,0,WEST,ALU3
C 20000,2000,500,ck,1,EAST,ALU3
S 10000,30000,10000,40000,100,*,DOWN,ALU1
S 19600,18500,20000,18500,1200,*,RIGHT,ALU3
S 19600,17000,20000,17000,1200,*,RIGHT,ALU3
S 19600,15500,20000,15500,1200,*,RIGHT,ALU3
S 19600,14000,20000,14000,1200,*,RIGHT,ALU3
S 19600,12500,20000,12500,1200,*,RIGHT,ALU3
S 19600,11000,20000,11000,1200,*,RIGHT,ALU3
S 19600,9500,20000,9500,1200,*,RIGHT,ALU3
S 19600,8000,20000,8000,1200,*,RIGHT,ALU3
S 19600,6500,20000,6500,1200,*,RIGHT,ALU3
S 19600,5000,20000,5000,1200,*,RIGHT,ALU3
S 19600,3500,20000,3500,1200,*,RIGHT,ALU3
S 19600,2000,20000,2000,500,*,RIGHT,ALU3
S 0,8000,400,8000,1200,*,RIGHT,ALU3
S 0,9500,400,9500,1200,*,RIGHT,ALU3
S 0,11000,400,11000,1200,*,RIGHT,ALU3
S 0,14000,400,14000,1200,*,RIGHT,ALU3
S 0,15500,400,15500,1200,*,RIGHT,ALU3
S 0,12500,400,12500,1200,*,RIGHT,ALU3
S 0,17000,400,17000,1200,*,RIGHT,ALU3
S 0,18500,400,18500,1200,*,RIGHT,ALU3
S 0,2000,400,2000,500,*,RIGHT,ALU3
S 0,3500,400,3500,1200,*,RIGHT,ALU3
S 0,5000,400,5000,1200,*,RIGHT,ALU3
S 0,6500,400,6500,1200,*,RIGHT,ALU3
I 0,0,pvsse_px,a,NOSYM
EOF

20
alliance/src/cells/src/pxlib/pvsse_sp.vbe Normal file
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@ -0,0 +1,20 @@
ENTITY pvsse_sp IS
GENERIC (
CONSTANT area : NATURAL := 80000
);
PORT (
ck : in BIT;
vdde : in BIT;
vddi : in BIT;
vsse : in BIT;
vssi : in BIT
);
END pvsse_sp;
ARCHITECTURE behaviour_data_flow OF pvsse_sp IS
BEGIN
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on pvsse_sp"
SEVERITY WARNING;
END;

666
alliance/src/cells/src/pxlib/pvsseck_px.ap
View File

@ -1,354 +1,324 @@
V ALLIANCE : 6
H pvsseck_px,P,20/11/2010,100
H pvsseck_px,P, 8/11/2005,100
A 0,0,20000,40000
I 0,20000,padreal,padreal,NOSYM
S 13000,3100,13000,3700,200,55onymous_,UP,ALU2
S 15100,4900,15100,5400,100,87onymous_,UP,POLY
S 12500,100,12500,1000,4200,118nymous_,UP,TALU3
S 4600,3800,4600,4700,200,37onymous_,UP,NDIF
S 7000,3800,7000,4700,300,11onymous_,UP,NDIF
S 6100,4900,6100,5400,100,24onymous_,UP,POLY
S 13300,5400,13300,7700,100,68onymous_,UP,PTRANS
S 500,8000,19500,8000,1200,vddi,RIGHT,CALU3
S 4000,7800,7000,7800,800,vddi,RIGHT,ALU1
S 17500,0,17500,1000,1200,vddi,UP,CALU4
S 17500,0,17500,1000,1200,vddi,UP,CALU5
S 17500,0,17500,1000,1200,vddi,UP,CALU3
S 4500,0,4500,1000,1200,vddi,UP,CALU4
S 4500,0,4500,1000,1200,vddi,UP,CALU5
S 4500,0,4500,1000,1200,vddi,UP,CALU3
S 500,5000,19500,5000,1200,vddi,RIGHT,CALU3
S 13000,7800,16000,7800,800,vddi,RIGHT,ALU1
S 17500,0,17500,8500,1200,vddi,UP,CALU2
S 4500,0,4500,8500,1200,vddi,UP,CALU2
S 14500,4900,14500,5400,100,81onymous_,UP,POLY
S 15700,5400,15700,7700,100,94onymous_,UP,PTRANS
S 3500,3000,3500,3000,6000,125nymous_,RIGHT,TALU4
S 4000,5600,4000,7500,300,44onymous_,UP,PDIF
S 5800,500,14200,500,200,0nonymous_,RIGHT,ALU3
S 5200,4600,6400,4600,200,18onymous_,RIGHT,ALU1
S 5200,3800,5200,4700,200,31onymous_,UP,NDIF
S 12500,100,12500,1500,4200,112nymous_,UP,TALU5
S 16500,2000,16500,5100,200,56onymous_,UP,ALU2
S 4000,3100,7000,3100,300,5nonymous_,RIGHT,PTIE
S 13000,6100,13000,7500,200,101nymous_,UP,ALU1
S 0,3000,1500,3000,6000,132nymous_,RIGHT,TALU2
S 12800,6900,16200,6900,2800,62onymous_,RIGHT,NWELL
S 4600,5600,4600,7500,300,38onymous_,UP,PDIF
S 6100,5400,6100,7700,100,25onymous_,UP,PTRANS
S 13900,3600,13900,4900,100,75onymous_,UP,NTRANS
S 15100,5400,15100,7700,100,88onymous_,UP,PTRANS
S 16500,100,16500,1000,200,119nymous_,UP,TALU3
S 7000,5600,7000,7500,300,12onymous_,UP,PDIF
S 13600,3800,13600,4700,200,69onymous_,UP,NDIF
S 14500,5400,14500,7700,100,82onymous_,UP,PTRANS
S 16000,3800,16000,4700,300,95onymous_,UP,NDIF
S 16500,100,16500,1500,200,113nymous_,UP,TALU5
S 0,3000,1500,3000,6000,126nymous_,RIGHT,TALU4
S 4600,3700,4600,4600,200,45onymous_,UP,ALU1
S 4000,5100,6400,5100,200,19onymous_,RIGHT,ALU1
S 5200,5600,5200,7000,200,32onymous_,UP,ALU1
S 10000,1500,10000,6500,20000,blockagenet,UP,TALU5
S 0,8500,20000,8500,5000,blockagenet,RIGHT,TALU4
S 0,8500,20000,8500,5000,blockagenet,RIGHT,TALU2
S 13000,3100,16000,3100,300,57onymous_,RIGHT,PTIE
S 6400,4200,6400,4600,200,6nonymous_,UP,ALU1
S 15400,3800,15400,4700,200,89onymous_,UP,NDIF
S 15400,6000,15400,7500,200,102nymous_,UP,ALU1
S 800,100,800,1500,1600,108nymous_,UP,TALU5
S 13000,3800,13000,4700,300,63onymous_,UP,NDIF
S 4300,3600,4300,4900,100,39onymous_,UP,NTRANS
S 5800,1000,14200,1000,200,1nonymous_,RIGHT,ALU3
S 5800,3800,5800,4700,300,26onymous_,UP,NDIF
S 13900,4900,13900,5400,100,76onymous_,UP,POLY
S 8500,9000,8500,30000,2200,107nymous_,UP,ALU1
S 0,3000,20000,3000,6000,120nymous_,RIGHT,TALU6
S 6700,3600,6700,4900,100,13onymous_,UP,NTRANS
S 13600,4600,14800,4600,200,70onymous_,RIGHT,ALU1
S 5800,6100,5800,7500,200,51onymous_,UP,ALU1
S 7000,3700,7000,4100,200,46onymous_,UP,ALU1
S 500,2000,19500,2000,500,ck,RIGHT,CALU3
S 5200,5600,5200,7500,300,33onymous_,UP,PDIF
S 14800,3800,14800,4700,200,83onymous_,UP,NDIF
S 16000,5600,16000,7500,300,96onymous_,UP,PDIF
S 800,100,800,1000,1600,114nymous_,UP,TALU3
S 18500,3000,20000,3000,6000,127nymous_,RIGHT,TALU2
S 6400,5600,6400,7000,200,20onymous_,UP,ALU1
S 13000,5600,13000,7500,300,64onymous_,UP,PDIF
S 13600,4200,13600,4600,200,58onymous_,UP,ALU1
S 5200,4200,5200,4600,200,7nonymous_,UP,ALU1
S 500,9500,19500,9500,1200,vsse,RIGHT,CALU3
S 500,18500,19500,18500,1200,vsse,RIGHT,CALU3
S 500,15500,19500,15500,1200,vsse,RIGHT,CALU3
S 500,12500,19500,12500,1200,vsse,RIGHT,CALU3
S 10000,24000,10000,36000,12200,vsse,UP,CALU1
S 5800,8100,7000,8100,400,2nonymous_,RIGHT,ALU2
S 15400,5600,15400,7500,300,90onymous_,UP,PDIF
S 14200,6100,14200,7500,200,103nymous_,UP,ALU1
S 18500,3000,20000,3000,6000,121nymous_,RIGHT,TALU4
S 4300,4900,4300,5400,100,40onymous_,UP,POLY
S 5800,5600,5800,7500,300,27onymous_,UP,PDIF
S 13900,5400,13900,7700,100,77onymous_,UP,PTRANS
S 6700,4900,6700,5400,100,14onymous_,UP,POLY
S 9500,0,9500,1000,1200,cko,UP,CALU5
S 9500,0,9500,1000,1200,cko,UP,CALU4
S 15400,3700,15400,4600,200,97onymous_,UP,ALU1
S 13600,5100,16000,5100,200,71onymous_,RIGHT,ALU1
S 5800,500,5800,5600,200,52onymous_,UP,ALU2
S 5800,3700,5800,4100,200,47onymous_,UP,ALU1
S 9500,0,9500,1000,1200,cko,DOWN,CALU5
S 9500,0,9500,1000,1200,cko,DOWN,CALU4
S 8500,9000,8500,30000,2200,*,DOWN,ALU1
S 500,9500,19500,9500,1200,vsse,LEFT,CALU3
S 500,8000,19500,8000,1200,vddi,LEFT,CALU3
S 500,6500,19500,6500,1200,vssi,RIGHT,CALU3
S 4000,3400,7000,3400,800,vssi,RIGHT,ALU1
S 15500,0,15500,1000,1200,vssi,UP,CALU5
S 15500,0,15500,1000,1200,vssi,UP,CALU3
S 15500,0,15500,8500,1200,vssi,UP,CALU2
S 500,5000,19500,5000,1200,vddi,LEFT,CALU3
S 500,3500,19500,3500,1200,vssi,LEFT,CALU3
S 500,2000,19500,2000,500,ck,RIGHT,CALU3
S 500,18500,19500,18500,1200,vsse,LEFT,CALU3
S 500,17000,19500,17000,1200,vdde,LEFT,CALU3
S 500,15500,19500,15500,1200,vsse,LEFT,CALU3
S 500,14000,19500,14000,1200,vdde,LEFT,CALU3
S 500,12500,19500,12500,1200,vsse,LEFT,CALU3
S 500,11000,19500,11000,1200,vdde,LEFT,CALU3
S 4500,0,4500,8500,1200,vddi,UP,CALU2
S 4500,0,4500,1000,1200,vddi,UP,CALU3
S 4500,0,4500,1000,1200,vddi,DOWN,CALU5
S 4500,0,4500,1000,1200,vddi,DOWN,CALU4
S 2500,0,2500,8500,1200,vssi,UP,CALU2
S 13000,3400,16000,3400,800,vssi,RIGHT,ALU1
S 15500,0,15500,1000,1200,vssi,UP,CALU4
S 2500,0,2500,1000,1200,vssi,UP,CALU4
S 2500,0,2500,1000,1200,vssi,UP,CALU5
S 2500,0,2500,1000,1200,vssi,UP,CALU3
S 500,3500,19500,3500,1200,vssi,RIGHT,CALU3
S 4900,3600,4900,4900,100,34onymous_,UP,NTRANS
S 14800,5600,14800,7000,200,84onymous_,UP,ALU1
S 19200,100,19200,1000,1600,115nymous_,UP,TALU3
S 16500,3000,16500,3000,6000,128nymous_,RIGHT,TALU2
S 4000,4200,4000,6400,200,8nonymous_,UP,ALU1
S 6400,5600,6400,7500,300,21onymous_,UP,PDIF
S 13300,3600,13300,4900,100,65onymous_,UP,NTRANS
S 14800,4200,14800,4600,200,59onymous_,UP,ALU1
S 15700,3600,15700,4900,100,91onymous_,UP,NTRANS
S 14200,500,14200,5600,200,104nymous_,UP,ALU2
S 16500,3000,16500,3000,6000,122nymous_,RIGHT,TALU4
S 3500,5100,4300,5100,300,41onymous_,RIGHT,POLY
S 5500,3600,5500,4900,100,28onymous_,UP,NTRANS
S 14200,3800,14200,4700,300,78onymous_,UP,NDIF
S 19200,100,19200,1500,1600,109nymous_,UP,TALU5
S 13600,5600,13600,7000,200,72onymous_,UP,ALU1
S 4900,5100,6700,5100,300,15onymous_,RIGHT,POLY
S 13000,3700,13000,4100,200,98onymous_,UP,ALU1
S 10500,3000,14500,3000,6000,129nymous_,RIGHT,TALU2
S 6400,500,6400,5600,200,53onymous_,UP,ALU2
S 4600,3700,7000,3700,200,48onymous_,RIGHT,ALU1
S 14800,5600,14800,7500,300,85onymous_,UP,PDIF
S 3500,100,3500,1000,200,116nymous_,UP,TALU3
S 4900,4900,4900,5400,100,35onymous_,UP,POLY
S 4000,8100,7000,8100,300,9nonymous_,RIGHT,NTIE
S 5200,5600,6400,5600,200,22onymous_,RIGHT,ALU1
S 13600,500,13600,5600,200,105nymous_,UP,ALU2
S 13300,4900,13300,5400,100,66onymous_,UP,POLY
S 16000,4200,16000,6400,200,60onymous_,UP,ALU1
S 15700,4900,15700,5400,100,92onymous_,UP,POLY
S 10500,3000,14500,3000,6000,123nymous_,RIGHT,TALU4
S 4300,5400,4300,7700,100,42onymous_,UP,PTRANS
S 5500,4900,5500,5400,100,29onymous_,UP,POLY
S 14200,5600,14200,7500,300,79onymous_,UP,PDIF
S 3500,100,3500,1500,200,110nymous_,UP,TALU5
S 13600,5600,13600,7500,300,73onymous_,UP,PDIF
S 7000,3100,7000,3700,200,3nonymous_,UP,ALU2
S 6700,5400,6700,7700,100,16onymous_,UP,PTRANS
S 14200,3700,14200,4100,200,99onymous_,UP,ALU1
S 5500,3000,8500,3000,6000,130nymous_,RIGHT,TALU2
S 13000,8100,14200,8100,400,54onymous_,RIGHT,ALU2
S 7000,6100,7000,7500,200,49onymous_,UP,ALU1
S 15100,3600,15100,4900,100,86onymous_,UP,NTRANS
S 7000,100,7000,1000,3200,117nymous_,UP,TALU3
S 4600,6000,4600,7500,200,50onymous_,UP,ALU1
S 4900,5400,4900,7700,100,36onymous_,UP,PTRANS
S 3800,6900,7200,6900,2800,10onymous_,RIGHT,NWELL
S 6100,3600,6100,4900,100,23onymous_,UP,NTRANS
S 11500,9000,11500,30000,2200,106nymous_,UP,ALU1
S 13300,5100,15100,5100,300,67onymous_,RIGHT,POLY
S 13000,8100,16000,8100,300,61onymous_,RIGHT,NTIE
S 15700,5100,16500,5100,300,93onymous_,RIGHT,POLY
S 5500,3000,8500,3000,6000,124nymous_,RIGHT,TALU4
S 4000,3800,4000,4700,300,43onymous_,UP,NDIF
S 500,17000,19500,17000,1200,vdde,RIGHT,CALU3
S 500,14000,19500,14000,1200,vdde,RIGHT,CALU3
S 500,11000,19500,11000,1200,vdde,RIGHT,CALU3
S 6400,3800,6400,4700,200,17onymous_,UP,NDIF
S 5500,5400,5500,7700,100,30onymous_,UP,PTRANS
S 14500,3600,14500,4900,100,80onymous_,UP,NTRANS
S 7000,100,7000,1500,3200,111nymous_,UP,TALU5
S 13600,5600,14800,5600,200,74onymous_,RIGHT,ALU1
S 3500,2000,3500,5100,200,4nonymous_,UP,ALU2
S 13000,3700,15400,3700,200,100nymous_,RIGHT,ALU1
S 3500,3000,3500,3000,6000,131nymous_,RIGHT,TALU2
B 17500,500,1200,1200,CONT_VIA3,288nymous_
V 15400,7000,CONT_DIF_P,261nymous_
V 14800,4200,CONT_DIF_N,214nymous_
V 4600,4100,CONT_DIF_N,187nymous_
V 7000,3700,CONT_DIF_N,160nymous_
V 4000,3100,CONT_BODY_P,147nymous_
B 2500,6500,1200,1200,CONT_VIA2,295nymous_
V 15400,3700,CONT_DIF_N,268nymous_
V 13600,6500,CONT_DIF_P,241nymous_
V 4000,5900,CONT_DIF_P,194nymous_
V 6400,4600,CONT_VIA,167nymous_
V 4000,8100,CONT_BODY_N,154nymous_
B 8500,12500,2200,1200,CONT_VIA2,302nymous_
B 11500,15500,2200,1200,CONT_VIA,275nymous_
V 14200,6100,CONT_DIF_P,248nymous_
V 13600,3100,CONT_BODY_P,221nymous_
V 5800,4100,CONT_DIF_N,174nymous_
B 15500,500,1200,1200,CONT_VIA2,282nymous_
V 14800,6500,CONT_DIF_P,255nymous_
V 13000,8100,CONT_BODY_N,228nymous_
V 5800,500,CONT_VIA2,201nymous_
B 9500,500,1200,1200,CONT_VIA3,309nymous_
V 15400,7500,CONT_DIF_P,262nymous_
V 13000,7500,CONT_DIF_P,235nymous_
V 13000,8100,CONT_VIA2,208nymous_
V 5800,7500,CONT_DIF_P,181nymous_
V 7000,3700,CONT_VIA,141nymous_
B 17500,500,1200,1200,CONT_VIA4,289nymous_
V 13600,7000,CONT_DIF_P,242nymous_
V 16000,4200,CONT_DIF_N,215nymous_
V 4600,4600,CONT_DIF_N,188nymous_
V 7000,4100,CONT_DIF_N,161nymous_
V 4600,3100,CONT_BODY_P,148nymous_
B 4500,5000,1200,1200,CONT_VIA2,296nymous_
V 14200,1000,CONT_VIA2,269nymous_
V 13000,3100,CONT_BODY_P,222nymous_
V 4000,6400,CONT_DIF_P,195nymous_
V 6400,5100,CONT_POLY,168nymous_
V 7000,8100,CONT_VIA,133nymous_
V 6400,8100,CONT_VIA,134nymous_
B 8500,15500,2200,1200,CONT_VIA,303nymous_
B 11500,15500,2200,1200,CONT_VIA2,276nymous_
V 14200,6500,CONT_DIF_P,249nymous_
V 6400,500,CONT_VIA2,202nymous_
V 5800,4600,CONT_VIA,175nymous_
V 5800,8100,CONT_VIA,135nymous_
B 9500,500,1200,1200,CONT_VIA4,310nymous_
B 15500,500,1200,1200,CONT_VIA3,283nymous_
V 14800,7000,CONT_DIF_P,256nymous_
V 14800,5600,CONT_TURN1,229nymous_
V 5200,4600,CONT_DIF_N,182nymous_
V 5200,8100,CONT_BODY_N,155nymous_
V 7000,3100,CONT_VIA,142nymous_
B 17500,8000,1200,1200,CONT_VIA2,290nymous_
V 16000,4600,CONT_DIF_N,263nymous_
V 13600,4600,CONT_DIF_N,236nymous_
V 13000,3100,CONT_VIA2,209nymous_
V 7000,6100,CONT_DIF_P,162nymous_
V 13600,1000,CONT_VIA2,270nymous_
V 14200,3700,CONT_DIF_N,243nymous_
V 13600,4200,CONT_DIF_N,216nymous_
V 4600,6000,CONT_DIF_P,189nymous_
V 5200,3100,CONT_BODY_P,149nymous_
B 4500,500,1200,1200,CONT_VIA2,297nymous_
V 14200,7000,CONT_DIF_P,250nymous_
V 15400,8100,CONT_BODY_N,223nymous_
V 3500,5100,CONT_POLY,196nymous_
V 6400,5600,CONT_VIA,169nymous_
B 8500,15500,2200,1200,CONT_VIA2,304nymous_
B 11500,18500,2200,1200,CONT_VIA,277nymous_
V 13000,3700,CONT_DIF_N,230nymous_
V 13000,8100,CONT_VIA,203nymous_
V 5800,5100,CONT_POLY,176nymous_
V 5800,8100,CONT_VIA2,136nymous_
B 15500,500,1200,1200,CONT_VIA4,284nymous_
V 15400,4100,CONT_DIF_N,257nymous_
V 13000,3700,CONT_VIA2,210nymous_
V 5200,5100,CONT_POLY,183nymous_
V 5800,8100,CONT_BODY_N,156nymous_
V 3500,2000,CONT_VIA2,143nymous_
B 2500,3500,1200,1200,CONT_VIA2,291nymous_
V 16000,5900,CONT_DIF_P,264nymous_
V 13600,4600,CONT_VIA,237nymous_
V 4600,6500,CONT_DIF_P,190nymous_
V 7000,6500,CONT_DIF_P,163nymous_
V 5800,3100,CONT_BODY_P,150nymous_
B 4500,500,1200,1200,CONT_VIA3,298nymous_
V 14200,500,CONT_VIA2,271nymous_
V 14200,4100,CONT_DIF_N,244nymous_
V 16000,3100,CONT_BODY_P,217nymous_
V 6400,6000,CONT_DIF_P,170nymous_
B 11500,18500,2200,1200,CONT_VIA2,278nymous_
V 14200,7500,CONT_DIF_P,251nymous_
V 16000,8100,CONT_BODY_N,224nymous_
V 3500,5100,CONT_VIA,197nymous_
B 8500,18500,2200,1200,CONT_VIA,305nymous_
V 15400,4600,CONT_DIF_N,258nymous_
V 13000,4100,CONT_DIF_N,231nymous_
V 13600,8100,CONT_VIA,204nymous_
V 5800,5600,CONT_VIA,177nymous_
V 6400,8100,CONT_VIA2,137nymous_
B 15500,6500,1200,1200,CONT_VIA2,285nymous_
V 13600,5100,CONT_POLY,238nymous_
V 13000,3700,CONT_VIA,211nymous_
V 5200,6000,CONT_DIF_P,184nymous_
V 6400,8100,CONT_BODY_N,157nymous_
V 5200,4200,CONT_DIF_N,144nymous_
B 2500,500,1200,1200,CONT_VIA2,292nymous_
V 16000,6400,CONT_DIF_P,265nymous_
V 15400,3100,CONT_BODY_P,218nymous_
V 4600,7000,CONT_DIF_P,191nymous_
V 7000,7000,CONT_DIF_P,164nymous_
V 6400,3100,CONT_BODY_P,151nymous_
B 4500,500,1200,1200,CONT_VIA4,299nymous_
V 13600,500,CONT_VIA2,272nymous_
V 14200,4600,CONT_VIA,245nymous_
V 4600,3700,CONT_DIF_N,198nymous_
V 6400,6500,CONT_DIF_P,171nymous_
B 8500,18500,2200,1200,CONT_VIA2,306nymous_
B 11500,9500,2200,1200,CONT_VIA,279nymous_
V 14800,4600,CONT_DIF_N,252nymous_
V 14800,8100,CONT_BODY_N,225nymous_
V 5800,6100,CONT_DIF_P,178nymous_
V 7000,8100,CONT_VIA2,138nymous_
B 17500,5000,1200,1200,CONT_VIA2,286nymous_
V 15400,6000,CONT_DIF_P,259nymous_
V 13000,6100,CONT_DIF_P,232nymous_
V 14200,8100,CONT_VIA,205nymous_
V 7000,8100,CONT_BODY_N,158nymous_
V 16500,5100,CONT_POLY,266nymous_
V 13600,5600,CONT_VIA,239nymous_
V 13000,3100,CONT_VIA,212nymous_
V 5200,6500,CONT_DIF_P,185nymous_
V 4000,4200,CONT_DIF_N,145nymous_
B 2500,500,1200,1200,CONT_VIA3,293nymous_
V 14200,5100,CONT_POLY,246nymous_
V 14800,3100,CONT_BODY_P,219nymous_
V 4600,7500,CONT_DIF_P,192nymous_
V 7000,7500,CONT_DIF_P,165nymous_
V 7000,3100,CONT_BODY_P,152nymous_
B 4500,8000,1200,1200,CONT_VIA2,300nymous_
B 11500,12500,2200,1200,CONT_VIA,273nymous_
V 14200,8100,CONT_BODY_N,226nymous_
V 5800,1000,CONT_VIA2,199nymous_
V 6400,7000,CONT_DIF_P,172nymous_
B 8500,9500,2200,1200,CONT_VIA,307nymous_
B 11500,9500,2200,1200,CONT_VIA2,280nymous_
V 14800,5100,CONT_POLY,253nymous_
V 14200,8100,CONT_VIA2,206nymous_
V 5800,6500,CONT_DIF_P,179nymous_
V 7000,3100,CONT_VIA2,139nymous_
B 17500,500,1200,1200,CONT_VIA2,287nymous_
V 15400,6500,CONT_DIF_P,260nymous_
V 13000,6500,CONT_DIF_P,233nymous_
V 5200,7000,CONT_DIF_P,186nymous_
V 5200,5600,CONT_TURN1,159nymous_
V 6400,4200,CONT_DIF_N,146nymous_
B 2500,500,1200,1200,CONT_VIA4,294nymous_
V 16500,5100,CONT_VIA,267nymous_
V 13600,6000,CONT_DIF_P,240nymous_
V 16500,2000,CONT_VIA2,213nymous_
V 6400,4600,CONT_DIF_N,166nymous_
B 11500,12500,2200,1200,CONT_VIA2,274nymous_
V 14200,5600,CONT_VIA,247nymous_
V 14200,3100,CONT_BODY_P,220nymous_
V 4000,4600,CONT_DIF_N,193nymous_
V 4600,8100,CONT_BODY_N,153nymous_
B 8500,12500,2200,1200,CONT_VIA,301nymous_
V 14800,6000,CONT_DIF_P,254nymous_
V 13600,8100,CONT_BODY_N,227nymous_
V 6400,1000,CONT_VIA2,200nymous_
V 5800,3700,CONT_DIF_N,173nymous_
B 8500,9500,2200,1200,CONT_VIA2,308nymous_
B 15500,3500,1200,1200,CONT_VIA2,281nymous_
V 13000,7000,CONT_DIF_P,234nymous_
V 13600,8100,CONT_VIA2,207nymous_
V 5800,7000,CONT_DIF_P,180nymous_
V 7000,3700,CONT_VIA2,140nymous_
S 2500,0,2500,1000,1200,vssi,DOWN,CALU5
S 2500,0,2500,1000,1200,vssi,DOWN,CALU4
S 17500,0,17500,8500,1200,vddi,UP,CALU2
S 17500,0,17500,1000,1200,vddi,UP,CALU3
S 17500,0,17500,1000,1200,vddi,DOWN,CALU5
S 17500,0,17500,1000,1200,vddi,DOWN,CALU4
S 15500,0,15500,8500,1200,vssi,UP,CALU2
S 15500,0,15500,1000,1200,vssi,UP,CALU3
S 15500,0,15500,1000,1200,vssi,DOWN,CALU5
S 15500,0,15500,1000,1200,vssi,DOWN,CALU4
S 11500,9000,11500,30000,2200,*,DOWN,ALU1
S 13600,500,13600,5600,200,*,DOWN,ALU2
S 14200,500,14200,5600,200,*,DOWN,ALU2
S 14200,6100,14200,7500,200,*,UP,ALU1
S 15400,6000,15400,7500,200,*,DOWN,ALU1
S 13000,6100,13000,7500,200,*,UP,ALU1
S 13000,3700,15400,3700,200,*,RIGHT,ALU1
S 14200,3700,14200,4100,200,*,DOWN,ALU1
S 13000,3700,13000,4100,200,*,DOWN,ALU1
S 15400,3700,15400,4600,200,*,DOWN,ALU1
S 16000,5600,16000,7500,300,*,UP,PDIF
S 16000,3800,16000,4700,300,*,DOWN,NDIF
S 15700,5400,15700,7700,100,*,UP,PTRANS
S 15700,5100,16500,5100,300,*,LEFT,POLY
S 15700,4900,15700,5400,100,*,DOWN,POLY
S 15700,3600,15700,4900,100,*,DOWN,NTRANS
S 15400,5600,15400,7500,300,*,UP,PDIF
S 15400,3800,15400,4700,200,*,DOWN,NDIF
S 15100,5400,15100,7700,100,*,UP,PTRANS
S 15100,4900,15100,5400,100,*,DOWN,POLY
S 15100,3600,15100,4900,100,*,UP,NTRANS
S 14800,5600,14800,7500,300,*,UP,PDIF
S 14800,5600,14800,7000,200,*,UP,ALU1
S 14800,3800,14800,4700,200,*,DOWN,NDIF
S 14500,5400,14500,7700,100,*,UP,PTRANS
S 14500,4900,14500,5400,100,*,DOWN,POLY
S 14500,3600,14500,4900,100,*,UP,NTRANS
S 14200,5600,14200,7500,300,*,UP,PDIF
S 14200,3800,14200,4700,300,*,DOWN,NDIF
S 13900,5400,13900,7700,100,*,DOWN,PTRANS
S 13900,4900,13900,5400,100,*,UP,POLY
S 13900,3600,13900,4900,100,*,DOWN,NTRANS
S 13600,5600,14800,5600,200,*,LEFT,ALU1
S 13600,5600,13600,7500,300,*,DOWN,PDIF
S 13600,5600,13600,7000,200,*,UP,ALU1
S 13600,5100,16000,5100,200,*,LEFT,ALU1
S 13600,4600,14800,4600,200,*,LEFT,ALU1
S 13600,3800,13600,4700,200,*,UP,NDIF
S 13300,5400,13300,7700,100,*,DOWN,PTRANS
S 13300,5100,15100,5100,300,*,LEFT,POLY
S 13300,4900,13300,5400,100,*,UP,POLY
S 13300,3600,13300,4900,100,*,DOWN,NTRANS
S 13000,5600,13000,7500,300,*,UP,PDIF
S 13000,3800,13000,4700,300,*,DOWN,NDIF
S 12800,6900,16200,6900,2800,*,LEFT,NWELL
S 13000,8100,16000,8100,300,*,RIGHT,NTIE
S 13000,7800,16000,7800,800,vddi,RIGHT,ALU1
S 13000,3400,16000,3400,800,vssi,RIGHT,ALU1
S 16000,4200,16000,6400,200,*,DOWN,ALU1
S 14800,4200,14800,4600,200,*,DOWN,ALU1
S 13600,4200,13600,4600,200,*,DOWN,ALU1
S 13000,3100,16000,3100,300,*,RIGHT,PTIE
S 16500,2000,16500,5100,200,*,DOWN,ALU2
S 13000,3100,13000,3700,200,*,DOWN,ALU2
S 13000,8100,14200,8100,400,*,RIGHT,ALU2
S 6400,500,6400,5600,200,*,UP,ALU2
S 5800,500,5800,5600,200,*,UP,ALU2
S 5800,6100,5800,7500,200,*,DOWN,ALU1
S 4600,6000,4600,7500,200,*,UP,ALU1
S 7000,6100,7000,7500,200,*,DOWN,ALU1
S 4600,3700,7000,3700,200,*,RIGHT,ALU1
S 5800,3700,5800,4100,200,*,UP,ALU1
S 7000,3700,7000,4100,200,*,UP,ALU1
S 4600,3700,4600,4600,200,*,UP,ALU1
S 4000,5600,4000,7500,300,*,DOWN,PDIF
S 4000,3800,4000,4700,300,*,UP,NDIF
S 4300,5400,4300,7700,100,*,DOWN,PTRANS
S 3500,5100,4300,5100,300,*,LEFT,POLY
S 4300,4900,4300,5400,100,*,UP,POLY
S 4300,3600,4300,4900,100,*,UP,NTRANS
S 4600,5600,4600,7500,300,*,DOWN,PDIF
S 4600,3800,4600,4700,200,*,UP,NDIF
S 4900,5400,4900,7700,100,*,DOWN,PTRANS
S 4900,4900,4900,5400,100,*,UP,POLY
S 4900,3600,4900,4900,100,*,DOWN,NTRANS
S 5200,5600,5200,7500,300,*,DOWN,PDIF
S 5200,5600,5200,7000,200,*,DOWN,ALU1
S 5200,3800,5200,4700,200,*,UP,NDIF
S 5500,5400,5500,7700,100,*,DOWN,PTRANS
S 5500,4900,5500,5400,100,*,UP,POLY
S 5500,3600,5500,4900,100,*,DOWN,NTRANS
S 5800,5600,5800,7500,300,*,DOWN,PDIF
S 5800,3800,5800,4700,300,*,UP,NDIF
S 6100,5400,6100,7700,100,*,UP,PTRANS
S 6100,4900,6100,5400,100,*,DOWN,POLY
S 6100,3600,6100,4900,100,*,UP,NTRANS
S 5200,5600,6400,5600,200,*,LEFT,ALU1
S 6400,5600,6400,7500,300,*,UP,PDIF
S 6400,5600,6400,7000,200,*,DOWN,ALU1
S 4000,5100,6400,5100,200,*,LEFT,ALU1
S 5200,4600,6400,4600,200,*,LEFT,ALU1
S 6400,3800,6400,4700,200,*,DOWN,NDIF
S 6700,5400,6700,7700,100,*,UP,PTRANS
S 4900,5100,6700,5100,300,*,LEFT,POLY
S 6700,4900,6700,5400,100,*,DOWN,POLY
S 6700,3600,6700,4900,100,*,UP,NTRANS
S 7000,5600,7000,7500,300,*,DOWN,PDIF
S 7000,3800,7000,4700,300,*,UP,NDIF
S 3800,6900,7200,6900,2800,*,LEFT,NWELL
S 4000,8100,7000,8100,300,*,RIGHT,NTIE
S 4000,4200,4000,6400,200,*,UP,ALU1
S 5200,4200,5200,4600,200,*,UP,ALU1
S 6400,4200,6400,4600,200,*,UP,ALU1
S 4000,3100,7000,3100,300,*,RIGHT,PTIE
S 3500,2000,3500,5100,200,*,UP,ALU2
S 7000,3100,7000,3700,200,*,UP,ALU2
S 5800,8100,7000,8100,400,*,RIGHT,ALU2
S 4000,7800,7000,7800,800,vddi,RIGHT,ALU1
S 4000,3400,7000,3400,800,vssi,RIGHT,ALU1
S 10000,24000,10000,36000,12200,vsse,DOWN,CALU1
I 0,20000,padreal,padreal,NOSYM
B 9500,500,1200,1200,CONT_VIA4,*
B 9500,500,1200,1200,CONT_VIA3,*
B 8500,9500,2200,1200,CONT_VIA2,*
B 8500,9500,2200,1200,CONT_VIA,*
B 8500,18500,2200,1200,CONT_VIA2,*
B 8500,18500,2200,1200,CONT_VIA,*
B 8500,15500,2200,1200,CONT_VIA2,*
B 8500,15500,2200,1200,CONT_VIA,*
B 8500,12500,2200,1200,CONT_VIA2,*
B 8500,12500,2200,1200,CONT_VIA,*
B 4500,8000,1200,1200,CONT_VIA2,*
B 4500,500,1200,1200,CONT_VIA4,*
B 4500,500,1200,1200,CONT_VIA3,*
B 4500,500,1200,1200,CONT_VIA2,*
B 4500,5000,1200,1200,CONT_VIA2,*
B 2500,6500,1200,1200,CONT_VIA2,*
B 2500,500,1200,1200,CONT_VIA4,*
B 2500,500,1200,1200,CONT_VIA3,*
B 2500,500,1200,1200,CONT_VIA2,*
B 2500,3500,1200,1200,CONT_VIA2,*
B 17500,8000,1200,1200,CONT_VIA2,*
B 17500,500,1200,1200,CONT_VIA4,*
B 17500,500,1200,1200,CONT_VIA3,*
B 17500,500,1200,1200,CONT_VIA2,*
B 17500,5000,1200,1200,CONT_VIA2,*
B 15500,6500,1200,1200,CONT_VIA2,*
B 15500,500,1200,1200,CONT_VIA4,*
B 15500,500,1200,1200,CONT_VIA3,*
B 15500,500,1200,1200,CONT_VIA2,*
B 15500,3500,1200,1200,CONT_VIA2,*
B 11500,9500,2200,1200,CONT_VIA2,*
B 11500,9500,2200,1200,CONT_VIA,*
B 11500,18500,2200,1200,CONT_VIA2,*
B 11500,18500,2200,1200,CONT_VIA,*
B 11500,15500,2200,1200,CONT_VIA2,*
B 11500,15500,2200,1200,CONT_VIA,*
B 11500,12500,2200,1200,CONT_VIA2,*
B 11500,12500,2200,1200,CONT_VIA,*
V 13600,500,CONT_VIA2,*
V 14200,500,CONT_VIA2,*
V 13600,1000,CONT_VIA2,*
V 14200,1000,CONT_VIA2,*
V 15400,3700,CONT_DIF_N,*
V 16500,5100,CONT_VIA,*
V 16500,5100,CONT_POLY,*
V 16000,6400,CONT_DIF_P,*
V 16000,5900,CONT_DIF_P,*
V 16000,4600,CONT_DIF_N,*
V 15400,7500,CONT_DIF_P,*
V 15400,7000,CONT_DIF_P,*
V 15400,6500,CONT_DIF_P,*
V 15400,6000,CONT_DIF_P,*
V 15400,4600,CONT_DIF_N,*
V 15400,4100,CONT_DIF_N,*
V 14800,7000,CONT_DIF_P,*
V 14800,6500,CONT_DIF_P,*
V 14800,6000,CONT_DIF_P,*
V 14800,5100,CONT_POLY,*
V 14800,4600,CONT_DIF_N,*
V 14200,7500,CONT_DIF_P,*
V 14200,7000,CONT_DIF_P,*
V 14200,6500,CONT_DIF_P,*
V 14200,6100,CONT_DIF_P,*
V 14200,5600,CONT_VIA,*
V 14200,5100,CONT_POLY,*
V 14200,4600,CONT_VIA,*
V 14200,4100,CONT_DIF_N,*
V 14200,3700,CONT_DIF_N,*
V 13600,7000,CONT_DIF_P,*
V 13600,6500,CONT_DIF_P,*
V 13600,6000,CONT_DIF_P,*
V 13600,5600,CONT_VIA,*
V 13600,5100,CONT_POLY,*
V 13600,4600,CONT_VIA,*
V 13600,4600,CONT_DIF_N,*
V 13000,7500,CONT_DIF_P,*
V 13000,7000,CONT_DIF_P,*
V 13000,6500,CONT_DIF_P,*
V 13000,6100,CONT_DIF_P,*
V 13000,4100,CONT_DIF_N,*
V 13000,3700,CONT_DIF_N,*
B 14800,5600,200,200,CONT_TURN1,*
V 13000,8100,CONT_BODY_N,*
V 13600,8100,CONT_BODY_N,*
V 14200,8100,CONT_BODY_N,*
V 14800,8100,CONT_BODY_N,*
V 16000,8100,CONT_BODY_N,*
V 15400,8100,CONT_BODY_N,*
V 13000,3100,CONT_BODY_P,*
V 13600,3100,CONT_BODY_P,*
V 14200,3100,CONT_BODY_P,*
V 14800,3100,CONT_BODY_P,*
V 15400,3100,CONT_BODY_P,*
V 16000,3100,CONT_BODY_P,*
V 13600,4200,CONT_DIF_N,*
V 16000,4200,CONT_DIF_N,*
V 14800,4200,CONT_DIF_N,*
V 16500,2000,CONT_VIA2,*
V 13000,3100,CONT_VIA,*
V 13000,3700,CONT_VIA,*
V 13000,3700,CONT_VIA2,*
V 13000,3100,CONT_VIA2,*
V 13000,8100,CONT_VIA2,*
V 13600,8100,CONT_VIA2,*
V 14200,8100,CONT_VIA2,*
V 14200,8100,CONT_VIA,*
V 13600,8100,CONT_VIA,*
V 13000,8100,CONT_VIA,*
V 6400,500,CONT_VIA2,*
V 5800,500,CONT_VIA2,*
V 6400,1000,CONT_VIA2,*
V 5800,1000,CONT_VIA2,*
V 4600,3700,CONT_DIF_N,*
V 3500,5100,CONT_VIA,*
V 3500,5100,CONT_POLY,*
V 4000,6400,CONT_DIF_P,*
V 4000,5900,CONT_DIF_P,*
V 4000,4600,CONT_DIF_N,*
V 4600,7500,CONT_DIF_P,*
V 4600,7000,CONT_DIF_P,*
V 4600,6500,CONT_DIF_P,*
V 4600,6000,CONT_DIF_P,*
V 4600,4600,CONT_DIF_N,*
V 4600,4100,CONT_DIF_N,*
V 5200,7000,CONT_DIF_P,*
V 5200,6500,CONT_DIF_P,*
V 5200,6000,CONT_DIF_P,*
V 5200,5100,CONT_POLY,*
V 5200,4600,CONT_DIF_N,*
V 5800,7500,CONT_DIF_P,*
V 5800,7000,CONT_DIF_P,*
V 5800,6500,CONT_DIF_P,*
V 5800,6100,CONT_DIF_P,*
V 5800,5600,CONT_VIA,*
V 5800,5100,CONT_POLY,*
V 5800,4600,CONT_VIA,*
V 5800,4100,CONT_DIF_N,*
V 5800,3700,CONT_DIF_N,*
V 6400,7000,CONT_DIF_P,*
V 6400,6500,CONT_DIF_P,*
V 6400,6000,CONT_DIF_P,*
V 6400,5600,CONT_VIA,*
V 6400,5100,CONT_POLY,*
V 6400,4600,CONT_VIA,*
V 6400,4600,CONT_DIF_N,*
V 7000,7500,CONT_DIF_P,*
V 7000,7000,CONT_DIF_P,*
V 7000,6500,CONT_DIF_P,*
V 7000,6100,CONT_DIF_P,*
V 7000,4100,CONT_DIF_N,*
V 7000,3700,CONT_DIF_N,*
B 5200,5600,200,200,CONT_TURN1,*
V 7000,8100,CONT_BODY_N,*
V 6400,8100,CONT_BODY_N,*
V 5800,8100,CONT_BODY_N,*
V 5200,8100,CONT_BODY_N,*
V 4000,8100,CONT_BODY_N,*
V 4600,8100,CONT_BODY_N,*
V 7000,3100,CONT_BODY_P,*
V 6400,3100,CONT_BODY_P,*
V 5800,3100,CONT_BODY_P,*
V 5200,3100,CONT_BODY_P,*
V 4600,3100,CONT_BODY_P,*
V 4000,3100,CONT_BODY_P,*
V 6400,4200,CONT_DIF_N,*
V 4000,4200,CONT_DIF_N,*
V 5200,4200,CONT_DIF_N,*
V 3500,2000,CONT_VIA2,*
V 7000,3100,CONT_VIA,*
V 7000,3700,CONT_VIA,*
V 7000,3700,CONT_VIA2,*
V 7000,3100,CONT_VIA2,*
V 7000,8100,CONT_VIA2,*
V 6400,8100,CONT_VIA2,*
V 5800,8100,CONT_VIA2,*
V 5800,8100,CONT_VIA,*
V 6400,8100,CONT_VIA,*
V 7000,8100,CONT_VIA,*
EOF

59
alliance/src/cells/src/pxlib/pvsseck_sp.ap Normal file
View File

@ -0,0 +1,59 @@
V ALLIANCE : 6
H pvsseck_sp,P, 4/ 9/2014,100
A 0,0,20000,40000
C 10000,40000,100,vsse,8,NORTH,ALU1
C 0,8000,1200,vddi,6,WEST,ALU3
C 0,6500,1200,vssi,6,WEST,ALU3
C 20000,6500,1200,vssi,7,EAST,ALU3
C 20000,8000,1200,vddi,7,EAST,ALU3
C 0,18500,1200,vsse,6,WEST,ALU3
C 0,15500,1200,vsse,4,WEST,ALU3
C 0,12500,1200,vsse,2,WEST,ALU3
C 0,3500,1200,vssi,4,WEST,ALU3
C 0,5000,1200,vddi,4,WEST,ALU3
C 0,9500,1200,vsse,0,WEST,ALU3
C 0,11000,1200,vdde,0,WEST,ALU3
C 0,14000,1200,vdde,2,WEST,ALU3
C 0,17000,1200,vdde,4,WEST,ALU3
C 20000,18500,1200,vsse,7,EAST,ALU3
C 20000,15500,1200,vsse,5,EAST,ALU3
C 20000,12500,1200,vsse,3,EAST,ALU3
C 20000,9500,1200,vsse,1,EAST,ALU3
C 20000,11000,1200,vdde,1,EAST,ALU3
C 20000,14000,1200,vdde,3,EAST,ALU3
C 20000,17000,1200,vdde,5,EAST,ALU3
C 20000,3500,1200,vssi,5,EAST,ALU3
C 20000,5000,1200,vddi,5,EAST,ALU3
C 0,2000,500,ck,2,WEST,ALU3
C 20000,2000,500,ck,3,EAST,ALU3
C 9500,0,200,cko,1,SOUTH,ALU2
C 9500,0,200,cko,0,SOUTH,ALU1
S 10000,30000,10000,40000,100,*,DOWN,ALU1
S 19600,18500,20000,18500,1200,*,RIGHT,ALU3
S 19600,17000,20000,17000,1200,*,RIGHT,ALU3
S 19600,15500,20000,15500,1200,*,RIGHT,ALU3
S 19600,14000,20000,14000,1200,*,RIGHT,ALU3
S 19600,12500,20000,12500,1200,*,RIGHT,ALU3
S 19600,11000,20000,11000,1200,*,RIGHT,ALU3
S 19600,9500,20000,9500,1200,*,RIGHT,ALU3
S 19600,8000,20000,8000,1200,*,RIGHT,ALU3
S 19600,6500,20000,6500,1200,*,RIGHT,ALU3
S 19600,5000,20000,5000,1200,*,RIGHT,ALU3
S 19600,3500,20000,3500,1200,*,RIGHT,ALU3
S 19600,2000,20000,2000,500,*,RIGHT,ALU3
S 0,8000,400,8000,1200,*,RIGHT,ALU3
S 0,9500,400,9500,1200,*,RIGHT,ALU3
S 0,11000,400,11000,1200,*,RIGHT,ALU3
S 0,14000,400,14000,1200,*,RIGHT,ALU3
S 0,15500,400,15500,1200,*,RIGHT,ALU3
S 0,12500,400,12500,1200,*,RIGHT,ALU3
S 0,17000,400,17000,1200,*,RIGHT,ALU3
S 0,18500,400,18500,1200,*,RIGHT,ALU3
S 0,2000,400,2000,500,*,RIGHT,ALU3
S 0,3500,400,3500,1200,*,RIGHT,ALU3
S 0,5000,400,5000,1200,*,RIGHT,ALU3
S 0,6500,400,6500,1200,*,RIGHT,ALU3
S 5800,700,14200,700,800,cko,RIGHT,ALU2
I 0,0,pvsseck_px,a,NOSYM
B 9500,500,1200,1200,CONT_VIA,*
EOF

31
alliance/src/cells/src/pxlib/pvsseck_sp.vbe Normal file
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@ -0,0 +1,31 @@
ENTITY pvsseck_sp IS
GENERIC (
CONSTANT area : NATURAL := 80000;
CONSTANT cin_ck : NATURAL := 127;
CONSTANT tpll_ck : NATURAL := 1055;
CONSTANT rdown_ck : NATURAL := 126;
CONSTANT tphh_ck : NATURAL := 963;
CONSTANT rup_ck : NATURAL := 183
);
PORT (
cko : out WOR_BIT BUS;
ck : in BIT;
vdde : in BIT;
vddi : in BIT;
vsse : in BIT;
vssi : in BIT
);
END pvsseck_sp;
ARCHITECTURE behaviour_data_flow OF pvsseck_sp IS
BEGIN
label0 : BLOCK ('1' = '1')
BEGIN
cko <= GUARDED ck;
END BLOCK label0;
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on pvsseck_sp"
SEVERITY WARNING;
END;

134
alliance/src/cells/src/pxlib/pvssi_px.ap
View File

@ -1,88 +1,64 @@
V ALLIANCE : 6
H pvssi_px,P,20/11/2010,100
H pvssi_px,P,10/10/2005,100
A 0,0,20000,40000
I 0,20000,padreal,padreal,NOSYM
S 10000,1500,10000,6500,20000,blockagenet,UP,TALU5
S 0,8500,20000,8500,5000,blockagenet,RIGHT,TALU4
S 0,8500,20000,8500,5000,blockagenet,RIGHT,TALU2
S 18500,3000,20000,3000,6000,14onymous_,RIGHT,TALU2
S 19200,100,19200,1500,1600,9nonymous_,UP,TALU5
S 19200,100,19200,1000,1600,4nonymous_,UP,TALU3
S 4000,100,4000,1500,1200,6nonymous_,UP,TALU5
S 800,100,800,1000,1600,0nonymous_,UP,TALU3
S 4000,100,4000,1000,1200,1nonymous_,UP,TALU3
S 18500,3000,20000,3000,6000,19onymous_,RIGHT,TALU4
S 3500,3000,4500,3000,6000,11onymous_,RIGHT,TALU2
S 500,11000,19500,11000,1200,vdde,RIGHT,CALU3
S 500,14000,19500,14000,1200,vdde,RIGHT,CALU3
S 500,17000,19500,17000,1200,vdde,RIGHT,CALU3
S 500,12500,19500,12500,1200,vsse,RIGHT,CALU3
S 500,15500,19500,15500,1200,vsse,RIGHT,CALU3
S 500,18500,19500,18500,1200,vsse,RIGHT,CALU3
S 500,9500,19500,9500,1200,vsse,RIGHT,CALU3
S 3500,3000,4500,3000,6000,16onymous_,RIGHT,TALU4
S 8500,3000,8500,30000,2200,21onymous_,UP,ALU1
S 16000,100,16000,1500,1200,8nonymous_,UP,TALU5
S 17500,0,17500,1000,1200,vddi,UP,CALU4
S 17500,0,17500,1000,1200,vddi,UP,CALU5
S 17500,0,17500,1000,1200,vddi,UP,CALU3
S 17500,0,17500,8500,1200,vddi,UP,CALU2
S 500,5000,19500,5000,1200,vddi,RIGHT,CALU3
S 500,8000,19500,8000,1200,vddi,RIGHT,CALU3
S 5500,0,5500,1000,1200,vddi,UP,CALU4
S 5500,0,5500,1000,1200,vddi,UP,CALU5
S 5500,0,5500,1000,1200,vddi,UP,CALU3
S 10000,24000,10000,36000,12200,vssi,DOWN,CALU1
S 8500,3000,8500,30000,2200,*,DOWN,ALU1
S 5500,0,5500,8500,1200,vddi,UP,CALU2
S 16000,100,16000,1000,1200,3nonymous_,UP,TALU3
S 11500,3000,11500,30000,2200,22onymous_,UP,ALU1
S 15500,3000,16500,3000,6000,13onymous_,RIGHT,TALU2
S 15500,3000,16500,3000,6000,18onymous_,RIGHT,TALU4
S 0,3000,1500,3000,6000,15onymous_,RIGHT,TALU4
S 0,3000,1500,3000,6000,10onymous_,RIGHT,TALU2
S 500,3500,19500,3500,1200,vssi,RIGHT,CALU3
S 10000,24000,10000,36000,12200,vssi,UP,CALU1
S 5500,0,5500,1000,1200,vddi,UP,CALU3
S 5500,0,5500,1000,1200,vddi,DOWN,CALU5
S 5500,0,5500,1000,1200,vddi,DOWN,CALU4
S 500,9500,19500,9500,1200,vsse,LEFT,CALU3
S 500,8000,19500,8000,1200,vddi,LEFT,CALU3
S 500,6500,19500,6500,1200,vssi,RIGHT,CALU3
S 500,5000,19500,5000,1200,vddi,LEFT,CALU3
S 500,3500,19500,3500,1200,vssi,LEFT,CALU3
S 500,2000,19500,2000,500,ck,RIGHT,CALU3
S 500,18500,19500,18500,1200,vsse,LEFT,CALU3
S 500,17000,19500,17000,1200,vdde,LEFT,CALU3
S 500,15500,19500,15500,1200,vsse,LEFT,CALU3
S 500,14000,19500,14000,1200,vdde,LEFT,CALU3
S 500,12500,19500,12500,1200,vsse,LEFT,CALU3
S 500,11000,19500,11000,1200,vdde,LEFT,CALU3
S 2500,0,2500,8500,1200,vssi,UP,CALU2
S 2500,0,2500,1000,1200,vssi,UP,CALU3
S 2500,0,2500,1000,1200,vssi,UP,CALU5
S 2500,0,2500,1000,1200,vssi,UP,CALU4
S 2500,0,2500,1000,1200,vssi,DOWN,CALU5
S 2500,0,2500,1000,1200,vssi,DOWN,CALU4
S 17500,0,17500,8500,1200,vddi,UP,CALU2
S 17500,0,17500,1000,1200,vddi,UP,CALU3
S 17500,0,17500,1000,1200,vddi,DOWN,CALU5
S 17500,0,17500,1000,1200,vddi,DOWN,CALU4
S 14500,0,14500,8500,1200,vssi,UP,CALU2
S 14500,0,14500,1000,1200,vssi,UP,CALU3
S 14500,0,14500,1000,1200,vssi,UP,CALU5
S 14500,0,14500,1000,1200,vssi,UP,CALU4
S 800,100,800,1500,1600,5nonymous_,UP,TALU5
S 0,3000,20000,3000,6000,20onymous_,RIGHT,TALU6
S 10000,100,10000,1500,7200,7nonymous_,UP,TALU5
S 10000,100,10000,1000,7200,2nonymous_,UP,TALU3
S 6500,3000,13500,3000,6000,12onymous_,RIGHT,TALU2
S 500,2000,19500,2000,500,ck,RIGHT,CALU3
S 6500,3000,13500,3000,6000,17onymous_,RIGHT,TALU4
B 17500,5000,1200,1200,CONT_VIA2,41onymous_
B 2500,3500,1200,1200,CONT_VIA2,36onymous_
B 5500,5000,1200,1200,CONT_VIA2,31onymous_
B 11500,6500,2200,1200,CONT_VIA,48onymous_
B 14500,500,1200,1200,CONT_VIA4,43onymous_
B 17500,500,1200,1200,CONT_VIA4,38onymous_
B 11500,3500,2200,1200,CONT_VIA,50onymous_
B 8500,6500,2200,1200,CONT_VIA2,23onymous_
B 8500,6500,2200,1200,CONT_VIA,24onymous_
B 5500,500,1200,1200,CONT_VIA4,28onymous_
B 2500,500,1200,1200,CONT_VIA4,33onymous_
B 14500,500,1200,1200,CONT_VIA2,45onymous_
B 17500,500,1200,1200,CONT_VIA2,40onymous_
B 8500,3500,2200,1200,CONT_VIA2,25onymous_
B 5500,500,1200,1200,CONT_VIA2,30onymous_
B 2500,500,1200,1200,CONT_VIA2,35onymous_
B 11500,6500,2200,1200,CONT_VIA2,47onymous_
B 14500,6500,1200,1200,CONT_VIA2,42onymous_
B 5500,8000,1200,1200,CONT_VIA2,27onymous_
B 17500,8000,1200,1200,CONT_VIA2,37onymous_
B 2500,6500,1200,1200,CONT_VIA2,32onymous_
B 11500,3500,2200,1200,CONT_VIA2,49onymous_
B 14500,500,1200,1200,CONT_VIA3,44onymous_
B 17500,500,1200,1200,CONT_VIA3,39onymous_
B 2500,500,1200,1200,CONT_VIA3,34onymous_
B 14500,3500,1200,1200,CONT_VIA2,46onymous_
B 8500,3500,2200,1200,CONT_VIA,26onymous_
B 5500,500,1200,1200,CONT_VIA3,29onymous_
S 14500,0,14500,1000,1200,vssi,DOWN,CALU5
S 14500,0,14500,1000,1200,vssi,DOWN,CALU4
S 11500,3000,11500,30000,2200,*,DOWN,ALU1
I 0,20000,padreal,padreal,NOSYM
B 8500,6500,2200,1200,CONT_VIA2,*
B 8500,6500,2200,1200,CONT_VIA,*
B 8500,3500,2200,1200,CONT_VIA2,*
B 8500,3500,2200,1200,CONT_VIA,*
B 5500,8000,1200,1200,CONT_VIA2,*
B 5500,500,1200,1200,CONT_VIA4,*
B 5500,500,1200,1200,CONT_VIA3,*
B 5500,500,1200,1200,CONT_VIA2,*
B 5500,5000,1200,1200,CONT_VIA2,*
B 2500,6500,1200,1200,CONT_VIA2,*
B 2500,500,1200,1200,CONT_VIA4,*
B 2500,500,1200,1200,CONT_VIA3,*
B 2500,500,1200,1200,CONT_VIA2,*
B 2500,3500,1200,1200,CONT_VIA2,*
B 17500,8000,1200,1200,CONT_VIA2,*
B 17500,500,1200,1200,CONT_VIA4,*
B 17500,500,1200,1200,CONT_VIA3,*
B 17500,500,1200,1200,CONT_VIA2,*
B 17500,5000,1200,1200,CONT_VIA2,*
B 14500,6500,1200,1200,CONT_VIA2,*
B 14500,500,1200,1200,CONT_VIA4,*
B 14500,500,1200,1200,CONT_VIA3,*
B 14500,500,1200,1200,CONT_VIA2,*
B 14500,3500,1200,1200,CONT_VIA2,*
B 11500,6500,2200,1200,CONT_VIA2,*
B 11500,6500,2200,1200,CONT_VIA,*
B 11500,3500,2200,1200,CONT_VIA2,*
B 11500,3500,2200,1200,CONT_VIA,*
EOF

59
alliance/src/cells/src/pxlib/pvssi_sp.ap Normal file
View File

@ -0,0 +1,59 @@
V ALLIANCE : 6
H pvssi_sp,P, 4/ 9/2014,100
A 0,0,20000,40000
C 10000,0,5200,vssi,10,SOUTH,ALU2
C 10000,0,5200,vssi,8,SOUTH,ALU1
C 20000,2000,500,ck,1,EAST,ALU3
C 0,2000,500,ck,0,WEST,ALU3
C 20000,5000,1200,vddi,1,EAST,ALU3
C 20000,3500,1200,vssi,5,EAST,ALU3
C 20000,17000,1200,vdde,5,EAST,ALU3
C 20000,14000,1200,vdde,3,EAST,ALU3
C 20000,11000,1200,vdde,1,EAST,ALU3
C 20000,9500,1200,vsse,1,EAST,ALU3
C 20000,12500,1200,vsse,3,EAST,ALU3
C 20000,15500,1200,vsse,5,EAST,ALU3
C 20000,18500,1200,vsse,7,EAST,ALU3
C 0,17000,1200,vdde,4,WEST,ALU3
C 0,14000,1200,vdde,2,WEST,ALU3
C 0,11000,1200,vdde,0,WEST,ALU3
C 0,9500,1200,vsse,0,WEST,ALU3
C 0,5000,1200,vddi,0,WEST,ALU3
C 0,3500,1200,vssi,4,WEST,ALU3
C 0,12500,1200,vsse,2,WEST,ALU3
C 0,15500,1200,vsse,4,WEST,ALU3
C 0,18500,1200,vsse,6,WEST,ALU3
C 20000,8000,1200,vddi,3,EAST,ALU3
C 20000,6500,1200,vssi,7,EAST,ALU3
C 0,6500,1200,vssi,6,WEST,ALU3
C 0,8000,1200,vddi,2,WEST,ALU3
C 10000,40000,100,vssi,8,NORTH,ALU1
S 0,6500,400,6500,1200,*,RIGHT,ALU3
S 0,5000,400,5000,1200,*,RIGHT,ALU3
S 0,3500,400,3500,1200,*,RIGHT,ALU3
S 0,2000,400,2000,500,*,RIGHT,ALU3
S 0,18500,400,18500,1200,*,RIGHT,ALU3
S 0,17000,400,17000,1200,*,RIGHT,ALU3
S 0,12500,400,12500,1200,*,RIGHT,ALU3
S 0,15500,400,15500,1200,*,RIGHT,ALU3
S 0,14000,400,14000,1200,*,RIGHT,ALU3
S 0,11000,400,11000,1200,*,RIGHT,ALU3
S 0,9500,400,9500,1200,*,RIGHT,ALU3
S 0,8000,400,8000,1200,*,RIGHT,ALU3
S 19600,2000,20000,2000,500,*,RIGHT,ALU3
S 19600,3500,20000,3500,1200,*,RIGHT,ALU3
S 19600,5000,20000,5000,1200,*,RIGHT,ALU3
S 19600,6500,20000,6500,1200,*,RIGHT,ALU3
S 19600,8000,20000,8000,1200,*,RIGHT,ALU3
S 19600,9500,20000,9500,1200,*,RIGHT,ALU3
S 19600,11000,20000,11000,1200,*,RIGHT,ALU3
S 19600,12500,20000,12500,1200,*,RIGHT,ALU3
S 19600,14000,20000,14000,1200,*,RIGHT,ALU3
S 19600,15500,20000,15500,1200,*,RIGHT,ALU3
S 19600,17000,20000,17000,1200,*,RIGHT,ALU3
S 19600,18500,20000,18500,1200,*,RIGHT,ALU3
S 10000,30000,10000,40000,100,*,DOWN,ALU1
I 0,0,pvssi_px,a,NOSYM
B 10000,1100,5200,2400,CONT_VIA,*
S 10000,0,10000,8500,5200,*,UP,ALU2
EOF

20
alliance/src/cells/src/pxlib/pvssi_sp.vbe Normal file
View File

@ -0,0 +1,20 @@
ENTITY pvssi_sp IS
GENERIC (
CONSTANT area : NATURAL := 80000
);
PORT (
ck : in BIT;
vdde : in BIT;
vddi : in BIT;
vsse : in BIT;
vssi : in BIT
);
END pvssi_sp;
ARCHITECTURE behaviour_data_flow OF pvssi_sp IS
BEGIN
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on pvssi_sp"
SEVERITY WARNING;
END;

644
alliance/src/cells/src/pxlib/pvssick_px.ap
View File

@ -1,343 +1,313 @@
V ALLIANCE : 6
H pvssick_px,P,20/11/2010,100
H pvssick_px,P, 8/11/2005,100
A 0,0,20000,40000
I 0,20000,padreal,padreal,NOSYM
S 13300,5100,15100,5100,300,44onymous_,RIGHT,POLY
S 15700,5100,16500,5100,300,18onymous_,RIGHT,POLY
S 14500,3600,14500,4900,100,31onymous_,UP,NTRANS
S 12500,100,12500,1000,4200,118nymous_,UP,TALU3
S 3500,5100,4300,5100,300,68onymous_,RIGHT,POLY
S 4500,8100,7000,8100,400,5nonymous_,RIGHT,ALU2
S 4900,5100,6700,5100,300,94onymous_,RIGHT,POLY
S 13600,5600,13600,7500,300,38onymous_,UP,PDIF
S 4000,7800,7000,7800,800,vddi,RIGHT,ALU1
S 4500,0,4500,8500,1200,vddi,UP,CALU2
S 500,8000,19500,8000,1200,vddi,RIGHT,CALU3
S 500,5000,19500,5000,1200,vddi,RIGHT,CALU3
S 17500,0,17500,8500,1200,vddi,UP,CALU2
S 17500,0,17500,1000,1200,vddi,UP,CALU4
S 13000,7800,16000,7800,800,vddi,RIGHT,ALU1
S 4500,0,4500,1000,1200,vddi,UP,CALU3
S 4500,0,4500,1000,1200,vddi,UP,CALU4
S 4500,0,4500,1000,1200,vddi,UP,CALU5
S 17500,0,17500,1000,1200,vddi,UP,CALU3
S 17500,0,17500,1000,1200,vddi,UP,CALU5
S 15100,3600,15100,4900,100,25onymous_,UP,NTRANS
S 5500,3600,5500,4900,100,81onymous_,UP,NTRANS
S 12500,100,12500,1500,4200,112nymous_,UP,TALU5
S 3500,3000,3500,3000,6000,125nymous_,RIGHT,TALU4
S 14200,3700,14200,4100,200,12onymous_,UP,ALU1
S 5800,500,14200,500,200,0nonymous_,RIGHT,ALU3
S 4000,4200,4000,6400,200,101nymous_,UP,ALU1
S 5800,3700,5800,4100,200,62onymous_,UP,ALU1
S 6400,500,6400,5600,200,56onymous_,UP,ALU2
S 6400,5600,6400,7500,300,88onymous_,UP,PDIF
S 0,3000,1500,3000,6000,132nymous_,RIGHT,TALU2
S 13300,4900,13300,5400,100,45onymous_,UP,POLY
S 15700,4900,15700,5400,100,19onymous_,UP,POLY
S 14200,5600,14200,7500,300,32onymous_,UP,PDIF
S 4900,3600,4900,4900,100,75onymous_,UP,NTRANS
S 16500,100,16500,1000,200,119nymous_,UP,TALU3
S 4300,4900,4300,5400,100,69onymous_,UP,POLY
S 13600,500,13600,5600,200,6nonymous_,UP,ALU2
S 6700,4900,6700,5400,100,95onymous_,UP,POLY
S 800,100,800,1500,1600,108nymous_,UP,TALU5
S 13600,5600,13600,7000,200,39onymous_,UP,ALU1
S 14800,5600,14800,7500,300,26onymous_,UP,PDIF
S 5800,5600,5800,7500,300,82onymous_,UP,PDIF
S 16500,100,16500,1500,200,113nymous_,UP,TALU5
S 0,3000,1500,3000,6000,126nymous_,RIGHT,TALU4
S 13000,3700,13000,4100,200,13onymous_,UP,ALU1
S 5200,4200,5200,4600,200,102nymous_,UP,ALU1
S 10000,1500,10000,6500,20000,blockagenet,UP,TALU5
S 0,8500,20000,8500,5000,blockagenet,RIGHT,TALU4
S 0,8500,20000,8500,5000,blockagenet,RIGHT,TALU2
S 7000,3700,7000,4100,200,63onymous_,UP,ALU1
S 13000,8100,16000,8100,300,50onymous_,RIGHT,NTIE
S 13300,3600,13300,4900,100,46onymous_,UP,NTRANS
S 14200,3800,14200,4700,300,33onymous_,UP,NDIF
S 6400,5600,6400,7000,200,89onymous_,UP,ALU1
S 0,3000,20000,3000,6000,120nymous_,RIGHT,TALU6
S 5800,1000,14200,1000,200,1nonymous_,RIGHT,ALU3
S 15700,3600,15700,4900,100,20onymous_,UP,NTRANS
S 5200,5600,5200,7500,300,76onymous_,UP,PDIF
S 11500,3000,11500,30000,2200,107nymous_,UP,ALU1
S 4300,3600,4300,4900,100,70onymous_,UP,NTRANS
S 16000,4200,16000,6400,200,51onymous_,UP,ALU1
S 14200,500,14200,5600,200,7nonymous_,UP,ALU2
S 6700,3600,6700,4900,100,96onymous_,UP,NTRANS
S 5800,500,5800,5600,200,57onymous_,UP,ALU2
S 13600,5100,16000,5100,200,40onymous_,RIGHT,ALU1
S 500,2000,19500,2000,500,ck,RIGHT,CALU3
S 14800,5600,14800,7000,200,27onymous_,UP,ALU1
S 5800,3800,5800,4700,300,83onymous_,UP,NDIF
S 800,100,800,1000,1600,114nymous_,UP,TALU3
S 18500,3000,20000,3000,6000,127nymous_,RIGHT,TALU2
S 15400,3700,15400,4600,200,14onymous_,UP,ALU1
S 6400,4200,6400,4600,200,103nymous_,UP,ALU1
S 4600,3700,4600,4600,200,64onymous_,UP,ALU1
S 13000,5600,13000,7500,300,47onymous_,UP,PDIF
S 500,12500,19500,12500,1200,vsse,RIGHT,CALU3
S 500,15500,19500,15500,1200,vsse,RIGHT,CALU3
S 500,18500,19500,18500,1200,vsse,RIGHT,CALU3
S 500,9500,19500,9500,1200,vsse,RIGHT,CALU3
S 13000,8100,14200,8100,400,2nonymous_,RIGHT,ALU2
S 13900,5400,13900,7700,100,34onymous_,UP,PTRANS
S 5200,5600,5200,7000,200,77onymous_,UP,ALU1
S 4000,5100,6400,5100,200,90onymous_,RIGHT,ALU1
S 18500,3000,20000,3000,6000,121nymous_,RIGHT,TALU4
S 14200,6100,14200,7500,200,8nonymous_,UP,ALU1
S 15400,5600,15400,7500,300,21onymous_,UP,PDIF
S 4600,5600,4600,7500,300,71onymous_,UP,PDIF
S 14800,4200,14800,4600,200,52onymous_,UP,ALU1
S 9500,0,9500,1000,1200,cko,UP,CALU4
S 9500,0,9500,1000,1200,cko,UP,CALU5
S 7000,5600,7000,7500,300,97onymous_,UP,PDIF
S 16500,3000,16500,3000,6000,128nymous_,RIGHT,TALU2
S 5800,6100,5800,7500,200,58onymous_,UP,ALU1
S 13600,4600,14800,4600,200,41onymous_,RIGHT,ALU1
S 4000,3400,7000,3400,800,vssi,RIGHT,ALU1
S 500,6500,19500,6500,1200,vssi,RIGHT,CALU3
S 2500,0,2500,1000,1200,vssi,UP,CALU3
S 2500,0,2500,1000,1200,vssi,UP,CALU5
S 2500,0,2500,1000,1200,vssi,UP,CALU4
S 15500,0,15500,1000,1200,vssi,UP,CALU5
S 15500,0,15500,1000,1200,vssi,UP,CALU4
S 15500,0,15500,8500,1200,vssi,UP,CALU2
S 15500,0,15500,1000,1200,vssi,UP,CALU3
S 10000,24000,10000,36000,12200,vssi,UP,CALU1
S 13000,3400,16000,3400,800,vssi,RIGHT,ALU1
S 500,3500,19500,3500,1200,vssi,RIGHT,CALU3
S 15500,0,15500,1000,1200,vssi,DOWN,CALU4
S 15500,0,15500,1000,1200,vssi,DOWN,CALU5
S 11500,3000,11500,30000,2200,*,DOWN,ALU1
S 17500,0,17500,1000,1200,vddi,DOWN,CALU4
S 17500,0,17500,1000,1200,vddi,DOWN,CALU5
S 17500,0,17500,1000,1200,vddi,UP,CALU3
S 17500,0,17500,8500,1200,vddi,UP,CALU2
S 2500,0,2500,1000,1200,vssi,DOWN,CALU4
S 2500,0,2500,1000,1200,vssi,DOWN,CALU5
S 2500,0,2500,1000,1200,vssi,UP,CALU3
S 2500,0,2500,8500,1200,vssi,UP,CALU2
S 14800,3800,14800,4700,200,28onymous_,UP,NDIF
S 6100,5400,6100,7700,100,84onymous_,UP,PTRANS
S 19200,100,19200,1000,1600,115nymous_,UP,TALU3
S 16000,5600,16000,7500,300,15onymous_,UP,PDIF
S 4000,3100,7000,3100,300,104nymous_,RIGHT,PTIE
S 4000,5600,4000,7500,300,65onymous_,UP,PDIF
S 13000,3800,13000,4700,300,48onymous_,UP,NDIF
S 5200,3800,5200,4700,200,78onymous_,UP,NDIF
S 5200,4600,6400,4600,200,91onymous_,RIGHT,ALU1
S 16500,3000,16500,3000,6000,122nymous_,RIGHT,TALU4
S 13900,4900,13900,5400,100,35onymous_,UP,POLY
S 15400,6000,15400,7500,200,9nonymous_,UP,ALU1
S 15400,3800,15400,4700,200,22onymous_,UP,NDIF
S 19200,100,19200,1500,1600,109nymous_,UP,TALU5
S 4600,3800,4600,4700,200,72onymous_,UP,NDIF
S 13600,4200,13600,4600,200,53onymous_,UP,ALU1
S 6100,4900,6100,5400,100,85onymous_,UP,POLY
S 7000,3800,7000,4700,300,98onymous_,UP,NDIF
S 10500,3000,14500,3000,6000,129nymous_,RIGHT,TALU2
S 4600,6000,4600,7500,200,59onymous_,UP,ALU1
S 13600,3800,13600,4700,200,42onymous_,UP,NDIF
S 14500,5400,14500,7700,100,29onymous_,UP,PTRANS
S 3500,100,3500,1000,200,116nymous_,UP,TALU3
S 13000,3100,13000,3700,200,3nonymous_,UP,ALU2
S 16000,3800,16000,4700,300,16onymous_,UP,NDIF
S 3500,2000,3500,5100,200,105nymous_,UP,ALU2
S 4000,3800,4000,4700,300,66onymous_,UP,NDIF
S 12800,6900,16200,6900,2800,49onymous_,RIGHT,NWELL
S 5500,5400,5500,7700,100,79onymous_,UP,PTRANS
S 6400,3800,6400,4700,200,92onymous_,UP,NDIF
S 10500,3000,14500,3000,6000,123nymous_,RIGHT,TALU4
S 13900,3600,13900,4900,100,36onymous_,UP,NTRANS
S 13000,6100,13000,7500,200,10onymous_,UP,ALU1
S 15100,5400,15100,7700,100,23onymous_,UP,PTRANS
S 3500,100,3500,1500,200,110nymous_,UP,TALU5
S 4900,5400,4900,7700,100,73onymous_,UP,PTRANS
S 7000,6100,7000,7500,200,60onymous_,UP,ALU1
S 13000,3100,16000,3100,300,54onymous_,RIGHT,PTIE
S 6100,3600,6100,4900,100,86onymous_,UP,NTRANS
S 3800,6900,7200,6900,2800,99onymous_,RIGHT,NWELL
S 5500,3000,8500,3000,6000,130nymous_,RIGHT,TALU2
S 13300,5400,13300,7700,100,43onymous_,UP,PTRANS
S 15700,5400,15700,7700,100,17onymous_,UP,PTRANS
S 14500,4900,14500,5400,100,30onymous_,UP,POLY
S 7000,100,7000,1000,3200,117nymous_,UP,TALU3
S 7000,3100,7000,3700,200,4nonymous_,UP,ALU2
S 6700,5400,6700,7700,100,93onymous_,UP,PTRANS
S 8500,3000,8500,30000,2200,106nymous_,UP,ALU1
S 4300,5400,4300,7700,100,67onymous_,UP,PTRANS
S 5500,4900,5500,5400,100,80onymous_,UP,POLY
S 5500,3000,8500,3000,6000,124nymous_,RIGHT,TALU4
S 13600,5600,14800,5600,200,37onymous_,RIGHT,ALU1
S 13000,3700,15400,3700,200,11onymous_,RIGHT,ALU1
S 500,11000,19500,11000,1200,vdde,RIGHT,CALU3
S 500,14000,19500,14000,1200,vdde,RIGHT,CALU3
S 500,17000,19500,17000,1200,vdde,RIGHT,CALU3
S 15100,4900,15100,5400,100,24onymous_,UP,POLY
S 7000,100,7000,1500,3200,111nymous_,UP,TALU5
S 4900,4900,4900,5400,100,74onymous_,UP,POLY
S 4600,3700,7000,3700,200,61onymous_,RIGHT,ALU1
S 16500,2000,16500,5100,200,55onymous_,UP,ALU2
S 5200,5600,6400,5600,200,87onymous_,RIGHT,ALU1
S 4000,8100,7000,8100,300,100nymous_,RIGHT,NTIE
S 3500,3000,3500,3000,6000,131nymous_,RIGHT,TALU2
B 17500,500,1200,1200,CONT_VIA3,288nymous_
V 6400,3100,CONT_BODY_P,261nymous_
V 4600,3700,CONT_DIF_N,214nymous_
V 13000,7500,CONT_DIF_P,187nymous_
V 15400,7500,CONT_DIF_P,160nymous_
V 7000,8100,CONT_VIA,147nymous_
B 15500,500,1200,1200,CONT_VIA4,295nymous_
V 5200,4200,CONT_DIF_N,268nymous_
V 6400,6500,CONT_DIF_P,241nymous_
V 13000,8100,CONT_BODY_N,194nymous_
V 14800,6500,CONT_DIF_P,167nymous_
V 15400,3700,CONT_DIF_N,154nymous_
B 9500,500,1200,1200,CONT_VIA4,275nymous_
V 7000,7000,CONT_DIF_P,248nymous_
V 4600,7000,CONT_DIF_P,221nymous_
V 14200,6100,CONT_DIF_P,174nymous_
B 2500,500,1200,1200,CONT_VIA4,282nymous_
V 6400,8100,CONT_BODY_N,255nymous_
V 5200,6000,CONT_DIF_P,228nymous_
V 13600,3100,CONT_BODY_P,201nymous_
V 13000,3700,CONT_VIA2,141nymous_
V 5800,3100,CONT_BODY_P,262nymous_
V 5800,5600,CONT_VIA,235nymous_
V 14800,4200,CONT_DIF_N,208nymous_
V 13600,6500,CONT_DIF_P,181nymous_
B 17500,500,1200,1200,CONT_VIA2,289nymous_
V 6400,6000,CONT_DIF_P,242nymous_
V 3500,5100,CONT_VIA,215nymous_
V 13000,7000,CONT_DIF_P,188nymous_
V 15400,7000,CONT_DIF_P,161nymous_
V 6400,8100,CONT_VIA,148nymous_
B 15500,500,1200,1200,CONT_VIA3,296nymous_
V 3500,2000,CONT_VIA2,269nymous_
V 4600,6500,CONT_DIF_P,222nymous_
V 13600,8100,CONT_BODY_N,195nymous_
V 14800,6000,CONT_DIF_P,168nymous_
V 13000,8100,CONT_VIA2,133nymous_
V 13600,8100,CONT_VIA2,134nymous_
B 9500,500,1200,1200,CONT_VIA3,276nymous_
V 7000,6500,CONT_DIF_P,249nymous_
V 14200,3100,CONT_BODY_P,202nymous_
V 14200,5600,CONT_VIA,175nymous_
V 14200,8100,CONT_VIA2,135nymous_
B 2500,500,1200,1200,CONT_VIA3,283nymous_
V 5800,8100,CONT_BODY_N,256nymous_
V 5200,5100,CONT_POLY,229nymous_
V 13600,6000,CONT_DIF_P,182nymous_
V 16500,5100,CONT_VIA,155nymous_
V 13000,3100,CONT_VIA2,142nymous_
B 17500,5000,1200,1200,CONT_VIA2,290nymous_
V 5200,3100,CONT_BODY_P,263nymous_
V 5800,5100,CONT_POLY,236nymous_
V 16500,2000,CONT_VIA2,209nymous_
V 15400,6500,CONT_DIF_P,162nymous_
V 5800,8100,CONT_VIA,149nymous_
B 4500,500,1200,1200,CONT_VIA2,270nymous_
V 6400,5600,CONT_VIA,243nymous_
V 3500,5100,CONT_POLY,216nymous_
V 13000,6500,CONT_DIF_P,189nymous_
B 15500,6500,1200,1200,CONT_VIA2,297nymous_
V 7000,6100,CONT_DIF_P,250nymous_
V 4600,6000,CONT_DIF_P,223nymous_
V 14200,8100,CONT_BODY_N,196nymous_
V 14800,5100,CONT_POLY,169nymous_
B 8500,6500,2200,1200,CONT_VIA2,277nymous_
V 5200,4600,CONT_DIF_N,230nymous_
V 14800,3100,CONT_BODY_P,203nymous_
V 14200,5100,CONT_POLY,176nymous_
V 14200,8100,CONT_VIA,136nymous_
B 2500,500,1200,1200,CONT_VIA2,284nymous_
V 5200,8100,CONT_BODY_N,257nymous_
V 6400,500,CONT_VIA2,210nymous_
V 13600,5600,CONT_VIA,183nymous_
V 16500,5100,CONT_POLY,156nymous_
V 7000,3700,CONT_VIA2,143nymous_
B 11500,6500,2200,1200,CONT_VIA2,291nymous_
V 4600,3100,CONT_BODY_P,264nymous_
V 5800,4600,CONT_VIA,237nymous_
V 13000,6100,CONT_DIF_P,190nymous_
V 15400,6000,CONT_DIF_P,163nymous_
V 13600,500,CONT_VIA2,150nymous_
B 15500,3500,1200,1200,CONT_VIA2,298nymous_
B 4500,8000,1200,1200,CONT_VIA2,271nymous_
V 6400,5100,CONT_POLY,244nymous_
V 4000,6400,CONT_DIF_P,217nymous_
V 14800,4600,CONT_DIF_N,170nymous_
B 8500,6500,2200,1200,CONT_VIA,278nymous_
V 7000,4100,CONT_DIF_N,251nymous_
V 4600,4600,CONT_DIF_N,224nymous_
V 14800,8100,CONT_BODY_N,197nymous_
V 13600,8100,CONT_VIA,137nymous_
V 4000,8100,CONT_BODY_N,258nymous_
V 5800,7500,CONT_DIF_P,231nymous_
V 15400,3100,CONT_BODY_P,204nymous_
V 14200,4600,CONT_VIA,177nymous_
B 2500,3500,1200,1200,CONT_VIA2,285nymous_
V 5800,4100,CONT_DIF_N,238nymous_
V 5800,500,CONT_VIA2,211nymous_
V 13600,5100,CONT_POLY,184nymous_
V 16000,6400,CONT_DIF_P,157nymous_
V 7000,3100,CONT_VIA2,144nymous_
B 11500,6500,2200,1200,CONT_VIA,292nymous_
V 4000,3100,CONT_BODY_P,265nymous_
V 4000,5900,CONT_DIF_P,218nymous_
V 13000,4100,CONT_DIF_N,191nymous_
V 15400,4600,CONT_DIF_N,164nymous_
V 14200,500,CONT_VIA2,151nymous_
B 15500,500,1200,1200,CONT_VIA2,299nymous_
B 4500,5000,1200,1200,CONT_VIA2,272nymous_
V 6400,4600,CONT_VIA,245nymous_
V 16000,8100,CONT_BODY_N,198nymous_
V 14200,7500,CONT_DIF_P,171nymous_
B 8500,3500,2200,1200,CONT_VIA2,279nymous_
V 7000,3700,CONT_DIF_N,252nymous_
V 4600,4100,CONT_DIF_N,225nymous_
V 14200,4100,CONT_DIF_N,178nymous_
V 13000,8100,CONT_VIA,138nymous_
B 17500,8000,1200,1200,CONT_VIA2,286nymous_
V 4600,8100,CONT_BODY_N,259nymous_
V 5800,7000,CONT_DIF_P,232nymous_
V 16000,3100,CONT_BODY_P,205nymous_
V 16000,5900,CONT_DIF_P,158nymous_
V 7000,3100,CONT_VIA,145nymous_
V 6400,4200,CONT_DIF_N,266nymous_
V 5800,3700,CONT_DIF_N,239nymous_
V 6400,1000,CONT_VIA2,212nymous_
V 13600,4600,CONT_VIA,185nymous_
B 11500,3500,2200,1200,CONT_VIA2,293nymous_
V 6400,4600,CONT_DIF_N,246nymous_
V 4000,4600,CONT_DIF_N,219nymous_
V 13000,3700,CONT_DIF_N,192nymous_
V 15400,4100,CONT_DIF_N,165nymous_
V 13600,1000,CONT_VIA2,152nymous_
B 4500,500,1200,1200,CONT_VIA3,273nymous_
V 5200,7000,CONT_DIF_P,226nymous_
V 15400,8100,CONT_BODY_N,199nymous_
V 14200,7000,CONT_DIF_P,172nymous_
B 8500,3500,2200,1200,CONT_VIA,280nymous_
V 5200,5600,CONT_TURN1,253nymous_
V 13600,4200,CONT_DIF_N,206nymous_
V 14200,3700,CONT_DIF_N,179nymous_
V 13000,3100,CONT_VIA,139nymous_
B 17500,500,1200,1200,CONT_VIA4,287nymous_
V 7000,3100,CONT_BODY_P,260nymous_
V 5800,6500,CONT_DIF_P,233nymous_
V 13600,4600,CONT_DIF_N,186nymous_
V 16000,4600,CONT_DIF_N,159nymous_
V 7000,3700,CONT_VIA,146nymous_
B 11500,3500,2200,1200,CONT_VIA,294nymous_
V 4000,4200,CONT_DIF_N,267nymous_
V 6400,7000,CONT_DIF_P,240nymous_
V 5800,1000,CONT_VIA2,213nymous_
V 14800,7000,CONT_DIF_P,166nymous_
V 14200,1000,CONT_VIA2,153nymous_
B 4500,500,1200,1200,CONT_VIA4,274nymous_
V 7000,7500,CONT_DIF_P,247nymous_
V 4600,7500,CONT_DIF_P,220nymous_
V 14800,5600,CONT_TURN1,193nymous_
V 7000,8100,CONT_BODY_N,254nymous_
V 5200,6500,CONT_DIF_P,227nymous_
V 13000,3100,CONT_BODY_P,200nymous_
V 14200,6500,CONT_DIF_P,173nymous_
B 2500,6500,1200,1200,CONT_VIA2,281nymous_
V 5800,6100,CONT_DIF_P,234nymous_
V 16000,4200,CONT_DIF_N,207nymous_
V 13600,7000,CONT_DIF_P,180nymous_
V 13000,3700,CONT_VIA,140nymous_
S 500,11000,19500,11000,1200,vdde,LEFT,CALU3
S 500,12500,19500,12500,1200,vsse,LEFT,CALU3
S 500,14000,19500,14000,1200,vdde,LEFT,CALU3
S 500,15500,19500,15500,1200,vsse,LEFT,CALU3
S 500,17000,19500,17000,1200,vdde,LEFT,CALU3
S 500,18500,19500,18500,1200,vsse,LEFT,CALU3
S 500,2000,19500,2000,500,ck,RIGHT,CALU3
S 500,3500,19500,3500,1200,vssi,LEFT,CALU3
S 500,5000,19500,5000,1200,vddi,LEFT,CALU3
S 500,6500,19500,6500,1200,vssi,RIGHT,CALU3
S 500,8000,19500,8000,1200,vddi,LEFT,CALU3
S 500,9500,19500,9500,1200,vsse,LEFT,CALU3
S 8500,3000,8500,30000,2200,*,DOWN,ALU1
S 9500,0,9500,1000,1200,cko,DOWN,CALU4
S 9500,0,9500,1000,1200,cko,DOWN,CALU5
S 4500,0,4500,1000,1200,vddi,DOWN,CALU5
S 4500,0,4500,1000,1200,vddi,DOWN,CALU4
S 4500,0,4500,1000,1200,vddi,UP,CALU3
S 4500,0,4500,8500,1200,vddi,UP,CALU2
S 3500,2000,3500,5100,200,*,UP,ALU2
S 4000,3100,7000,3100,300,*,RIGHT,PTIE
S 6400,4200,6400,4600,200,*,UP,ALU1
S 5200,4200,5200,4600,200,*,UP,ALU1
S 4000,4200,4000,6400,200,*,UP,ALU1
S 4000,8100,7000,8100,300,*,RIGHT,NTIE
S 3800,6900,7200,6900,2800,*,LEFT,NWELL
S 7000,3800,7000,4700,300,*,UP,NDIF
S 7000,5600,7000,7500,300,*,DOWN,PDIF
S 6700,3600,6700,4900,100,*,UP,NTRANS
S 6700,4900,6700,5400,100,*,DOWN,POLY
S 4900,5100,6700,5100,300,*,LEFT,POLY
S 6700,5400,6700,7700,100,*,UP,PTRANS
S 6400,3800,6400,4700,200,*,DOWN,NDIF
S 5200,4600,6400,4600,200,*,LEFT,ALU1
S 4000,5100,6400,5100,200,*,LEFT,ALU1
S 6400,5600,6400,7000,200,*,DOWN,ALU1
S 6400,5600,6400,7500,300,*,UP,PDIF
S 5200,5600,6400,5600,200,*,LEFT,ALU1
S 6100,3600,6100,4900,100,*,UP,NTRANS
S 6100,4900,6100,5400,100,*,DOWN,POLY
S 6100,5400,6100,7700,100,*,UP,PTRANS
S 5800,3800,5800,4700,300,*,UP,NDIF
S 5800,5600,5800,7500,300,*,DOWN,PDIF
S 5500,3600,5500,4900,100,*,DOWN,NTRANS
S 5500,4900,5500,5400,100,*,UP,POLY
S 5500,5400,5500,7700,100,*,DOWN,PTRANS
S 5200,3800,5200,4700,200,*,UP,NDIF
S 5200,5600,5200,7000,200,*,DOWN,ALU1
S 5200,5600,5200,7500,300,*,DOWN,PDIF
S 4900,3600,4900,4900,100,*,DOWN,NTRANS
S 4900,4900,4900,5400,100,*,UP,POLY
S 4900,5400,4900,7700,100,*,DOWN,PTRANS
S 4600,3800,4600,4700,200,*,UP,NDIF
S 4600,5600,4600,7500,300,*,DOWN,PDIF
S 4300,3600,4300,4900,100,*,UP,NTRANS
S 4300,4900,4300,5400,100,*,UP,POLY
S 3500,5100,4300,5100,300,*,LEFT,POLY
S 4300,5400,4300,7700,100,*,DOWN,PTRANS
S 4000,3800,4000,4700,300,*,UP,NDIF
S 4000,5600,4000,7500,300,*,DOWN,PDIF
S 4600,3700,4600,4600,200,*,UP,ALU1
S 7000,3700,7000,4100,200,*,UP,ALU1
S 5800,3700,5800,4100,200,*,UP,ALU1
S 4600,3700,7000,3700,200,*,RIGHT,ALU1
S 7000,6100,7000,7500,200,*,DOWN,ALU1
S 4600,6000,4600,7500,200,*,UP,ALU1
S 5800,6100,5800,7500,200,*,DOWN,ALU1
S 5800,500,5800,5600,200,*,UP,ALU2
S 6400,500,6400,5600,200,*,UP,ALU2
S 4000,3400,7000,3400,800,vssi,RIGHT,ALU1
S 4000,7800,7000,7800,800,vddi,RIGHT,ALU1
S 16500,2000,16500,5100,200,*,DOWN,ALU2
S 13000,3100,16000,3100,300,*,RIGHT,PTIE
S 13600,4200,13600,4600,200,*,DOWN,ALU1
S 14800,4200,14800,4600,200,*,DOWN,ALU1
S 16000,4200,16000,6400,200,*,DOWN,ALU1
S 13000,3400,16000,3400,800,vssi,RIGHT,ALU1
S 13000,7800,16000,7800,800,vddi,RIGHT,ALU1
S 13000,8100,16000,8100,300,*,RIGHT,NTIE
S 12800,6900,16200,6900,2800,*,LEFT,NWELL
S 13000,3800,13000,4700,300,*,DOWN,NDIF
S 13000,5600,13000,7500,300,*,UP,PDIF
S 13300,3600,13300,4900,100,*,DOWN,NTRANS
S 13300,4900,13300,5400,100,*,UP,POLY
S 13300,5100,15100,5100,300,*,LEFT,POLY
S 13300,5400,13300,7700,100,*,DOWN,PTRANS
S 13600,3800,13600,4700,200,*,UP,NDIF
S 13600,4600,14800,4600,200,*,LEFT,ALU1
S 13600,5100,16000,5100,200,*,LEFT,ALU1
S 13600,5600,13600,7000,200,*,UP,ALU1
S 13600,5600,13600,7500,300,*,DOWN,PDIF
S 13600,5600,14800,5600,200,*,LEFT,ALU1
S 13900,3600,13900,4900,100,*,DOWN,NTRANS
S 13900,4900,13900,5400,100,*,UP,POLY
S 13900,5400,13900,7700,100,*,DOWN,PTRANS
S 14200,3800,14200,4700,300,*,DOWN,NDIF
S 14200,5600,14200,7500,300,*,UP,PDIF
S 14500,3600,14500,4900,100,*,UP,NTRANS
S 14500,4900,14500,5400,100,*,DOWN,POLY
S 14500,5400,14500,7700,100,*,UP,PTRANS
S 14800,3800,14800,4700,200,*,DOWN,NDIF
S 14800,5600,14800,7000,200,*,UP,ALU1
S 14800,5600,14800,7500,300,*,UP,PDIF
S 15100,3600,15100,4900,100,*,UP,NTRANS
S 15100,4900,15100,5400,100,*,DOWN,POLY
S 15100,5400,15100,7700,100,*,UP,PTRANS
S 15400,3800,15400,4700,200,*,DOWN,NDIF
S 15400,5600,15400,7500,300,*,UP,PDIF
S 15700,3600,15700,4900,100,*,DOWN,NTRANS
S 15700,4900,15700,5400,100,*,DOWN,POLY
S 15700,5100,16500,5100,300,*,LEFT,POLY
S 15700,5400,15700,7700,100,*,UP,PTRANS
S 16000,3800,16000,4700,300,*,DOWN,NDIF
S 16000,5600,16000,7500,300,*,UP,PDIF
S 15400,3700,15400,4600,200,*,DOWN,ALU1
S 13000,3700,13000,4100,200,*,DOWN,ALU1
S 14200,3700,14200,4100,200,*,DOWN,ALU1
S 13000,3700,15400,3700,200,*,RIGHT,ALU1
S 13000,6100,13000,7500,200,*,UP,ALU1
S 15400,6000,15400,7500,200,*,DOWN,ALU1
S 14200,6100,14200,7500,200,*,UP,ALU1
S 14200,500,14200,5600,200,*,DOWN,ALU2
S 13600,500,13600,5600,200,*,DOWN,ALU2
S 4500,8100,7000,8100,400,*,LEFT,ALU2
S 7000,3100,7000,3700,200,*,DOWN,ALU2
S 13000,3100,13000,3700,200,*,DOWN,ALU2
S 13000,8100,14200,8100,400,*,RIGHT,ALU2
S 10000,24000,10000,36000,12200,vssi,DOWN,CALU1
I 0,20000,padreal,padreal,NOSYM
B 15500,500,1200,1200,CONT_VIA2,*
B 15500,3500,1200,1200,CONT_VIA2,*
B 15500,6500,1200,1200,CONT_VIA2,*
B 15500,500,1200,1200,CONT_VIA3,*
B 15500,500,1200,1200,CONT_VIA4,*
B 11500,3500,2200,1200,CONT_VIA,*
B 11500,3500,2200,1200,CONT_VIA2,*
B 11500,6500,2200,1200,CONT_VIA,*
B 11500,6500,2200,1200,CONT_VIA2,*
B 17500,5000,1200,1200,CONT_VIA2,*
B 17500,500,1200,1200,CONT_VIA2,*
B 17500,500,1200,1200,CONT_VIA3,*
B 17500,500,1200,1200,CONT_VIA4,*
B 17500,8000,1200,1200,CONT_VIA2,*
B 2500,3500,1200,1200,CONT_VIA2,*
B 2500,500,1200,1200,CONT_VIA2,*
B 2500,500,1200,1200,CONT_VIA3,*
B 2500,500,1200,1200,CONT_VIA4,*
B 2500,6500,1200,1200,CONT_VIA2,*
B 8500,3500,2200,1200,CONT_VIA,*
B 8500,3500,2200,1200,CONT_VIA2,*
B 8500,6500,2200,1200,CONT_VIA,*
B 8500,6500,2200,1200,CONT_VIA2,*
B 9500,500,1200,1200,CONT_VIA3,*
B 9500,500,1200,1200,CONT_VIA4,*
B 4500,500,1200,1200,CONT_VIA4,*
B 4500,500,1200,1200,CONT_VIA3,*
B 4500,5000,1200,1200,CONT_VIA2,*
B 4500,8000,1200,1200,CONT_VIA2,*
B 4500,500,1200,1200,CONT_VIA2,*
V 3500,2000,CONT_VIA2,*
V 5200,4200,CONT_DIF_N,*
V 4000,4200,CONT_DIF_N,*
V 6400,4200,CONT_DIF_N,*
V 4000,3100,CONT_BODY_P,*
V 4600,3100,CONT_BODY_P,*
V 5200,3100,CONT_BODY_P,*
V 5800,3100,CONT_BODY_P,*
V 6400,3100,CONT_BODY_P,*
V 7000,3100,CONT_BODY_P,*
V 4600,8100,CONT_BODY_N,*
V 4000,8100,CONT_BODY_N,*
V 5200,8100,CONT_BODY_N,*
V 5800,8100,CONT_BODY_N,*
V 6400,8100,CONT_BODY_N,*
V 7000,8100,CONT_BODY_N,*
B 5200,5600,200,200,CONT_TURN1,*
V 7000,3700,CONT_DIF_N,*
V 7000,4100,CONT_DIF_N,*
V 7000,6100,CONT_DIF_P,*
V 7000,6500,CONT_DIF_P,*
V 7000,7000,CONT_DIF_P,*
V 7000,7500,CONT_DIF_P,*
V 6400,4600,CONT_DIF_N,*
V 6400,4600,CONT_VIA,*
V 6400,5100,CONT_POLY,*
V 6400,5600,CONT_VIA,*
V 6400,6000,CONT_DIF_P,*
V 6400,6500,CONT_DIF_P,*
V 6400,7000,CONT_DIF_P,*
V 5800,3700,CONT_DIF_N,*
V 5800,4100,CONT_DIF_N,*
V 5800,4600,CONT_VIA,*
V 5800,5100,CONT_POLY,*
V 5800,5600,CONT_VIA,*
V 5800,6100,CONT_DIF_P,*
V 5800,6500,CONT_DIF_P,*
V 5800,7000,CONT_DIF_P,*
V 5800,7500,CONT_DIF_P,*
V 5200,4600,CONT_DIF_N,*
V 5200,5100,CONT_POLY,*
V 5200,6000,CONT_DIF_P,*
V 5200,6500,CONT_DIF_P,*
V 5200,7000,CONT_DIF_P,*
V 4600,4100,CONT_DIF_N,*
V 4600,4600,CONT_DIF_N,*
V 4600,6000,CONT_DIF_P,*
V 4600,6500,CONT_DIF_P,*
V 4600,7000,CONT_DIF_P,*
V 4600,7500,CONT_DIF_P,*
V 4000,4600,CONT_DIF_N,*
V 4000,5900,CONT_DIF_P,*
V 4000,6400,CONT_DIF_P,*
V 3500,5100,CONT_POLY,*
V 3500,5100,CONT_VIA,*
V 4600,3700,CONT_DIF_N,*
V 5800,1000,CONT_VIA2,*
V 6400,1000,CONT_VIA2,*
V 5800,500,CONT_VIA2,*
V 6400,500,CONT_VIA2,*
V 16500,2000,CONT_VIA2,*
V 14800,4200,CONT_DIF_N,*
V 16000,4200,CONT_DIF_N,*
V 13600,4200,CONT_DIF_N,*
V 16000,3100,CONT_BODY_P,*
V 15400,3100,CONT_BODY_P,*
V 14800,3100,CONT_BODY_P,*
V 14200,3100,CONT_BODY_P,*
V 13600,3100,CONT_BODY_P,*
V 13000,3100,CONT_BODY_P,*
V 15400,8100,CONT_BODY_N,*
V 16000,8100,CONT_BODY_N,*
V 14800,8100,CONT_BODY_N,*
V 14200,8100,CONT_BODY_N,*
V 13600,8100,CONT_BODY_N,*
V 13000,8100,CONT_BODY_N,*
B 14800,5600,200,200,CONT_TURN1,*
V 13000,3700,CONT_DIF_N,*
V 13000,4100,CONT_DIF_N,*
V 13000,6100,CONT_DIF_P,*
V 13000,6500,CONT_DIF_P,*
V 13000,7000,CONT_DIF_P,*
V 13000,7500,CONT_DIF_P,*
V 13600,4600,CONT_DIF_N,*
V 13600,4600,CONT_VIA,*
V 13600,5100,CONT_POLY,*
V 13600,5600,CONT_VIA,*
V 13600,6000,CONT_DIF_P,*
V 13600,6500,CONT_DIF_P,*
V 13600,7000,CONT_DIF_P,*
V 14200,3700,CONT_DIF_N,*
V 14200,4100,CONT_DIF_N,*
V 14200,4600,CONT_VIA,*
V 14200,5100,CONT_POLY,*
V 14200,5600,CONT_VIA,*
V 14200,6100,CONT_DIF_P,*
V 14200,6500,CONT_DIF_P,*
V 14200,7000,CONT_DIF_P,*
V 14200,7500,CONT_DIF_P,*
V 14800,4600,CONT_DIF_N,*
V 14800,5100,CONT_POLY,*
V 14800,6000,CONT_DIF_P,*
V 14800,6500,CONT_DIF_P,*
V 14800,7000,CONT_DIF_P,*
V 15400,4100,CONT_DIF_N,*
V 15400,4600,CONT_DIF_N,*
V 15400,6000,CONT_DIF_P,*
V 15400,6500,CONT_DIF_P,*
V 15400,7000,CONT_DIF_P,*
V 15400,7500,CONT_DIF_P,*
V 16000,4600,CONT_DIF_N,*
V 16000,5900,CONT_DIF_P,*
V 16000,6400,CONT_DIF_P,*
V 16500,5100,CONT_POLY,*
V 16500,5100,CONT_VIA,*
V 15400,3700,CONT_DIF_N,*
V 14200,1000,CONT_VIA2,*
V 13600,1000,CONT_VIA2,*
V 14200,500,CONT_VIA2,*
V 13600,500,CONT_VIA2,*
V 5800,8100,CONT_VIA,*
V 6400,8100,CONT_VIA,*
V 7000,8100,CONT_VIA,*
V 7000,3700,CONT_VIA,*
V 7000,3100,CONT_VIA,*
V 7000,3100,CONT_VIA2,*
V 7000,3700,CONT_VIA2,*
V 13000,3100,CONT_VIA2,*
V 13000,3700,CONT_VIA2,*
V 13000,3700,CONT_VIA,*
V 13000,3100,CONT_VIA,*
V 13000,8100,CONT_VIA,*
V 13600,8100,CONT_VIA,*
V 14200,8100,CONT_VIA,*
V 14200,8100,CONT_VIA2,*
V 13600,8100,CONT_VIA2,*
V 13000,8100,CONT_VIA2,*
EOF

73
alliance/src/cells/src/pxlib/pvssick_sp.ap Normal file
View File

@ -0,0 +1,73 @@
V ALLIANCE : 6
H pvssick_sp,P,10/ 9/2014,100
A 0,0,20000,40000
C 6400,0,100,cko,3,SOUTH,ALU1
C 6400,0,200,cko,4,SOUTH,ALU2
C 20000,2000,500,ck,1,EAST,ALU3
C 0,2000,500,ck,0,WEST,ALU3
C 20000,5000,1200,vddi,1,EAST,ALU3
C 20000,3500,1200,vssi,3,EAST,ALU3
C 20000,17000,1200,vdde,5,EAST,ALU3
C 20000,14000,1200,vdde,3,EAST,ALU3
C 20000,11000,1200,vdde,1,EAST,ALU3
C 20000,9500,1200,vsse,1,EAST,ALU3
C 20000,12500,1200,vsse,3,EAST,ALU3
C 20000,15500,1200,vsse,5,EAST,ALU3
C 20000,18500,1200,vsse,7,EAST,ALU3
C 0,17000,1200,vdde,4,WEST,ALU3
C 0,14000,1200,vdde,2,WEST,ALU3
C 0,11000,1200,vdde,0,WEST,ALU3
C 0,9500,1200,vsse,0,WEST,ALU3
C 0,5000,1200,vddi,0,WEST,ALU3
C 0,3500,1200,vssi,2,WEST,ALU3
C 0,12500,1200,vsse,2,WEST,ALU3
C 0,15500,1200,vsse,4,WEST,ALU3
C 0,18500,1200,vsse,6,WEST,ALU3
C 20000,8000,1200,vddi,3,EAST,ALU3
C 20000,6500,1200,vssi,5,EAST,ALU3
C 0,6500,1200,vssi,4,WEST,ALU3
C 0,8000,1200,vddi,2,WEST,ALU3
C 10000,40000,100,vssi,6,NORTH,ALU1
C 10000,0,5200,vssi,0,SOUTH,ALU1
C 10000,0,5200,vssi,1,SOUTH,ALU2
C 5800,0,200,cko,2,SOUTH,ALU2
C 5800,0,200,cko,0,SOUTH,ALU1
C 5800,0,100,cko,1,SOUTH,ALU1
S 6400,0,6400,1000,200,*,UP,ALU2
S 5800,500,14200,500,200,*,RIGHT,ALU3
S 5800,1000,14200,1000,200,*,RIGHT,ALU3
S 0,6500,400,6500,1200,*,RIGHT,ALU3
S 0,5000,400,5000,1200,*,RIGHT,ALU3
S 0,3500,400,3500,1200,*,RIGHT,ALU3
S 0,2000,400,2000,500,*,RIGHT,ALU3
S 0,18500,400,18500,1200,*,RIGHT,ALU3
S 0,17000,400,17000,1200,*,RIGHT,ALU3
S 0,12500,400,12500,1200,*,RIGHT,ALU3
S 0,15500,400,15500,1200,*,RIGHT,ALU3
S 0,14000,400,14000,1200,*,RIGHT,ALU3
S 0,11000,400,11000,1200,*,RIGHT,ALU3
S 0,9500,400,9500,1200,*,RIGHT,ALU3
S 0,8000,400,8000,1200,*,RIGHT,ALU3
S 19600,2000,20000,2000,500,*,RIGHT,ALU3
S 19600,3500,20000,3500,1200,*,RIGHT,ALU3
S 19600,5000,20000,5000,1200,*,RIGHT,ALU3
S 19600,6500,20000,6500,1200,*,RIGHT,ALU3
S 19600,8000,20000,8000,1200,*,RIGHT,ALU3
S 19600,9500,20000,9500,1200,*,RIGHT,ALU3
S 19600,11000,20000,11000,1200,*,RIGHT,ALU3
S 19600,12500,20000,12500,1200,*,RIGHT,ALU3
S 19600,14000,20000,14000,1200,*,RIGHT,ALU3
S 19600,15500,20000,15500,1200,*,RIGHT,ALU3
S 19600,17000,20000,17000,1200,*,RIGHT,ALU3
S 19600,18500,20000,18500,1200,*,RIGHT,ALU3
S 10000,30000,10000,40000,100,*,DOWN,ALU1
S 10000,0,10000,8500,5200,*,UP,ALU2
S 6000,0,6000,1000,1200,cko,DOWN,ALU3
S 5800,0,5800,1000,200,*,UP,ALU2
I 0,0,pvssick_px,a,NOSYM
V 6400,0,CONT_VIA,*
B 10000,1100,5200,2400,CONT_VIA,*
V 5800,500,CONT_VIA2,*
V 5800,1000,CONT_VIA2,*
V 5800,0,CONT_VIA,*
EOF

32
alliance/src/cells/src/pxlib/pvssick_sp.vbe Normal file
View File

@ -0,0 +1,32 @@
ENTITY pvssick_sp IS
GENERIC (
CONSTANT area : NATURAL := 80000;
CONSTANT cin_ck : NATURAL := 127;
CONSTANT tpll_ck : NATURAL := 1235;
CONSTANT rdown_ck : NATURAL := 253;
CONSTANT tphh_ck : NATURAL := 1109;
CONSTANT rup_ck : NATURAL := 311
);
PORT (
cko : out WOR_BIT BUS;
ck : in BIT;
vdde : in BIT;
vddi : in BIT;
vsse : in BIT;
vssi : in BIT
);
END pvssick_sp;
ARCHITECTURE behaviour_data_flow OF pvssick_sp IS
BEGIN
label0 : BLOCK ('1' = '1')
BEGIN
cko <= GUARDED ck;
END BLOCK label0;
ASSERT ((((vddi and vdde) and not (vssi)) and not (vsse)) = '1')
REPORT "power supply is missing on pvssick_sp"
SEVERITY WARNING;
END;

6
alliance/src/distrib/etc/alc_env.csh.in
View File

@ -53,7 +53,7 @@
setenv MBK_CATA_LIB "${MBK_CATA_LIB}:${CELLS_TOP}/romlib"
setenv MBK_CATA_LIB "${MBK_CATA_LIB}:${CELLS_TOP}/ramlib"
setenv MBK_CATA_LIB "${MBK_CATA_LIB}:${CELLS_TOP}/pxlib"
setenv MBK_CATA_LIB "${MBK_CATA_LIB}:${CELLS_TOP}/padlib"
#setenv MBK_CATA_LIB "${MBK_CATA_LIB}:${CELLS_TOP}/padlib"
setenv MBK_TARGET_LIB "${CELLS_TOP}/sxlib"
setenv MBK_C4_LIB ./cellsC4
@ -93,9 +93,9 @@
endif
if ( $?MANPATH ) then
setenv MANPATH "${MANPATH}:${ALLIANCE_TOP}/man"
setenv MANPATH "${MANPATH}:${ALLIANCE_TOP}/share/man"
else
setenv MANPATH ":${ALLIANCE_TOP}/man:`manpath`"
setenv MANPATH ":${ALLIANCE_TOP}/share/man:`manpath`"
endif
endif

6
alliance/src/distrib/etc/alc_env.sh.in
View File

@ -55,7 +55,7 @@
MBK_CATA_LIB=$MBK_CATA_LIB:$CELLS_TOP/ramlib
MBK_CATA_LIB=$MBK_CATA_LIB:$CELLS_TOP/romlib
MBK_CATA_LIB=$MBK_CATA_LIB:$CELLS_TOP/pxlib
MBK_CATA_LIB=$MBK_CATA_LIB:$CELLS_TOP/padlib
#MBK_CATA_LIB=$MBK_CATA_LIB:$CELLS_TOP/padlib
export MBK_CATA_LIB
MBK_TARGET_LIB=$CELLS_TOP/sxlib; export MBK_TARGET_LIB
@ -92,9 +92,9 @@
#fi
if [ -z "${MANPATH}" ]; then
MANPATH=:$ALLIANCE_TOP/man:$(manpath)
MANPATH=:$ALLIANCE_TOP/share/man:$(manpath)
else
MANPATH=$MANPATH:$ALLIANCE_TOP/man
MANPATH=$MANPATH:$ALLIANCE_TOP/share/man
fi
export MANPATH
fi

34
alliance/src/documentation/alliance-examples/etc/techno-035.rds
View File

@ -415,3 +415,37 @@ CONT_TURN3 RDS_ALU8 .0 ALL
END
##-------------------------------------------------------------------
# TABLE MBK_WIRESETTING :
##-------------------------------------------------------------------
#
# This table is used by ocp, nero & ring. It supplies *symbolic*
# information about the routing grid, the cell gauge and the power
# wires.
TABLE MBK_WIRESETTING
X_GRID 5
Y_GRID 5
Y_SLICE 50
WIDTH_VDD 6
WIDTH_VSS 6
TRACK_WIDTH_ALU8 0
TRACK_WIDTH_ALU7 2
TRACK_WIDTH_ALU6 2
TRACK_WIDTH_ALU5 2
TRACK_WIDTH_ALU4 2
TRACK_WIDTH_ALU3 2
TRACK_WIDTH_ALU2 2
TRACK_WIDTH_ALU1 2
TRACK_SPACING_ALU8 0
TRACK_SPACING_ALU7 8
TRACK_SPACING_ALU6 8
TRACK_SPACING_ALU5 3
TRACK_SPACING_ALU4 3
TRACK_SPACING_ALU3 3
TRACK_SPACING_ALU2 3
TRACK_SPACING_ALU1 3
END

34
alliance/src/documentation/alliance-examples/etc/techno-symb.rds
View File

@ -421,6 +421,40 @@ TABLE S2R_MINIMUM_LAYER_WIDTH
END
##-------------------------------------------------------------------
# TABLE MBK_WIRESETTING :
##-------------------------------------------------------------------
#
# This table is used by ocp, nero & ring. It supplies *symbolic*
# information about the routing grid, the cell gauge and the power
# wires.
TABLE MBK_WIRESETTING
X_GRID 5
Y_GRID 5
Y_SLICE 50
WIDTH_VDD 6
WIDTH_VSS 6
TRACK_WIDTH_ALU8 0
TRACK_WIDTH_ALU7 2
TRACK_WIDTH_ALU6 2
TRACK_WIDTH_ALU5 2
TRACK_WIDTH_ALU4 2
TRACK_WIDTH_ALU3 2
TRACK_WIDTH_ALU2 2
TRACK_WIDTH_ALU1 2
TRACK_SPACING_ALU8 0
TRACK_SPACING_ALU7 8
TRACK_SPACING_ALU6 8
TRACK_SPACING_ALU5 3
TRACK_SPACING_ALU4 3
TRACK_SPACING_ALU3 3
TRACK_SPACING_ALU2 3
TRACK_SPACING_ALU1 3
END
##-------------------------------------------------------------------
# TABLE CIF_LAYER :
##-------------------------------------------------------------------

3
alliance/src/nero/src/UOpts.cpp
View File

@ -19,6 +19,9 @@
//# include "unistd.h"
# include "UDefs.h"
extern "C" {
int getopt(int argc, char* const *argv, const char *sf);
}
// +----------------------------------------------------------------+

4
alliance/src/ocp/src/placer/PCon.cpp
View File

@ -60,7 +60,7 @@ PCon::Save(struct phfig *physicalfig, const double dx, const double dy) const {
, (int)(GetPosX() * PITCH + dx)
, (int)(GetPosY() * PITCH + dy)
, _orient==NORTH || _orient == SOUTH ? ALU2 : ALU3
, (_orient==NORTH || _orient == SOUTH ? 2 : 1) * (PITCH/MBK_X_GRID));
, (_orient==NORTH || _orient == SOUTH ? MBK_TRACK_WIDTH_ALU2:MBK_TRACK_WIDTH_ALU3)*SCALE_X);
} else {
#if 0
addphcon(physicalfig,
@ -89,7 +89,7 @@ PCon::RingSave(struct phfig *physicalfig, const double dx, const double dy) cons
(int)(GetPosX() * PITCH + dx),
(int)(GetPosY() * PITCH + dy),
ALU2,
2 * (PITCH/MBK_X_GRID));
MBK_TRACK_WIDTH_ALU2*SCALE_X);
}
ostream&

36
alliance/src/rds/etc/cmos.rds
View File

@ -395,6 +395,42 @@ TABLE S2R_MINIMUM_LAYER_WIDTH
END
##-------------------------------------------------------------------
# TABLE MBK_WIRESETTING :
##-------------------------------------------------------------------
#
# This table is used by ocp, nero & ring. It supplies *symbolic*
# information about the routing grid, the cell gauge and the power
# wires.
TABLE MBK_WIRESETTING
X_GRID 5
Y_GRID 5
Y_SLICE 50
WIDTH_VDD 6
WIDTH_VSS 6
TRACK_WIDTH_ALU8 0
TRACK_WIDTH_ALU7 2
TRACK_WIDTH_ALU6 2
TRACK_WIDTH_ALU5 2
TRACK_WIDTH_ALU4 2
TRACK_WIDTH_ALU3 2
TRACK_WIDTH_ALU2 2
TRACK_WIDTH_ALU1 2
TRACK_SPACING_ALU8 0
TRACK_SPACING_ALU7 8
TRACK_SPACING_ALU6 8
TRACK_SPACING_ALU5 3
TRACK_SPACING_ALU4 3
TRACK_SPACING_ALU3 3
TRACK_SPACING_ALU2 3
TRACK_SPACING_ALU1 3
END
##-------------------------------------------------------------------
# TABLE CIF_LAYER :
##-------------------------------------------------------------------

3
alliance/src/ring/src/Makefile.am
View File

@ -11,7 +11,8 @@ bin_PROGRAMS = ring
ring_LDADD = @ALLIANCE_LIBS@ \
-L$(top_builddir)/genlib/src \
-L$(top_builddir)/mbk/src \
-lMgn -lMpu -lMlu -lMlo -lMph -lMut -lRcn
-L$(top_builddir)/rds/src \
-lMgn -lMpu -lMlu -lMlo -lMph -lMut -lRcn -lRds
ring_SOURCES = bigvia.c bigvia.h \
compress.c compress.h \

3
alliance/src/ring/src/param.c
View File

@ -126,6 +126,9 @@ void lecture_param(int nbarg, char** tab, char** nom_circuit_lo,
/* arguments de mbk */
/* ---------------- */
rdsenv();
loadrdsparam();
mbkenv(); /* choix de l'utilisateur mis dans des variables UNIX */
/* on recupere (long) SCALE_X */

7
alliance/src/ring/src/sesame.c
View File

@ -51,6 +51,13 @@
void ringerreur(int code, void *pt_liste, void *pt_liste2)
{
fprintf( stderr, "WMIN_ALU1: %d\n", (int)WMIN_ALU1 );
fprintf( stderr, "WMIN_ALU2: %d\n", (int)WMIN_ALU2 );
fprintf( stderr, "DMIN_ALU1_ALU1: %d\n", (int)DMIN_ALU1_ALU1 );
fprintf( stderr, "DMIN_ALU2_ALU2: %d\n", (int)DMIN_ALU2_ALU2 );
fprintf( stderr, "WVIA_ALU1: %d\n", (int)WVIA_ALU1 );
fprintf( stderr, "WVIA_ALU2: %d\n", (int)WVIA_ALU2 );
loins_list * circuit_inst, *liste_inst;
locon_list * con_lo;
chain_list * liste;

14
alliance/src/ring/src/struct.h
View File

@ -77,16 +77,16 @@
#define OUEST 2
#define EST 3
/* Nombres entiers obligatoires ! */
#define WMIN_ALU1 2 /* largeur minimum de l'alu1,l'alu2,dist mini alu1<->alu2 */
#define WMIN_ALU2 2 /* et largeur du via */
#define DMIN_ALU1_ALU1 3 /* dmin en a1 a1 2.5 arrondi a 3 */
#define DMIN_ALU2_ALU2 3
#define WVIA_ALU1 2 /* largeur du via pour l'alu1 */
#define WVIA_ALU2 3 /* largeur du via pour l'alu2 */
#define WMIN_ALU1 MBK_TRACK_WIDTH_ALU2 /* largeur minimum de l'alu1,l'alu2,dist mini alu1<->alu2 */
#define WMIN_ALU2 MBK_TRACK_WIDTH_ALU2 /* et largeur du via */
#define DMIN_ALU1_ALU1 (MBK_TRACK_SPACING_ALU1+(MBK_TRACK_SPACING_ALU1)%1) /* dmin en a1 a1 2.5 arrondi a 3 */
#define DMIN_ALU2_ALU2 (MBK_TRACK_SPACING_ALU2+(MBK_TRACK_SPACING_ALU2)%1)
#define WVIA_ALU1 MBK_TRACK_WIDTH_ALU1 /* largeur du via pour l'alu1 */
#define WVIA_ALU2 MBK_TRACK_WIDTH_ALU1 /* largeur du via pour l'alu2 */
#define EXTENSION_ALU2 1 /* extension alu2 pour fignoler coin couronne */
#define BV_VIA_VIA 4 /* must be even, whatever! */
#define BV_VIA_VIA (MBK_TRACK_SPACING_ALU2+MBK_TRACK_WIDTH_ALU2+(MBK_TRACK_SPACING_ALU2+MBK_TRACK_WIDTH_ALU2)%1) /* must be even, whatever! */
#define BV_VIASIZE WVIA_ALU2 /* design rule for equipotential vias */
#define WALIM 60 /* largeur prdefinie des alim */