diff --git a/alliance/src/genlib/doc/Makefile.am b/alliance/src/genlib/doc/Makefile.am index 9e61164f..ec539162 100644 --- a/alliance/src/genlib/doc/Makefile.am +++ b/alliance/src/genlib/doc/Makefile.am @@ -44,5 +44,6 @@ EXTRA_DIST = $(pdf_DATA) \ ./man_dpgen_xnor2mask.sgm \ ./man_dpgen_xor2.sgm \ ./man_genlib.sgm \ - ./man_genlib_macro.sgm + ./man_genlib_macro.sgm \ + ./man_dpgen_fifo.sgm diff --git a/alliance/src/genlib/doc/build_doc.sh b/alliance/src/genlib/doc/build_doc.sh index fb9eefe3..9c143b28 100755 --- a/alliance/src/genlib/doc/build_doc.sh +++ b/alliance/src/genlib/doc/build_doc.sh @@ -48,6 +48,7 @@ echo "" echo " o Building HTML..." if [ -d $TOOL ]; then + echo " - Backuping CVS" mv $TOOL/CVS ./CVS-$TOOL mv $TOOL/stylesheet-images/CVS ./CVS-SS-$TOOL fi @@ -71,7 +72,8 @@ echo "" >> $DOC_AM echo "EXTRA_DIST = \$(pkghtml_DATA)" >> $DOC_AM mv $DOC_AM $TOOL/Makefile.am - if [ -f ./CVS-$TOOL ]; then + if [ -d ./CVS-$TOOL ]; then + echo " - Restoring CVS" mv ./CVS-$TOOL $TOOL/CVS mv ./CVS-SS-$TOOL $TOOL/stylesheet-images/CVS fi diff --git a/alliance/src/genlib/doc/genlib.pdf b/alliance/src/genlib/doc/genlib.pdf index 250d6296..b392011a 100644 --- a/alliance/src/genlib/doc/genlib.pdf +++ b/alliance/src/genlib/doc/genlib.pdf @@ -1,14128 +1,14035 @@ -%PDF-1.2 -2 0 obj +%PDF-1.4 +1 0 obj << /S /GoTo /D (1.0) >> endobj 4 0 obj (GenLib User's Manual) endobj -6 0 obj +5 0 obj << /S /GoTo /D (2.0) >> endobj 8 0 obj (Table of Contents) endobj -10 0 obj +9 0 obj << /S /GoTo /D (3.0) >> endobj 12 0 obj (I. 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<< /Type /Annot -/Border [0 0 0] /H /I /C [1 0 0] -/Rect [509.089 671.259 514.07 681.276] +/Border[0 0 0]/H/I/C[1 0 0] +/Rect [504.11 639.993 514.072 648.098] /Subtype /Link -/A << /S /GoTo /D (GENLIB) >> +/A << /S /GoTo /D (DPGEN-BUFF) >> >> endobj 1242 0 obj << /Type /Annot -/Border [0 0 0] /H /I /C [1 0 0] -/Rect [167.372 661.909 248.576 670.013] +/Border[0 0 0]/H/I/C[1 0 0] +/Rect [167.372 629.035 245.051 637.139] /Subtype /Link -/A << /S /GoTo /D (GENLIB-MACRO) >> +/A << /S /GoTo /D (DPGEN-NAND2) >> >> endobj 1243 0 obj << /Type /Annot -/Border [0 0 0] /H /I /C [1 0 0] -/Rect [504.108 661.909 514.07 670.013] +/Border[0 0 0]/H/I/C[1 0 0] +/Rect [504.11 629.035 514.072 637.139] /Subtype /Link -/A << /S /GoTo /D (GENLIB-MACRO) >> +/A << /S /GoTo /D (DPGEN-NAND2) >> >> endobj 1244 0 obj << /Type /Annot -/Border [0 0 0] /H /I /C [1 0 0] -/Rect [167.372 650.95 226.878 659.054] +/Border[0 0 0]/H/I/C[1 0 0] +/Rect [167.372 618.076 245.051 626.18] /Subtype /Link -/A << /S /GoTo /D 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274.689 439.879] /Subtype /Link -/A << /S /GoTo /D (DPGEN-MUX2) >> +/A << /S /GoTo /D (DPGEN-NAND2MASK) >> >> endobj 1279 0 obj << /Type /Annot -/Border [0 0 0] /H /I /C [1 0 0] -/Rect [504.108 464.649 514.07 472.754] +/Border[0 0 0]/H/I/C[1 0 0] +/Rect [504.11 431.774 514.072 439.879] /Subtype /Link -/A << /S /GoTo /D (DPGEN-MUX2) >> +/A << /S /GoTo /D (DPGEN-NAND2MASK) >> >> endobj 1280 0 obj << /Type /Annot -/Border [0 0 0] /H /I /C [1 0 0] -/Rect [167.372 453.69 241.483 461.795] +/Border[0 0 0]/H/I/C[1 0 0] +/Rect [167.372 420.815 265.434 428.92] /Subtype /Link -/A << /S /GoTo /D (DPGEN-NBUSE) >> +/A << /S /GoTo /D (DPGEN-NOR2MASK) >> >> endobj 1281 0 obj << /Type /Annot -/Border [0 0 0] /H /I /C [1 0 0] -/Rect [504.108 453.69 514.07 461.795] +/Border[0 0 0]/H/I/C[1 0 0] +/Rect [504.11 420.815 514.072 428.92] /Subtype /Link -/A << /S /GoTo /D (DPGEN-NBUSE) >> +/A << /S /GoTo /D (DPGEN-NOR2MASK) >> >> endobj 1282 0 obj << /Type /Annot -/Border [0 0 0] /H /I /C [1 0 0] -/Rect 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As a special exception, permission is granted to include this font program in a Postscript or PDF file that consists of a document that contains text to be displayed or printed using this font, regardless of the conditions or license applying to the document itself.) readonly def -/Copyright (Copyright (URW)++,Copyright 1999 by (URW)++ Design & Development) readonly def -/FullName (URW Palladio L Bold Italic) readonly def -/FamilyName (URW Palladio L) readonly def -/Weight (Bold) readonly def -/ItalicAngle -9.9 def -/isFixedPitch false def -/UnderlinePosition -100 def -/UnderlineThickness 50 def -end readonly def -/FontName /HRQCAA+URWPalladioL-BoldItal def -/PaintType 0 def -/WMode 0 def -/FontBBox {-170 -300 1073 935} readonly def -/FontType 1 def -/FontMatrix [0.001 0.0 0.0 0.001 0.0 0.0] readonly def -/Encoding StandardEncoding def -/UniqueID 5021144 def -currentdict end -currentfile eexec -oc;jtD[1ƅpTo9`.:ypJ*l'e}#)&7+/^ W{LZ60VQR^λ3r)#v$p~c&'ſ+ %;v &q?ZUENtoGxF -[Q+<22 br3@G~ؼ<|bZ,9Ob,@*+!~X0 ;* oqHv鮜`VJ*H&4^ -d;*D ͎:qgw/.w lLje --#1*9Ɗ㐠,N]# !6J`͓nCtxt.0<VVoLaX Mto{*5BM$ԗ`W!EhvB5 -ف[DbeNf0Hq5K#dWS{m@x}ejѯPnB4[L{dG TsY>)]kUo9, N={[ĵl&XTR꿆 `r1oHIn" - p]/Lm4J ߗ=>?7:z"{[ݾ;J#)At%A/t+!UVȤݭԇݷՇ3]!Xd -`?i6o_{=!vQN($VCOtk"8%ga6 _ԧ~Y W>/mMMϪ#6yKQpvO:qJoNF:ycv;OT䔸)sJaFߒ\E|`A,SkZ*LlĬ! -;Qז2:b+G2K0` bEEa! >`69RhP`jYq-*fug#FhDyhs -_>ѮuÙxb{㮦{I2ə|d͒w΁f؄n7z5е^B53y]|Nr0n*?,=fߩw8BG\z l/s(S mQQ{;;|$}dg_]ΐ gU|;=} -9EÒu6>͑}\c8Z?ºDk(EUPG X e7ʅ|X׫>竲;)髞ѷ'0?JAmVZ<(N]NiټCQ]zYO,bK!!oLj k(W[S^ DADbGA${g48_ RHP$9s"1 -\p`b'5ɰwUd,|VfZiV6+9fm<QŽNLlg!-"IRۭ7q~{Ӂu ~6BMu>X$X3.}jf*F%-8H7]2,XoC/u҆M )|0b49r ;gu;&\mUW&bN2eG'Nb/ yc׸?5#$PA2wEA\瓡di{ 0){HC*gi'i }%hW\LK -Ha쩷sL*(]aytBMdD+&dj> "zND~U5kR_É-]lXL'>̿lgR띖DݓT BO *!{a\F/<<SZR!&.c,H9{e2~JIFԪ4(?-ra נI˽'jOt] -'1's._\4 -w~/[{Sk`dKq1 6eҼr<l::i<:@SL`b'p >m/)Mv;ʑ勖Lnو޿xU a. b2'WˍƂ8mi-{%|3iYuv:lKA*+ i>΂hJf㧦 @{OJo5+vͥR juU涊%9s&Y'yb ۣ1bȁiIl.F=B=7p:.y& a2ѷA]H^cL z/t*N=9h,Mǫ ت:n '"jSP_;GYQ%iE'$ x\Y"H:W!N sbn=:;`e*z+}n ]2 czs&HYXa'q]5(rDGkEz6lT9 {UiTc2V[J"4|ʩe(|6:`H;l@BhtO {Z#J1|8s֩_(S&ٶANdwG@_?iuVZn.du ϤYp W6)(}-*)JRLk.cG3jlg[~Fe(=hU-B"P";d?H,V/6)dq4c39"\$h*Koj`ƴr7icB -ҵu{WI2xps3tR.OYò,dɋoOkЈݼ;zW65LXQ -fAM>'H`t@$|ZIy%ӆ^LK*مp q%)>Ό"'UGmNa QEaOq(5aa6IGpdWAX54 >՜$r `OѸ}Y=G-jXRB=a=/];zP||.=;#L5YxHC"BZk)Y^5gi67<Z@NVF 0]MlChEqG.(֝,C@`u@1 h#dPd1YT~= W'j h (#bēJ4fD((;Rz &F޾8ͨ+ ?X8X1 !-v?֋ zp_UOE[ZN&FxV6( mΩ4ϼ(A8Uрp,_,Iے=ЛtFߍ=wA hqm>5*t_tJ?'ʕ퓄SY4ow&mjܭ]G]SW]<%Ĝ,]?}ay}z;$n(h >(ϵ&jeD]tzH|خ*l-k 4L1x_P/x@E7Cp"$xe.m?(N{H-#>tI`A@8rئGS]]#%ƗulqSp5>@AU) .).Rj> N,H,x4_L.9=J=ȃwǞU# e0U~.Ulj .^toHc}2,k= lHu0T|E_>)o gjҍsnū;T(23UzMSŷwS&VogCM8KO(,~@EFO)F_cɆ\dnPE`h)6}('=m&#sES.D/.^hۊBMQVW(sIZ?2P!i2) TZR -a~ >|(HaZG 'ovxҀg/^i"jڿn_3[YF-I=7p7[Vm {ś\XE_p9#60,|̿xMF>Kl߹qcX0}RbMnax8Nk矴R3#nTɠRJăUy! !I-O&ԝȆ]:yׅ5bi̺ alȣ pE v0'p sWd65CM_m3)5നKIU%`?[w6<.ᢹ\u1hH<9Wxt/$J/Ԧ/nbwSz.ϥ'Ol-(i\5"'"LwùF[KՏkj$tW^lj=*]ϙV"BW>ABl7JP<-\)hcne^L͓:ruc uFON6ᕅ5(3.O.-E"ܺs-І~*]t]@|BӋrCj%vͳCdT\q(; ;*rJ *ImSSeJܛJVƙT^#%Af,(MJ-WO܏XeYT<=W߹ -JN @;wW@"@UBŶWl` 6z$KA_* WLvіMpYۢ@BϔNKA!9;wq[4haEnϿV)!x -f_N IC+L)gkM7r vxg3Sk'$(T eS@㵉Edd2M&\od6$Ÿ$WAF=(ɯ}^\_f.";K!=3ڕ*֖];C8ru;,G/ux*+X]mຈx9Mϳ{>[k#tp=U\]k@Oͧ5Zufc"(,35Ya qN1rނ8Є[FAAzgU/fL(MV{)ݤヸvdQ'"{iy+r Dl5+TtB(z)xH .,X %HKhIgaS܏(EgpV &"PNjaŋެ%;.`^NKT=Ā?30 -AstdF{XkmU_;NY+F練s/J`s9@b%O .C{>/F( ʥ.0d2O[[qN+"sz^7SgQ~VK)ޟ^&lp(e.B9lȾ{;e?X]fB[mVʞ6X2jI {^tz2;!EW{aG,"ڥ?9( eQINvqu5e8( beq3Ch/[z&~}g s -h<=+8!r͝]q9d='x#Jé. -Uo˘/gn2ya{Oc1XtcjvRhbZmG&-GOdﮜv!KUm2KKkQ*tȝ D'WV*,YtA^ G DQ'PVK2#"Lݙ ÁG;f}&M(ۿW4]s'd!ėP Ogz9['PQXc$I4V/0RivBO@9X.'&T+m8.7Vc"S)IZ3O`ōǬyiX&&RϩyNB ?g{)eEp{?VXmf8.z+ B[~5J}fP8l{boo|Hb`1q+S=M@+DPQ+PXչm%#3Ft|ct=NWi)$rGQx샴H9t旵uCW5ש(uXHK4ltOo}<7EB VZY*.&7aEac^_LA1;>VStiJLR-LK -L!'1z<*IeԮVQ`+fE/`Is̬`}kmZNjJUO8b@Nfy;X3. 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See the file PUBLIC (Aladdin Free Public License) for license conditions. As a special exception, permission is granted to include this font program in a Postscript or PDF file that consists of a document that contains text to be displayed or printed using this font, regardless of the conditions or license applying to the document itself.) readonly def -/Copyright (Copyright (URW)++,Copyright 1999 by (URW)++ Design & Development) readonly def -/FullName (URW Palladio L Bold) readonly def -/FamilyName (URW Palladio L) readonly def -/Weight (Bold) readonly def -/ItalicAngle 0.0 def -/isFixedPitch false def -/UnderlinePosition -100 def -/UnderlineThickness 50 def -end readonly def -/FontName /UCSNPA+URWPalladioL-Bold def -/PaintType 0 def -/WMode 0 def -/FontBBox {-152 -301 1000 935} readonly def -/FontType 1 def -/FontMatrix [0.001 0.0 0.0 0.001 0.0 0.0] readonly def -/Encoding StandardEncoding def -/UniqueID 5021142 def -currentdict end -currentfile eexec -oc;jtD[1ƅpTo9`.:ypJ*l'e}#)&7+/^ W{LZ60VQR^λ3r)#v$p~c&'ſ+ %;v &q?ZUE+dc Glt哏>wj,VRp^6>Z'h"%"{=p?u͓3(͝VN:hAWwwg`r==(+2$Q]qh1S=l-oȪkR܃_\n`ߟq+oEi蘯`T&1Sb; ml8gO<}y FGBу0vIox--X$D_٘Еc;ASxd_-o@#R!T3N_&Q7Lf yw_ -tڙhQoZ%ߟ^R󑙙9u99 naJOIYuʐR%W/ڶWv#d\uD˜{l_1(QX`nA9>z<5g^ȯ n.T3a`@CPJ@ߥ-4%)hs.xI /M%`9 w0Jf1Rj^By3-Ƴ[Xv7q KuSv+ ]E)އ| dvȤ(w7xz%e4A|FczhV oP6PPx`:b1`}hFDa骫?4%P,G͊~/+DE?;FĄb7_ uhg18!î1aD̢Ť|޸&Xvm7ߝh@lydwj鼪mQb,m@MKporoo0+DUfqϷ6NAy-v%R둘qϴL|y'q s,b|PqjUבJ [ibh -ι`2,6 }/NU-6K\v/J,`)vr6U&E=~™" O)luW&=oO&* FTbPbAAP,$'@Y R[D34%~Z419AgC -nQ-M!A GA<8jaw] s:+kES = iEx5]|.2 x$,21׍Oێ^[|ᛩ=L6==G/OĖOo:<C=r{Fbz{`eX .!p7Eïi=P3 "+k+j'*<ߖCxyYWܴxBеJ0;$)fi^[JơF?o:dg )nG8%R pqDNa_]'1oS ("Ei&:w?1NKwU|_VրA4DCjM6)[ FxЧI(dO5#- ٠MʖфGJ=nLzkpA֨$a)Lz}~tiY}k#(s_mi3KgͫjUƺ듉F*_fi&`!PK_tE[w0V$ $|j3/wy "xxmX q5φHDs~N%f4Y3<~=?>GjVI 5<;zˊvCYka~Jk(֖;T#mUvjDՖ8|+n=WvtcϾiwU[]'1OD[`.Up\זhxQy~`09MU!x&׎')z)a Om^$q'uLeG'7ǮyQ׌푉Znr8 ε;:R9ZH5/B)58~'>zF")l6uTZ}oF̴8N#/iVWv[v@nhHp-`ޣvr@qUP_i -yh,urzy U 4(~3" ӯg-U@:vfӗuS -I͗Mݡ3Yp~IɌ"ymj .7)}*~z#M9W?1 ] 'Pȫ%6ESl B -q ~JRKliGDivkiǵ1=t%z̳lkH\ƑJg؉UHEIa`3Z `Ox ߂r~ KrkžeٍȆŬ^T)Mdvκ^6>4xóԐ95ce9{6ř%1d|"TLXF_yj~<hF#+5f_'+*LwmCUǃ̺sӧ:< ֬&Q0uim=E#$ؕSrcn,$_paz<[ǟTP\ubu`V0}nqu{Mo MVi7,<;6/yLAzFܓ׹V7ڛl9_V/rO-k mBpĔ ҝ5dqe.nҕ}f0ȭf1}^MhT *Aw'CYّ;OZf͓I106r #Q=Q9.m ~BWoب.eB!0P'z)Ȕmq!~O\AgZ'bE&1$..a.oCE7 yJfK!5{rq`9kf쩱mo(LH%FB?$D+?-;y\3 K{G,/@Ez~> ۓ~P}sͪoaAx~h x<[w)4Ba:S+(t^xyH $롗ǃ. xRr>auOf A˧⺬22LFE[`re{: ->‡KU, >Nj[PB0)quc3qiFm#8qBp=cfd[of3ma D&7Ӻ)QeO?!Z{} ~HaDlc}5%Tol'0$'<$R1 ̺`8\<{z~C=0xgwoV3ʞ3.OC[ls R"?U˴ANhQGmD2etąe8[I*}ҫlt h\v>OS?jv[lZ `Y+v;RL'<=*7_4MEs>7s֓\7?W5kN!qJYŘ okC-}c4gˈf?K89@`lJ[BmKǎ^#u~y.?ء<ɾQ_ vm؟JtZtxAO:YEdemE2_sWY~q.Z>LJzWNE!E.#0vrjIdljmd%~Ko; R S -tK"?65k2BTTK8"5hFTRZow!/l 3K˪f蒲g"u'ԭ>r 4t;h. ȇ8xY֥(Tс!nK%z && -!*sIa?;䐛E++5-~{ȉu^gəѳ3Z;fg!e':vm -dF\w3hŭRQXY֣J`֟JrfGv ݜlZVIёPs%Sꍽqؽ~x)0>gI2kc7┘藸S#h}gWJOo ot -'Gh_,b8t02]^:tKq+i7\S`֧wZeE09FO!za9 `mVE̕"؇#>GI7vEaJ_xxձk0H#s ~' 2Kh䫽ku2Iƙ* _pb/^8Ԯ 2癩k=V?\ⱌ rbL)u9 0-Eϴ(ն2m0>S$7^RhgtXKEc|& BJWg7qރ[A}9K1Ĉ'vhXzs/i|B_%wh {ncEڈgڣ#Sƞ`YZo -z襪ߠAq24_G9u\8jH0}L0+|1Ka:N:XTwS17{[>8qЎY/nR*Edl#gtrHJԠ{RׁZRBxSr]>`(cXq`OэpoSֵ5S|hJBvS'YuqK }rmdOJ"uٖInkPӳ6k|_1(x㻤7T\GvJ2 ocP}59\k-ˡ>ɷ U2~zfe'65 /'?1a1|&N߲̍ Cǟf4y_HA_‘Vz} PaYRPۑ08(2Պ*EW-b;z4s3 -CP1W!^ӜN?H^p%-8H5ck3/wy l[XԤ79l*Tj6.ɊH;,WyXs{(P%{]3cĈm'%pB>`w_vYGzEwcfP3`(* -{nx-؄;a~ P}`OC`(Lo_/M]YԿA]DCZ&GGes.8L'5*Qi6{km!. p/1 UQ%~82-ŏ9"Ϳqhqb -P9ܬ0EZ,QAɎ/C>Hr /IJ2^eP/UV2IԩU |]SoչZ=' -OnO>|G86!y[# C# Yv'qk甥{Eem`t-J!>xk%;HWӏpEmc;;98j!'F3ħS!> 院n=elRl%饕T@ ր O$FϩB +ڃGFmG2_7Dj_"\h^@fk9fՄe@Y?N=LUT6V}j-c|Ɍi걧wj`&/A4rq30F#IP/DrG -Z6H^yN]HCZvRa2=jzҔq~X^2& - V;E=эH,p`XKL\,b1.3\%"nѤ`D-ƹ'w -/z;P4ڬJ.E;7,1Jzco0YHIA -pltWMV>G!ZA-â* H`n!M3'E {Đ2sL -|~v4i7e_KǜIsF QY~cRfj8(ŵBK-u! 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O,LRdy:<_lwf6T)SM̧Nm)daZAAE(Ԍo=~o7KcevOq OvYrx>ȚFQXos)3yLo]ujt(OcŸ-|70o:z>ԾBM /Ur{_[$8u*l&xӞow-\(և}o:S3 +TuGꙄ6kkk^xг*Ңhr疝 d4zF ϜÚniZŌ/b~ڼcDIcz6ϼoK +> m`\?V6]v4ۀ*]0O = 1((h8'X<{i + iA ;2AD4PTP\{ȔTUTUJϵ]VD| ,6bTS&d_ t4{C@QZyㄺ Sd~97g\!.#N룣D@_E\!&wQj00+&3 XPo:uxya0~un!//(ypJ[Q>QBVDj"TȧZ0AqFQ>{ߓ1dU[NwUMfhbڧ+Dztwy(m5RJ{ݜUz^gΞ_+W)&XN Vth[Jު, f!/՛18Dken3ڰt]l :w1˰oF=~[/?k6FDZ9UhOh5hwA6H#8_uQ\l̨xh nǞJYp>k8RdI$;Lz7v5B1]- Y>`&imFcMiɛBϲlꄕ.~m/E1uoX#?O+"N`sIrih^ƒ\#NG֣bG>J@zs}Q6?۳&3c<д(}l?4Ep᪱5"8qkdUzfOs r6L! ̮L{㤉˙BۯyCN$,BAB<7#{\;t;/>+r=uءRendstream endobj -4204 0 obj -21214 -endobj -4205 0 obj -1636 -endobj -4206 0 obj -19046 -endobj -4207 0 obj -532 -endobj -4208 0 obj -/UCSNPA+URWPalladioL-Bold -endobj -4209 0 obj << +1229 0 obj << +/Type /Font +/Subtype /Type1 +/Encoding 4272 0 R +/FirstChar 39 +/LastChar 118 +/Widths 4275 0 R +/BaseFont /YJVLLV+URWPalladioL-Bold +/FontDescriptor 1227 0 R +>> endobj +1227 0 obj << /Ascent 708 /CapHeight 672 -/Descent -250 -/FontName 4208 0 R +/Descent -266 +/FontName /YJVLLV+URWPalladioL-Bold /ItalicAngle 0 /StemV 123 /XHeight 471 -/FontBBox [ -152 -301 1000 935 ] +/FontBBox [-152 -301 1000 935] /Flags 4 /CharSet (/quoteright/hyphen/period/I/M/U/a/b/e/g/i/l/n/r/s/u/v) -/FontFile 4203 0 R +/FontFile 1228 0 R >> endobj -1192 0 obj << -/Type /Font -/Subtype /Type1 -/Encoding 4185 0 R -/FirstChar 1 -/LastChar 255 -/Widths 4210 0 R -/BaseFont 4216 0 R -/FontDescriptor 4217 0 R ->> endobj -4210 0 obj -[ 250 605 608 167 380 611 291 313 333 0 333 606 0 667 500 333 287 0 0 0 0 0 0 0 0 0 0 0 0 333 208 250 278 371 500 500 840 778 278 333 333 389 606 250 333 250 606 500 500 500 500 500 500 500 500 500 500 250 250 606 606 606 444 747 778 611 709 774 611 556 763 832 337 333 726 611 946 831 786 604 786 668 525 613 778 722 1000 667 667 667 333 606 333 606 500 278 500 553 444 611 479 333 556 582 291 234 556 291 883 582 546 601 560 395 424 326 603 565 834 516 556 500 333 606 333 606 0 0 0 278 500 500 1000 500 500 333 1144 525 331 998 0 0 0 0 0 0 500 500 606 500 1000 333 979 424 331 827 0 0 667 0 278 500 500 500 500 606 500 333 747 333 500 606 333 747 333 400 606 300 300 333 603 628 250 333 300 333 500 750 750 750 444 778 778 778 778 778 778 944 709 611 611 611 611 337 337 337 337 774 831 786 786 786 786 786 606 833 778 778 778 778 667 604 556 500 500 500 500 500 500 758 444 479 479 479 479 287 287 287 287 546 582 546 546 546 546 546 606 556 603 603 603 603 556 601 556 ] +4275 0 obj +[278 0 0 0 0 0 333 250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 389 0 0 0 1000 0 0 0 0 0 0 0 778 0 0 0 0 0 0 0 0 0 0 0 500 611 0 0 500 0 556 0 333 0 0 333 0 611 0 0 0 389 444 0 611 556 ] endobj -4211 0 obj << -/Length 4212 0 R -/Length1 4213 0 R -/Length2 4214 0 R -/Length3 4215 0 R +1220 0 obj << +/Length1 1638 +/Length2 23325 +/Length3 532 +/Length 24240 +/Filter /FlateDecode >> stream -%!PS-AdobeFont-1.0: URWPalladioL-Roma 1.05 -%%CreationDate: Wed Dec 22 1999 -% Copyright (URW)++,Copyright 1999 by (URW)++ Design & Development -% (URW)++,Copyright 1999 by (URW)++ Design & Development -% See the file PUBLIC (Aladdin Free Public License) for license conditions. -% As a special exception, permission is granted to include this font -% program in a Postscript or PDF file that consists of a document that -% contains text to be displayed or printed using this font, regardless -% of the conditions or license applying to the document itself. -12 dict begin -/FontInfo 10 dict dup begin -/version (1.05) readonly def -/Notice ((URW)++,Copyright 1999 by (URW)++ Design & Development. See the file PUBLIC (Aladdin Free Public License) for license conditions. As a special exception, permission is granted to include this font program in a Postscript or PDF file that consists of a document that contains text to be displayed or printed using this font, regardless of the conditions or license applying to the document itself.) readonly def -/Copyright (Copyright (URW)++,Copyright 1999 by (URW)++ Design & Development) readonly def -/FullName (URW Palladio L Roman) readonly def -/FamilyName (URW Palladio L) readonly def -/Weight (Roman) readonly def -/ItalicAngle 0.0 def -/isFixedPitch false def -/UnderlinePosition -100 def -/UnderlineThickness 50 def -end readonly def -/FontName /QPXNWT+URWPalladioL-Roma def -/PaintType 0 def -/WMode 0 def -/FontBBox {-166 -283 1021 943} readonly def -/FontType 1 def -/FontMatrix [0.001 0.0 0.0 0.001 0.0 0.0] readonly def -/Encoding StandardEncoding def -/UniqueID 5021141 def -currentdict end -currentfile eexec -oc;jtD[1ƅpTo9`.:ypJ*l'e}#)&7+/^ W{LZ60VQR^λ3r)#v$p~c&'ſ+ %;v &q?ZUEV[7b~FJOtǪj<ʂ1-Yޱ;l\<܆hV؎GYxx`W5kHZ>1SR@7{WFV[~Ac5r 1Gے$Ȋ8/yUM\T4U3m"0G xTx>|a!Z%aDD`5=itj̪?H)*##qȲpCk*,BqOD1#d*7(S 2:U勧VJ@,#r#jnT*ߧ[ d]1%b`nˏ#i0US?<GբaǀT -H6RI/ -swl!Bwo`_g26S^_dRr!(ȱnW5 i6ی䛉D1ş?X-ܲ[H0}it^B3V* =J'}%Gz(yH&X2L;"CD:v';}BGs<+#iBX4eYBҮ3HVCMuc̀OT+Ƒ8B9 kGS >a,bGV,$r!i#Nl\D5+\WDsm@3klmҳ3p2Ӽ(-iz+h XP840ܢ-Y` Oժ5}]d̈́2\lO$ɯKwxƤZiFQ*c@+&dS=S#~*4RN1nv4X/ن%q=mbv]ӧU^=cӻ; hDc;~7GZ@¶~}gD:IzcPFAٺН8TQzyF4fj 姷\2m9WD]r?CZ6kovqicuGXN҃@vR;%ӌBHLJV0HLCJhEv-0`*+ܱDrIhT{sr=%j5!)+2Z(~$!-Dl-2Xe:>j-aYq"#ȋȎMh#ϞwDa#7NN,2M"Rͨ8eYd@$Oڃ1 -AGѓ좤I%_ >*9!1L94%P_YrvgHjwrYEd1֖AֈUN/2=HylS)[/0mhV&S -'v;E]]*WVV5B;QD .EhHgHt\k|C ET8$>6q_u$3[RaܭسOiGͱD7tOFL7IMJs~h7yy?`jo<(fq -W)nM>lQr5Sۅ!fS+"XTKq=?G,h+d)Ohݵ*h9nޝ hO rZ\'QidAX\hz0̎]ePyWIC%k+$3ʉrЙ31m4e%(qO0 .vKz`SP(@x׳Ġ32EcKn%hΏ!}"ng3 Ŷ)g:1Ѷ] - .@wyW֝\a;``h1^bDVET)&{dJY0$Jh16e;1,|]ϝ^>rzYptDфV\ -$wY%YNm!@rWAh.,U3'+|>!LSɃ=]"H78;d?~0m^\uh{ 4;$Y[B'?=vs% V0F1GѪ )Nbx(sz"_xrBarHśW16^PќfH(p5S0r0+ܤ9bd޸Q RH+PH+?i+U+- -@tP}wUF$\5[y&O$0 O[>WN[ /[ňl;n1=ճ`ǝ}CZ,cĕSD SkbDv^6A7+ڗ,f?[g"Nc? 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/Pages /Count 6 -/Parent 4218 0 R -/Kids [1997 0 R 2046 0 R 2097 0 R 2153 0 R 2206 0 R 2247 0 R] +/Parent 4277 0 R +/Kids [1983 0 R 2032 0 R 2082 0 R 2134 0 R 2183 0 R 2219 0 R] >> endobj -2292 0 obj << +2311 0 obj << /Type /Pages /Count 6 -/Parent 4218 0 R -/Kids [2287 0 R 2339 0 R 2396 0 R 2448 0 R 2490 0 R 2535 0 R] +/Parent 4277 0 R +/Kids [2261 0 R 2313 0 R 2367 0 R 2416 0 R 2455 0 R 2495 0 R] >> endobj -2582 0 obj << +2603 0 obj << /Type /Pages /Count 6 -/Parent 4218 0 R -/Kids [2579 0 R 2631 0 R 2689 0 R 2743 0 R 2781 0 R 2821 0 R] +/Parent 4277 0 R +/Kids [2545 0 R 2605 0 R 2655 0 R 2692 0 R 2728 0 R 2781 0 R] >> endobj -2872 0 obj << +2883 0 obj << /Type /Pages /Count 6 -/Parent 4218 0 R -/Kids [2869 0 R 2927 0 R 2983 0 R 3036 0 R 3081 0 R 3121 0 R] +/Parent 4277 0 R +/Kids [2834 0 R 2885 0 R 2922 0 R 2961 0 R 3013 0 R 3063 0 R] >> endobj -3176 0 obj << +3160 0 obj << /Type /Pages /Count 6 -/Parent 4219 0 R -/Kids [3173 0 R 3240 0 R 3286 0 R 3327 0 R 3394 0 R 3462 0 R] +/Parent 4278 0 R +/Kids [3112 0 R 3162 0 R 3197 0 R 3259 0 R 3323 0 R 3353 0 R] >> endobj -3512 0 obj << +3474 0 obj << /Type /Pages /Count 6 -/Parent 4219 0 R -/Kids [3507 0 R 3554 0 R 3591 0 R 3626 0 R 3678 0 R 3769 0 R] +/Parent 4278 0 R +/Kids [3409 0 R 3476 0 R 3522 0 R 3568 0 R 3617 0 R 3673 0 R] >> endobj -3838 0 obj << +3777 0 obj << /Type /Pages /Count 6 -/Parent 4219 0 R -/Kids [3833 0 R 3895 0 R 3950 0 R 4024 0 R 4071 0 R 4112 0 R] +/Parent 4278 0 R +/Kids [3711 0 R 3779 0 R 3870 0 R 3909 0 R 3988 0 R 4044 0 R] >> endobj -4169 0 obj << +4145 0 obj << /Type /Pages -/Count 2 -/Parent 4219 0 R -/Kids [4166 0 R 4172 0 R] +/Count 4 +/Parent 4278 0 R +/Kids [4093 0 R 4147 0 R 4190 0 R 4263 0 R] >> endobj -4218 0 obj << +4277 0 obj << /Type /Pages /Count 36 -/Parent 4220 0 R -/Kids [1186 0 R 1420 0 R 2002 0 R 2292 0 R 2582 0 R 2872 0 R] +/Parent 4279 0 R +/Kids [1214 0 R 1453 0 R 2030 0 R 2311 0 R 2603 0 R 2883 0 R] >> endobj -4219 0 obj << +4278 0 obj << /Type /Pages -/Count 20 -/Parent 4220 0 R -/Kids [3176 0 R 3512 0 R 3838 0 R 4169 0 R] +/Count 22 +/Parent 4279 0 R +/Kids [3160 0 R 3474 0 R 3777 0 R 4145 0 R] >> endobj -4220 0 obj << +4279 0 obj << /Type /Pages -/Count 56 -/Kids [4218 0 R 4219 0 R] +/Count 58 +/Kids [4277 0 R 4278 0 R] >> endobj -4221 0 obj << +4280 0 obj << /Type /Outlines /First 3 0 R /Last 11 0 R /Count 3 >> endobj +1203 0 obj << +/Title 1204 0 R +/A 1201 0 R +/Parent 1179 0 R +/Prev 1199 0 R +>> endobj +1199 0 obj << +/Title 1200 0 R +/A 1197 0 R +/Parent 1179 0 R +/Prev 1191 0 R +/Next 1203 0 R +>> endobj +1195 0 obj << +/Title 1196 0 R +/A 1193 0 R +/Parent 1191 0 R +>> endobj +1191 0 obj << +/Title 1192 0 R +/A 1189 0 R +/Parent 1179 0 R +/Prev 1187 0 R +/Next 1199 0 R +/First 1195 0 R +/Last 1195 0 R +/Count -1 +>> endobj +1187 0 obj << +/Title 1188 0 R +/A 1185 0 R +/Parent 1179 0 R +/Prev 1183 0 R +/Next 1191 0 R +>> endobj +1183 0 obj << +/Title 1184 0 R +/A 1181 0 R +/Parent 1179 0 R +/Next 1187 0 R +>> endobj +1179 0 obj << +/Title 1180 0 R +/A 1177 0 R +/Parent 11 0 R +/Prev 1151 0 R +/First 1183 0 R +/Last 1203 0 R +/Count -5 +>> endobj 1175 0 obj << /Title 1176 0 R -/A 1174 0 R +/A 1173 0 R /Parent 1151 0 R /Prev 1171 0 R >> endobj 1171 0 obj << /Title 1172 0 R -/A 1170 0 R +/A 1169 0 R /Parent 1151 0 R /Prev 1163 0 R /Next 1175 0 R >> endobj 1167 0 obj << /Title 1168 0 R -/A 1166 0 R +/A 1165 0 R /Parent 1163 0 R >> endobj 1163 0 obj << /Title 1164 0 R -/A 1162 0 R +/A 1161 0 R /Parent 1151 0 R /Prev 1159 0 R /Next 1171 0 R @@ -14132,47 +14039,48 @@ endobj >> endobj 1159 0 obj << /Title 1160 0 R -/A 1158 0 R +/A 1157 0 R /Parent 1151 0 R /Prev 1155 0 R /Next 1163 0 R >> endobj 1155 0 obj << /Title 1156 0 R -/A 1154 0 R +/A 1153 0 R /Parent 1151 0 R /Next 1159 0 R >> endobj 1151 0 obj << /Title 1152 0 R -/A 1150 0 R +/A 1149 0 R /Parent 11 0 R /Prev 1123 0 R +/Next 1179 0 R /First 1155 0 R /Last 1175 0 R /Count -5 >> endobj 1147 0 obj << /Title 1148 0 R -/A 1146 0 R +/A 1145 0 R /Parent 1123 0 R /Prev 1143 0 R >> endobj 1143 0 obj << /Title 1144 0 R -/A 1142 0 R +/A 1141 0 R /Parent 1123 0 R /Prev 1135 0 R /Next 1147 0 R >> endobj 1139 0 obj << /Title 1140 0 R -/A 1138 0 R +/A 1137 0 R /Parent 1135 0 R >> endobj 1135 0 obj << /Title 1136 0 R -/A 1134 0 R +/A 1133 0 R /Parent 1123 0 R /Prev 1131 0 R /Next 1143 0 R @@ -14182,20 +14090,20 @@ endobj >> endobj 1131 0 obj << /Title 1132 0 R -/A 1130 0 R +/A 1129 0 R /Parent 1123 0 R /Prev 1127 0 R /Next 1135 0 R >> endobj 1127 0 obj << /Title 1128 0 R -/A 1126 0 R +/A 1125 0 R /Parent 1123 0 R /Next 1131 0 R >> endobj 1123 0 obj << /Title 1124 0 R -/A 1122 0 R +/A 1121 0 R /Parent 11 0 R /Prev 1095 0 R /Next 1151 0 R @@ -14205,25 +14113,25 @@ endobj >> endobj 1119 0 obj << /Title 1120 0 R -/A 1118 0 R +/A 1117 0 R /Parent 1095 0 R /Prev 1115 0 R >> endobj 1115 0 obj << /Title 1116 0 R -/A 1114 0 R +/A 1113 0 R /Parent 1095 0 R /Prev 1107 0 R /Next 1119 0 R >> endobj 1111 0 obj << /Title 1112 0 R -/A 1110 0 R +/A 1109 0 R /Parent 1107 0 R >> endobj 1107 0 obj << /Title 1108 0 R -/A 1106 0 R +/A 1105 0 R /Parent 1095 0 R /Prev 1103 0 R /Next 1115 0 R @@ -14233,20 +14141,20 @@ endobj >> endobj 1103 0 obj << /Title 1104 0 R -/A 1102 0 R +/A 1101 0 R /Parent 1095 0 R /Prev 1099 0 R /Next 1107 0 R >> endobj 1099 0 obj << /Title 1100 0 R -/A 1098 0 R +/A 1097 0 R /Parent 1095 0 R /Next 1103 0 R >> endobj 1095 0 obj << /Title 1096 0 R -/A 1094 0 R +/A 1093 0 R /Parent 11 0 R /Prev 1067 0 R /Next 1123 0 R @@ -14256,25 +14164,25 @@ endobj >> endobj 1091 0 obj << /Title 1092 0 R -/A 1090 0 R +/A 1089 0 R /Parent 1067 0 R /Prev 1087 0 R >> endobj 1087 0 obj << /Title 1088 0 R -/A 1086 0 R +/A 1085 0 R /Parent 1067 0 R /Prev 1079 0 R /Next 1091 0 R >> endobj 1083 0 obj << /Title 1084 0 R -/A 1082 0 R +/A 1081 0 R /Parent 1079 0 R >> endobj 1079 0 obj << /Title 1080 0 R -/A 1078 0 R +/A 1077 0 R /Parent 1067 0 R /Prev 1075 0 R /Next 1087 0 R @@ -14284,20 +14192,20 @@ endobj >> endobj 1075 0 obj << /Title 1076 0 R -/A 1074 0 R +/A 1073 0 R /Parent 1067 0 R /Prev 1071 0 R /Next 1079 0 R >> endobj 1071 0 obj << /Title 1072 0 R -/A 1070 0 R +/A 1069 0 R /Parent 1067 0 R /Next 1075 0 R >> endobj 1067 0 obj << /Title 1068 0 R -/A 1066 0 R +/A 1065 0 R /Parent 11 0 R /Prev 1039 0 R /Next 1095 0 R @@ -14307,25 +14215,25 @@ endobj >> endobj 1063 0 obj << /Title 1064 0 R -/A 1062 0 R +/A 1061 0 R /Parent 1039 0 R /Prev 1059 0 R >> endobj 1059 0 obj << /Title 1060 0 R -/A 1058 0 R +/A 1057 0 R /Parent 1039 0 R /Prev 1051 0 R /Next 1063 0 R >> endobj 1055 0 obj << /Title 1056 0 R -/A 1054 0 R +/A 1053 0 R /Parent 1051 0 R >> endobj 1051 0 obj << /Title 1052 0 R -/A 1050 0 R +/A 1049 0 R /Parent 1039 0 R /Prev 1047 0 R /Next 1059 0 R @@ -14335,20 +14243,20 @@ endobj >> endobj 1047 0 obj << /Title 1048 0 R -/A 1046 0 R +/A 1045 0 R /Parent 1039 0 R /Prev 1043 0 R /Next 1051 0 R >> endobj 1043 0 obj << /Title 1044 0 R -/A 1042 0 R +/A 1041 0 R /Parent 1039 0 R /Next 1047 0 R >> endobj 1039 0 obj << /Title 1040 0 R -/A 1038 0 R +/A 1037 0 R /Parent 11 0 R /Prev 1011 0 R /Next 1067 0 R @@ -14358,25 +14266,25 @@ endobj >> endobj 1035 0 obj << /Title 1036 0 R -/A 1034 0 R +/A 1033 0 R /Parent 1011 0 R /Prev 1031 0 R >> endobj 1031 0 obj << /Title 1032 0 R -/A 1030 0 R +/A 1029 0 R /Parent 1011 0 R /Prev 1023 0 R /Next 1035 0 R >> endobj 1027 0 obj << /Title 1028 0 R -/A 1026 0 R +/A 1025 0 R /Parent 1023 0 R >> endobj 1023 0 obj << /Title 1024 0 R -/A 1022 0 R +/A 1021 0 R /Parent 1011 0 R /Prev 1019 0 R /Next 1031 0 R @@ -14386,20 +14294,20 @@ endobj >> endobj 1019 0 obj << /Title 1020 0 R -/A 1018 0 R +/A 1017 0 R /Parent 1011 0 R /Prev 1015 0 R /Next 1023 0 R >> endobj 1015 0 obj << /Title 1016 0 R -/A 1014 0 R +/A 1013 0 R /Parent 1011 0 R /Next 1019 0 R >> endobj 1011 0 obj << /Title 1012 0 R -/A 1010 0 R +/A 1009 0 R /Parent 11 0 R /Prev 979 0 R /Next 1039 0 R @@ -14409,32 +14317,32 @@ endobj >> endobj 1007 0 obj << /Title 1008 0 R -/A 1006 0 R +/A 1005 0 R /Parent 979 0 R /Prev 1003 0 R >> endobj 1003 0 obj << /Title 1004 0 R -/A 1002 0 R +/A 1001 0 R /Parent 979 0 R /Prev 991 0 R /Next 1007 0 R >> endobj 999 0 obj << /Title 1000 0 R -/A 998 0 R +/A 997 0 R /Parent 991 0 R /Prev 995 0 R >> endobj 995 0 obj << /Title 996 0 R -/A 994 0 R +/A 993 0 R /Parent 991 0 R /Next 999 0 R >> endobj 991 0 obj << /Title 992 0 R -/A 990 0 R +/A 989 0 R /Parent 979 0 R /Prev 987 0 R /Next 1003 0 R @@ -14444,20 +14352,20 @@ endobj >> endobj 987 0 obj << /Title 988 0 R -/A 986 0 R +/A 985 0 R /Parent 979 0 R /Prev 983 0 R /Next 991 0 R >> endobj 983 0 obj << /Title 984 0 R -/A 982 0 R +/A 981 0 R /Parent 979 0 R /Next 987 0 R >> endobj 979 0 obj << /Title 980 0 R -/A 978 0 R +/A 977 0 R /Parent 11 0 R /Prev 947 0 R /Next 1011 0 R @@ -14467,32 +14375,32 @@ endobj >> endobj 975 0 obj << /Title 976 0 R -/A 974 0 R +/A 973 0 R /Parent 947 0 R /Prev 971 0 R >> endobj 971 0 obj << /Title 972 0 R -/A 970 0 R +/A 969 0 R /Parent 947 0 R /Prev 959 0 R /Next 975 0 R >> endobj 967 0 obj << /Title 968 0 R -/A 966 0 R +/A 965 0 R /Parent 959 0 R /Prev 963 0 R >> endobj 963 0 obj << /Title 964 0 R -/A 962 0 R +/A 961 0 R /Parent 959 0 R /Next 967 0 R >> endobj 959 0 obj << /Title 960 0 R -/A 958 0 R +/A 957 0 R /Parent 947 0 R /Prev 955 0 R /Next 971 0 R @@ -14502,20 +14410,20 @@ endobj >> endobj 955 0 obj << /Title 956 0 R -/A 954 0 R +/A 953 0 R /Parent 947 0 R /Prev 951 0 R /Next 959 0 R >> endobj 951 0 obj << /Title 952 0 R -/A 950 0 R +/A 949 0 R /Parent 947 0 R /Next 955 0 R >> endobj 947 0 obj << /Title 948 0 R -/A 946 0 R +/A 945 0 R /Parent 11 0 R /Prev 915 0 R /Next 979 0 R @@ -14525,32 +14433,32 @@ endobj >> endobj 943 0 obj << /Title 944 0 R -/A 942 0 R +/A 941 0 R /Parent 915 0 R /Prev 939 0 R >> endobj 939 0 obj << /Title 940 0 R -/A 938 0 R +/A 937 0 R /Parent 915 0 R /Prev 927 0 R /Next 943 0 R >> endobj 935 0 obj << /Title 936 0 R -/A 934 0 R +/A 933 0 R /Parent 927 0 R /Prev 931 0 R >> endobj 931 0 obj << /Title 932 0 R -/A 930 0 R +/A 929 0 R /Parent 927 0 R /Next 935 0 R >> endobj 927 0 obj << /Title 928 0 R -/A 926 0 R +/A 925 0 R /Parent 915 0 R /Prev 923 0 R /Next 939 0 R @@ -14560,20 +14468,20 @@ endobj >> endobj 923 0 obj << /Title 924 0 R -/A 922 0 R +/A 921 0 R /Parent 915 0 R /Prev 919 0 R /Next 927 0 R >> endobj 919 0 obj << /Title 920 0 R -/A 918 0 R +/A 917 0 R /Parent 915 0 R /Next 923 0 R >> endobj 915 0 obj << /Title 916 0 R -/A 914 0 R +/A 913 0 R /Parent 11 0 R /Prev 883 0 R /Next 947 0 R @@ -14583,32 +14491,32 @@ endobj >> endobj 911 0 obj << /Title 912 0 R -/A 910 0 R +/A 909 0 R /Parent 883 0 R /Prev 907 0 R >> endobj 907 0 obj << /Title 908 0 R -/A 906 0 R +/A 905 0 R /Parent 883 0 R /Prev 895 0 R /Next 911 0 R >> endobj 903 0 obj << /Title 904 0 R -/A 902 0 R +/A 901 0 R /Parent 895 0 R /Prev 899 0 R >> endobj 899 0 obj << /Title 900 0 R -/A 898 0 R +/A 897 0 R /Parent 895 0 R /Next 903 0 R >> endobj 895 0 obj << /Title 896 0 R -/A 894 0 R +/A 893 0 R /Parent 883 0 R /Prev 891 0 R /Next 907 0 R @@ -14618,20 +14526,20 @@ endobj >> endobj 891 0 obj << /Title 892 0 R -/A 890 0 R +/A 889 0 R /Parent 883 0 R /Prev 887 0 R /Next 895 0 R >> endobj 887 0 obj << /Title 888 0 R -/A 886 0 R +/A 885 0 R /Parent 883 0 R /Next 891 0 R >> endobj 883 0 obj << /Title 884 0 R -/A 882 0 R +/A 881 0 R /Parent 11 0 R /Prev 855 0 R /Next 915 0 R @@ -14641,25 +14549,25 @@ endobj >> endobj 879 0 obj << /Title 880 0 R -/A 878 0 R +/A 877 0 R /Parent 855 0 R /Prev 875 0 R >> endobj 875 0 obj << /Title 876 0 R -/A 874 0 R +/A 873 0 R /Parent 855 0 R /Prev 867 0 R /Next 879 0 R >> endobj 871 0 obj << /Title 872 0 R -/A 870 0 R +/A 869 0 R /Parent 867 0 R >> endobj 867 0 obj << /Title 868 0 R -/A 866 0 R +/A 865 0 R /Parent 855 0 R /Prev 863 0 R /Next 875 0 R @@ -14669,20 +14577,20 @@ endobj >> endobj 863 0 obj << /Title 864 0 R -/A 862 0 R +/A 861 0 R /Parent 855 0 R /Prev 859 0 R /Next 867 0 R >> endobj 859 0 obj << /Title 860 0 R -/A 858 0 R +/A 857 0 R /Parent 855 0 R /Next 863 0 R >> endobj 855 0 obj << /Title 856 0 R -/A 854 0 R +/A 853 0 R /Parent 11 0 R /Prev 827 0 R /Next 883 0 R @@ -14692,25 +14600,25 @@ endobj >> endobj 851 0 obj << /Title 852 0 R -/A 850 0 R +/A 849 0 R /Parent 827 0 R /Prev 847 0 R >> endobj 847 0 obj << /Title 848 0 R -/A 846 0 R +/A 845 0 R /Parent 827 0 R /Prev 839 0 R /Next 851 0 R >> endobj 843 0 obj << /Title 844 0 R -/A 842 0 R +/A 841 0 R /Parent 839 0 R >> endobj 839 0 obj << /Title 840 0 R -/A 838 0 R +/A 837 0 R /Parent 827 0 R /Prev 835 0 R /Next 847 0 R @@ -14720,20 +14628,20 @@ endobj >> endobj 835 0 obj << /Title 836 0 R -/A 834 0 R +/A 833 0 R /Parent 827 0 R /Prev 831 0 R /Next 839 0 R >> endobj 831 0 obj << /Title 832 0 R -/A 830 0 R +/A 829 0 R /Parent 827 0 R /Next 835 0 R >> endobj 827 0 obj << /Title 828 0 R -/A 826 0 R +/A 825 0 R /Parent 11 0 R /Prev 795 0 R /Next 855 0 R @@ -14743,32 +14651,32 @@ endobj >> endobj 823 0 obj << /Title 824 0 R -/A 822 0 R +/A 821 0 R /Parent 795 0 R /Prev 819 0 R >> endobj 819 0 obj << /Title 820 0 R -/A 818 0 R +/A 817 0 R /Parent 795 0 R /Prev 807 0 R /Next 823 0 R >> endobj 815 0 obj << /Title 816 0 R -/A 814 0 R +/A 813 0 R /Parent 807 0 R /Prev 811 0 R >> endobj 811 0 obj << /Title 812 0 R -/A 810 0 R +/A 809 0 R /Parent 807 0 R /Next 815 0 R >> endobj 807 0 obj << /Title 808 0 R -/A 806 0 R +/A 805 0 R /Parent 795 0 R /Prev 803 0 R /Next 819 0 R @@ -14778,20 +14686,20 @@ endobj >> endobj 803 0 obj << /Title 804 0 R -/A 802 0 R +/A 801 0 R /Parent 795 0 R /Prev 799 0 R /Next 807 0 R >> endobj 799 0 obj << /Title 800 0 R -/A 798 0 R +/A 797 0 R /Parent 795 0 R /Next 803 0 R >> endobj 795 0 obj << /Title 796 0 R -/A 794 0 R +/A 793 0 R /Parent 11 0 R /Prev 763 0 R /Next 827 0 R @@ -14801,32 +14709,32 @@ endobj >> endobj 791 0 obj << /Title 792 0 R -/A 790 0 R +/A 789 0 R /Parent 763 0 R /Prev 787 0 R >> endobj 787 0 obj << /Title 788 0 R -/A 786 0 R +/A 785 0 R /Parent 763 0 R /Prev 775 0 R /Next 791 0 R >> endobj 783 0 obj << /Title 784 0 R -/A 782 0 R +/A 781 0 R /Parent 775 0 R /Prev 779 0 R >> endobj 779 0 obj << /Title 780 0 R -/A 778 0 R +/A 777 0 R /Parent 775 0 R /Next 783 0 R >> endobj 775 0 obj << /Title 776 0 R -/A 774 0 R +/A 773 0 R /Parent 763 0 R /Prev 771 0 R /Next 787 0 R @@ -14836,20 +14744,20 @@ endobj >> endobj 771 0 obj << /Title 772 0 R -/A 770 0 R +/A 769 0 R /Parent 763 0 R /Prev 767 0 R /Next 775 0 R >> endobj 767 0 obj << /Title 768 0 R -/A 766 0 R +/A 765 0 R /Parent 763 0 R /Next 771 0 R >> endobj 763 0 obj << /Title 764 0 R -/A 762 0 R +/A 761 0 R /Parent 11 0 R /Prev 731 0 R /Next 795 0 R @@ -14859,32 +14767,32 @@ endobj >> endobj 759 0 obj << /Title 760 0 R -/A 758 0 R +/A 757 0 R /Parent 731 0 R /Prev 755 0 R >> endobj 755 0 obj << /Title 756 0 R -/A 754 0 R +/A 753 0 R /Parent 731 0 R /Prev 743 0 R /Next 759 0 R >> endobj 751 0 obj << /Title 752 0 R -/A 750 0 R +/A 749 0 R /Parent 743 0 R /Prev 747 0 R >> endobj 747 0 obj << /Title 748 0 R -/A 746 0 R +/A 745 0 R /Parent 743 0 R /Next 751 0 R >> endobj 743 0 obj << /Title 744 0 R -/A 742 0 R +/A 741 0 R /Parent 731 0 R /Prev 739 0 R /Next 755 0 R @@ -14894,20 +14802,20 @@ endobj >> endobj 739 0 obj << /Title 740 0 R -/A 738 0 R +/A 737 0 R /Parent 731 0 R /Prev 735 0 R /Next 743 0 R >> endobj 735 0 obj << /Title 736 0 R -/A 734 0 R +/A 733 0 R /Parent 731 0 R /Next 739 0 R >> endobj 731 0 obj << /Title 732 0 R -/A 730 0 R +/A 729 0 R /Parent 11 0 R /Prev 699 0 R /Next 763 0 R @@ -14917,32 +14825,32 @@ endobj >> endobj 727 0 obj << /Title 728 0 R -/A 726 0 R +/A 725 0 R /Parent 699 0 R /Prev 723 0 R >> endobj 723 0 obj << /Title 724 0 R -/A 722 0 R +/A 721 0 R /Parent 699 0 R /Prev 711 0 R /Next 727 0 R >> endobj 719 0 obj << /Title 720 0 R -/A 718 0 R +/A 717 0 R /Parent 711 0 R /Prev 715 0 R >> endobj 715 0 obj << /Title 716 0 R -/A 714 0 R +/A 713 0 R /Parent 711 0 R /Next 719 0 R >> endobj 711 0 obj << /Title 712 0 R -/A 710 0 R +/A 709 0 R /Parent 699 0 R /Prev 707 0 R /Next 723 0 R @@ -14952,20 +14860,20 @@ endobj >> endobj 707 0 obj << /Title 708 0 R -/A 706 0 R +/A 705 0 R /Parent 699 0 R /Prev 703 0 R /Next 711 0 R >> endobj 703 0 obj << /Title 704 0 R -/A 702 0 R +/A 701 0 R /Parent 699 0 R /Next 707 0 R >> endobj 699 0 obj << /Title 700 0 R -/A 698 0 R +/A 697 0 R /Parent 11 0 R /Prev 667 0 R /Next 731 0 R @@ -14975,32 +14883,32 @@ endobj >> endobj 695 0 obj << /Title 696 0 R -/A 694 0 R +/A 693 0 R /Parent 667 0 R /Prev 691 0 R >> endobj 691 0 obj << /Title 692 0 R -/A 690 0 R +/A 689 0 R /Parent 667 0 R /Prev 679 0 R /Next 695 0 R >> endobj 687 0 obj << /Title 688 0 R -/A 686 0 R +/A 685 0 R /Parent 679 0 R /Prev 683 0 R >> endobj 683 0 obj << /Title 684 0 R -/A 682 0 R +/A 681 0 R /Parent 679 0 R /Next 687 0 R >> endobj 679 0 obj << /Title 680 0 R -/A 678 0 R +/A 677 0 R /Parent 667 0 R /Prev 675 0 R /Next 691 0 R @@ -15010,20 +14918,20 @@ endobj >> endobj 675 0 obj << /Title 676 0 R -/A 674 0 R +/A 673 0 R /Parent 667 0 R /Prev 671 0 R /Next 679 0 R >> endobj 671 0 obj << /Title 672 0 R -/A 670 0 R +/A 669 0 R /Parent 667 0 R /Next 675 0 R >> endobj 667 0 obj << /Title 668 0 R -/A 666 0 R +/A 665 0 R /Parent 11 0 R /Prev 635 0 R /Next 699 0 R @@ -15033,32 +14941,32 @@ endobj >> endobj 663 0 obj << /Title 664 0 R -/A 662 0 R +/A 661 0 R /Parent 635 0 R /Prev 659 0 R >> endobj 659 0 obj << /Title 660 0 R -/A 658 0 R +/A 657 0 R /Parent 635 0 R /Prev 647 0 R /Next 663 0 R >> endobj 655 0 obj << /Title 656 0 R -/A 654 0 R +/A 653 0 R /Parent 647 0 R /Prev 651 0 R >> endobj 651 0 obj << /Title 652 0 R -/A 650 0 R +/A 649 0 R /Parent 647 0 R /Next 655 0 R >> endobj 647 0 obj << /Title 648 0 R -/A 646 0 R +/A 645 0 R /Parent 635 0 R /Prev 643 0 R /Next 659 0 R @@ -15068,20 +14976,20 @@ endobj >> endobj 643 0 obj << /Title 644 0 R -/A 642 0 R +/A 641 0 R /Parent 635 0 R /Prev 639 0 R /Next 647 0 R >> endobj 639 0 obj << /Title 640 0 R -/A 638 0 R +/A 637 0 R /Parent 635 0 R /Next 643 0 R >> endobj 635 0 obj << /Title 636 0 R -/A 634 0 R +/A 633 0 R /Parent 11 0 R /Prev 603 0 R /Next 667 0 R @@ -15091,32 +14999,32 @@ endobj >> endobj 631 0 obj << /Title 632 0 R -/A 630 0 R +/A 629 0 R /Parent 603 0 R /Prev 627 0 R >> endobj 627 0 obj << /Title 628 0 R -/A 626 0 R +/A 625 0 R /Parent 603 0 R /Prev 615 0 R /Next 631 0 R >> endobj 623 0 obj << /Title 624 0 R -/A 622 0 R +/A 621 0 R /Parent 615 0 R /Prev 619 0 R >> endobj 619 0 obj << /Title 620 0 R -/A 618 0 R +/A 617 0 R /Parent 615 0 R /Next 623 0 R >> endobj 615 0 obj << /Title 616 0 R -/A 614 0 R +/A 613 0 R /Parent 603 0 R /Prev 611 0 R /Next 627 0 R @@ -15126,20 +15034,20 @@ endobj >> endobj 611 0 obj << /Title 612 0 R -/A 610 0 R +/A 609 0 R /Parent 603 0 R /Prev 607 0 R /Next 615 0 R >> endobj 607 0 obj << /Title 608 0 R -/A 606 0 R +/A 605 0 R /Parent 603 0 R /Next 611 0 R >> endobj 603 0 obj << /Title 604 0 R -/A 602 0 R +/A 601 0 R /Parent 11 0 R /Prev 571 0 R /Next 635 0 R @@ -15149,32 +15057,32 @@ endobj >> endobj 599 0 obj << /Title 600 0 R -/A 598 0 R +/A 597 0 R /Parent 571 0 R /Prev 595 0 R >> endobj 595 0 obj << /Title 596 0 R -/A 594 0 R +/A 593 0 R /Parent 571 0 R /Prev 583 0 R /Next 599 0 R >> endobj 591 0 obj << /Title 592 0 R -/A 590 0 R +/A 589 0 R /Parent 583 0 R /Prev 587 0 R >> endobj 587 0 obj << /Title 588 0 R -/A 586 0 R +/A 585 0 R /Parent 583 0 R /Next 591 0 R >> endobj 583 0 obj << /Title 584 0 R -/A 582 0 R +/A 581 0 R /Parent 571 0 R /Prev 579 0 R /Next 595 0 R @@ -15184,20 +15092,20 @@ endobj >> endobj 579 0 obj << /Title 580 0 R -/A 578 0 R +/A 577 0 R /Parent 571 0 R /Prev 575 0 R /Next 583 0 R >> endobj 575 0 obj << /Title 576 0 R -/A 574 0 R +/A 573 0 R /Parent 571 0 R /Next 579 0 R >> endobj 571 0 obj << /Title 572 0 R -/A 570 0 R +/A 569 0 R /Parent 11 0 R /Prev 539 0 R /Next 603 0 R @@ -15207,32 +15115,32 @@ endobj >> endobj 567 0 obj << /Title 568 0 R -/A 566 0 R +/A 565 0 R /Parent 539 0 R /Prev 563 0 R >> endobj 563 0 obj << /Title 564 0 R -/A 562 0 R +/A 561 0 R /Parent 539 0 R /Prev 551 0 R /Next 567 0 R >> endobj 559 0 obj << /Title 560 0 R -/A 558 0 R +/A 557 0 R /Parent 551 0 R /Prev 555 0 R >> endobj 555 0 obj << /Title 556 0 R -/A 554 0 R +/A 553 0 R /Parent 551 0 R /Next 559 0 R >> endobj 551 0 obj << /Title 552 0 R -/A 550 0 R +/A 549 0 R /Parent 539 0 R /Prev 547 0 R /Next 563 0 R @@ -15242,20 +15150,20 @@ endobj >> endobj 547 0 obj << /Title 548 0 R -/A 546 0 R +/A 545 0 R /Parent 539 0 R /Prev 543 0 R /Next 551 0 R >> endobj 543 0 obj << /Title 544 0 R -/A 542 0 R +/A 541 0 R /Parent 539 0 R /Next 547 0 R >> endobj 539 0 obj << /Title 540 0 R -/A 538 0 R +/A 537 0 R /Parent 11 0 R /Prev 507 0 R /Next 571 0 R @@ -15265,32 +15173,32 @@ endobj >> endobj 535 0 obj << /Title 536 0 R -/A 534 0 R +/A 533 0 R /Parent 507 0 R /Prev 531 0 R >> endobj 531 0 obj << /Title 532 0 R -/A 530 0 R +/A 529 0 R /Parent 507 0 R /Prev 519 0 R /Next 535 0 R >> endobj 527 0 obj << /Title 528 0 R -/A 526 0 R +/A 525 0 R /Parent 519 0 R /Prev 523 0 R >> endobj 523 0 obj << /Title 524 0 R -/A 522 0 R +/A 521 0 R /Parent 519 0 R /Next 527 0 R >> endobj 519 0 obj << /Title 520 0 R -/A 518 0 R +/A 517 0 R /Parent 507 0 R /Prev 515 0 R /Next 531 0 R @@ -15300,20 +15208,20 @@ endobj >> endobj 515 0 obj << /Title 516 0 R -/A 514 0 R +/A 513 0 R /Parent 507 0 R /Prev 511 0 R /Next 519 0 R >> endobj 511 0 obj << /Title 512 0 R -/A 510 0 R +/A 509 0 R /Parent 507 0 R /Next 515 0 R >> endobj 507 0 obj << /Title 508 0 R -/A 506 0 R +/A 505 0 R /Parent 11 0 R /Prev 475 0 R /Next 539 0 R @@ -15323,32 +15231,32 @@ endobj >> endobj 503 0 obj << /Title 504 0 R -/A 502 0 R +/A 501 0 R /Parent 475 0 R /Prev 499 0 R >> endobj 499 0 obj << /Title 500 0 R -/A 498 0 R +/A 497 0 R /Parent 475 0 R /Prev 487 0 R /Next 503 0 R >> endobj 495 0 obj << /Title 496 0 R -/A 494 0 R +/A 493 0 R /Parent 487 0 R /Prev 491 0 R >> endobj 491 0 obj << /Title 492 0 R -/A 490 0 R +/A 489 0 R /Parent 487 0 R /Next 495 0 R >> endobj 487 0 obj << /Title 488 0 R -/A 486 0 R +/A 485 0 R /Parent 475 0 R /Prev 483 0 R /Next 499 0 R @@ -15358,20 +15266,20 @@ endobj >> endobj 483 0 obj << /Title 484 0 R -/A 482 0 R +/A 481 0 R /Parent 475 0 R /Prev 479 0 R /Next 487 0 R >> endobj 479 0 obj << /Title 480 0 R -/A 478 0 R +/A 477 0 R /Parent 475 0 R /Next 483 0 R >> endobj 475 0 obj << /Title 476 0 R -/A 474 0 R +/A 473 0 R /Parent 11 0 R /Prev 443 0 R /Next 507 0 R @@ -15381,32 +15289,32 @@ endobj >> endobj 471 0 obj << /Title 472 0 R -/A 470 0 R +/A 469 0 R /Parent 443 0 R /Prev 467 0 R >> endobj 467 0 obj << /Title 468 0 R -/A 466 0 R +/A 465 0 R /Parent 443 0 R /Prev 455 0 R /Next 471 0 R >> endobj 463 0 obj << /Title 464 0 R -/A 462 0 R +/A 461 0 R /Parent 455 0 R /Prev 459 0 R >> endobj 459 0 obj << /Title 460 0 R -/A 458 0 R +/A 457 0 R /Parent 455 0 R /Next 463 0 R >> endobj 455 0 obj << /Title 456 0 R -/A 454 0 R +/A 453 0 R /Parent 443 0 R /Prev 451 0 R /Next 467 0 R @@ -15416,20 +15324,20 @@ endobj >> endobj 451 0 obj << /Title 452 0 R -/A 450 0 R +/A 449 0 R /Parent 443 0 R /Prev 447 0 R /Next 455 0 R >> endobj 447 0 obj << /Title 448 0 R -/A 446 0 R +/A 445 0 R /Parent 443 0 R /Next 451 0 R >> endobj 443 0 obj << /Title 444 0 R -/A 442 0 R +/A 441 0 R /Parent 11 0 R /Prev 411 0 R /Next 475 0 R @@ -15439,32 +15347,32 @@ endobj >> endobj 439 0 obj << /Title 440 0 R -/A 438 0 R +/A 437 0 R /Parent 411 0 R /Prev 435 0 R >> endobj 435 0 obj << /Title 436 0 R -/A 434 0 R +/A 433 0 R /Parent 411 0 R /Prev 423 0 R /Next 439 0 R >> endobj 431 0 obj << /Title 432 0 R -/A 430 0 R +/A 429 0 R /Parent 423 0 R /Prev 427 0 R >> endobj 427 0 obj << /Title 428 0 R -/A 426 0 R +/A 425 0 R /Parent 423 0 R /Next 431 0 R >> endobj 423 0 obj << /Title 424 0 R -/A 422 0 R +/A 421 0 R /Parent 411 0 R /Prev 419 0 R /Next 435 0 R @@ -15474,20 +15382,20 @@ endobj >> endobj 419 0 obj << /Title 420 0 R -/A 418 0 R +/A 417 0 R /Parent 411 0 R /Prev 415 0 R /Next 423 0 R >> endobj 415 0 obj << /Title 416 0 R -/A 414 0 R +/A 413 0 R /Parent 411 0 R /Next 419 0 R >> endobj 411 0 obj << /Title 412 0 R -/A 410 0 R +/A 409 0 R /Parent 11 0 R /Prev 379 0 R /Next 443 0 R @@ -15497,32 +15405,32 @@ endobj >> endobj 407 0 obj << /Title 408 0 R -/A 406 0 R +/A 405 0 R /Parent 379 0 R /Prev 403 0 R >> endobj 403 0 obj << /Title 404 0 R -/A 402 0 R +/A 401 0 R /Parent 379 0 R /Prev 391 0 R /Next 407 0 R >> endobj 399 0 obj << /Title 400 0 R -/A 398 0 R +/A 397 0 R /Parent 391 0 R /Prev 395 0 R >> endobj 395 0 obj << /Title 396 0 R -/A 394 0 R +/A 393 0 R /Parent 391 0 R /Next 399 0 R >> endobj 391 0 obj << /Title 392 0 R -/A 390 0 R +/A 389 0 R /Parent 379 0 R /Prev 387 0 R /Next 403 0 R @@ -15532,20 +15440,20 @@ endobj >> endobj 387 0 obj << /Title 388 0 R -/A 386 0 R +/A 385 0 R /Parent 379 0 R /Prev 383 0 R /Next 391 0 R >> endobj 383 0 obj << /Title 384 0 R -/A 382 0 R +/A 381 0 R /Parent 379 0 R /Next 387 0 R >> endobj 379 0 obj << /Title 380 0 R -/A 378 0 R +/A 377 0 R /Parent 11 0 R /Prev 347 0 R /Next 411 0 R @@ -15555,32 +15463,32 @@ endobj >> endobj 375 0 obj << /Title 376 0 R -/A 374 0 R +/A 373 0 R /Parent 347 0 R /Prev 371 0 R >> endobj 371 0 obj << /Title 372 0 R -/A 370 0 R +/A 369 0 R /Parent 347 0 R /Prev 359 0 R /Next 375 0 R >> endobj 367 0 obj << /Title 368 0 R -/A 366 0 R +/A 365 0 R /Parent 359 0 R /Prev 363 0 R >> endobj 363 0 obj << /Title 364 0 R -/A 362 0 R +/A 361 0 R /Parent 359 0 R /Next 367 0 R >> endobj 359 0 obj << /Title 360 0 R -/A 358 0 R +/A 357 0 R /Parent 347 0 R /Prev 355 0 R /Next 371 0 R @@ -15590,20 +15498,20 @@ endobj >> endobj 355 0 obj << /Title 356 0 R -/A 354 0 R +/A 353 0 R /Parent 347 0 R /Prev 351 0 R /Next 359 0 R >> endobj 351 0 obj << /Title 352 0 R -/A 350 0 R +/A 349 0 R /Parent 347 0 R /Next 355 0 R >> endobj 347 0 obj << /Title 348 0 R -/A 346 0 R +/A 345 0 R /Parent 11 0 R /Prev 315 0 R /Next 379 0 R @@ -15613,32 +15521,32 @@ endobj >> endobj 343 0 obj << /Title 344 0 R -/A 342 0 R +/A 341 0 R /Parent 315 0 R /Prev 339 0 R >> endobj 339 0 obj << /Title 340 0 R -/A 338 0 R +/A 337 0 R /Parent 315 0 R /Prev 327 0 R /Next 343 0 R >> endobj 335 0 obj << /Title 336 0 R -/A 334 0 R +/A 333 0 R /Parent 327 0 R /Prev 331 0 R >> endobj 331 0 obj << /Title 332 0 R -/A 330 0 R +/A 329 0 R /Parent 327 0 R /Next 335 0 R >> endobj 327 0 obj << /Title 328 0 R -/A 326 0 R +/A 325 0 R /Parent 315 0 R /Prev 323 0 R /Next 339 0 R @@ -15648,20 +15556,20 @@ endobj >> endobj 323 0 obj << /Title 324 0 R -/A 322 0 R +/A 321 0 R /Parent 315 0 R /Prev 319 0 R /Next 327 0 R >> endobj 319 0 obj << /Title 320 0 R -/A 318 0 R +/A 317 0 R /Parent 315 0 R /Next 323 0 R >> endobj 315 0 obj << /Title 316 0 R -/A 314 0 R +/A 313 0 R /Parent 11 0 R /Prev 283 0 R /Next 347 0 R @@ -15671,32 +15579,32 @@ endobj >> endobj 311 0 obj << /Title 312 0 R -/A 310 0 R +/A 309 0 R /Parent 283 0 R /Prev 307 0 R >> endobj 307 0 obj << /Title 308 0 R -/A 306 0 R +/A 305 0 R /Parent 283 0 R /Prev 295 0 R /Next 311 0 R >> endobj 303 0 obj << /Title 304 0 R -/A 302 0 R +/A 301 0 R /Parent 295 0 R /Prev 299 0 R >> endobj 299 0 obj << /Title 300 0 R -/A 298 0 R +/A 297 0 R /Parent 295 0 R /Next 303 0 R >> endobj 295 0 obj << /Title 296 0 R -/A 294 0 R +/A 293 0 R /Parent 283 0 R /Prev 291 0 R /Next 307 0 R @@ -15706,20 +15614,20 @@ endobj >> endobj 291 0 obj << /Title 292 0 R -/A 290 0 R +/A 289 0 R /Parent 283 0 R /Prev 287 0 R /Next 295 0 R >> endobj 287 0 obj << /Title 288 0 R -/A 286 0 R +/A 285 0 R /Parent 283 0 R /Next 291 0 R >> endobj 283 0 obj << /Title 284 0 R -/A 282 0 R +/A 281 0 R /Parent 11 0 R /Prev 251 0 R /Next 315 0 R @@ -15729,32 +15637,32 @@ endobj >> endobj 279 0 obj << /Title 280 0 R -/A 278 0 R +/A 277 0 R /Parent 251 0 R /Prev 275 0 R >> endobj 275 0 obj << /Title 276 0 R -/A 274 0 R +/A 273 0 R /Parent 251 0 R /Prev 263 0 R /Next 279 0 R >> endobj 271 0 obj << /Title 272 0 R -/A 270 0 R +/A 269 0 R /Parent 263 0 R /Prev 267 0 R >> endobj 267 0 obj << /Title 268 0 R -/A 266 0 R +/A 265 0 R /Parent 263 0 R /Next 271 0 R >> endobj 263 0 obj << /Title 264 0 R -/A 262 0 R +/A 261 0 R /Parent 251 0 R /Prev 259 0 R /Next 275 0 R @@ -15764,20 +15672,20 @@ endobj >> endobj 259 0 obj << /Title 260 0 R -/A 258 0 R +/A 257 0 R /Parent 251 0 R /Prev 255 0 R /Next 263 0 R >> endobj 255 0 obj << /Title 256 0 R -/A 254 0 R +/A 253 0 R /Parent 251 0 R /Next 259 0 R >> endobj 251 0 obj << /Title 252 0 R -/A 250 0 R +/A 249 0 R /Parent 11 0 R /Prev 219 0 R /Next 283 0 R @@ -15787,32 +15695,32 @@ endobj >> endobj 247 0 obj << /Title 248 0 R -/A 246 0 R +/A 245 0 R /Parent 219 0 R /Prev 243 0 R >> endobj 243 0 obj << /Title 244 0 R -/A 242 0 R +/A 241 0 R /Parent 219 0 R /Prev 231 0 R /Next 247 0 R >> endobj 239 0 obj << /Title 240 0 R -/A 238 0 R +/A 237 0 R /Parent 231 0 R /Prev 235 0 R >> endobj 235 0 obj << /Title 236 0 R -/A 234 0 R +/A 233 0 R /Parent 231 0 R /Next 239 0 R >> endobj 231 0 obj << /Title 232 0 R -/A 230 0 R +/A 229 0 R /Parent 219 0 R /Prev 227 0 R /Next 243 0 R @@ -15822,20 +15730,20 @@ endobj >> endobj 227 0 obj << /Title 228 0 R -/A 226 0 R +/A 225 0 R /Parent 219 0 R /Prev 223 0 R /Next 231 0 R >> endobj 223 0 obj << /Title 224 0 R -/A 222 0 R +/A 221 0 R /Parent 219 0 R /Next 227 0 R >> endobj 219 0 obj << /Title 220 0 R -/A 218 0 R +/A 217 0 R /Parent 11 0 R /Prev 187 0 R /Next 251 0 R @@ -15845,32 +15753,32 @@ endobj >> endobj 215 0 obj << /Title 216 0 R -/A 214 0 R +/A 213 0 R /Parent 187 0 R /Prev 211 0 R >> endobj 211 0 obj << /Title 212 0 R -/A 210 0 R +/A 209 0 R /Parent 187 0 R /Prev 199 0 R /Next 215 0 R >> endobj 207 0 obj << /Title 208 0 R -/A 206 0 R +/A 205 0 R /Parent 199 0 R /Prev 203 0 R >> endobj 203 0 obj << /Title 204 0 R -/A 202 0 R +/A 201 0 R /Parent 199 0 R /Next 207 0 R >> endobj 199 0 obj << /Title 200 0 R -/A 198 0 R +/A 197 0 R /Parent 187 0 R /Prev 195 0 R /Next 211 0 R @@ -15880,20 +15788,20 @@ endobj >> endobj 195 0 obj << /Title 196 0 R -/A 194 0 R +/A 193 0 R /Parent 187 0 R /Prev 191 0 R /Next 199 0 R >> endobj 191 0 obj << /Title 192 0 R -/A 190 0 R +/A 189 0 R /Parent 187 0 R /Next 195 0 R >> endobj 187 0 obj << /Title 188 0 R -/A 186 0 R +/A 185 0 R /Parent 11 0 R /Prev 155 0 R /Next 219 0 R @@ -15903,32 +15811,32 @@ endobj >> endobj 183 0 obj << /Title 184 0 R -/A 182 0 R +/A 181 0 R /Parent 155 0 R /Prev 179 0 R >> endobj 179 0 obj << /Title 180 0 R -/A 178 0 R +/A 177 0 R /Parent 155 0 R /Prev 167 0 R /Next 183 0 R >> endobj 175 0 obj << /Title 176 0 R -/A 174 0 R +/A 173 0 R /Parent 167 0 R /Prev 171 0 R >> endobj 171 0 obj << /Title 172 0 R -/A 170 0 R +/A 169 0 R /Parent 167 0 R /Next 175 0 R >> endobj 167 0 obj << /Title 168 0 R -/A 166 0 R +/A 165 0 R /Parent 155 0 R /Prev 163 0 R /Next 179 0 R @@ -15938,20 +15846,20 @@ endobj >> endobj 163 0 obj << /Title 164 0 R -/A 162 0 R +/A 161 0 R /Parent 155 0 R /Prev 159 0 R /Next 167 0 R >> endobj 159 0 obj << /Title 160 0 R -/A 158 0 R +/A 157 0 R /Parent 155 0 R /Next 163 0 R >> endobj 155 0 obj << /Title 156 0 R -/A 154 0 R +/A 153 0 R /Parent 11 0 R /Prev 123 0 R /Next 187 0 R @@ -15961,32 +15869,32 @@ endobj >> endobj 151 0 obj << /Title 152 0 R -/A 150 0 R +/A 149 0 R /Parent 123 0 R /Prev 147 0 R >> endobj 147 0 obj << /Title 148 0 R -/A 146 0 R +/A 145 0 R /Parent 123 0 R /Prev 135 0 R /Next 151 0 R >> endobj 143 0 obj << /Title 144 0 R -/A 142 0 R +/A 141 0 R /Parent 135 0 R /Prev 139 0 R >> endobj 139 0 obj << /Title 140 0 R -/A 138 0 R +/A 137 0 R /Parent 135 0 R /Next 143 0 R >> endobj 135 0 obj << /Title 136 0 R -/A 134 0 R +/A 133 0 R /Parent 123 0 R /Prev 131 0 R /Next 147 0 R @@ -15996,20 +15904,20 @@ endobj >> endobj 131 0 obj << /Title 132 0 R -/A 130 0 R +/A 129 0 R /Parent 123 0 R /Prev 127 0 R /Next 135 0 R >> endobj 127 0 obj << /Title 128 0 R -/A 126 0 R +/A 125 0 R /Parent 123 0 R /Next 131 0 R >> endobj 123 0 obj << /Title 124 0 R -/A 122 0 R +/A 121 0 R /Parent 11 0 R /Prev 91 0 R /Next 155 0 R @@ -16019,32 +15927,32 @@ endobj >> endobj 119 0 obj << /Title 120 0 R -/A 118 0 R +/A 117 0 R /Parent 91 0 R /Prev 115 0 R >> endobj 115 0 obj << /Title 116 0 R -/A 114 0 R +/A 113 0 R /Parent 91 0 R /Prev 103 0 R /Next 119 0 R >> endobj 111 0 obj << /Title 112 0 R -/A 110 0 R +/A 109 0 R /Parent 103 0 R /Prev 107 0 R >> endobj 107 0 obj << /Title 108 0 R -/A 106 0 R +/A 105 0 R /Parent 103 0 R /Next 111 0 R >> endobj 103 0 obj << /Title 104 0 R -/A 102 0 R +/A 101 0 R /Parent 91 0 R /Prev 99 0 R /Next 115 0 R @@ -16054,20 +15962,20 @@ endobj >> endobj 99 0 obj << /Title 100 0 R -/A 98 0 R +/A 97 0 R /Parent 91 0 R /Prev 95 0 R /Next 103 0 R >> endobj 95 0 obj << /Title 96 0 R -/A 94 0 R +/A 93 0 R /Parent 91 0 R /Next 99 0 R >> endobj 91 0 obj << /Title 92 0 R -/A 90 0 R +/A 89 0 R /Parent 11 0 R /Prev 63 0 R /Next 123 0 R @@ -16077,25 +15985,25 @@ endobj >> endobj 87 0 obj << /Title 88 0 R -/A 86 0 R +/A 85 0 R /Parent 63 0 R /Prev 75 0 R >> endobj 83 0 obj << /Title 84 0 R -/A 82 0 R +/A 81 0 R /Parent 75 0 R /Prev 79 0 R >> endobj 79 0 obj << /Title 80 0 R -/A 78 0 R +/A 77 0 R /Parent 75 0 R /Next 83 0 R >> endobj 75 0 obj << /Title 76 0 R -/A 74 0 R +/A 73 0 R /Parent 63 0 R /Prev 71 0 R /Next 87 0 R @@ -16105,20 +16013,20 @@ endobj >> endobj 71 0 obj << /Title 72 0 R -/A 70 0 R +/A 69 0 R /Parent 63 0 R /Prev 67 0 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0 R (2098) 3026 0 R (2099) 3027 0 R (210) 1481 0 R (2100) 3028 0 R (2101) 3029 0 R (2102) 3030 0 R (2103) 3031 0 R (2104) 3032 0 R (2106) 3033 0 R (2107) 3041 0 R (2109) 3042 0 R (211) 1482 0 R (2110) 3043 0 R (2111) 3044 0 R (2113) 3045 0 R (2127) 3046 0 R (2128) 3047 0 R (2129) 3048 0 R (213) 1483 0 R (2130) 3049 0 R (2131) 3050 0 R (2132) 3051 0 R (2133) 3052 0 R (2135) 3053 0 R (2136) 3054 0 R (2137) 3055 0 R (2138) 3056 0 R (2139) 3057 0 R (214) 1484 0 R (2140) 3058 0 R (2141) 3059 0 R (2142) 3060 0 R (2143) 3061 0 R (2145) 3062 0 R (2146) 3063 0 R (2147) 3064 0 R (2148) 3065 0 R (215) 1485 0 R (2150) 3066 0 R (2151) 3067 0 R (2152) 3068 0 R (2153) 3069 0 R (2154) 3070 0 R (2155) 3071 0 R (2156) 3072 0 R (2157) 3073 0 R (2158) 3074 0 R (2159) 3075 0 R (216) 1486 0 R (2160) 3076 0 R (2161) 3077 0 R (2162) 3078 0 R (2163) 3086 0 R (2164) 3087 0 R (2165) 3088 0 R (2166) 3089 0 R (2167) 3090 0 R (2168) 3091 0 R (2169) 3092 0 R (2170) 3093 0 R (2171) 3094 0 R (2172) 3095 0 R (2174) 3096 0 R (2175) 3097 0 R (2177) 3098 0 R (2178) 3099 0 R (2179) 3100 0 R (218) 1487 0 R (2181) 3101 0 R (219) 1488 0 R (2195) 3102 0 R (2196) 3103 0 R (2197) 3104 0 R (2198) 3105 0 R (2199) 3106 0 R (220) 1489 0 R (2200) 3107 0 R (2201) 3108 0 R (2203) 3109 0 R (2204) 3110 0 R (2205) 3111 0 R (2206) 3112 0 R (2207) 3113 0 R (2208) 3114 0 R (2209) 3115 0 R (221) 1490 0 R (2210) 3116 0 R (2211) 3117 0 R (2212) 3118 0 R (2213) 3126 0 R (2215) 3127 0 R (2216) 3128 0 R (2217) 3129 0 R (2218) 3130 0 R (2219) 3131 0 R (2220) 3132 0 R (2221) 3133 0 R (2222) 3134 0 R (2223) 3135 0 R (2224) 3136 0 R (2225) 3137 0 R (2226) 3138 0 R (2227) 3139 0 R (2228) 3140 0 R (2229) 3141 0 R (223) 1491 0 R (2230) 3142 0 R (2231) 3143 0 R (2232) 3144 0 R (2233) 3145 0 R (2234) 3146 0 R (2235) 3147 0 R (2237) 3148 0 R (2238) 3149 0 R (2239) 3150 0 R (224) 1492 0 R (2240) 3151 0 R (2241) 3152 0 R (2242) 3153 0 R (2243) 3154 0 R (2244) 3155 0 R (2245) 3156 0 R (2246) 3157 0 R (2247) 3158 0 R (2248) 3159 0 R (2249) 3160 0 R (225) 1493 0 R (2250) 3161 0 R (2251) 3162 0 R (2252) 3163 0 R (2253) 3164 0 R (2254) 3165 0 R (2255) 3166 0 R (2257) 3167 0 R (2258) 3168 0 R (226) 1494 0 R (2260) 3169 0 R (2261) 3170 0 R (2262) 3177 0 R (2264) 3178 0 R (2278) 3179 0 R (2279) 3180 0 R (228) 1495 0 R (2280) 3181 0 R (2281) 3182 0 R (2282) 3183 0 R (2283) 3184 0 R (2284) 3185 0 R (2286) 3186 0 R (2287) 3187 0 R (2288) 3188 0 R (2289) 3189 0 R (229) 1496 0 R (2290) 3190 0 R (2291) 3191 0 R (2292) 3192 0 R (2293) 3193 0 R (2294) 3194 0 R (2295) 3195 0 R (2296) 3196 0 R (2298) 3197 0 R (2299) 3198 0 R (230) 1497 0 R (2300) 3199 0 R (2301) 3200 0 R (2302) 3201 0 R (2303) 3202 0 R (2304) 3203 0 R (2305) 3204 0 R (2306) 3205 0 R (2307) 3206 0 R (2308) 3207 0 R (2309) 3208 0 R (231) 1498 0 R (2310) 3209 0 R (2311) 3210 0 R (2312) 3211 0 R (2313) 3212 0 R (2314) 3213 0 R (2315) 3214 0 R (2316) 3215 0 R (2317) 3216 0 R (2318) 3217 0 R (2320) 3218 0 R (2321) 3219 0 R (2322) 3220 0 R (2323) 3221 0 R (2324) 3222 0 R (2325) 3223 0 R (2326) 3224 0 R (2327) 3225 0 R (2328) 3226 0 R (2329) 3227 0 R (233) 1499 0 R (2330) 3228 0 R (2331) 3229 0 R (2332) 3230 0 R (2333) 3231 0 R (2334) 3232 0 R (2335) 3233 0 R (2336) 3234 0 R (2337) 3235 0 R (2338) 3236 0 R (234) 1500 0 R (2340) 3237 0 R (2341) 3245 0 R (2343) 3246 0 R (2344) 3247 0 R (2345) 3248 0 R (2347) 3249 0 R (235) 1501 0 R (236) 1502 0 R (2361) 3250 0 R (2362) 3251 0 R (2363) 3252 0 R (2364) 3253 0 R (2365) 3254 0 R (2366) 3255 0 R (2367) 3256 0 R (2369) 3257 0 R (2370) 3258 0 R (2371) 3259 0 R (2372) 3260 0 R (2373) 3261 0 R (2374) 3262 0 R (2375) 3263 0 R (2376) 3264 0 R (2377) 3265 0 R (2378) 3266 0 R (2379) 3267 0 R (238) 1503 0 R (2381) 3268 0 R (2382) 3269 0 R (2383) 3270 0 R (2384) 3271 0 R (2385) 3272 0 R (2386) 3273 0 R (2387) 3274 0 R (2388) 3275 0 R (2389) 3276 0 R (239) 1504 0 R (2390) 3277 0 R (2391) 3278 0 R (2392) 3279 0 R (2393) 3280 0 R (2394) 3281 0 R (2395) 3282 0 R (2396) 3283 0 R (2397) 3291 0 R (2398) 3292 0 R (2399) 3293 0 R (240) 1505 0 R (2400) 3294 0 R (2401) 3295 0 R (2403) 3296 0 R (2404) 3297 0 R (2405) 3298 0 R (2406) 3299 0 R (2407) 3300 0 R (2408) 3301 0 R (2409) 3302 0 R (241) 1506 0 R (2410) 3303 0 R (2411) 3304 0 R (2412) 3305 0 R (2413) 3306 0 R (2414) 3307 0 R (2415) 3308 0 R (2416) 3309 0 R (2417) 3310 0 R (2418) 3311 0 R (2419) 3312 0 R (2420) 3313 0 R (2421) 3314 0 R (2423) 3315 0 R (2424) 3316 0 R (2426) 3317 0 R (2427) 3318 0 R (2428) 3319 0 R (243) 1507 0 R (2430) 3320 0 R (244) 1508 0 R (2444) 3321 0 R (2445) 3322 0 R (2446) 3323 0 R (2447) 3324 0 R (2448) 3332 0 R (2449) 3333 0 R (245) 1509 0 R (2450) 3334 0 R (2452) 3335 0 R (2453) 3336 0 R (2454) 3337 0 R (2455) 3338 0 R (2456) 3339 0 R (2457) 3340 0 R (2458) 3341 0 R (2459) 3342 0 R (246) 1510 0 R (2460) 3343 0 R (2462) 3344 0 R (2463) 3345 0 R (2464) 3346 0 R (2465) 3347 0 R (2466) 3348 0 R (2467) 3349 0 R (2468) 3350 0 R (2469) 3351 0 R (2470) 3352 0 R (2471) 3353 0 R (2472) 3354 0 R (2473) 3355 0 R (2474) 3356 0 R (2475) 3357 0 R (2476) 3358 0 R (2477) 3359 0 R (2479) 3360 0 R (248) 1511 0 R (2480) 3361 0 R (2481) 3362 0 R (2482) 3363 0 R (2483) 3364 0 R (2484) 3365 0 R (2485) 3366 0 R (2486) 3367 0 R (2487) 3368 0 R (2488) 3369 0 R (2489) 3370 0 R (249) 1512 0 R (2490) 3371 0 R (2491) 3372 0 R (2492) 3373 0 R (2493) 3374 0 R (2494) 3375 0 R (2495) 3376 0 R (2496) 3377 0 R (2497) 3378 0 R (2498) 3379 0 R (2499) 3380 0 R (250) 1513 0 R (2500) 3381 0 R (2501) 3382 0 R (2502) 3383 0 R (2503) 3384 0 R (2504) 3385 0 R (2505) 3386 0 R (2506) 3387 0 R (2507) 3388 0 R (2508) 3389 0 R (251) 1514 0 R (2510) 3390 0 R (2511) 3391 0 R (2512) 3397 0 R (2514) 3398 0 R (2528) 3399 0 R (2529) 3400 0 R (253) 1515 0 R (2530) 3401 0 R (2531) 3402 0 R (2532) 3403 0 R (2533) 3404 0 R (2534) 3405 0 R (2536) 3406 0 R (2537) 3407 0 R (2538) 3408 0 R (2539) 3409 0 R (254) 1516 0 R (2540) 3410 0 R (2541) 3411 0 R (2542) 3412 0 R (2543) 3413 0 R (2544) 3414 0 R (2546) 3415 0 R (2547) 3416 0 R (2548) 3417 0 R (2549) 3418 0 R (255) 1517 0 R (2550) 3419 0 R (2551) 3420 0 R (2552) 3421 0 R (2553) 3422 0 R (2554) 3423 0 R (2555) 3424 0 R (2556) 3425 0 R (2557) 3426 0 R (2558) 3427 0 R (2559) 3428 0 R (256) 1518 0 R (2560) 3429 0 R (2561) 3430 0 R (2562) 3431 0 R (2563) 3432 0 R (2564) 3433 0 R (2565) 3434 0 R (2567) 3435 0 R (2568) 3436 0 R (2569) 3437 0 R (2570) 3438 0 R (2571) 3439 0 R (2572) 3440 0 R (2573) 3441 0 R (2574) 3442 0 R (2575) 3443 0 R (2576) 3444 0 R (2577) 3445 0 R (2578) 3446 0 R (2579) 3447 0 R (258) 1519 0 R (2580) 3448 0 R (2581) 3449 0 R (2582) 3450 0 R (2583) 3451 0 R (2584) 3452 0 R (2585) 3453 0 R (2586) 3454 0 R (2587) 3455 0 R (2588) 3456 0 R (2589) 3457 0 R (259) 1520 0 R (2591) 3458 0 R (2592) 3459 0 R (2593) 3467 0 R (2595) 3468 0 R (260) 1521 0 R (2609) 3469 0 R (261) 1522 0 R (2610) 3470 0 R (2611) 3471 0 R (2612) 3472 0 R (2613) 3473 0 R (2614) 3474 0 R (2615) 3475 0 R (2617) 3476 0 R (2618) 3477 0 R (2619) 3478 0 R (2620) 3479 0 R (2621) 3480 0 R (2622) 3481 0 R (2623) 3482 0 R (2624) 3483 0 R (2625) 3484 0 R (2627) 3485 0 R (2628) 3486 0 R (2629) 3487 0 R (263) 1523 0 R (2630) 3488 0 R (2632) 3489 0 R (2633) 3490 0 R (2634) 3491 0 R (2635) 3492 0 R (2636) 3493 0 R (2637) 3494 0 R (2638) 3495 0 R (2639) 3496 0 R (264) 1524 0 R (2640) 3497 0 R (2641) 3498 0 R (2642) 3499 0 R (2643) 3500 0 R (2644) 3501 0 R (2645) 3502 0 R (2646) 3503 0 R (2648) 3504 0 R (2649) 3513 0 R (265) 1525 0 R (2651) 3514 0 R (2652) 3515 0 R (2653) 3516 0 R (2655) 3517 0 R (266) 1526 0 R (2669) 3518 0 R (2670) 3519 0 R (2671) 3520 0 R (2672) 3521 0 R (2673) 3522 0 R (2674) 3523 0 R (2675) 3524 0 R (2677) 3525 0 R (2678) 3526 0 R (2679) 3527 0 R (268) 1527 0 R (2680) 3528 0 R (2681) 3529 0 R (2682) 3530 0 R (2683) 3531 0 R (2684) 3532 0 R (2685) 3533 0 R (2686) 3534 0 R (2687) 3535 0 R (2689) 3536 0 R (269) 1528 0 R (2690) 3537 0 R (2691) 3538 0 R (2692) 3539 0 R (2694) 3540 0 R (2695) 3541 0 R (2696) 3542 0 R (2697) 3543 0 R (2698) 3544 0 R (2699) 3545 0 R (270) 1529 0 R (2700) 3546 0 R (2701) 3547 0 R (2702) 3548 0 R (2703) 3549 0 R (2704) 3550 0 R (2705) 3551 0 R (2707) 3559 0 R (2708) 3560 0 R (271) 1530 0 R (2710) 3561 0 R (2711) 3562 0 R (2712) 3563 0 R (2714) 3564 0 R (2728) 3565 0 R (2729) 3566 0 R (273) 1531 0 R (2730) 3567 0 R (2731) 3568 0 R (2732) 3569 0 R (2733) 3570 0 R (2734) 3571 0 R (2736) 3572 0 R (2737) 3573 0 R (2738) 3574 0 R (2739) 3575 0 R (274) 1532 0 R (2740) 3576 0 R (2741) 3577 0 R (2742) 3578 0 R (2743) 3579 0 R (2744) 3580 0 R (2745) 3581 0 R (2746) 3582 0 R (2747) 3583 0 R (2748) 3584 0 R (275) 1533 0 R (2750) 3585 0 R (2751) 3586 0 R (2752) 3587 0 R (2753) 3588 0 R (2755) 3596 0 R (2756) 3597 0 R (2757) 3598 0 R (2758) 3599 0 R (2759) 3600 0 R (276) 1534 0 R (2760) 3601 0 R (2761) 3602 0 R (2762) 3603 0 R (2763) 3604 0 R (2764) 3605 0 R (2765) 3606 0 R (2766) 3607 0 R (2767) 3608 0 R (2768) 3609 0 R (2769) 3610 0 R (2771) 3611 0 R (2772) 3612 0 R (2774) 3613 0 R (2775) 3614 0 R (2776) 3615 0 R (2778) 3616 0 R (278) 1535 0 R (279) 1536 0 R (2792) 3617 0 R (2793) 3618 0 R (2794) 3619 0 R (2795) 3620 0 R (2796) 3621 0 R (2797) 3622 0 R (2798) 3623 0 R (280) 1537 0 R (2800) 3631 0 R (2801) 3632 0 R (2802) 3633 0 R (2803) 3634 0 R (2804) 3635 0 R (2805) 3636 0 R (2806) 3637 0 R (2807) 3638 0 R (2808) 3639 0 R (2809) 3640 0 R (281) 1538 0 R (2810) 3641 0 R (2811) 3642 0 R (2812) 3643 0 R (2813) 3644 0 R (2814) 3645 0 R (2815) 3646 0 R (2816) 3647 0 R (2818) 3648 0 R (2819) 3649 0 R (2820) 3650 0 R (2821) 3651 0 R (2823) 3652 0 R (2824) 3653 0 R (2825) 3654 0 R (2826) 3655 0 R (2827) 3656 0 R (2828) 3657 0 R (2829) 3658 0 R (283) 1539 0 R (2830) 3659 0 R (2831) 3660 0 R (2832) 3661 0 R (2833) 3662 0 R (2834) 3663 0 R (2835) 3664 0 R (2836) 3665 0 R (2837) 3666 0 R (2838) 3667 0 R (2839) 3668 0 R (284) 1540 0 R (2840) 3669 0 R (2842) 3670 0 R (2843) 3671 0 R (2845) 3672 0 R (2846) 3673 0 R (2847) 3674 0 R (2849) 3675 0 R (285) 1541 0 R (286) 1542 0 R (2863) 3681 0 R (2864) 3682 0 R (2865) 3683 0 R (2866) 3684 0 R (2867) 3685 0 R (2868) 3686 0 R (2869) 3687 0 R (2870) 3688 0 R (2872) 3689 0 R (2873) 3690 0 R (2874) 3691 0 R (2875) 3692 0 R (2876) 3693 0 R (2877) 3694 0 R (2878) 3695 0 R (2879) 3696 0 R (288) 1543 0 R (2880) 3697 0 R (2882) 3698 0 R (2883) 3699 0 R (2884) 3700 0 R (2885) 3701 0 R (2886) 3702 0 R (2887) 3703 0 R (2888) 3704 0 R (2889) 3705 0 R (289) 1544 0 R (2890) 3706 0 R (2892) 3707 0 R (2893) 3708 0 R (2894) 3709 0 R (2895) 3710 0 R (2896) 3711 0 R (2897) 3712 0 R (2898) 3713 0 R (2899) 3714 0 R (290) 1545 0 R (2900) 3715 0 R (2901) 3716 0 R (2902) 3717 0 R (2903) 3718 0 R (2904) 3719 0 R (2905) 3720 0 R (2906) 3721 0 R (2907) 3722 0 R (2908) 3723 0 R (2909) 3724 0 R (291) 1546 0 R (2910) 3725 0 R (2911) 3726 0 R (2912) 3727 0 R (2913) 3728 0 R (2914) 3729 0 R (2915) 3730 0 R (2916) 3731 0 R (2917) 3732 0 R (2919) 3733 0 R (2920) 3734 0 R (2921) 3735 0 R (2922) 3736 0 R (2923) 3737 0 R (2924) 3738 0 R (2925) 3739 0 R (2926) 3740 0 R (2927) 3741 0 R (2928) 3742 0 R (2929) 3743 0 R (293) 1547 0 R (2930) 3744 0 R (2931) 3745 0 R (2932) 3746 0 R (2933) 3747 0 R (2934) 3748 0 R (2935) 3749 0 R (2936) 3750 0 R (2937) 3751 0 R (2938) 3752 0 R (2939) 3753 0 R (294) 1548 0 R (2940) 3754 0 R (2941) 3755 0 R (2942) 3756 0 R (2943) 3757 0 R (2944) 3758 0 R (2945) 3759 0 R (2946) 3760 0 R (2947) 3761 0 R (2948) 3762 0 R (2949) 3763 0 R (295) 1549 0 R (2950) 3764 0 R (2951) 3765 0 R (2952) 3766 0 R (2954) 3774 0 R (2955) 3775 0 R (2956) 3776 0 R (2958) 3777 0 R (296) 1550 0 R (2972) 3778 0 R (2973) 3779 0 R (2974) 3780 0 R (2975) 3781 0 R (2976) 3782 0 R (2977) 3783 0 R (2978) 3784 0 R (2979) 3785 0 R (298) 1551 0 R (2981) 3786 0 R (2982) 3787 0 R (2983) 3788 0 R (2984) 3789 0 R (2985) 3790 0 R (2986) 3791 0 R (2987) 3792 0 R (2988) 3793 0 R (2989) 3794 0 R (299) 1552 0 R (2991) 3795 0 R (2992) 3796 0 R (2993) 3797 0 R (2994) 3798 0 R (2995) 3799 0 R (2996) 3800 0 R (2997) 3801 0 R (2998) 3802 0 R (2999) 3803 0 R (3.0) 9 0 R (3.1.1) 13 0 R (3.1.1.2) 17 0 R (3.1.2.1.3) 25 0 R (3.1.2.2) 21 0 R (3.1.2.2.3) 29 0 R (3.1.2.3.3) 33 0 R (3.1.3.2) 37 0 R (3.1.4.2) 41 0 R (3.1.4.4.3) 45 0 R (3.1.5.2) 49 0 R (3.1.6.2) 53 0 R (3.1.7.2) 57 0 R (3.10.1) 313 0 R (3.10.47.2) 317 0 R (3.10.48.2) 321 0 R (3.10.49.2) 325 0 R (3.10.49.21.3) 329 0 R (3.10.49.22.3) 333 0 R (3.10.50.2) 337 0 R (3.10.51.2) 341 0 R (3.11.1) 345 0 R (3.11.52.2) 349 0 R (3.11.53.2) 353 0 R (3.11.54.2) 357 0 R (3.11.54.23.3) 361 0 R (3.11.54.24.3) 365 0 R (3.11.55.2) 369 0 R (3.11.56.2) 373 0 R (3.12.1) 377 0 R (3.12.57.2) 381 0 R (3.12.58.2) 385 0 R (3.12.59.2) 389 0 R (3.12.59.25.3) 393 0 R (3.12.59.26.3) 397 0 R (3.12.60.2) 401 0 R (3.12.61.2) 405 0 R (3.13.1) 409 0 R (3.13.62.2) 413 0 R (3.13.63.2) 417 0 R (3.13.64.2) 421 0 R (3.13.64.27.3) 425 0 R (3.13.64.28.3) 429 0 R (3.13.65.2) 433 0 R (3.13.66.2) 437 0 R (3.14.1) 441 0 R (3.14.67.2) 445 0 R (3.14.68.2) 449 0 R (3.14.69.2) 453 0 R (3.14.69.29.3) 457 0 R (3.14.69.30.3) 461 0 R (3.14.70.2) 465 0 R (3.14.71.2) 469 0 R (3.15.1) 473 0 R (3.15.72.2) 477 0 R (3.15.73.2) 481 0 R (3.15.74.2) 485 0 R (3.15.74.31.3) 489 0 R (3.15.74.32.3) 493 0 R (3.15.75.2) 497 0 R (3.15.76.2) 501 0 R (3.16.1) 505 0 R (3.16.77.2) 509 0 R (3.16.78.2) 513 0 R (3.16.79.2) 517 0 R (3.16.79.33.3) 521 0 R (3.16.79.34.3) 525 0 R (3.16.80.2) 529 0 R (3.16.81.2) 533 0 R (3.17.1) 537 0 R (3.17.82.2) 541 0 R (3.17.83.2) 545 0 R (3.17.84.2) 549 0 R (3.17.84.35.3) 553 0 R (3.17.84.36.3) 557 0 R (3.17.85.2) 561 0 R (3.17.86.2) 565 0 R (3.18.1) 569 0 R (3.18.87.2) 573 0 R (3.18.88.2) 577 0 R (3.18.89.2) 581 0 R (3.18.89.37.3) 585 0 R (3.18.89.38.3) 589 0 R (3.18.90.2) 593 0 R (3.18.91.2) 597 0 R (3.19.1) 601 0 R (3.19.92.2) 605 0 R (3.19.93.2) 609 0 R (3.19.94.2) 613 0 R (3.19.94.39.3) 617 0 R (3.19.94.40.3) 621 0 R (3.19.95.2) 625 0 R (3.19.96.2) 629 0 R (3.2.1) 61 0 R (3.2.10.2) 73 0 R (3.2.10.5.3) 77 0 R (3.2.10.6.3) 81 0 R (3.2.11.2) 85 0 R (3.2.8.2) 65 0 R (3.2.9.2) 69 0 R (3.20.1) 633 0 R (3.20.100.2) 657 0 R (3.20.101.2) 661 0 R (3.20.97.2) 637 0 R (3.20.98.2) 641 0 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(3.26.129.53.3) 841 0 R (3.26.130.2) 845 0 R (3.26.131.2) 849 0 R (3.27.1) 853 0 R (3.27.132.2) 857 0 R (3.27.133.2) 861 0 R (3.27.134.2) 865 0 R (3.27.134.54.3) 869 0 R (3.27.135.2) 873 0 R (3.27.136.2) 877 0 R (3.28.1) 881 0 R (3.28.137.2) 885 0 R (3.28.138.2) 889 0 R (3.28.139.2) 893 0 R (3.28.139.55.3) 897 0 R (3.28.139.56.3) 901 0 R (3.28.140.2) 905 0 R (3.28.141.2) 909 0 R (3.29.1) 913 0 R (3.29.142.2) 917 0 R (3.29.143.2) 921 0 R (3.29.144.2) 925 0 R (3.29.144.57.3) 929 0 R (3.29.144.58.3) 933 0 R (3.29.145.2) 937 0 R (3.29.146.2) 941 0 R (3.3.1) 89 0 R (3.3.12.2) 93 0 R (3.3.13.2) 97 0 R (3.3.14.2) 101 0 R (3.3.14.7.3) 105 0 R (3.3.14.8.3) 109 0 R (3.3.15.2) 113 0 R (3.3.16.2) 117 0 R (3.30.1) 945 0 R (3.30.147.2) 949 0 R (3.30.148.2) 953 0 R (3.30.149.2) 957 0 R (3.30.149.59.3) 961 0 R (3.30.149.60.3) 965 0 R (3.30.150.2) 969 0 R (3.30.151.2) 973 0 R (3.31.1) 977 0 R (3.31.152.2) 981 0 R (3.31.153.2) 985 0 R (3.31.154.2) 989 0 R (3.31.154.61.3) 993 0 R (3.31.154.62.3) 997 0 R (3.31.155.2) 1001 0 R (3.31.156.2) 1005 0 R (3.32.1) 1009 0 R (3.32.157.2) 1013 0 R (3.32.158.2) 1017 0 R (3.32.159.2) 1021 0 R (3.32.159.63.3) 1025 0 R (3.32.160.2) 1029 0 R (3.32.161.2) 1033 0 R (3.33.1) 1037 0 R (3.33.162.2) 1041 0 R (3.33.163.2) 1045 0 R (3.33.164.2) 1049 0 R (3.33.164.64.3) 1053 0 R (3.33.165.2) 1057 0 R (3.33.166.2) 1061 0 R (3.34.1) 1065 0 R (3.34.167.2) 1069 0 R (3.34.168.2) 1073 0 R (3.34.169.2) 1077 0 R (3.34.169.65.3) 1081 0 R (3.34.170.2) 1085 0 R (3.34.171.2) 1089 0 R (3.35.1) 1093 0 R (3.35.172.2) 1097 0 R (3.35.173.2) 1101 0 R (3.35.174.2) 1105 0 R (3.35.174.66.3) 1109 0 R (3.35.175.2) 1113 0 R (3.35.176.2) 1117 0 R (3.36.1) 1121 0 R (3.36.177.2) 1125 0 R (3.36.178.2) 1129 0 R (3.36.179.2) 1133 0 R (3.36.179.67.3) 1137 0 R (3.36.180.2) 1141 0 R (3.36.181.2) 1145 0 R (3.37.1) 1149 0 R (3.37.182.2) 1153 0 R (3.37.183.2) 1157 0 R (3.37.184.2) 1161 0 R (3.37.184.68.3) 1165 0 R (3.37.185.2) 1169 0 R (3.37.186.2) 1173 0 R (3.4.1) 121 0 R (3.4.17.2) 125 0 R (3.4.18.2) 129 0 R (3.4.19.10.3) 141 0 R (3.4.19.2) 133 0 R (3.4.19.9.3) 137 0 R (3.4.20.2) 145 0 R (3.4.21.2) 149 0 R (3.5.1) 153 0 R (3.5.22.2) 157 0 R (3.5.23.2) 161 0 R (3.5.24.11.3) 169 0 R (3.5.24.12.3) 173 0 R (3.5.24.2) 165 0 R (3.5.25.2) 177 0 R (3.5.26.2) 181 0 R (3.6.1) 185 0 R (3.6.27.2) 189 0 R (3.6.28.2) 193 0 R (3.6.29.13.3) 201 0 R (3.6.29.14.3) 205 0 R (3.6.29.2) 197 0 R (3.6.30.2) 209 0 R (3.6.31.2) 213 0 R (3.7.1) 217 0 R (3.7.32.2) 221 0 R (3.7.33.2) 225 0 R (3.7.34.15.3) 233 0 R (3.7.34.16.3) 237 0 R (3.7.34.2) 229 0 R (3.7.35.2) 241 0 R (3.7.36.2) 245 0 R (3.8.1) 249 0 R (3.8.37.2) 253 0 R (3.8.38.2) 257 0 R (3.8.39.17.3) 265 0 R (3.8.39.18.3) 269 0 R (3.8.39.2) 261 0 R (3.8.40.2) 273 0 R (3.8.41.2) 277 0 R (3.9.1) 281 0 R (3.9.42.2) 285 0 R (3.9.43.2) 289 0 R (3.9.44.19.3) 297 0 R (3.9.44.2) 293 0 R (3.9.44.20.3) 301 0 R (3.9.45.2) 305 0 R (3.9.46.2) 309 0 R (30) 1331 0 R (300) 1553 0 R (3001) 3804 0 R (3002) 3805 0 R (3003) 3806 0 R (3004) 3807 0 R (3005) 3808 0 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(2803) 3634 0 R (2804) 3635 0 R (2805) 3636 0 R (2806) 3637 0 R (2807) 3638 0 R (2808) 3639 0 R (2809) 3640 0 R (281) 1577 0 R (2810) 3641 0 R (2811) 3642 0 R (2812) 3643 0 R (2813) 3644 0 R (2814) 3645 0 R (2815) 3646 0 R (2816) 3647 0 R (2817) 3648 0 R (2818) 3649 0 R (2820) 3650 0 R (2821) 3651 0 R (2822) 3652 0 R (2823) 3653 0 R (2825) 3654 0 R (2826) 3655 0 R (2827) 3656 0 R (2828) 3657 0 R (2829) 3658 0 R (283) 1578 0 R (2830) 3659 0 R (2831) 3660 0 R (2832) 3661 0 R (2833) 3662 0 R (2834) 3663 0 R (2835) 3664 0 R (2836) 3665 0 R (2837) 3666 0 R (2838) 3667 0 R (2839) 3668 0 R (284) 1579 0 R (2840) 3669 0 R (2841) 3670 0 R (2842) 3671 0 R (2844) 3676 0 R (2845) 3677 0 R (2847) 3678 0 R (2848) 3679 0 R (2849) 3680 0 R (285) 1580 0 R (2851) 3681 0 R (286) 1581 0 R (2865) 3684 0 R (2866) 3685 0 R (2867) 3686 0 R (2868) 3687 0 R (2869) 3688 0 R (2870) 3689 0 R (2871) 3690 0 R (2872) 3691 0 R (2874) 3692 0 R (2875) 3693 0 R (2876) 3694 0 R (2877) 3695 0 R (2878) 3696 0 R (2879) 3697 0 R (288) 1582 0 R (2880) 3698 0 R (2881) 3699 0 R (2882) 3700 0 R (2884) 3701 0 R (2885) 3702 0 R (2886) 3703 0 R (2887) 3704 0 R (2888) 3705 0 R (2889) 3706 0 R (289) 1583 0 R (2890) 3707 0 R (2891) 3708 0 R (2892) 3709 0 R (2894) 3714 0 R (2895) 3715 0 R (2896) 3716 0 R (2897) 3717 0 R (2898) 3718 0 R (2899) 3719 0 R (290) 1584 0 R (2900) 3720 0 R (2901) 3721 0 R (2902) 3722 0 R (2903) 3723 0 R (2904) 3724 0 R (2905) 3725 0 R (2906) 3726 0 R (2907) 3727 0 R (2908) 3728 0 R (2909) 3729 0 R (291) 1585 0 R (2910) 3730 0 R (2911) 3731 0 R (2912) 3732 0 R (2913) 3733 0 R (2914) 3734 0 R (2915) 3735 0 R (2916) 3736 0 R (2917) 3737 0 R (2918) 3738 0 R (2919) 3739 0 R (2921) 3740 0 R (2922) 3741 0 R (2923) 3742 0 R (2924) 3743 0 R (2925) 3744 0 R (2926) 3745 0 R (2927) 3746 0 R (2928) 3747 0 R (2929) 3748 0 R (293) 1586 0 R (2930) 3749 0 R (2931) 3750 0 R (2932) 3751 0 R (2933) 3752 0 R (2934) 3753 0 R (2935) 3754 0 R (2936) 3755 0 R (2937) 3756 0 R (2938) 3757 0 R (2939) 3758 0 R (294) 1587 0 R (2940) 3759 0 R (2941) 3760 0 R (2942) 3761 0 R (2943) 3762 0 R (2944) 3763 0 R (2945) 3764 0 R (2946) 3765 0 R (2947) 3766 0 R (2948) 3767 0 R (2949) 3768 0 R (295) 1588 0 R (2950) 3769 0 R (2951) 3770 0 R (2952) 3771 0 R (2953) 3772 0 R (2954) 3773 0 R (2956) 3774 0 R (2957) 3775 0 R (2958) 3776 0 R (296) 1589 0 R (2960) 3782 0 R (2974) 3785 0 R (2975) 3786 0 R (2976) 3787 0 R (2977) 3788 0 R (2978) 3789 0 R (2979) 3790 0 R (298) 1590 0 R (2980) 3791 0 R (2982) 3792 0 R (2983) 3793 0 R (2984) 3794 0 R (2985) 3795 0 R (2986) 3796 0 R (2987) 3797 0 R (2988) 3798 0 R (2989) 3799 0 R (299) 1591 0 R (2990) 3800 0 R (2992) 3801 0 R (2993) 3802 0 R (2994) 3803 0 R (2995) 3804 0 R (2996) 3805 0 R (2997) 3806 0 R (2998) 3807 0 R (2999) 3808 0 R (3.0) 10 0 R (3.1.1) 14 0 R (3.1.1.2) 18 0 R (3.1.2.1.3) 26 0 R (3.1.2.2) 22 0 R (3.1.2.2.3) 30 0 R (3.1.2.3.3) 34 0 R (3.1.3.2) 38 0 R (3.1.4.2) 42 0 R (3.1.4.4.3) 46 0 R (3.1.5.2) 50 0 R (3.1.6.2) 54 0 R (3.1.7.2) 58 0 R (3.10.1) 314 0 R (3.10.47.2) 318 0 R (3.10.48.2) 322 0 R (3.10.49.2) 326 0 R (3.10.49.21.3) 330 0 R (3.10.49.22.3) 334 0 R (3.10.50.2) 338 0 R (3.10.51.2) 342 0 R (3.11.1) 346 0 R (3.11.52.2) 350 0 R (3.11.53.2) 354 0 R (3.11.54.2) 358 0 R (3.11.54.23.3) 362 0 R (3.11.54.24.3) 366 0 R (3.11.55.2) 370 0 R (3.11.56.2) 374 0 R (3.12.1) 378 0 R (3.12.57.2) 382 0 R (3.12.58.2) 386 0 R (3.12.59.2) 390 0 R (3.12.59.25.3) 394 0 R (3.12.59.26.3) 398 0 R (3.12.60.2) 402 0 R (3.12.61.2) 406 0 R (3.13.1) 410 0 R (3.13.62.2) 414 0 R (3.13.63.2) 418 0 R (3.13.64.2) 422 0 R (3.13.64.27.3) 426 0 R (3.13.64.28.3) 430 0 R (3.13.65.2) 434 0 R (3.13.66.2) 438 0 R (3.14.1) 442 0 R (3.14.67.2) 446 0 R (3.14.68.2) 450 0 R (3.14.69.2) 454 0 R (3.14.69.29.3) 458 0 R (3.14.69.30.3) 462 0 R (3.14.70.2) 466 0 R (3.14.71.2) 470 0 R (3.15.1) 474 0 R (3.15.72.2) 478 0 R (3.15.73.2) 482 0 R (3.15.74.2) 486 0 R (3.15.74.31.3) 490 0 R (3.15.74.32.3) 494 0 R (3.15.75.2) 498 0 R (3.15.76.2) 502 0 R (3.16.1) 506 0 R (3.16.77.2) 510 0 R (3.16.78.2) 514 0 R (3.16.79.2) 518 0 R (3.16.79.33.3) 522 0 R (3.16.79.34.3) 526 0 R (3.16.80.2) 530 0 R (3.16.81.2) 534 0 R (3.17.1) 538 0 R (3.17.82.2) 542 0 R (3.17.83.2) 546 0 R (3.17.84.2) 550 0 R (3.17.84.35.3) 554 0 R (3.17.84.36.3) 558 0 R (3.17.85.2) 562 0 R (3.17.86.2) 566 0 R (3.18.1) 570 0 R (3.18.87.2) 574 0 R (3.18.88.2) 578 0 R (3.18.89.2) 582 0 R (3.18.89.37.3) 586 0 R (3.18.89.38.3) 590 0 R (3.18.90.2) 594 0 R (3.18.91.2) 598 0 R (3.19.1) 602 0 R (3.19.92.2) 606 0 R (3.19.93.2) 610 0 R (3.19.94.2) 614 0 R (3.19.94.39.3) 618 0 R (3.19.94.40.3) 622 0 R (3.19.95.2) 626 0 R (3.19.96.2) 630 0 R (3.2.1) 62 0 R (3.2.10.2) 74 0 R (3.2.10.5.3) 78 0 R (3.2.10.6.3) 82 0 R (3.2.11.2) 86 0 R (3.2.8.2) 66 0 R (3.2.9.2) 70 0 R (3.20.1) 634 0 R (3.20.100.2) 658 0 R (3.20.101.2) 662 0 R (3.20.97.2) 638 0 R (3.20.98.2) 642 0 R (3.20.99.2) 646 0 R (3.20.99.41.3) 650 0 R (3.20.99.42.3) 654 0 R (3.21.1) 666 0 R (3.21.102.2) 670 0 R (3.21.103.2) 674 0 R (3.21.104.2) 678 0 R (3.21.104.43.3) 682 0 R (3.21.104.44.3) 686 0 R (3.21.105.2) 690 0 R (3.21.106.2) 694 0 R (3.22.1) 698 0 R (3.22.107.2) 702 0 R (3.22.108.2) 706 0 R (3.22.109.2) 710 0 R (3.22.109.45.3) 714 0 R (3.22.109.46.3) 718 0 R (3.22.110.2) 722 0 R (3.22.111.2) 726 0 R (3.23.1) 730 0 R (3.23.112.2) 734 0 R (3.23.113.2) 738 0 R (3.23.114.2) 742 0 R (3.23.114.47.3) 746 0 R (3.23.114.48.3) 750 0 R (3.23.115.2) 754 0 R (3.23.116.2) 758 0 R (3.24.1) 762 0 R (3.24.117.2) 766 0 R (3.24.118.2) 770 0 R (3.24.119.2) 774 0 R (3.24.119.49.3) 778 0 R (3.24.119.50.3) 782 0 R (3.24.120.2) 786 0 R (3.24.121.2) 790 0 R (3.25.1) 794 0 R (3.25.122.2) 798 0 R (3.25.123.2) 802 0 R (3.25.124.2) 806 0 R (3.25.124.51.3) 810 0 R (3.25.124.52.3) 814 0 R (3.25.125.2) 818 0 R (3.25.126.2) 822 0 R (3.26.1) 826 0 R (3.26.127.2) 830 0 R (3.26.128.2) 834 0 R (3.26.129.2) 838 0 R (3.26.129.53.3) 842 0 R (3.26.130.2) 846 0 R (3.26.131.2) 850 0 R (3.27.1) 854 0 R (3.27.132.2) 858 0 R (3.27.133.2) 862 0 R (3.27.134.2) 866 0 R (3.27.134.54.3) 870 0 R (3.27.135.2) 874 0 R (3.27.136.2) 878 0 R (3.28.1) 882 0 R (3.28.137.2) 886 0 R (3.28.138.2) 890 0 R (3.28.139.2) 894 0 R (3.28.139.55.3) 898 0 R (3.28.139.56.3) 902 0 R (3.28.140.2) 906 0 R (3.28.141.2) 910 0 R (3.29.1) 914 0 R (3.29.142.2) 918 0 R (3.29.143.2) 922 0 R (3.29.144.2) 926 0 R (3.29.144.57.3) 930 0 R (3.29.144.58.3) 934 0 R (3.29.145.2) 938 0 R (3.29.146.2) 942 0 R (3.3.1) 90 0 R (3.3.12.2) 94 0 R (3.3.13.2) 98 0 R (3.3.14.2) 102 0 R (3.3.14.7.3) 106 0 R (3.3.14.8.3) 110 0 R (3.3.15.2) 114 0 R (3.3.16.2) 118 0 R (3.30.1) 946 0 R (3.30.147.2) 950 0 R (3.30.148.2) 954 0 R (3.30.149.2) 958 0 R (3.30.149.59.3) 962 0 R (3.30.149.60.3) 966 0 R (3.30.150.2) 970 0 R (3.30.151.2) 974 0 R (3.31.1) 978 0 R (3.31.152.2) 982 0 R (3.31.153.2) 986 0 R (3.31.154.2) 990 0 R (3.31.154.61.3) 994 0 R (3.31.154.62.3) 998 0 R (3.31.155.2) 1002 0 R (3.31.156.2) 1006 0 R (3.32.1) 1010 0 R (3.32.157.2) 1014 0 R (3.32.158.2) 1018 0 R (3.32.159.2) 1022 0 R (3.32.159.63.3) 1026 0 R (3.32.160.2) 1030 0 R (3.32.161.2) 1034 0 R (3.33.1) 1038 0 R (3.33.162.2) 1042 0 R (3.33.163.2) 1046 0 R (3.33.164.2) 1050 0 R (3.33.164.64.3) 1054 0 R (3.33.165.2) 1058 0 R (3.33.166.2) 1062 0 R (3.34.1) 1066 0 R (3.34.167.2) 1070 0 R (3.34.168.2) 1074 0 R (3.34.169.2) 1078 0 R (3.34.169.65.3) 1082 0 R (3.34.170.2) 1086 0 R (3.34.171.2) 1090 0 R (3.35.1) 1094 0 R (3.35.172.2) 1098 0 R (3.35.173.2) 1102 0 R (3.35.174.2) 1106 0 R (3.35.174.66.3) 1110 0 R (3.35.175.2) 1114 0 R (3.35.176.2) 1118 0 R (3.36.1) 1122 0 R (3.36.177.2) 1126 0 R (3.36.178.2) 1130 0 R (3.36.179.2) 1134 0 R (3.36.179.67.3) 1138 0 R (3.36.180.2) 1142 0 R (3.36.181.2) 1146 0 R (3.37.1) 1150 0 R (3.37.182.2) 1154 0 R (3.37.183.2) 1158 0 R (3.37.184.2) 1162 0 R (3.37.184.68.3) 1166 0 R (3.37.185.2) 1170 0 R (3.37.186.2) 1174 0 R (3.38.1) 1178 0 R (3.38.187.2) 1182 0 R (3.38.188.2) 1186 0 R (3.38.189.2) 1190 0 R (3.38.189.69.3) 1194 0 R (3.38.190.2) 1198 0 R (3.38.191.2) 1202 0 R (3.4.1) 122 0 R (3.4.17.2) 126 0 R (3.4.18.2) 130 0 R (3.4.19.10.3) 142 0 R (3.4.19.2) 134 0 R (3.4.19.9.3) 138 0 R (3.4.20.2) 146 0 R (3.4.21.2) 150 0 R (3.5.1) 154 0 R (3.5.22.2) 158 0 R (3.5.23.2) 162 0 R (3.5.24.11.3) 170 0 R (3.5.24.12.3) 174 0 R (3.5.24.2) 166 0 R (3.5.25.2) 178 0 R (3.5.26.2) 182 0 R (3.6.1) 186 0 R (3.6.27.2) 190 0 R (3.6.28.2) 194 0 R (3.6.29.13.3) 202 0 R (3.6.29.14.3) 206 0 R (3.6.29.2) 198 0 R (3.6.30.2) 210 0 R (3.6.31.2) 214 0 R (3.7.1) 218 0 R (3.7.32.2) 222 0 R (3.7.33.2) 226 0 R (3.7.34.15.3) 234 0 R (3.7.34.16.3) 238 0 R (3.7.34.2) 230 0 R (3.7.35.2) 242 0 R (3.7.36.2) 246 0 R (3.8.1) 250 0 R (3.8.37.2) 254 0 R (3.8.38.2) 258 0 R (3.8.39.17.3) 266 0 R (3.8.39.18.3) 270 0 R (3.8.39.2) 262 0 R (3.8.40.2) 274 0 R (3.8.41.2) 278 0 R (3.9.1) 282 0 R (3.9.42.2) 286 0 R (3.9.43.2) 290 0 R (3.9.44.19.3) 298 0 R (3.9.44.2) 294 0 R (3.9.44.20.3) 302 0 R (3.9.45.2) 306 0 R (3.9.46.2) 310 0 R (30) 1370 0 R (300) 1592 0 R (3000) 3809 0 R (3001) 3810 0 R (3002) 3811 0 R (3003) 3812 0 R (3004) 3813 0 R (3005) 3814 0 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+0000369991 00000 n +0000369280 00000 n +0000368783 00000 n +0000369738 00000 n +0000369801 00000 n +0000369928 00000 n +0000369434 00000 n +0000369589 00000 n +0000370107 00000 n +0000373336 00000 n +0000373367 00000 n +0000392832 00000 n +0000400659 00000 n +0000412404 00000 n +0000437699 00000 n +0000439681 00000 n +0000439807 00000 n +0000439915 00000 n +0000439988 00000 n +0000468996 00000 n +0000517574 00000 n +0000517615 00000 n +0000517655 00000 n +0000517887 00000 n trailer << -/Size 4227 -/Root 4225 0 R -/Info 4226 0 R +/Size 4286 +/Root 4284 0 R +/Info 4285 0 R >> startxref -502023 +518043 %%EOF diff --git a/alliance/src/genlib/doc/genlib.sgm b/alliance/src/genlib/doc/genlib.sgm index c00e67d2..f60e9468 100644 --- a/alliance/src/genlib/doc/genlib.sgm +++ b/alliance/src/genlib/doc/genlib.sgm @@ -36,6 +36,7 @@ + @@ -74,11 +75,18 @@ selw"> sel1"> sel0"> +r"> +rok"> +w"> +wok"> +reset"> shamt"> add_sub"> c32"> c31"> c30"> +i"> +o"> i0"> i1"> nq"> @@ -197,6 +205,7 @@ &man-dpgen-rom2; &man-dpgen-rom4; &man-dpgen-rf1; + &man-dpgen-fifo; &man-dpgen-rf1d; &man-dpgen-dff; &man-dpgen-dfft; diff --git a/alliance/src/genlib/doc/genlib/Makefile.am b/alliance/src/genlib/doc/genlib/Makefile.am index 0564af4b..448eabb8 100644 --- a/alliance/src/genlib/doc/genlib/Makefile.am +++ b/alliance/src/genlib/doc/genlib/Makefile.am @@ -36,6 +36,7 @@ pkghtml_DATA = \ ./man_dpgen_rom2.html \ ./man_dpgen_rom4.html \ ./man_dpgen_rf1.html \ + ./man_dpgen_fifo.html \ ./man_dpgen_rf1d.html \ ./man_dpgen_dff.html \ ./man_dpgen_dfft.html \ diff --git a/alliance/src/genlib/doc/genlib/genlib.html b/alliance/src/genlib/doc/genlib/genlib.html index 5516dbec..0ff42f77 100644 --- a/alliance/src/genlib/doc/genlib/genlib.html +++ b/alliance/src/genlib/doc/genlib/genlib.html @@ -5,8 +5,7 @@ > GenLib User's Manual

GenLib User's Manual

GenLib User's Manual

Jean-Paul Chaput

Jean-Paul Chaput

Frdric Ptrot

Frdric Ptrot
 --  Register File Macro-Generator
DPGEN_FIFO -- FIFO Macro-Generator
DPGEN_RF1D --  Register File with Decoder Macro-Generator
DPGEN_ADSB2F

DPGEN_ADSB2F

DPGEN_ADSB2F

Synopsis

Description

Generate a Generate a N bits adder/substractor named N bits adder/substractor named modelnamemodelname.

i1 : first operand (input, : first operand (input, NN bits).

  • i0 : second operand (input, : second operand (input, NN bits).

  • q : output ( : output (NN bits).

  • DPGEN_AND2

    DPGEN_AND2

    DPGEN_AND2

    Synopsis

    • Description

    Generate a Generate a N bits two inputs AND with an output power of N bits two inputs AND with an output power of drivedrive - named modelnamemodelname.

    Valid Valid drivedrive are : 2 or 4.

    DPGEN_AND3

    DPGEN_AND3

    DPGEN_AND3

    Synopsis

    Description

    Generate a Generate a N bits three inputs AND with an output power of N bits three inputs AND with an output power of drivedrive - named modelnamemodelname.

    Valid Valid drivedrive are : 2 or 4.

    DPGEN_AND4

    DPGEN_AND4

    DPGEN_AND4

    Synopsis

    Description

    Generate a Generate a N bits four inputs AND with an output power of N bits four inputs AND with an output power of drivedrive - named modelnamemodelname.

    Valid Valid drivedrive are : 2 or 4.

    DPGEN_BUFF

    DPGEN_BUFF

    DPGEN_BUFF

    Synopsis

    Description

    Generate a Generate a N bits buffer with an output power of N bits buffer with an output power of drivedrive - named modelnamemodelname.

    Valid Valid drivedrive are : 2, 3 or 4.

    DPGEN_BUSE

    DPGEN_BUSE

    DPGEN_BUSE

    Synopsis

    Description

    Generate a Generate a N bits two inputs tristate with named N bits two inputs tristate with named modelnamemodelname.

    i0 : input ( : input (NN bits).

  • q : output ( : output (NN bits).

  • DPGEN_CONST

    • DPGEN_CONST

    DPGEN_CONST

    Name

    Synopsis

    Description

    Generate a Generate a N bits constant named N bits constant named modelnamemodelname.

    Terminal Names

    q : the constant (output, : the constant (output, NN bit).

  • Behavior

    Example

    See Also

    DPGEN_DFF

    DPGEN_DFF

    DPGEN_DFF

    Name

    Synopsis

    • Description

    Generate a Generate a N bits dynamic flip-flop named N bits dynamic flip-flop named modelnamemodelname. The two latches of this flip-flop are dynamic, i.e. the data is stored in a capacitor. @@ -176,7 +177,7 @@ CLASS="LITERAL" >

    Terminal Names

    i0 : data input ( : data input (NN bits).

  • q : output ( : output (NN bits).

  • Example

    See Also

    DPGEN_DFFT

    DPGEN_DFFT

    DPGEN_DFFT

    Name

    Synopsis

    • Description

    Generate a Generate a NN bits dynamic flip-flop with scan-path - named modelnamemodelname. The two latches of this flip-flop are dynamic, i.e. the data is stored in a capacitor.

    Terminal Names

    i0 : data input ( : data input (NN bits).

  • q : output ( : output (NN bits).

  • Example

    See Also

    DPGEN_INV

    DPGEN_INV

    DPGEN_INV

    Synopsis

    • Description

    Generate a Generate a N bits inverter with an output power of N bits inverter with an output power of drivedrive - named modelnamemodelname.

    Valid Valid drivedrive are : 1, 2, 3 or 4.

    DPGEN_MUX2

    DPGEN_MUX2

    DPGEN_MUX2

    Synopsis

    Description

    Generate a Generate a N bits two inputs multiplexer with named N bits two inputs multiplexer with named modelnamemodelname.

    Valid Valid drivedrive are : 1, 2 or 4.

    i1 : input ( : input (NN bits).

  • i0 : input ( : input (NN bits).

  • q : output ( : output (NN bits).

  • DPGEN_NAND2

    • DPGEN_NAND2

    DPGEN_NAND2

    Synopsis

    Description

    Generate a Generate a N bits two inputs NAND with an output power of N bits two inputs NAND with an output power of drivedrive - named modelnamemodelname.

    Valid Valid drivedrive are : 1 or 4.

    DPGEN_NAND2MASK

    DPGEN_NAND2MASK

    DPGEN_NAND2MASK

    Synopsis

    Description

    Generate a Generate a N bits conditionnal NAND mask named N bits conditionnal NAND mask named modelnamemodelname.

    ANDed with the mask - (suplied by constValconstVal).

    The constant The constant constValconstVal is given to the macro-generator call, therefore the value cannot be changed afterward : it's hard wired in the operator.

    A common error is to give a real C constant for the - constValconstVal argument. Be aware that it is a character string.

    i0 : input ( : input (NN bits).

  • q : output ( : output (NN bits).

  • DPGEN_NAND3

    • DPGEN_NAND3

    DPGEN_NAND3

    Synopsis

    Description

    Generate a Generate a N bits three inputs NAND with an output power of N bits three inputs NAND with an output power of drivedrive - named modelnamemodelname.

    Valid Valid drivedrive are : 1 or 4.

    DPGEN_NAND4

    DPGEN_NAND4

    DPGEN_NAND4

    Synopsis

    Description

    Generate a Generate a N bits four inputs NAND with an output power of N bits four inputs NAND with an output power of drivedrive - named modelnamemodelname.

    Valid Valid drivedrive are : 1 or 4.

    DPGEN_NBUSE

    DPGEN_NBUSE

    DPGEN_NBUSE

    Synopsis

    Description

    Generate a Generate a NN bits two inputs tristate with a complemented - output named modelnamemodelname.

    i0 : input ( : input (NN bits).

  • nq : output ( : output (NN bits).

  • DPGEN_NMUX2

    • DPGEN_NMUX2

    DPGEN_NMUX2

    Synopsis

    Description

    Generate a Generate a NN bits two inputs multiplexer with a complemented - output and a power of drive named drive named modelnamemodelname.

    Valid Valid drivedrive are : 2 or 4.

    i1 : input ( : input (NN bits).

  • i0 : input ( : input (NN bits).

  • nq : output ( : output (NN bits).

  • DPGEN_NOR2

    • DPGEN_NOR2

    DPGEN_NOR2

    Synopsis

    Description

    Generate a Generate a N bits two inputs NOR with an output power of N bits two inputs NOR with an output power of drivedrive - named modelnamemodelname.

    Valid Valid drivedrive are : 1 or 4.

    DPGEN_NOR2MASK

    DPGEN_NOR2MASK

    DPGEN_NOR2MASK

    Synopsis

    Description

    Generate a Generate a N bits conditionnal NOR mask named N bits conditionnal NOR mask named modelnamemodelname.

    ORed with the mask - (suplied by constValconstVal).

    The constant The constant constValconstVal is given to the macro-generator call, therefore the value cannot be changed afterward : it's hard wired in the operator.

    A common error is to give a real C constant for the - constValconstVal argument. Be aware that it is a character string.

    i0 : input ( : input (NN bits).

  • q : output ( : output (NN bits).

  • DPGEN_NOR3

    • DPGEN_NOR3

    DPGEN_NOR3

    Synopsis

    Description

    Generate a Generate a N bits three inputs NOR with an output power of N bits three inputs NOR with an output power of drivedrive - named modelnamemodelname.

    Valid Valid drivedrive are : 1 or 4.

    DPGEN_NOR4

    DPGEN_NOR4

    DPGEN_NOR4

    Synopsis

    Description

    Generate a Generate a N bits four inputs NOR with an output power of N bits four inputs NOR with an output power of drivedrive - named modelnamemodelname.

    Valid Valid drivedrive are : 1 or 4.

    DPGEN_NUL

    DPGEN_NUL

    DPGEN_NUL

    Name

    Synopsis

    Description

    Generate a Generate a N bits zero detector named N bits zero detector named modelnamemodelname.

    Terminal Names

    i0 : value to check (input, : value to check (input, NN bits).

  • Behavior

    Example

    See Also

    DPGEN_OR2

    DPGEN_OR2

    DPGEN_OR2

    Synopsis

    • Description

    Generate a Generate a N bits two inputs OR with an output power of N bits two inputs OR with an output power of drivedrive - named modelnamemodelname.

    Valid Valid drivedrive are : 2 or 4.

    DPGEN_OR3

    DPGEN_OR3

    DPGEN_OR3

    Synopsis

    Description

    Generate a Generate a N bits three inputs OR with an output power of N bits three inputs OR with an output power of drivedrive - named modelnamemodelname.

    Valid Valid drivedrive are : 2 or 4.

    DPGEN_OR4

    DPGEN_OR4

    DPGEN_OR4

    Synopsis

    Description

    Generate a Generate a N bits four inputs OR with an output power of N bits four inputs OR with an output power of drivedrive - named modelnamemodelname.

    Valid Valid drivedrive are : 2 or 4.

    DPGEN_RF1Next >>>

    DPGEN_RF1

    DPGEN_RF1

    Name

    Synopsis

    Description

    Generate a register file of Generate a register file of regNumber words of regNumber words of NN bits - whitout decoder named modelnamemodelname. The DPGEN_RF1R0selr have a bus width equal to have a bus width equal to regNumberregNumber. One bit for each word.

    Terminal Names

    selr : the decoded read address (input, : the decoded read address (input, regNumberregNumber bits).

  • selw : the decoded write address (input, : the decoded write address (input, regNumberregNumber bits).

  • datain0 : first write bus (input, : first write bus (input, NN bits).

  • datain1 : second write bus (input, : second write bus (input, NN bits).

  • dataout : read bus (output, : read bus (output, NN bits).

  • Example

    See Also

    Next >>>DPGEN_RF1DDPGEN_FIFO
    • DPGEN_RF1D<<< Previous

    DPGEN_RF1D

    DPGEN_RF1D

    Name

    Synopsis

    Description

    Generate a register file of Generate a register file of regNumber words of regNumber words of NN bits - with decoder named modelnamemodelname. The DPGEN_RF1DR0, adw : the width ( : the width (YY) of those signals is - computed from regNumberregNumber :

    Terminal Names

    adr : the read address (input, : the read address (input, YY bits).

  • adw : the write address (input, : the write address (input, YY bits).

  • datain0 : first write bus (input, : first write bus (input, NN bits).

  • datain1 : second write bus (input, : second write bus (input, NN bits).

  • dataout : read bus (output, : read bus (output, NN bits).

  • Example

    See Also

    <<< PreviousDPGEN_RF1DPGEN_FIFO
    • DPGEN_ROM2

    DPGEN_ROM2

    DPGEN_ROM2

    Name

    Synopsis

    Description

    Generate a Generate a N bits 2 words optimized ROM named N bits 2 words optimized ROM named modelnamemodelname.

    Terminal Names

    q : the selected word (output, : the selected word (output, NN bit).

  • Behavior

    Example

    See Also

    DPGEN_ROM4

    DPGEN_ROM4

    DPGEN_ROM4

    Name

    Synopsis

    • Description

    Generate a Generate a N bits 2 words optimized ROM named N bits 2 words optimized ROM named modelnamemodelname.

    Terminal Names

    q : the selected word (output, : the selected word (output, NN bit).

  • Behavior

    Example

    See Also

    DPGEN_SFF

    DPGEN_SFF

    DPGEN_SFF

    Name

    Synopsis

    • Description

    Generate a Generate a N bits static flip-flop named N bits static flip-flop named modelnamemodelname. The two latches of this flip-flop are static, i.e. each one is made of two interters looped togethers. @@ -176,7 +177,7 @@ CLASS="LITERAL" >

    Terminal Names

    i0 : data input ( : data input (NN bits).

  • q : output ( : output (NN bits).

  • Example

    See Also

    DPGEN_SFFT

    DPGEN_SFFT

    DPGEN_SFFT

    Name

    Synopsis

    • Description

    Generate a Generate a NN bits static flip-flop with scan-path - named modelnamemodelname. The two latches of this flip-flop are i.e. each one is made of two interters looped togethers.

    Terminal Names

    i0 : data input ( : data input (NN bits).

  • q : output ( : output (NN bits).

  • Example

    See Also

    DPGEN_SHIFT

    DPGEN_SHIFT

    DPGEN_SHIFT

    Synopsis

    • Description

    Generate a Generate a N bits shifter with name N bits shifter with name modelnamemodelname.

    shamt : specifies the shift amount. The width of this signal - (YY) is computed from the operator's width : shamt : the shift amount (input, : the shift amount (input, YY bits).

  • : value to shift (input, i : value to shift (input, NN bits).

  • : output ( o : output (NN bits).

  • Example

    See Also

    DPGEN_XNOR2

    DPGEN_XNOR2

    DPGEN_XNOR2

    Synopsis

    • Description

    Generate a Generate a NN bits two inputs exclusive NOR with an output - power of drive named drive named modelnamemodelname.

    Valid Valid drivedrive are : 1 or 4.

    DPGEN_XNOR2MASK

    DPGEN_XNOR2MASK

    DPGEN_XNOR2MASK

    Synopsis

    Description

    Generate a Generate a N bits conditionnal XNOR mask named N bits conditionnal XNOR mask named modelnamemodelname.

    XORed with the mask - (suplied by constValconstVal).

    The constant The constant constValconstVal is given to the macro-generator call, therefore the value cannot be changed afterward : it's hard wired in the operator.

    A common error is to give a real C constant for the - constValconstVal argument. Be aware that it is a character string.

    i0 : input ( : input (NN bits).

  • q : output ( : output (NN bits).

  • DPGEN_XOR2

    • DPGEN_XOR2

    DPGEN_XOR2

    Synopsis

    Description

    Generate a Generate a NN bits two inputs exclusive OR with an output - power of drive named drive named modelnamemodelname.

    Valid Valid drivedrive are : 1 or 4.

    genlib

    genlib

    genlib
    genlib [ [ -cklmnv-cklmnv - ] [--no-rm-core] [--keep-makefile] [--keep-exec] [--keep-log] [--no-exec] [--verbose] {program} [-e program_argsprogram_args]

    Examples

    Compile and run a file GENLIB_MACRO

    GENLIB_MACRO

    GENLIB_MACRO

    Synopsis

    long long functionfunction : (mandatory) specify which macro-generator is to be invoked. For example, to create a two entry multiplexer @@ -224,11 +227,9 @@ CLASS="LITERAL" >

    char* char* modelnamemodelname : (mandatory) specify the name of the model to be generated. For example : @@ -242,11 +243,9 @@ CLASS="LITERAL" >

    long long flagsflags : (mandatory) tells which views are to be generated. It is a logical combination of the following values : @@ -283,9 +282,9 @@ CLASS="EMPHASIS" CLASS="LITERAL" >F_LSB_FIRST : the terminal of index zero is matched - to the LSBLSB, thus a 32 bits vector will be written : F_MSB_FIRST : the terminal of index zero is matched - to the MSBMSB, thus a 32 bits vector will be written : "signal[0:31]" (aka. (aka. IBMIBM notation).

    long long NN : (mandatory) width of the model's bus to be generated. @@ -334,11 +331,9 @@ CLASS="REPLACEABLE" >

    long long drivedrive : (optional) output power drive.

    long long regNumberregNumber : (optional) number of registers or depth - of for a FIFOFIFO macro-generator.

    char* char* constvalconstval : (optional) a character string holding a constant. For example :

  • DPGEN_SHROT(3)

  • DPGEN_FIFO(3)

  • Alliance - genlib User's Manual

     --  Register File Macro-Generator
    DPGEN_FIFO -- FIFO Macro-Generator
    DPGEN_RF1D --  Register File with Decoder Macro-Generator
    + + + + DPGEN_FIFO + 3 + ASIM/LIP6 + + + + DPGEN_FIFO + FIFO Macro-Generator + + + + + + #include <genlib.h> + + void GENLIB_MACRO + DPGEN_FIFO + char *modelname + long flags + long N + + + + + + Description + + Generate a FIFO of ®Number; words of &N; bits named &modelname;. + + How it works : + + + &datain0; and &datain1; : the two write busses. Only one + is used to actually write the register word, it is selected by + the &sel; signal. + + + + &sel; : when set to &zero; the &datain0; is used to write + the register word, otherwise it will be &datain1;. + + + + &r;, &rok; : set &r; when a word is requested, &rok; tells + that a word has effectively been popped out of the FIFO (this is + indicate an empty FIFO). + + + + &w;, &wok; : set &w; when a word is pushed, &wok; tells + that the word has effectively been pushed in the FIFO (this is + indicate that the FIFO is full). + + + + + + + Terminal Names + + + + &ck; : clock signal (input, 1 bit). + + + &reset; : reset signal (input, 1 bit). + + + &r; : read requested (input, 1 bits). + + + &w; : write requested (input, 1 bits). + + + &rok; : read acknowledge (output, 1 bits). + + + &wok; : write acknowledge (output, 1 bits). + + + &sel; : select the write bus (input, 1 bit). + + + &datain0; : first write bus (input, &N; bits). + + + &datain1; : second write bus (input, &N; bits). + + + &dataout; : read bus (output, &N; bits). + + + &vdd; : power. + + + &vss; : ground. + + + + + + + + + Example + + + +GENLIB_MACRO(DPGEN_RF1, "model_fifox8_32" + , F_BEHAV|F_PLACE + , 32 /* Words size. */ + , 8 /* Number of words. */ + ); + +GENLIB_LOINS( "model_fifox8_32" + , "instance1_fifo1_32" + , "ck" + , "r" + , "w" + , "rok" + , "wok" + , "sel" + , "datain0[31:0]" + , "datain1[31:0]" + , "dataout[31:0]" + , "vdd", "vss", NULL + ); + + + + + + &man-dpgen-see-also; + + diff --git a/alliance/src/genlib/doc/man_genlib_macro.sgm b/alliance/src/genlib/doc/man_genlib_macro.sgm index ea3a7e99..fd315ab0 100644 --- a/alliance/src/genlib/doc/man_genlib_macro.sgm +++ b/alliance/src/genlib/doc/man_genlib_macro.sgm @@ -258,10 +258,12 @@ DPGEN_SHIFT 3 + @@ -300,6 +302,10 @@ DPGEN_RF1R0 3 + + DPGEN_FIFO + 3 + DPGEN_RF1D 3 diff --git a/alliance/src/genlib/man3/DPGEN_ADSB2F.3 b/alliance/src/genlib/man3/DPGEN_ADSB2F.3 index 7726a1de..43419047 100644 --- a/alliance/src/genlib/man3/DPGEN_ADSB2F.3 +++ b/alliance/src/genlib/man3/DPGEN_ADSB2F.3 @@ -1,57 +1,63 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_ADSB2F" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_ADSB2F" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_ADSB2F \- Adder/Substractor Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_ADSB2F, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_ADSB2F, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB); +\fR +.SH "DESCRIPTION" .PP -Generate a \fIN\fR bits adder/substractor named \fImodelname\fR. +Generate a \fIN\fR bits adder/substractor named \fImodelname\fR\&. .PP How it works : .TP 0.2i \(bu -if the add_sub signal is set to '0' an addition is +if the add_sub signal is set to \&'0' an addition is performed, otherwise it's a substraction. .TP 0.2i \(bu Operation can be either signed or unsigned. In unsigned mode c31 is the overflow, in unsigned mode you have to compute -overflow by \fBXORing\fR c31 and c30. -.PP +overflow by \fBXORing\fR c31 and c30\&. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. add_sub : select addition or substraction (input, 1 bit). -.IP 2. +.TP 3 +2. c31 : carry out. In unsigned mode, this is the overflow (output, 1 bits). -.IP 3. +.TP 3 +3. c30 : used to compute overflow in signed mode : overflow := c31 xor c30 (output, 1 bits). -.IP 4. +.TP 3 +4. i1 : first operand (input, \fIN\fR bits). -.IP 5. +.TP 3 +5. i0 : second operand (input, \fIN\fR bits). -.IP 6. +.TP 3 +6. q : output (\fIN\fR bits). -.IP 7. +.TP 3 +7. vdd : power. -.IP 8. +.TP 3 +8. vss : ground. .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_ADSB2F, "model_adsb2f_32" , F_BEHAV|F_PLACE @@ -69,7 +75,6 @@ GENLIB_LOINS( "model_adsb2f_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_AND2.3 b/alliance/src/genlib/man3/DPGEN_AND2.3 index 316a7219..eb495da2 100644 --- a/alliance/src/genlib/man3/DPGEN_AND2.3 +++ b/alliance/src/genlib/man3/DPGEN_AND2.3 @@ -1,47 +1,49 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_AND2" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_AND2" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_AND2 \- AND2 Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_AND2, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB, - long \fIdrive\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_AND2, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB, long \fIdrive\fB); +\fR +.SH "DESCRIPTION" .PP Generate a \fIN\fR bits two inputs AND with an output power of \fIdrive\fR -named \fImodelname\fR. +named \fImodelname\fR\&. .PP Valid \fIdrive\fR are : 2 or 4. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. i1 : input. -.IP 2. +.TP 3 +2. i0 : input. -.IP 3. +.TP 3 +3. q : output. -.IP 4. +.TP 3 +4. vdd : power. -.IP 5. +.TP 3 +5. vss : ground. .SS "BEHAVIOR" -.sp + .nf q <= i0 and i1 -.sp .fi .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_AND2, "model_and2_32" , F_BEHAV|F_PLACE @@ -57,7 +59,6 @@ GENLIB_LOINS( "model_and2_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_AND3.3 b/alliance/src/genlib/man3/DPGEN_AND3.3 index 1ec6dd54..9c1a426f 100644 --- a/alliance/src/genlib/man3/DPGEN_AND3.3 +++ b/alliance/src/genlib/man3/DPGEN_AND3.3 @@ -1,49 +1,52 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_AND3" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_AND3" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_AND3 \- AND3 Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_AND3, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB, - long \fIdrive\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_AND3, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB, long \fIdrive\fB); +\fR +.SH "DESCRIPTION" .PP Generate a \fIN\fR bits three inputs AND with an output power of \fIdrive\fR -named \fImodelname\fR. +named \fImodelname\fR\&. .PP Valid \fIdrive\fR are : 2 or 4. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. i2 : input. -.IP 2. +.TP 3 +2. i1 : input. -.IP 3. +.TP 3 +3. i0 : input. -.IP 4. +.TP 3 +4. q : output. -.IP 5. +.TP 3 +5. vdd : power. -.IP 6. +.TP 3 +6. vss : ground. .SS "BEHAVIOR" -.sp + .nf q <= not(i0 and i1 and i2) -.sp .fi .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_AND3, "model_and3_32" , F_BEHAV|F_PLACE @@ -60,7 +63,6 @@ GENLIB_LOINS( "model_and3_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_AND4.3 b/alliance/src/genlib/man3/DPGEN_AND4.3 index 7e1f6b6a..6b035f64 100644 --- a/alliance/src/genlib/man3/DPGEN_AND4.3 +++ b/alliance/src/genlib/man3/DPGEN_AND4.3 @@ -1,51 +1,55 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_AND4" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_AND4" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_AND4 \- AND4 Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_AND4, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB, - long \fIdrive\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_AND4, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB, long \fIdrive\fB); +\fR +.SH "DESCRIPTION" .PP Generate a \fIN\fR bits four inputs AND with an output power of \fIdrive\fR -named \fImodelname\fR. +named \fImodelname\fR\&. .PP Valid \fIdrive\fR are : 2 or 4. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. i3 : input. -.IP 2. +.TP 3 +2. i2 : input. -.IP 3. +.TP 3 +3. i1 : input. -.IP 4. +.TP 3 +4. i0 : input. -.IP 5. +.TP 3 +5. q : output. -.IP 6. +.TP 3 +6. vdd : power. -.IP 7. +.TP 3 +7. vss : ground. .SS "BEHAVIOR" -.sp + .nf q <= i0 and i1 and i2 and i3 -.sp .fi .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_AND4, "model_and4_32" , F_BEHAV|F_PLACE @@ -63,7 +67,6 @@ GENLIB_LOINS( "model_and4_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_BUFF.3 b/alliance/src/genlib/man3/DPGEN_BUFF.3 index 486e954e..a662a7db 100644 --- a/alliance/src/genlib/man3/DPGEN_BUFF.3 +++ b/alliance/src/genlib/man3/DPGEN_BUFF.3 @@ -1,45 +1,46 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_BUFF" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_BUFF" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_BUFF \- Buffer Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_BUFF, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB, - long \fIdrive\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_BUFF, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB, long \fIdrive\fB); +\fR +.SH "DESCRIPTION" .PP Generate a \fIN\fR bits buffer with an output power of \fIdrive\fR -named \fImodelname\fR. +named \fImodelname\fR\&. .PP Valid \fIdrive\fR are : 2, 3 or 4. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. i0 : input. -.IP 2. +.TP 3 +2. q : output. -.IP 3. +.TP 3 +3. vdd : power. -.IP 4. +.TP 3 +4. vss : ground. .SS "BEHAVIOR" -.sp + .nf q <= i0 -.sp .fi .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO( DPGEN_BUFF , "model_buff_32" @@ -54,7 +55,6 @@ GENLIB_LOINS( "model_buff_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_BUSE.3 b/alliance/src/genlib/man3/DPGEN_BUSE.3 index 485d6028..59e221a1 100644 --- a/alliance/src/genlib/man3/DPGEN_BUSE.3 +++ b/alliance/src/genlib/man3/DPGEN_BUSE.3 @@ -1,44 +1,47 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_BUSE" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_BUSE" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_BUSE \- tristate Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_BUSE, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_BUSE, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB); +\fR +.SH "DESCRIPTION" .PP -Generate a \fIN\fR bits two inputs tristate with named \fImodelname\fR. +Generate a \fIN\fR bits two inputs tristate with named \fImodelname\fR\&. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. cmd : select (1 bit). -.IP 2. +.TP 3 +2. i0 : input (\fIN\fR bits). -.IP 3. +.TP 3 +3. q : output (\fIN\fR bits). -.IP 4. +.TP 3 +4. vdd : power. -.IP 5. +.TP 3 +5. vss : ground. .SS "BEHAVIOR" -.sp + .nf ts:BLOCK(cmd = '1') BEGIN q <= GUARDED i0; END -.sp .fi .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_BUSE, "model_buse_32" , F_BEHAV|F_PLACE @@ -53,7 +56,6 @@ GENLIB_LOINS( "model_buse_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_CONST.3 b/alliance/src/genlib/man3/DPGEN_CONST.3 index ec5176af..053015b4 100644 --- a/alliance/src/genlib/man3/DPGEN_CONST.3 +++ b/alliance/src/genlib/man3/DPGEN_CONST.3 @@ -1,40 +1,40 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_CONST" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_CONST" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_CONST \- Constant Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_CONST, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB, - char *\fIconstVal0\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_CONST, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB, char *\fIconstVal0\fB); +\fR +.SH "DESCRIPTION" .PP -Generate a \fIN\fR bits constant named \fImodelname\fR. +Generate a \fIN\fR bits constant named \fImodelname\fR\&. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. q : the constant (output, \fIN\fR bit). -.IP 2. +.TP 3 +2. vdd : power. -.IP 3. +.TP 3 +3. vss : ground. .SS "BEHAVIOR" -.sp + .nf q <= constVal; -.sp .fi .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_CONST, "model_const_0xFFFF0000" , F_BEHAV|F_PLACE @@ -48,7 +48,6 @@ GENLIB_LOINS( "model_const_0xFFFF0000" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_DFF.3 b/alliance/src/genlib/man3/DPGEN_DFF.3 index bf10bbd8..c544a835 100644 --- a/alliance/src/genlib/man3/DPGEN_DFF.3 +++ b/alliance/src/genlib/man3/DPGEN_DFF.3 @@ -1,47 +1,51 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_DFF" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_DFF" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_DFF \- Dynamic Flip-Flop Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_DFF, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_DFF, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB); +\fR +.SH "DESCRIPTION" .PP -Generate a \fIN\fR bits dynamic flip-flop named \fImodelname\fR. +Generate a \fIN\fR bits dynamic flip-flop named \fImodelname\fR\&. The two latches of this flip-flop are dynamic, i.e. the data is stored in a capacitor. .PP How it works : .TP 0.2i \(bu -wen when set to '1' enables the writing of the +wen when set to \&'1' enables the writing of the flip-flop. -.PP .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. wen : write enable (1 bit). -.IP 2. +.TP 3 +2. ck : clock signal (1 bit). -.IP 3. +.TP 3 +3. i0 : data input (\fIN\fR bits). -.IP 4. +.TP 3 +4. q : output (\fIN\fR bits). -.IP 5. +.TP 3 +5. vdd : power. -.IP 6. +.TP 3 +6. vss : ground. .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_DFF, "model_dff_32" , F_BEHAV|F_PLACE @@ -57,7 +61,6 @@ GENLIB_LOINS( "model_dff_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_DFFT.3 b/alliance/src/genlib/man3/DPGEN_DFFT.3 index 80e2d874..9e02ecff 100644 --- a/alliance/src/genlib/man3/DPGEN_DFFT.3 +++ b/alliance/src/genlib/man3/DPGEN_DFFT.3 @@ -1,62 +1,68 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_DFFT" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_DFFT" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_DFFT \- Dynamic Flip-Flop with Scan-Path Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_DFFT, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_DFFT, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB); +\fR +.SH "DESCRIPTION" .PP Generate a \fIN\fR bits dynamic flip-flop with scan-path -named \fImodelname\fR. The two latches of this flip-flop are +named \fImodelname\fR\&. The two latches of this flip-flop are dynamic, i.e. the data is stored in a capacitor. .PP How it works : .TP 0.2i \(bu -scan when set to '1' enables the scan-path mode. +scan when set to \&'1' enables the scan-path mode. Note that in scan-path mode, the wen signal is not effective. .TP 0.2i \(bu scin : the input of the scan-path. This terminal is -different from i0[0]. +different from i0[0]\&. The scout is q[N-1] (in the following example this is q[31]). .TP 0.2i \(bu -wen when set to '1' enables the writing of the +wen when set to \&'1' enables the writing of the flip-flop. -.PP .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. scan : scan-path mode (input, 1 bit). -.IP 2. +.TP 3 +2. scin : scan path in (input, 1 bit). -.IP 3. +.TP 3 +3. wen : write enable (input, 1 bit). -.IP 4. +.TP 3 +4. ck : clock signal (input, 1 bit). -.IP 5. +.TP 3 +5. i0 : data input (\fIN\fR bits). -.IP 6. +.TP 3 +6. q : output (\fIN\fR bits). -.IP 7. +.TP 3 +7. vdd : power. -.IP 8. +.TP 3 +8. vss : ground. .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_DFFT, "model_dfft_32" , F_BEHAV|F_PLACE @@ -74,7 +80,6 @@ GENLIB_LOINS( "model_dfft_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_FIFO.3 b/alliance/src/genlib/man3/DPGEN_FIFO.3 new file mode 100644 index 00000000..882dc70e --- /dev/null +++ b/alliance/src/genlib/man3/DPGEN_FIFO.3 @@ -0,0 +1,105 @@ +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_FIFO" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + +.SH NAME +DPGEN_FIFO \- FIFO Macro-Generator +.SH SYNOPSIS +.sp +\fB#include +.sp +void GENLIB_MACRO (DPGEN_FIFO, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB); +\fR +.SH "DESCRIPTION" +.PP +Generate a FIFO of \fIregNumber\fR words of \fIN\fR bits named \fImodelname\fR\&. +.PP +How it works : +.TP 0.2i +\(bu +datain0 and datain1 : the two write busses. Only one +is used to actually write the register word, it is selected by +the sel signal. +.TP 0.2i +\(bu +sel : when set to \&'0' the datain0 is used to write +the register word, otherwise it will be datain1\&. +.TP 0.2i +\(bu +r, rok : set r when a word is requested, rok tells +that a word has effectively been popped out of the FIFO (this is +indicate an empty FIFO). +.TP 0.2i +\(bu +w, wok : set w when a word is pushed, wok tells +that the word has effectively been pushed in the FIFO (this is +indicate that the FIFO is full). +.SS "TERMINAL NAMES" +.TP 3 +1. +ck : clock signal (input, 1 bit). +.TP 3 +2. +reset : reset signal (input, 1 bit). +.TP 3 +3. +r : read requested (input, 1 bits). +.TP 3 +4. +w : write requested (input, 1 bits). +.TP 3 +5. +rok : read acknowledge (output, 1 bits). +.TP 3 +6. +wok : write acknowledge (output, 1 bits). +.TP 3 +7. +sel : select the write bus (input, 1 bit). +.TP 3 +8. +datain0 : first write bus (input, \fIN\fR bits). +.TP 3 +9. +datain1 : second write bus (input, \fIN\fR bits). +.TP 3 +10. +dataout : read bus (output, \fIN\fR bits). +.TP 3 +11. +vdd : power. +.TP 3 +12. +vss : ground. +.SH "EXAMPLE" +.PP + +.nf +GENLIB_MACRO(DPGEN_RF1, "model_fifox8_32" + , F_BEHAV|F_PLACE + , 32 /* Words size. */ + , 8 /* Number of words. */ + ); + +GENLIB_LOINS( "model_fifox8_32" + , "instance1_fifo1_32" + , "ck" + , "r" + , "w" + , "rok" + , "wok" + , "sel" + , "datain0[31:0]" + , "datain1[31:0]" + , "dataout[31:0]" + , "vdd", "vss", NULL + ); + +.fi +.SH "SEE ALSO" +.PP +\fBGENLIB_MACRO\fR(3), +\fBgenlib\fR(1) diff --git a/alliance/src/genlib/man3/DPGEN_INV.3 b/alliance/src/genlib/man3/DPGEN_INV.3 index 661f890b..9becfef4 100644 --- a/alliance/src/genlib/man3/DPGEN_INV.3 +++ b/alliance/src/genlib/man3/DPGEN_INV.3 @@ -1,45 +1,46 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_INV" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_INV" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_INV \- Inverter Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_INV, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB, - long \fIdrive\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_INV, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB, long \fIdrive\fB); +\fR +.SH "DESCRIPTION" .PP Generate a \fIN\fR bits inverter with an output power of \fIdrive\fR -named \fImodelname\fR. +named \fImodelname\fR\&. .PP Valid \fIdrive\fR are : 1, 2, 3 or 4. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. i0 : input. -.IP 2. +.TP 3 +2. nq : output. -.IP 3. +.TP 3 +3. vdd : power. -.IP 4. +.TP 3 +4. vss : ground. .SS "BEHAVIOR" -.sp + .nf nq <= not(i0) -.sp .fi .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_INV, "model_inv_32" , F_BEHAV|F_PLACE @@ -54,7 +55,6 @@ GENLIB_LOINS( "model_inv_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_MUX2.3 b/alliance/src/genlib/man3/DPGEN_MUX2.3 index e9bdb798..12137e6a 100644 --- a/alliance/src/genlib/man3/DPGEN_MUX2.3 +++ b/alliance/src/genlib/man3/DPGEN_MUX2.3 @@ -1,48 +1,51 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_MUX2" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_MUX2" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_MUX2 \- Multiplexer Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_MUX2, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB, - long \fIdrive\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_MUX2, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB, long \fIdrive\fB); +\fR +.SH "DESCRIPTION" .PP -Generate a \fIN\fR bits two inputs multiplexer with named \fImodelname\fR. +Generate a \fIN\fR bits two inputs multiplexer with named \fImodelname\fR\&. .PP Valid \fIdrive\fR are : 1, 2 or 4. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. cmd : select (1 bit). -.IP 2. +.TP 3 +2. i1 : input (\fIN\fR bits). -.IP 3. +.TP 3 +3. i0 : input (\fIN\fR bits). -.IP 4. +.TP 3 +4. q : output (\fIN\fR bits). -.IP 5. +.TP 3 +5. vdd : power. -.IP 6. +.TP 3 +6. vss : ground. .SS "BEHAVIOR" -.sp + .nf q <= WITH cmd SELECT i0 WHEN '0', i1 WHEN '1'; -.sp .fi .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_MUX2, "model_mux2_32" , F_BEHAV|F_PLACE @@ -59,7 +62,6 @@ GENLIB_LOINS( "model_mux2_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_NAND2.3 b/alliance/src/genlib/man3/DPGEN_NAND2.3 index 63be3245..379a561d 100644 --- a/alliance/src/genlib/man3/DPGEN_NAND2.3 +++ b/alliance/src/genlib/man3/DPGEN_NAND2.3 @@ -1,47 +1,49 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_NAND2" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_NAND2" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_NAND2 \- NAND2 Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_NAND2, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB, - long \fIdrive\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_NAND2, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB, long \fIdrive\fB); +\fR +.SH "DESCRIPTION" .PP Generate a \fIN\fR bits two inputs NAND with an output power of \fIdrive\fR -named \fImodelname\fR. +named \fImodelname\fR\&. .PP Valid \fIdrive\fR are : 1 or 4. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. i1 : input. -.IP 2. +.TP 3 +2. i0 : input. -.IP 3. +.TP 3 +3. nq : output. -.IP 4. +.TP 3 +4. vdd : power. -.IP 5. +.TP 3 +5. vss : ground. .SS "BEHAVIOR" -.sp + .nf nq <= not(i0 and i1) -.sp .fi .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_NAND2, "model_nand2_32" , F_BEHAV|F_PLACE @@ -57,7 +59,6 @@ GENLIB_LOINS( "model_nand2_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_NAND2MASK.3 b/alliance/src/genlib/man3/DPGEN_NAND2MASK.3 index 7c0579dc..338d689d 100644 --- a/alliance/src/genlib/man3/DPGEN_NAND2MASK.3 +++ b/alliance/src/genlib/man3/DPGEN_NAND2MASK.3 @@ -1,37 +1,34 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_NAND2MASK" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_NAND2MASK" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_NAND2MASK \- Programmable Mask Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_NAND2MASK, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB, - char *\fIconstVal\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_NAND2MASK, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB, char *\fIconstVal\fB); +\fR +.SH "DESCRIPTION" .PP -Generate a \fIN\fR bits conditionnal NAND mask named \fImodelname\fR. +Generate a \fIN\fR bits conditionnal NAND mask named \fImodelname\fR\&. .PP How it works : .TP 0.2i \(bu -if the cmd signal is set to '0', the mask is NOT +if the cmd signal is set to \&'0', the mask is NOT applied, so the whole operator behave like an inverter. .TP 0.2i \(bu -if the cmd signal is set to '1', the mask IS +if the cmd signal is set to \&'1', the mask IS applied, the output is the \fBcomplemented\fR result of the input value \fBANDed\fR with the mask (suplied by \fIconstVal\fR). .PP -.PP The constant \fIconstVal\fR is given to the macro-generator call, therefore the value cannot be changed afterward : it's hard wired in the operator. @@ -39,27 +36,31 @@ hard wired in the operator. A common error is to give a real C constant for the \fIconstVal\fR argument. Be aware that it is a character string. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. cmd : mask control (1 bit). -.IP 2. +.TP 3 +2. i0 : input (\fIN\fR bits). -.IP 3. +.TP 3 +3. q : output (\fIN\fR bits). -.IP 4. +.TP 3 +4. vdd : power. -.IP 5. +.TP 3 +5. vss : ground. .SS "BEHAVIOR" -.sp + .nf nq <= WITH cmd SELECT not(i0) WHEN '0', not(i0 and X"0000FFFF") WHEN '1'; -.sp .fi .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_NAND2MASK, "model_nand2mask_0000FFFF_32" , F_BEHAV|F_PLACE @@ -75,7 +76,6 @@ GENLIB_LOINS( "model_nand2mask_0000FFFF_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_NAND3.3 b/alliance/src/genlib/man3/DPGEN_NAND3.3 index 16c9992d..97c07734 100644 --- a/alliance/src/genlib/man3/DPGEN_NAND3.3 +++ b/alliance/src/genlib/man3/DPGEN_NAND3.3 @@ -1,49 +1,52 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_NAND3" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_NAND3" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_NAND3 \- NAND3 Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_NAND3, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB, - long \fIdrive\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_NAND3, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB, long \fIdrive\fB); +\fR +.SH "DESCRIPTION" .PP Generate a \fIN\fR bits three inputs NAND with an output power of \fIdrive\fR -named \fImodelname\fR. +named \fImodelname\fR\&. .PP Valid \fIdrive\fR are : 1 or 4. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. i2 : input. -.IP 2. +.TP 3 +2. i1 : input. -.IP 3. +.TP 3 +3. i0 : input. -.IP 4. +.TP 3 +4. nq : output. -.IP 5. +.TP 3 +5. vdd : power. -.IP 6. +.TP 3 +6. vss : ground. .SS "BEHAVIOR" -.sp + .nf nq <= not(i0 and i1 and i2) -.sp .fi .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_NAND3, "model_nand3_32" , F_BEHAV|F_PLACE @@ -60,7 +63,6 @@ GENLIB_LOINS( "model_nand3_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_NAND4.3 b/alliance/src/genlib/man3/DPGEN_NAND4.3 index 548c769e..62263c1c 100644 --- a/alliance/src/genlib/man3/DPGEN_NAND4.3 +++ b/alliance/src/genlib/man3/DPGEN_NAND4.3 @@ -1,51 +1,55 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_NAND4" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_NAND4" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_NAND4 \- NAND4 Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_NAND4, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB, - long \fIdrive\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_NAND4, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB, long \fIdrive\fB); +\fR +.SH "DESCRIPTION" .PP Generate a \fIN\fR bits four inputs NAND with an output power of \fIdrive\fR -named \fImodelname\fR. +named \fImodelname\fR\&. .PP Valid \fIdrive\fR are : 1 or 4. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. i3 : input. -.IP 2. +.TP 3 +2. i2 : input. -.IP 3. +.TP 3 +3. i1 : input. -.IP 4. +.TP 3 +4. i0 : input. -.IP 5. +.TP 3 +5. nq : output. -.IP 6. +.TP 3 +6. vdd : power. -.IP 7. +.TP 3 +7. vss : ground. .SS "BEHAVIOR" -.sp + .nf nq <= not(i0 and i1 and i2 and i3) -.sp .fi .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_NAND4, "model_nand4_32" , F_BEHAV|F_PLACE @@ -63,7 +67,6 @@ GENLIB_LOINS( "model_nand4_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_NBUSE.3 b/alliance/src/genlib/man3/DPGEN_NBUSE.3 index 15f12da2..30a41c94 100644 --- a/alliance/src/genlib/man3/DPGEN_NBUSE.3 +++ b/alliance/src/genlib/man3/DPGEN_NBUSE.3 @@ -1,45 +1,48 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_NBUSE" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_NBUSE" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_NBUSE \- Tristate Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_NBUSE, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_NBUSE, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB); +\fR +.SH "DESCRIPTION" .PP Generate a \fIN\fR bits two inputs tristate with a complemented -output named \fImodelname\fR. +output named \fImodelname\fR\&. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. cmd : select (1 bit). -.IP 2. +.TP 3 +2. i0 : input (\fIN\fR bits). -.IP 3. +.TP 3 +3. nq : output (\fIN\fR bits). -.IP 4. +.TP 3 +4. vdd : power. -.IP 5. +.TP 3 +5. vss : ground. .SS "BEHAVIOR" -.sp + .nf nts:BLOCK(cmd = '1') BEGIN nq <= GUARDED not(i0); END -.sp .fi .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_NBUSE, "model_nbuse_32" , F_BEHAV|F_PLACE @@ -54,7 +57,6 @@ GENLIB_LOINS( "model_nbuse_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_NMUX2.3 b/alliance/src/genlib/man3/DPGEN_NMUX2.3 index bb69b19e..1e39eeb8 100644 --- a/alliance/src/genlib/man3/DPGEN_NMUX2.3 +++ b/alliance/src/genlib/man3/DPGEN_NMUX2.3 @@ -1,49 +1,52 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_NMUX2" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_NMUX2" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_NMUX2 \- Multiplexer Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_NMUX2, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB, - long \fIdrive\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_NMUX2, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB, long \fIdrive\fB); +\fR +.SH "DESCRIPTION" .PP Generate a \fIN\fR bits two inputs multiplexer with a complemented -output and a power of \fIdrive\fR named \fImodelname\fR. +output and a power of \fIdrive\fR named \fImodelname\fR\&. .PP Valid \fIdrive\fR are : 2 or 4. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. cmd : select (1 bit). -.IP 2. +.TP 3 +2. i1 : input (\fIN\fR bits). -.IP 3. +.TP 3 +3. i0 : input (\fIN\fR bits). -.IP 4. +.TP 3 +4. nq : output (\fIN\fR bits). -.IP 5. +.TP 3 +5. vdd : power. -.IP 6. +.TP 3 +6. vss : ground. .SS "BEHAVIOR" -.sp + .nf nq <= WITH cmd SELECT not i0 WHEN '0', not i1 WHEN '1'; -.sp .fi .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_NMUX2, "model_nmux2_32" , F_BEHAV|F_PLACE @@ -60,7 +63,6 @@ GENLIB_LOINS( "model_nmux2_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_NOR2.3 b/alliance/src/genlib/man3/DPGEN_NOR2.3 index 057deaea..a87e5ee3 100644 --- a/alliance/src/genlib/man3/DPGEN_NOR2.3 +++ b/alliance/src/genlib/man3/DPGEN_NOR2.3 @@ -1,47 +1,49 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_NOR2" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_NOR2" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_NOR2 \- NOR2 Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_NOR2, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB, - long \fIdrive\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_NOR2, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB, long \fIdrive\fB); +\fR +.SH "DESCRIPTION" .PP Generate a \fIN\fR bits two inputs NOR with an output power of \fIdrive\fR -named \fImodelname\fR. +named \fImodelname\fR\&. .PP Valid \fIdrive\fR are : 1 or 4. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. i1 : input. -.IP 2. +.TP 3 +2. i0 : input. -.IP 3. +.TP 3 +3. nq : output. -.IP 4. +.TP 3 +4. vdd : power. -.IP 5. +.TP 3 +5. vss : ground. .SS "BEHAVIOR" -.sp + .nf nq <= not(i0 or i1) -.sp .fi .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_NOR2, "model_nor2_32" , F_BEHAV|F_PLACE @@ -57,7 +59,6 @@ GENLIB_LOINS( "model_nor2_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_NOR2MASK.3 b/alliance/src/genlib/man3/DPGEN_NOR2MASK.3 index a15b2ee6..21f891cf 100644 --- a/alliance/src/genlib/man3/DPGEN_NOR2MASK.3 +++ b/alliance/src/genlib/man3/DPGEN_NOR2MASK.3 @@ -1,37 +1,34 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_NOR2MASK" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_NOR2MASK" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_NOR2MASK \- Programmable Mask Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_NOR2MASK, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB, - char *\fIconstVal\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_NOR2MASK, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB, char *\fIconstVal\fB); +\fR +.SH "DESCRIPTION" .PP -Generate a \fIN\fR bits conditionnal NOR mask named \fImodelname\fR. +Generate a \fIN\fR bits conditionnal NOR mask named \fImodelname\fR\&. .PP How it works : .TP 0.2i \(bu -if the cmd signal is set to '0', the mask is NOT +if the cmd signal is set to \&'0', the mask is NOT applied, so the whole operator behave like an inverter. .TP 0.2i \(bu -if the cmd signal is set to '1', the mask IS +if the cmd signal is set to \&'1', the mask IS applied, the output is the \fBcomplemented\fR result of the input value \fBORed\fR with the mask (suplied by \fIconstVal\fR). .PP -.PP The constant \fIconstVal\fR is given to the macro-generator call, therefore the value cannot be changed afterward : it's hard wired in the operator. @@ -39,27 +36,31 @@ hard wired in the operator. A common error is to give a real C constant for the \fIconstVal\fR argument. Be aware that it is a character string. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. cmd : mask control (1 bit). -.IP 2. +.TP 3 +2. i0 : input (\fIN\fR bits). -.IP 3. +.TP 3 +3. q : output (\fIN\fR bits). -.IP 4. +.TP 3 +4. vdd : power. -.IP 5. +.TP 3 +5. vss : ground. .SS "BEHAVIOR" -.sp + .nf nq <= WITH cmd SELECT not(i0) WHEN '0', not(i0 or X"0000FFFF") WHEN '1'; -.sp .fi .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_NOR2MASK, "model_nor2mask_0000FFFF_32" , F_BEHAV|F_PLACE @@ -75,7 +76,6 @@ GENLIB_LOINS( "model_nor2mask_0000FFFF_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_NOR3.3 b/alliance/src/genlib/man3/DPGEN_NOR3.3 index a273fa6c..9cafb44f 100644 --- a/alliance/src/genlib/man3/DPGEN_NOR3.3 +++ b/alliance/src/genlib/man3/DPGEN_NOR3.3 @@ -1,49 +1,52 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_NOR3" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_NOR3" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_NOR3 \- NOR3 Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_NOR3, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB, - long \fIdrive\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_NOR3, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB, long \fIdrive\fB); +\fR +.SH "DESCRIPTION" .PP Generate a \fIN\fR bits three inputs NOR with an output power of \fIdrive\fR -named \fImodelname\fR. +named \fImodelname\fR\&. .PP Valid \fIdrive\fR are : 1 or 4. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. i2 : input. -.IP 2. +.TP 3 +2. i1 : input. -.IP 3. +.TP 3 +3. i0 : input. -.IP 4. +.TP 3 +4. nq : output. -.IP 5. +.TP 3 +5. vdd : power. -.IP 6. +.TP 3 +6. vss : ground. .SS "BEHAVIOR" -.sp + .nf nq <= not(i0 or i1 or i2) -.sp .fi .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_NOR3, "model_nor3_32" , F_BEHAV|F_PLACE @@ -60,7 +63,6 @@ GENLIB_LOINS( "model_nor3_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_NOR4.3 b/alliance/src/genlib/man3/DPGEN_NOR4.3 index e6874255..06670e92 100644 --- a/alliance/src/genlib/man3/DPGEN_NOR4.3 +++ b/alliance/src/genlib/man3/DPGEN_NOR4.3 @@ -1,51 +1,55 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_NOR4" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_NOR4" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_NOR4 \- NOR4 Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_NOR4, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB, - long \fIdrive\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_NOR4, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB, long \fIdrive\fB); +\fR +.SH "DESCRIPTION" .PP Generate a \fIN\fR bits four inputs NOR with an output power of \fIdrive\fR -named \fImodelname\fR. +named \fImodelname\fR\&. .PP Valid \fIdrive\fR are : 1 or 4. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. i3 : input. -.IP 2. +.TP 3 +2. i2 : input. -.IP 3. +.TP 3 +3. i1 : input. -.IP 4. +.TP 3 +4. i0 : input. -.IP 5. +.TP 3 +5. nq : output. -.IP 6. +.TP 3 +6. vdd : power. -.IP 7. +.TP 3 +7. vss : ground. .SS "BEHAVIOR" -.sp + .nf nq <= not(i0 or i1 or i2 or i3) -.sp .fi .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_NOR4, "model_nor4_32" , F_BEHAV|F_PLACE @@ -63,7 +67,6 @@ GENLIB_LOINS( "model_nor4_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_NUL.3 b/alliance/src/genlib/man3/DPGEN_NUL.3 index 7b1bf03d..eacfaf1d 100644 --- a/alliance/src/genlib/man3/DPGEN_NUL.3 +++ b/alliance/src/genlib/man3/DPGEN_NUL.3 @@ -1,41 +1,43 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_NUL" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_NUL" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_NUL \- Zero Detector Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_NUL, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_NUL, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB); +\fR +.SH "DESCRIPTION" .PP -Generate a \fIN\fR bits zero detector named \fImodelname\fR. +Generate a \fIN\fR bits zero detector named \fImodelname\fR\&. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. i0 : value to check (input, \fIN\fR bits). -.IP 2. +.TP 3 +2. q : null flag (output, 1 bit). -.IP 3. +.TP 3 +3. vdd : power. -.IP 4. +.TP 3 +4. vss : ground. .SS "BEHAVIOR" -.sp + .nf q <= <= '1' WHEN (i0 = X"00000000") ELSE '0'; -.sp .fi .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_NUL, "model_nul_32" , F_BEHAV|F_PLACE @@ -49,7 +51,6 @@ GENLIB_LOINS( "model_nul_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_OR2.3 b/alliance/src/genlib/man3/DPGEN_OR2.3 index a26ec44c..c798af8b 100644 --- a/alliance/src/genlib/man3/DPGEN_OR2.3 +++ b/alliance/src/genlib/man3/DPGEN_OR2.3 @@ -1,47 +1,49 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_OR2" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_OR2" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_OR2 \- OR2 Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_OR2, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB, - long \fIdrive\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_OR2, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB, long \fIdrive\fB); +\fR +.SH "DESCRIPTION" .PP Generate a \fIN\fR bits two inputs OR with an output power of \fIdrive\fR -named \fImodelname\fR. +named \fImodelname\fR\&. .PP Valid \fIdrive\fR are : 2 or 4. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. i1 : input. -.IP 2. +.TP 3 +2. i0 : input. -.IP 3. +.TP 3 +3. q : output. -.IP 4. +.TP 3 +4. vdd : power. -.IP 5. +.TP 3 +5. vss : ground. .SS "BEHAVIOR" -.sp + .nf q <= i0 or i1 -.sp .fi .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_OR2, "model_or2_32" , F_BEHAV|F_PLACE @@ -57,7 +59,6 @@ GENLIB_LOINS( "model_or2_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_OR3.3 b/alliance/src/genlib/man3/DPGEN_OR3.3 index 20093c3e..c2225fb5 100644 --- a/alliance/src/genlib/man3/DPGEN_OR3.3 +++ b/alliance/src/genlib/man3/DPGEN_OR3.3 @@ -1,49 +1,52 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_OR3" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_OR3" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_OR3 \- OR3 Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_OR3, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB, - long \fIdrive\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_OR3, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB, long \fIdrive\fB); +\fR +.SH "DESCRIPTION" .PP Generate a \fIN\fR bits three inputs OR with an output power of \fIdrive\fR -named \fImodelname\fR. +named \fImodelname\fR\&. .PP Valid \fIdrive\fR are : 2 or 4. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. i2 : input. -.IP 2. +.TP 3 +2. i1 : input. -.IP 3. +.TP 3 +3. i0 : input. -.IP 4. +.TP 3 +4. q : output. -.IP 5. +.TP 3 +5. vdd : power. -.IP 6. +.TP 3 +6. vss : ground. .SS "BEHAVIOR" -.sp + .nf q <= i0 or i1 or i2 -.sp .fi .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_OR3, "model_or3_32" , F_BEHAV|F_PLACE @@ -60,7 +63,6 @@ GENLIB_LOINS( "model_or3_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_OR4.3 b/alliance/src/genlib/man3/DPGEN_OR4.3 index d074f960..b7d23e0b 100644 --- a/alliance/src/genlib/man3/DPGEN_OR4.3 +++ b/alliance/src/genlib/man3/DPGEN_OR4.3 @@ -1,51 +1,55 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_OR4" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_OR4" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_OR4 \- OR4 Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_OR4, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB, - long \fIdrive\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_OR4, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB, long \fIdrive\fB); +\fR +.SH "DESCRIPTION" .PP Generate a \fIN\fR bits four inputs OR with an output power of \fIdrive\fR -named \fImodelname\fR. +named \fImodelname\fR\&. .PP Valid \fIdrive\fR are : 2 or 4. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. i3 : input. -.IP 2. +.TP 3 +2. i2 : input. -.IP 3. +.TP 3 +3. i1 : input. -.IP 4. +.TP 3 +4. i0 : input. -.IP 5. +.TP 3 +5. q : output. -.IP 6. +.TP 3 +6. vdd : power. -.IP 7. +.TP 3 +7. vss : ground. .SS "BEHAVIOR" -.sp + .nf q <= i0 or i1 or i2 or i3 -.sp .fi .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_OR4, "model_or4_32" , F_BEHAV|F_PLACE @@ -63,7 +67,6 @@ GENLIB_LOINS( "model_or4_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_RF1.3 b/alliance/src/genlib/man3/DPGEN_RF1.3 index 6dd5ee43..aece094e 100644 --- a/alliance/src/genlib/man3/DPGEN_RF1.3 +++ b/alliance/src/genlib/man3/DPGEN_RF1.3 @@ -1,33 +1,24 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_RF1" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_RF1" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_RF1, DPGEN_RF1R0 \- Register File Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_RF1, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB -); -.fi +\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_RF1R0, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB -); -.fi -\fR.SH "DESCRIPTION" +void GENLIB_MACRO (DPGEN_RF1, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB); +.sp +void GENLIB_MACRO (DPGEN_RF1R0, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB); +\fR +.SH "DESCRIPTION" .PP Generate a register file of \fIregNumber\fR words of \fIN\fR bits -whitout decoder named \fImodelname\fR. The DPGEN_RF1R0 variant differs +whitout decoder named \fImodelname\fR\&. The DPGEN_RF1R0 variant differs from the DPGEN_RF1 in that the register of address zero is stuck to zero. You can write into it, it will not change the value. When read, it will always return zero. @@ -40,35 +31,43 @@ is used to actually write the register word, it is selected by the sel signal. .TP 0.2i \(bu -sel : when set to '0' the datain0 is used to write -the register word, otherwise it will be datain1. +sel : when set to \&'0' the datain0 is used to write +the register word, otherwise it will be datain1\&. .TP 0.2i \(bu selr, selw : this register file have no decoder, so -selr have a bus width equal to \fIregNumber\fR. One bit for each word. -.PP +selr have a bus width equal to \fIregNumber\fR\&. One bit for each word. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. ckok : clock signal (input, 1 bit). -.IP 2. +.TP 3 +2. sel : select the write bus (input, 1 bit). -.IP 3. +.TP 3 +3. selr : the decoded read address (input, \fIregNumber\fR bits). -.IP 4. +.TP 3 +4. selw : the decoded write address (input, \fIregNumber\fR bits). -.IP 5. -datain0 : first write bus (input, \fIN\fR bits). -.IP 6. -datain1 : second write bus (input, \fIN\fR bits). -.IP 7. +.TP 3 +5. +datain0 : first write bus (input, \fIN\fR bits). +.TP 3 +6. +datain1 : second write bus (input, \fIN\fR bits). +.TP 3 +7. dataout : read bus (output, \fIN\fR bits). -.IP 8. +.TP 3 +8. vdd : power. -.IP 9. +.TP 3 +9. vss : ground. .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_RF1, "model_rf1x8_32" , F_BEHAV|F_PLACE @@ -88,7 +87,6 @@ GENLIB_LOINS( "model_rf1x8_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_RF1D.3 b/alliance/src/genlib/man3/DPGEN_RF1D.3 index 0dfd0c30..f3883578 100644 --- a/alliance/src/genlib/man3/DPGEN_RF1D.3 +++ b/alliance/src/genlib/man3/DPGEN_RF1D.3 @@ -1,33 +1,24 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_RF1D" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_RF1D" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_RF1D, DPGEN_RF1DR0 \- Register File with Decoder Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_RF1D, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB -); -.fi +\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_RF1DR0, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB -); -.fi -\fR.SH "DESCRIPTION" +void GENLIB_MACRO (DPGEN_RF1D, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB); +.sp +void GENLIB_MACRO (DPGEN_RF1DR0, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB); +\fR +.SH "DESCRIPTION" .PP Generate a register file of \fIregNumber\fR words of \fIN\fR bits -with decoder named \fImodelname\fR. The DPGEN_RF1DR0 variant differs +with decoder named \fImodelname\fR\&. The DPGEN_RF1DR0 variant differs from the DPGEN_RF1D in that the register of address zero is stuck to zero. You can write into it, it will not change the value. When read, it will always return zero. @@ -40,44 +31,54 @@ is used to actually write the register word, it is selected by the sel signal. .TP 0.2i \(bu -sel : when set to '0' the datain0 is used to write -the register word, otherwise it will be datain1. +sel : when set to \&'0' the datain0 is used to write +the register word, otherwise it will be datain1\&. .TP 0.2i \(bu adr, adw : the width (\fIY\fR) of those signals is computed from \fIregNumber\fR : -Y = log2(regNumber). +Y = log2(regNumber)\&. .TP 0.2i \(bu wen and ren : write enable and read enable, allows -reading and writing when sets to '1'. -.PP +reading and writing when sets to \&'1'\&. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. ck : clock signal (input, 1 bit). -.IP 2. +.TP 3 +2. sel : select the write bus (input, 1 bit). -.IP 3. +.TP 3 +3. wen : write enable (input, 1 bit). -.IP 4. +.TP 3 +4. ren : read enable (input, 1 bit). -.IP 5. +.TP 3 +5. adr : the read address (input, \fIY\fR bits). -.IP 6. +.TP 3 +6. adw : the write address (input, \fIY\fR bits). -.IP 7. -datain0 : first write bus (input, \fIN\fR bits). -.IP 8. -datain1 : second write bus (input, \fIN\fR bits). -.IP 9. +.TP 3 +7. +datain0 : first write bus (input, \fIN\fR bits). +.TP 3 +8. +datain1 : second write bus (input, \fIN\fR bits). +.TP 3 +9. dataout : read bus (output, \fIN\fR bits). -.IP 10. +.TP 3 +10. vdd : power. -.IP 11. +.TP 3 +11. vss : ground. .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_RF1D, "model_rf1dx8_32" , F_BEHAV|F_PLACE @@ -99,7 +100,6 @@ GENLIB_LOINS( "model_rf1dx8_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_ROM2.3 b/alliance/src/genlib/man3/DPGEN_ROM2.3 index e4c59c87..9538520d 100644 --- a/alliance/src/genlib/man3/DPGEN_ROM2.3 +++ b/alliance/src/genlib/man3/DPGEN_ROM2.3 @@ -1,45 +1,45 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_ROM2" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_ROM2" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_ROM2 \- 2 words ROM Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_ROM2, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB, - char *\fIconstVal0\fB, - char *\fIconstVal1\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_ROM2, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB, char *\fIconstVal0\fB, char *\fIconstVal1\fB); +\fR +.SH "DESCRIPTION" .PP -Generate a \fIN\fR bits 2 words optimized ROM named \fImodelname\fR. +Generate a \fIN\fR bits 2 words optimized ROM named \fImodelname\fR\&. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. sel0 : address of the value (input, 1 bits). -.IP 2. +.TP 3 +2. q : the selected word (output, \fIN\fR bit). -.IP 3. +.TP 3 +3. vdd : power. -.IP 4. +.TP 3 +4. vss : ground. .SS "BEHAVIOR" -.sp + .nf q <= WITH sel0 SELECT contsVal0 WHEN B"0", constVal1 WHEN B"1"; -.sp .fi .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_ROM2, "model_rom2_set1_4" , F_BEHAV|F_PLACE @@ -55,7 +55,6 @@ GENLIB_LOINS( "model_rom2_set1_4" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_ROM4.3 b/alliance/src/genlib/man3/DPGEN_ROM4.3 index 35469e0a..c0920945 100644 --- a/alliance/src/genlib/man3/DPGEN_ROM4.3 +++ b/alliance/src/genlib/man3/DPGEN_ROM4.3 @@ -1,50 +1,49 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_ROM4" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_ROM4" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_ROM4 \- 4 words ROM Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_ROM4, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB, - char *\fIconstVal0\fB, - char *\fIconstVal1\fB, - char *\fIconstVal2\fB, - char *\fIconstVal3\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_ROM4, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB, char *\fIconstVal0\fB, char *\fIconstVal1\fB, char *\fIconstVal2\fB, char *\fIconstVal3\fB); +\fR +.SH "DESCRIPTION" .PP -Generate a \fIN\fR bits 2 words optimized ROM named \fImodelname\fR. +Generate a \fIN\fR bits 2 words optimized ROM named \fImodelname\fR\&. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. sel1 : upper bit of the address (input, 1 bits). -.IP 2. +.TP 3 +2. sel0 : lower bit of the address (input, 1 bits). -.IP 3. +.TP 3 +3. q : the selected word (output, \fIN\fR bit). -.IP 4. +.TP 3 +4. vdd : power. -.IP 5. +.TP 3 +5. vss : ground. .SS "BEHAVIOR" -.sp + .nf q <= WITH sel1 & sel0 SELECT contsVal0 WHEN B"00", contsVal1 WHEN B"01", contsVal2 WHEN B"10", constVal3 WHEN B"11"; -.sp .fi .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_ROM4, "model_rom4_set1_16" , F_BEHAV|F_PLACE @@ -63,7 +62,6 @@ GENLIB_LOINS( "model_rom4_set1_16" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_SFF.3 b/alliance/src/genlib/man3/DPGEN_SFF.3 index 5ddcba2b..81605355 100644 --- a/alliance/src/genlib/man3/DPGEN_SFF.3 +++ b/alliance/src/genlib/man3/DPGEN_SFF.3 @@ -1,47 +1,51 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_SFF" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_SFF" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_SFF \- Static Flip-Flop Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_SFF, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_SFF, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB); +\fR +.SH "DESCRIPTION" .PP -Generate a \fIN\fR bits static flip-flop named \fImodelname\fR. +Generate a \fIN\fR bits static flip-flop named \fImodelname\fR\&. The two latches of this flip-flop are static, i.e. each one is made of two interters looped togethers. .PP How it works : .TP 0.2i \(bu -wen when set to '1' enables the writing of the +wen when set to \&'1' enables the writing of the flip-flop. -.PP .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. wen : write enable (1 bit). -.IP 2. +.TP 3 +2. ck : clock signal (1 bit). -.IP 3. +.TP 3 +3. i0 : data input (\fIN\fR bits). -.IP 4. +.TP 3 +4. q : output (\fIN\fR bits). -.IP 5. +.TP 3 +5. vdd : power. -.IP 6. +.TP 3 +6. vss : ground. .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_SFF, "model_sff_32" , F_BEHAV|F_PLACE @@ -57,7 +61,6 @@ GENLIB_LOINS( "model_sff_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_SFFT.3 b/alliance/src/genlib/man3/DPGEN_SFFT.3 index 1db90d69..2fd9d97c 100644 --- a/alliance/src/genlib/man3/DPGEN_SFFT.3 +++ b/alliance/src/genlib/man3/DPGEN_SFFT.3 @@ -1,62 +1,68 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_SFFT" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_SFFT" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_SFFT \- Static Flip-Flop with Scan-Path Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_SFFT, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_SFFT, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB); +\fR +.SH "DESCRIPTION" .PP Generate a \fIN\fR bits static flip-flop with scan-path -named \fImodelname\fR. The two latches of this flip-flop are +named \fImodelname\fR\&. The two latches of this flip-flop are i.e. each one is made of two interters looped togethers. .PP How it works : .TP 0.2i \(bu -scan when set to '1' enables the scan-path mode. +scan when set to \&'1' enables the scan-path mode. Note that in scan-path mode, the wen signal is not effective. .TP 0.2i \(bu scin : the input of the scan-path. This terminal is -different from i0[0]. +different from i0[0]\&. The scout is q[N-1] (in the following example this is q[31]). .TP 0.2i \(bu -wen when set to '1' enables the writing of the +wen when set to \&'1' enables the writing of the flip-flop. -.PP .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. scan : scan-path mode (input, 1 bit). -.IP 2. +.TP 3 +2. scin : scan path in (input, 1 bit). -.IP 3. +.TP 3 +3. wen : write enable (input, 1 bit). -.IP 4. +.TP 3 +4. ck : clock signal (input, 1 bit). -.IP 5. +.TP 3 +5. i0 : data input (\fIN\fR bits). -.IP 6. +.TP 3 +6. q : output (\fIN\fR bits). -.IP 7. +.TP 3 +7. vdd : power. -.IP 8. +.TP 3 +8. vss : ground. .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_SFFT, "model_sfft_32" , F_BEHAV|F_PLACE @@ -74,7 +80,6 @@ GENLIB_LOINS( "model_sfft_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_SHIFT.3 b/alliance/src/genlib/man3/DPGEN_SHIFT.3 index 0d8af45d..08f945c4 100644 --- a/alliance/src/genlib/man3/DPGEN_SHIFT.3 +++ b/alliance/src/genlib/man3/DPGEN_SHIFT.3 @@ -1,54 +1,58 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.4 $ -.TH "DPGEN_SHIFT" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_SHIFT" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_SHIFT \- Shifter Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_SHIFT, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_SHIFT, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB); +\fR +.SH "DESCRIPTION" .PP -Generate a \fIN\fR bits shifter with name \fImodelname\fR. +Generate a \fIN\fR bits shifter with name \fImodelname\fR\&. .PP How it works : .TP 0.2i \(bu -if the op[0] signal is set to '1' performs +if the op[0] signal is set to \&'1' performs a right shift, performs a left shift otherwise. .TP 0.2i \(bu -if the op[1] signal is set to '1' performs +if the op[1] signal is set to \&'1' performs an arithmetic shift (only meaningful in case of a right shift). .TP 0.2i \(bu shamt : specifies the shift amount. The width of this signal (\fIY\fR) is computed from the operator's width : -Y = ceil(log2(N)) - 1. -.PP +Y = ceil(log2(N)) - 1\&. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. op : select the kind of shift (input, 2 bit). -.IP 2. +.TP 3 +2. shamt : the shift amount (input, \fIY\fR bits). -.IP 3. -: value to shift (input, \fIN\fR bits). -.IP 4. -: output (\fIN\fR bits). -.IP 5. +.TP 3 +3. +i : value to shift (input, \fIN\fR bits). +.TP 3 +4. +o : output (\fIN\fR bits). +.TP 3 +5. vdd : power. -.IP 6. +.TP 3 +6. vss : ground. .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_SHIFT, "model_shift_32", F_BEHAV|F_PLACE, @@ -62,7 +66,6 @@ GENLIB_LOINS("model_shift_32", "y[31:0]", "vdd", "vss", NULL); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_XNOR2.3 b/alliance/src/genlib/man3/DPGEN_XNOR2.3 index bba4981c..bdd6123e 100644 --- a/alliance/src/genlib/man3/DPGEN_XNOR2.3 +++ b/alliance/src/genlib/man3/DPGEN_XNOR2.3 @@ -1,47 +1,49 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_XNOR2" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_XNOR2" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_XNOR2 \- XNOR2 Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_XNOR2, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB, - long \fIdrive\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_XNOR2, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB, long \fIdrive\fB); +\fR +.SH "DESCRIPTION" .PP Generate a \fIN\fR bits two inputs exclusive NOR with an output -power of \fIdrive\fR named \fImodelname\fR. +power of \fIdrive\fR named \fImodelname\fR\&. .PP Valid \fIdrive\fR are : 1 or 4. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. i1 : input. -.IP 2. +.TP 3 +2. i0 : input. -.IP 3. +.TP 3 +3. nq : output. -.IP 4. +.TP 3 +4. vdd : power. -.IP 5. +.TP 3 +5. vss : ground. .SS "BEHAVIOR" -.sp + .nf nq <= not(i0 xor i1) -.sp .fi .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_XNOR2, "model_xnor2_32" , F_BEHAV|F_PLACE @@ -57,7 +59,6 @@ GENLIB_LOINS( "model_xnor2_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_XNOR2MASK.3 b/alliance/src/genlib/man3/DPGEN_XNOR2MASK.3 index 32257dea..903572bd 100644 --- a/alliance/src/genlib/man3/DPGEN_XNOR2MASK.3 +++ b/alliance/src/genlib/man3/DPGEN_XNOR2MASK.3 @@ -1,37 +1,34 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_XNOR2MASK" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_XNOR2MASK" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_XNOR2MASK \- Programmable Mask Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_XNOR2MASK, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB, - char *\fIconstVal\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_XNOR2MASK, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB, char *\fIconstVal\fB); +\fR +.SH "DESCRIPTION" .PP -Generate a \fIN\fR bits conditionnal XNOR mask named \fImodelname\fR. +Generate a \fIN\fR bits conditionnal XNOR mask named \fImodelname\fR\&. .PP How it works : .TP 0.2i \(bu -if the cmd signal is set to '0', the mask is NOT +if the cmd signal is set to \&'0', the mask is NOT applied, so the whole operator behave like an inverter. .TP 0.2i \(bu -if the cmd signal is set to '1', the mask IS +if the cmd signal is set to \&'1', the mask IS applied, the output is the \fBcomplemented\fR result of the input value \fBXORed\fR with the mask (suplied by \fIconstVal\fR). .PP -.PP The constant \fIconstVal\fR is given to the macro-generator call, therefore the value cannot be changed afterward : it's hard wired in the operator. @@ -39,27 +36,31 @@ hard wired in the operator. A common error is to give a real C constant for the \fIconstVal\fR argument. Be aware that it is a character string. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. cmd : mask control (1 bit). -.IP 2. +.TP 3 +2. i0 : input (\fIN\fR bits). -.IP 3. +.TP 3 +3. q : output (\fIN\fR bits). -.IP 4. +.TP 3 +4. vdd : power. -.IP 5. +.TP 3 +5. vss : ground. .SS "BEHAVIOR" -.sp + .nf nq <= WITH cmd SELECT not(i0) WHEN '0', not(i0 xor X"0000FFFF") WHEN '1'; -.sp .fi .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_XNOR2MASK, "model_xnor2mask_0000FFFF_32" , F_BEHAV|F_PLACE @@ -75,7 +76,6 @@ GENLIB_LOINS( "model_xnor2mask_0000FFFF_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/DPGEN_XOR2.3 b/alliance/src/genlib/man3/DPGEN_XOR2.3 index 38316751..d151db4a 100644 --- a/alliance/src/genlib/man3/DPGEN_XOR2.3 +++ b/alliance/src/genlib/man3/DPGEN_XOR2.3 @@ -1,47 +1,49 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "DPGEN_XOR2" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "DPGEN_XOR2" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME DPGEN_XOR2 \- XOR2 Macro-Generator .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - DPGEN_XOR2, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB, - long \fIdrive\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (DPGEN_XOR2, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB, long \fIdrive\fB); +\fR +.SH "DESCRIPTION" .PP Generate a \fIN\fR bits two inputs exclusive OR with an output -power of \fIdrive\fR named \fImodelname\fR. +power of \fIdrive\fR named \fImodelname\fR\&. .PP Valid \fIdrive\fR are : 1 or 4. .SS "TERMINAL NAMES" -.IP 1. +.TP 3 +1. i1 : input. -.IP 2. +.TP 3 +2. i0 : input. -.IP 3. +.TP 3 +3. q : output. -.IP 4. +.TP 3 +4. vdd : power. -.IP 5. +.TP 3 +5. vss : ground. .SS "BEHAVIOR" -.sp + .nf q <= i0 xor i1 -.sp .fi .SH "EXAMPLE" .PP -.sp + .nf GENLIB_MACRO(DPGEN_XOR2, "model_xor2_32" , F_BEHAV|F_PLACE @@ -57,7 +59,6 @@ GENLIB_LOINS( "model_xor2_32" , "vdd", "vss", NULL ); -.sp .fi .SH "SEE ALSO" .PP diff --git a/alliance/src/genlib/man3/GENLIB_MACRO.3 b/alliance/src/genlib/man3/GENLIB_MACRO.3 index 2c7723f7..ee0c9f67 100644 --- a/alliance/src/genlib/man3/GENLIB_MACRO.3 +++ b/alliance/src/genlib/man3/GENLIB_MACRO.3 @@ -1,23 +1,19 @@ -.\\" auto-generated by docbook2man-spec $Revision: 1.3 $ -.TH "GENLIB_MACRO" "3" "29 January 2003" "ASIM/LIP6" "Alliance - genlib User's Manual" +.\" This manpage has been automatically generated by docbook2man +.\" from a DocBook document. This tool can be found at: +.\" +.\" Please send any bug reports, improvements, comments, patches, +.\" etc. to Steve Cheng . +.TH "GENLIB_MACRO" "3" "22 July 2004" "ASIM/LIP6" "Alliance - genlib User's Manual" + .SH NAME GENLIB_MACRO \- Interface with all MACRO generators. .SH SYNOPSIS -\fB#include .sp -void GENLIB_MACRO( -.nf -.ta 7n +20n - long \fIfunction\fB, - char *\fImodelname\fB, - long \fIflags\fB, - long \fIN\fB, - long \fIdrive\fB, - long \fIregNumber\fB, - char *\fIconstVal\fB -); -.fi -\fR.SH "DESCRIPTION" +\fB#include +.sp +void GENLIB_MACRO (long \fIfunction\fB, char *\fImodelname\fB, long \fIflags\fB, long \fIN\fB, long \fIdrive\fB, long \fIregNumber\fB, char *\fIconstVal\fB); +\fR +.SH "DESCRIPTION" .PP The \fBGENLIB_MACRO()\fR fonction call is the generic interface to all \fBgenlib\fR macro generators. As all generators do not have the @@ -34,46 +30,55 @@ arguments list. \(bu Optional arguments : arguments specifics to a macro-generator or a class of macro-generators. -.PP .SS "ARGUMENTS" -.IP 1. -long \fIfunction\fR : (mandatory) specify which macro-generator +.TP 3 +1. +long \fIfunction\fR : (mandatory) specify which macro-generator is to be invoked. For example, to create a two entry multiplexer -gives GENLIB_MUX2. -.IP 2. +gives GENLIB_MUX2\&. +.TP 3 +2. char* \fImodelname\fR : (mandatory) specify the name of the model to be generated. For example : -"model_mux2_32bits". -.IP 3. -long \fIflags\fR : (mandatory) tells which views are to be +"model_mux2_32bits"\&. +.TP 3 +3. +long \fIflags\fR : (mandatory) tells which views are to be generated. It is a logical combination of the following values : (\fBORed\fR) .RS -.IP 1. +.TP 3 +1. F_PLACE : generate physical view (placement only). -.IP 2. +.TP 3 +2. F_BEHAV : generate behavioral view (\fBVHDL\fR view). -.IP 3. +.TP 3 +3. F_LSB_FIRST : the terminal of index zero is matched to the LSB, thus a 32 bits vector will be written : -"signal[31:0]". -.IP 4. +"signal[31:0]"\&. +.TP 3 +4. F_MSB_FIRST : the terminal of index zero is matched to the MSB, thus a 32 bits vector will be written : "signal[0:31]" (aka. IBM notation). .RE -.PP -.IP 4. -long \fIN\fR : (mandatory) width of the model's bus to be +.TP 3 +4. +long \fIN\fR : (mandatory) width of the model's bus to be generated. -.IP 5. -long \fIdrive\fR : (optional) output power drive. -.IP 6. -long \fIregNumber\fR : (optional) number of registers or depth +.TP 3 +5. +long \fIdrive\fR : (optional) output power drive. +.TP 3 +6. +long \fIregNumber\fR : (optional) number of registers or depth of for a FIFO macro-generator. -.IP 7. +.TP 3 +7. char* \fIconstval\fR : (optional) a character string holding a -constant. For example : "0xFFFF0000". +constant. For example : "0xFFFF0000"\&. .SS "AVAILABLE MACRO-GENERATORS" .PP .TP 0.2i @@ -87,7 +92,6 @@ Inverters and Buffers : \(bu \fBDPGEN_BUFF\fR(3) .RE -.PP .TP 0.2i \(bu Boolean Operators : @@ -135,7 +139,6 @@ Boolean Operators : \(bu \fBDPGEN_XNOR2\fR(3) .RE -.PP .TP 0.2i \(bu Multiplexers and Tristates : @@ -153,7 +156,6 @@ Multiplexers and Tristates : \(bu \fBDPGEN_BUSE\fR(3) .RE -.PP .TP 0.2i \(bu Programmable Masks : @@ -168,7 +170,6 @@ Programmable Masks : \(bu \fBDPGEN_XNOR2MASK\fR(3) .RE -.PP .TP 0.2i \(bu Arithmetics Operators : @@ -179,11 +180,7 @@ Arithmetics Operators : .TP 0.2i \(bu \fBDPGEN_SHIFT\fR(3) -.TP 0.2i -\(bu -\fBDPGEN_SHROT\fR(3) .RE -.PP .TP 0.2i \(bu Miscellaneous : @@ -201,7 +198,6 @@ Miscellaneous : \(bu \fBDPGEN_ROM4\fR(3) .RE -.PP .TP 0.2i \(bu Registers : @@ -214,6 +210,9 @@ Registers : \fBDPGEN_RF1R0\fR(3) .TP 0.2i \(bu +\fBDPGEN_FIFO\fR(3) +.TP 0.2i +\(bu \fBDPGEN_RF1D\fR(3) .TP 0.2i \(bu @@ -231,8 +230,6 @@ Registers : \(bu \fBDPGEN_SFFT\fR(3) .RE -.PP -.PP .SH "SEE ALSO" .PP \fBmbk\fR(1),