riscv
/
alliance
mirror of https://gitlab.lip6.fr/vlsi-eda/alliance.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

MAJ du man

This commit is contained in:
Christophe Alexandre 2002-11-21 15:15:29 +00:00
parent 4f7504d7e1
commit 85291b9736
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
alliance/src/ring/doc/ring.1
View File

@ -1,4 +1,4 @@
.\" $Id: ring.1,v 1.2 2002/05/21 06:38:20 xtof Exp $
.\" $Id: ring.1,v 1.3 2002/11/21 15:15:29 xtof Exp $
.\" @(#)Labo.l 0.0 90/22/08 UPMC;
.TH RING 1 "October 1, 1997" "ASIM/LIP6" "ALLIANCE USER COMMANDS"
.SH NAME
@ -200,7 +200,7 @@ RING is not a floor plan router and allows only one core.
.LP
.br
A core is designed, for example, with the standard
cells placer \fBocp(1)\fP and router \fBocr(1)\fP, which places the input and output connectors on
cells placer \fBocp(1)\fP and router \fBnero(1)\fP, which places the input and output connectors on
the abutment box. The physical core connectors must be
separated by more than one pitch in any metal (in ALU1 or ALU2).
.LP