From 83a5d7b56a2be7767c8539756102608bec68d46f Mon Sep 17 00:00:00 2001 From: Franck Wajsburt Date: Mon, 27 Sep 1999 14:34:45 +0000 Subject: [PATCH] quelques OA supplementaires --- alliance/share/cells/sxlib/ao22_x2.al | 35 +++++++ alliance/share/cells/sxlib/ao22_x2.ap | 97 +++++++++++++++++ alliance/share/cells/sxlib/ao22_x2.vbe | 38 +++++++ alliance/share/cells/sxlib/ao22_x4.al | 37 +++++++ alliance/share/cells/sxlib/ao22_x4.ap | 108 +++++++++++++++++++ alliance/share/cells/sxlib/ao22_x4.vbe | 38 +++++++ alliance/share/cells/sxlib/ao2o22_x2.al | 42 ++++++++ alliance/share/cells/sxlib/ao2o22_x2.ap | 109 +++++++++++++++++++ alliance/share/cells/sxlib/ao2o22_x2.vbe | 44 ++++++++ alliance/share/cells/sxlib/ao2o22_x4.al | 44 ++++++++ alliance/share/cells/sxlib/ao2o22_x4.ap | 123 ++++++++++++++++++++++ alliance/share/cells/sxlib/ao2o22_x4.vbe | 44 ++++++++ alliance/share/cells/sxlib/nao22_x1.al | 31 ++++++ alliance/share/cells/sxlib/nao22_x1.ap | 77 ++++++++++++++ alliance/share/cells/sxlib/nao22_x1.vbe | 38 +++++++ alliance/share/cells/sxlib/nao22_x4.al | 41 ++++++++ alliance/share/cells/sxlib/nao22_x4.ap | 128 +++++++++++++++++++++++ alliance/share/cells/sxlib/nao22_x4.vbe | 38 +++++++ alliance/share/cells/sxlib/noa22_x1.al | 31 ++++++ alliance/share/cells/sxlib/noa22_x1.ap | 78 ++++++++++++++ alliance/share/cells/sxlib/noa22_x1.vbe | 38 +++++++ alliance/share/cells/sxlib/noa22_x4.al | 41 ++++++++ alliance/share/cells/sxlib/noa22_x4.ap | 122 +++++++++++++++++++++ alliance/share/cells/sxlib/noa22_x4.vbe | 38 +++++++ alliance/share/cells/sxlib/oa22_x2.al | 35 +++++++ alliance/share/cells/sxlib/oa22_x2.ap | 96 +++++++++++++++++ alliance/share/cells/sxlib/oa22_x2.vbe | 38 +++++++ alliance/share/cells/sxlib/oa22_x4.al | 37 +++++++ alliance/share/cells/sxlib/oa22_x4.ap | 105 +++++++++++++++++++ alliance/share/cells/sxlib/oa22_x4.vbe | 38 +++++++ alliance/share/cells/sxlib/oa2a22_x2.al | 42 ++++++++ alliance/share/cells/sxlib/oa2a22_x2.ap | 108 +++++++++++++++++++ alliance/share/cells/sxlib/oa2a22_x2.vbe | 44 ++++++++ alliance/share/cells/sxlib/oa2a22_x4.al | 44 ++++++++ alliance/share/cells/sxlib/oa2a22_x4.ap | 122 +++++++++++++++++++++ alliance/share/cells/sxlib/oa2a22_x4.vbe | 44 ++++++++ 36 files changed, 2213 insertions(+) create mode 100644 alliance/share/cells/sxlib/ao22_x2.al create mode 100644 alliance/share/cells/sxlib/ao22_x2.ap create mode 100644 alliance/share/cells/sxlib/ao22_x2.vbe create mode 100644 alliance/share/cells/sxlib/ao22_x4.al create mode 100644 alliance/share/cells/sxlib/ao22_x4.ap create mode 100644 alliance/share/cells/sxlib/ao22_x4.vbe create mode 100644 alliance/share/cells/sxlib/ao2o22_x2.al create mode 100644 alliance/share/cells/sxlib/ao2o22_x2.ap create mode 100644 alliance/share/cells/sxlib/ao2o22_x2.vbe create mode 100644 alliance/share/cells/sxlib/ao2o22_x4.al create mode 100644 alliance/share/cells/sxlib/ao2o22_x4.ap create mode 100644 alliance/share/cells/sxlib/ao2o22_x4.vbe create mode 100644 alliance/share/cells/sxlib/nao22_x1.al create mode 100644 alliance/share/cells/sxlib/nao22_x1.ap create mode 100644 alliance/share/cells/sxlib/nao22_x1.vbe create mode 100644 alliance/share/cells/sxlib/nao22_x4.al create mode 100644 alliance/share/cells/sxlib/nao22_x4.ap create mode 100644 alliance/share/cells/sxlib/nao22_x4.vbe create mode 100644 alliance/share/cells/sxlib/noa22_x1.al create mode 100644 alliance/share/cells/sxlib/noa22_x1.ap create mode 100644 alliance/share/cells/sxlib/noa22_x1.vbe create mode 100644 alliance/share/cells/sxlib/noa22_x4.al create mode 100644 alliance/share/cells/sxlib/noa22_x4.ap create mode 100644 alliance/share/cells/sxlib/noa22_x4.vbe create mode 100644 alliance/share/cells/sxlib/oa22_x2.al create mode 100644 alliance/share/cells/sxlib/oa22_x2.ap create mode 100644 alliance/share/cells/sxlib/oa22_x2.vbe create mode 100644 alliance/share/cells/sxlib/oa22_x4.al create mode 100644 alliance/share/cells/sxlib/oa22_x4.ap create mode 100644 alliance/share/cells/sxlib/oa22_x4.vbe create mode 100644 alliance/share/cells/sxlib/oa2a22_x2.al create mode 100644 alliance/share/cells/sxlib/oa2a22_x2.ap create mode 100644 alliance/share/cells/sxlib/oa2a22_x2.vbe create mode 100644 alliance/share/cells/sxlib/oa2a22_x4.al create mode 100644 alliance/share/cells/sxlib/oa2a22_x4.ap create mode 100644 alliance/share/cells/sxlib/oa2a22_x4.vbe diff --git a/alliance/share/cells/sxlib/ao22_x2.al b/alliance/share/cells/sxlib/ao22_x2.al new file mode 100644 index 00000000..ec1eea15 --- /dev/null +++ b/alliance/share/cells/sxlib/ao22_x2.al @@ -0,0 +1,35 @@ +V ALLIANCE : 6 +H ao22_x2,L,27/ 9/99 +C i0,IN,EXTERNAL,8 +C i1,IN,EXTERNAL,6 +C i2,IN,EXTERNAL,7 +C q,OUT,EXTERNAL,4 +C vdd,IN,EXTERNAL,5 +C vss,IN,EXTERNAL,1 +T P,0.35,2.9,9,6,2,0,0.75,0.75,7.3,7.3,3.6,11.25,tr_00008 +T P,0.35,2.9,5,8,9,0,0.75,0.75,7.3,7.3,1.8,11.25,tr_00007 +T P,0.35,2.9,2,7,5,0,0.75,0.75,7.3,7.3,5.4,11.25,tr_00006 +T P,0.35,5.9,5,2,4,0,0.75,0.75,13.3,13.3,7.2,11.25,tr_00005 +T N,0.35,2.9,4,2,1,0,0.75,0.75,7.3,7.3,7.2,2.25,tr_00004 +T N,0.35,1.4,1,7,3,0,0.75,0.75,4.3,4.3,5.4,3,tr_00003 +T N,0.35,1.4,3,6,2,0,0.75,0.75,4.3,4.3,3.6,3,tr_00002 +T N,0.35,1.4,2,8,3,0,0.75,0.75,4.3,4.3,1.8,3,tr_00001 +S 9,INTERNAL +Q 0 +S 8,EXTERNAL,i0 +Q 0.00295462 +S 7,EXTERNAL,i2 +Q 0.00371745 +S 6,EXTERNAL,i1 +Q 0.00344928 +S 5,EXTERNAL,vdd +Q 0.00367968 +S 4,EXTERNAL,q +Q 0.00358405 +S 3,INTERNAL +Q 0.00114171 +S 2,INTERNAL +Q 0.00464422 +S 1,EXTERNAL,vss +Q 0.00367968 +EOF diff --git a/alliance/share/cells/sxlib/ao22_x2.ap b/alliance/share/cells/sxlib/ao22_x2.ap new file mode 100644 index 00000000..320a964d --- /dev/null +++ b/alliance/share/cells/sxlib/ao22_x2.ap @@ -0,0 +1,97 @@ +V ALLIANCE : 4 +H ao22_x2,P,27/ 8/99,100 +A 0,0,3000,5000 +C 0,300,600,vss,0,WEST,ALU1 +C 0,4700,600,vdd,0,WEST,ALU1 +C 3000,4700,600,vdd,1,EAST,ALU1 +C 3000,300,600,vss,1,EAST,ALU1 +R 2000,1000,ref_con,i2_10 +R 2500,1000,ref_con,q_10 +R 2500,1500,ref_con,q_15 +R 2500,2000,ref_con,q_20 +R 2500,2500,ref_con,q_25 +R 2500,3000,ref_con,q_30 +R 2500,3500,ref_con,q_35 +R 2500,4000,ref_con,q_40 +R 1000,2500,ref_con,i1_25 +R 1000,2000,ref_con,i1_20 +R 2000,4000,ref_con,i2_40 +R 2000,3500,ref_con,i2_35 +R 2000,3000,ref_con,i2_30 +R 2000,2500,ref_con,i2_25 +R 2000,2000,ref_con,i2_20 +R 2000,1500,ref_con,i2_15 +R 500,2000,ref_con,i0_20 +R 500,2500,ref_con,i0_25 +R 500,3000,ref_con,i0_30 +R 500,3500,ref_con,i0_35 +R 500,4000,ref_con,i0_40 +R 1000,4000,ref_con,i1_40 +R 1000,3500,ref_con,i1_35 +R 1000,3000,ref_con,i1_30 +S 2500,950,2500,4050,200,*,DOWN,ALU1 +S 2500,3000,2700,3000,200,*,RIGHT,ALU1 +S 0,4700,3000,4700,600,*,RIGHT,ALU1 +S 2000,1000,2000,4000,100,*,UP,ALU1 +S 900,1500,1500,1500,100,*,RIGHT,ALU1 +S 1500,1500,1500,4000,100,*,DOWN,ALU1 +S 300,1000,1500,1000,100,*,RIGHT,ALU1 +S 1000,2000,1000,4000,100,*,UP,ALU1 +S 500,2000,500,4000,100,*,UP,ALU1 +S 2500,1000,2700,1000,200,*,RIGHT,ALU1 +S 2500,4000,2700,4000,200,*,RIGHT,ALU1 +S 2500,3500,2700,3500,200,*,RIGHT,ALU1 +S 0,300,3000,300,600,*,RIGHT,ALU1 +S 2400,1400,2400,2600,100,*,UP,POLY +S 600,1400,600,3100,100,*,UP,POLY +S 1200,1400,1200,1800,100,*,DOWN,POLY +S 900,1800,1200,1800,100,*,RIGHT,POLY +S 1800,1400,2100,1400,100,*,RIGHT,POLY +S 900,3100,1200,3100,100,*,RIGHT,POLY +S 1800,2600,1800,3100,100,*,DOWN,POLY +S 1800,2600,2100,2600,100,*,LEFT,POLY +S 1000,1800,1000,2100,300,*,UP,POLY +S 1400,2100,2400,2100,100,*,RIGHT,POLY +S 600,600,600,1400,100,*,UP,NTRANS +S 1200,600,1200,1400,100,*,UP,NTRANS +S 1500,800,1500,1200,300,*,DOWN,NDIF +S 300,800,300,1200,300,*,DOWN,NDIF +S 1800,600,1800,1400,100,*,UP,NTRANS +S 2700,300,2700,1200,300,*,DOWN,NDIF +S 2100,300,2100,1200,300,*,DOWN,NDIF +S 2400,100,2400,1400,100,*,UP,NTRANS +S 900,800,900,1600,300,*,DOWN,NDIF +S 0,3900,3000,3900,2400,*,RIGHT,NWELL +S 2400,2600,2400,4900,100,*,DOWN,PTRANS +S 1500,3300,1500,4200,300,*,UP,PDIF +S 900,3300,900,4200,300,*,UP,PDIF +S 300,3300,300,4600,300,*,UP,PDIF +S 1800,3100,1800,4400,100,*,DOWN,PTRANS +S 600,3100,600,4400,100,*,DOWN,PTRANS +S 1200,3100,1200,4400,100,*,DOWN,PTRANS +S 2700,2800,2700,4700,300,*,UP,PDIF +S 2100,2800,2100,4700,300,*,UP,PDIF +V 1000,3000,CONT_POLY +V 1500,2200,CONT_POLY +V 2000,2500,CONT_POLY +V 2000,1500,CONT_POLY +V 1000,2000,CONT_POLY +V 500,2000,CONT_POLY +V 900,300,CONT_BODY_P +V 300,300,CONT_BODY_P +V 1500,300,CONT_BODY_P +V 2100,500,CONT_DIF_N +V 1500,1000,CONT_DIF_N +V 300,1000,CONT_DIF_N +V 2700,1000,CONT_DIF_N +V 900,1500,CONT_DIF_N +V 1500,4700,CONT_BODY_N +V 2100,4500,CONT_DIF_P +V 900,4700,CONT_BODY_N +V 1500,3500,CONT_DIF_P +V 1500,4000,CONT_DIF_P +V 300,4500,CONT_DIF_P +V 2700,3000,CONT_DIF_P +V 2700,3500,CONT_DIF_P +V 2700,4000,CONT_DIF_P +EOF diff --git a/alliance/share/cells/sxlib/ao22_x2.vbe b/alliance/share/cells/sxlib/ao22_x2.vbe new file mode 100644 index 00000000..13736ebb --- /dev/null +++ b/alliance/share/cells/sxlib/ao22_x2.vbe @@ -0,0 +1,38 @@ +ENTITY ao22_x2 IS +GENERIC ( + CONSTANT area : NATURAL := 1500; + CONSTANT transistors : NATURAL := 8; + CONSTANT cin_i0 : NATURAL := 8; + CONSTANT cin_i1 : NATURAL := 8; + CONSTANT cin_i2 : NATURAL := 9; + CONSTANT tphh_i2_q : NATURAL := 416; + CONSTANT rup_i2_q : NATURAL := 1780; + CONSTANT tpll_i2_q : NATURAL := 423; + CONSTANT rdown_i2_q : NATURAL := 1600; + CONSTANT tphh_i0_q : NATURAL := 554; + CONSTANT rup_i0_q : NATURAL := 1780; + CONSTANT tpll_i0_q : NATURAL := 444; + CONSTANT rdown_i0_q : NATURAL := 1600; + CONSTANT tphh_i1_q : NATURAL := 489; + CONSTANT rup_i1_q : NATURAL := 1780; + CONSTANT tpll_i1_q : NATURAL := 523; + CONSTANT rdown_i1_q : NATURAL := 1600 +); +PORT ( + i0 : in BIT; + i1 : in BIT; + i2 : in BIT; + q : out BIT; + vdd : in BIT; + vss : in BIT +); +END ao22_x2; + +ARCHITECTURE behaviour_data_flow OF ao22_x2 IS + +BEGIN + ASSERT ((vdd and not (vss)) = '1') + REPORT "power supply is missing on ao22_x2" + SEVERITY WARNING; + q <= ((i0 or i1) and i2) after 1200 ps; +END; diff --git a/alliance/share/cells/sxlib/ao22_x4.al b/alliance/share/cells/sxlib/ao22_x4.al new file mode 100644 index 00000000..e2d553f6 --- /dev/null +++ b/alliance/share/cells/sxlib/ao22_x4.al @@ -0,0 +1,37 @@ +V ALLIANCE : 6 +H ao22_x4,L,27/ 9/99 +C i0,IN,EXTERNAL,8 +C i1,IN,EXTERNAL,7 +C i2,IN,EXTERNAL,6 +C q,OUT,EXTERNAL,4 +C vdd,IN,EXTERNAL,5 +C vss,IN,EXTERNAL,2 +T P,0.35,2.9,3,6,5,0,0.75,0.75,7.3,7.3,5.4,11.25,tr_00010 +T P,0.35,2.9,5,8,9,0,0.75,0.75,7.3,7.3,1.8,11.25,tr_00009 +T P,0.35,2.9,9,7,3,0,0.75,0.75,7.3,7.3,3.6,11.25,tr_00008 +T P,0.35,5.9,5,3,4,0,0.75,0.75,13.3,13.3,8.1,11.25,tr_00007 +T P,0.35,5.9,4,3,5,0,0.75,0.75,13.3,13.3,9.9,11.25,tr_00006 +T N,0.35,1.4,3,8,1,0,0.75,0.75,4.3,4.3,1.8,3,tr_00005 +T N,0.35,1.4,1,7,3,0,0.75,0.75,4.3,4.3,3.6,3,tr_00004 +T N,0.35,1.4,2,6,1,0,0.75,0.75,4.3,4.3,5.4,3,tr_00003 +T N,0.35,2.9,2,3,4,0,0.75,0.75,7.3,7.3,9.9,2.25,tr_00002 +T N,0.35,2.9,4,3,2,0,0.75,0.75,7.3,7.3,8.1,2.25,tr_00001 +S 9,INTERNAL +Q 0 +S 8,EXTERNAL,i0 +Q 0.00295461 +S 7,EXTERNAL,i1 +Q 0.00344928 +S 6,EXTERNAL,i2 +Q 0.00371745 +S 5,EXTERNAL,vdd +Q 0.00606652 +S 4,EXTERNAL,q +Q 0.00258522 +S 3,INTERNAL +Q 0.00618269 +S 2,EXTERNAL,vss +Q 0.00512644 +S 1,INTERNAL +Q 0.00114171 +EOF diff --git a/alliance/share/cells/sxlib/ao22_x4.ap b/alliance/share/cells/sxlib/ao22_x4.ap new file mode 100644 index 00000000..10bbeb06 --- /dev/null +++ b/alliance/share/cells/sxlib/ao22_x4.ap @@ -0,0 +1,108 @@ +V ALLIANCE : 4 +H ao22_x4,P,26/ 8/99,10 +A 0,0,400,500 +C 0,470,60,vdd,0,WEST,ALU1 +C 0,30,60,vss,0,WEST,ALU1 +C 400,470,60,vdd,2,EAST,ALU1 +C 400,30,60,vss,2,EAST,ALU1 +R 100,300,ref_con,i1_30 +R 100,350,ref_con,i1_35 +R 100,400,ref_con,i1_40 +R 50,400,ref_con,i0_40 +R 50,350,ref_con,i0_35 +R 50,300,ref_con,i0_30 +R 50,250,ref_con,i0_25 +R 50,200,ref_con,i0_20 +R 200,150,ref_con,i2_15 +R 200,200,ref_con,i2_20 +R 200,250,ref_con,i2_25 +R 200,300,ref_con,i2_30 +R 200,350,ref_con,i2_35 +R 200,400,ref_con,i2_40 +R 100,200,ref_con,i1_20 +R 100,250,ref_con,i1_25 +R 300,100,ref_con,q_10 +R 300,400,ref_con,q_40 +R 300,350,ref_con,q_35 +R 300,300,ref_con,q_30 +R 300,250,ref_con,q_25 +R 300,200,ref_con,q_20 +R 300,150,ref_con,q_15 +R 200,100,ref_con,i2_10 +S 0,390,400,390,240,*,RIGHT,NWELL +S 360,280,360,470,30,*,UP,PDIF +S 330,260,330,490,10,*,DOWN,PTRANS +S 300,280,300,470,30,*,UP,PDIF +S 270,260,270,490,10,*,DOWN,PTRANS +S 210,280,210,470,30,*,UP,PDIF +S 120,310,120,440,10,*,DOWN,PTRANS +S 60,310,60,440,10,*,DOWN,PTRANS +S 180,310,180,440,10,*,DOWN,PTRANS +S 30,330,30,460,30,*,UP,PDIF +S 90,330,90,420,30,*,UP,PDIF +S 150,330,150,420,30,*,UP,PDIF +S 240,280,240,470,30,*,UP,PDIF +S 240,30,240,120,30,*,DOWN,NDIF +S 360,30,360,120,30,*,DOWN,NDIF +S 300,30,300,120,30,*,DOWN,NDIF +S 270,10,270,140,10,*,UP,NTRANS +S 90,80,90,160,30,*,DOWN,NDIF +S 330,10,330,140,10,*,UP,NTRANS +S 210,30,210,120,30,*,DOWN,NDIF +S 180,60,180,140,10,*,UP,NTRANS +S 30,80,30,120,30,*,DOWN,NDIF +S 150,80,150,120,30,*,DOWN,NDIF +S 120,60,120,140,10,*,UP,NTRANS +S 60,60,60,140,10,*,UP,NTRANS +S 330,140,330,260,10,*,UP,POLY +S 100,180,100,210,30,*,UP,POLY +S 140,210,330,210,10,*,RIGHT,POLY +S 270,140,270,260,10,*,UP,POLY +S 180,260,210,260,10,*,LEFT,POLY +S 180,260,180,310,10,*,DOWN,POLY +S 90,310,120,310,10,*,RIGHT,POLY +S 180,140,210,140,10,*,RIGHT,POLY +S 90,180,120,180,10,*,RIGHT,POLY +S 120,140,120,180,10,*,DOWN,POLY +S 60,140,60,310,10,*,UP,POLY +S 0,470,400,470,60,*,RIGHT,ALU1 +S 0,30,400,30,60,*,RIGHT,ALU1 +S 300,100,300,400,20,*,DOWN,ALU1 +S 360,300,360,450,20,*,UP,ALU1 +S 360,50,360,100,20,*,DOWN,ALU1 +S 50,200,50,400,10,*,UP,ALU1 +S 100,200,100,400,10,*,UP,ALU1 +S 30,100,150,100,10,*,RIGHT,ALU1 +S 150,150,150,400,10,*,DOWN,ALU1 +S 90,150,150,150,10,*,RIGHT,ALU1 +S 200,100,200,400,10,*,UP,ALU1 +V 300,350,CONT_DIF_P +V 300,300,CONT_DIF_P +V 360,350,CONT_DIF_P +V 360,400,CONT_DIF_P +V 230,450,CONT_DIF_P +V 360,450,CONT_DIF_P +V 30,450,CONT_DIF_P +V 150,400,CONT_DIF_P +V 150,350,CONT_DIF_P +V 90,470,CONT_BODY_N +V 300,400,CONT_DIF_P +V 150,470,CONT_BODY_N +V 360,300,CONT_DIF_P +V 90,150,CONT_DIF_N +V 360,50,CONT_DIF_N +V 230,50,CONT_DIF_N +V 300,100,CONT_DIF_N +V 30,100,CONT_DIF_N +V 150,100,CONT_DIF_N +V 360,100,CONT_DIF_N +V 150,30,CONT_BODY_P +V 30,30,CONT_BODY_P +V 90,30,CONT_BODY_P +V 50,200,CONT_POLY +V 100,200,CONT_POLY +V 200,150,CONT_POLY +V 200,250,CONT_POLY +V 150,220,CONT_POLY +V 100,300,CONT_POLY +EOF diff --git a/alliance/share/cells/sxlib/ao22_x4.vbe b/alliance/share/cells/sxlib/ao22_x4.vbe new file mode 100644 index 00000000..e11fa2ee --- /dev/null +++ b/alliance/share/cells/sxlib/ao22_x4.vbe @@ -0,0 +1,38 @@ +ENTITY ao22_x4 IS +GENERIC ( + CONSTANT area : NATURAL := 2000; + CONSTANT transistors : NATURAL := 10; + CONSTANT cin_i0 : NATURAL := 8; + CONSTANT cin_i1 : NATURAL := 8; + CONSTANT cin_i2 : NATURAL := 9; + CONSTANT tphh_i0_q : NATURAL := 670; + CONSTANT rup_i0_q : NATURAL := 890; + CONSTANT tpll_i0_q : NATURAL := 550; + CONSTANT rdown_i0_q : NATURAL := 800; + CONSTANT tphh_i1_q : NATURAL := 612; + CONSTANT rup_i1_q : NATURAL := 890; + CONSTANT tpll_i1_q : NATURAL := 645; + CONSTANT rdown_i1_q : NATURAL := 800; + CONSTANT tphh_i2_q : NATURAL := 523; + CONSTANT rup_i2_q : NATURAL := 890; + CONSTANT tpll_i2_q : NATURAL := 503; + CONSTANT rdown_i2_q : NATURAL := 800 +); +PORT ( + i0 : in BIT; + i1 : in BIT; + i2 : in BIT; + q : out BIT; + vdd : in BIT; + vss : in BIT +); +END ao22_x4; + +ARCHITECTURE behaviour_data_flow OF ao22_x4 IS + +BEGIN + ASSERT ((vdd and not (vss)) = '1') + REPORT "power supply is missing on ao22_x4" + SEVERITY WARNING; + q <= ((i0 or i1) and i2) after 1300 ps; +END; diff --git a/alliance/share/cells/sxlib/ao2o22_x2.al b/alliance/share/cells/sxlib/ao2o22_x2.al new file mode 100644 index 00000000..0271ede6 --- /dev/null +++ b/alliance/share/cells/sxlib/ao2o22_x2.al @@ -0,0 +1,42 @@ +V ALLIANCE : 6 +H ao2o22_x2,L,27/ 9/99 +C i0,IN,EXTERNAL,6 +C i1,IN,EXTERNAL,4 +C i2,IN,EXTERNAL,5 +C i3,IN,EXTERNAL,7 +C q,OUT,EXTERNAL,8 +C vdd,IN,EXTERNAL,9 +C vss,IN,EXTERNAL,1 +T P,0.35,2.9,10,6,9,0,0.75,0.75,7.3,7.3,1.8,11.25,tr_00010 +T P,0.35,2.9,11,5,3,0,0.75,0.75,7.3,7.3,5.4,11.25,tr_00009 +T P,0.35,2.9,9,7,11,0,0.75,0.75,7.3,7.3,7.2,11.25,tr_00008 +T P,0.35,2.9,3,4,10,0,0.75,0.75,7.3,7.3,3.6,11.25,tr_00007 +T P,0.35,5.9,8,3,9,0,0.75,0.75,13.3,13.3,11.1,11.25,tr_00006 +T N,0.35,1.4,2,5,1,0,0.75,0.75,4.3,4.3,5.4,3,tr_00005 +T N,0.35,1.4,1,7,2,0,0.75,0.75,4.3,4.3,7.2,3,tr_00004 +T N,0.35,1.4,2,6,3,0,0.75,0.75,4.3,4.3,1.8,3,tr_00003 +T N,0.35,1.4,3,4,2,0,0.75,0.75,4.3,4.3,3.6,3,tr_00002 +T N,0.35,2.9,1,3,8,0,0.75,0.75,7.3,7.3,11.1,2.25,tr_00001 +S 11,INTERNAL +Q 0 +S 10,INTERNAL +Q 0 +S 9,EXTERNAL,vdd +Q 0.00505663 +S 8,EXTERNAL,q +Q 0.00258522 +S 7,EXTERNAL,i3 +Q 0.00295462 +S 6,EXTERNAL,i0 +Q 0.00295462 +S 5,EXTERNAL,i2 +Q 0.00323197 +S 4,EXTERNAL,i1 +Q 0.00323197 +S 3,INTERNAL +Q 0.00640584 +S 2,INTERNAL +Q 0.00199441 +S 1,EXTERNAL,vss +Q 0.00564418 +EOF diff --git a/alliance/share/cells/sxlib/ao2o22_x2.ap b/alliance/share/cells/sxlib/ao2o22_x2.ap new file mode 100644 index 00000000..9486f328 --- /dev/null +++ b/alliance/share/cells/sxlib/ao2o22_x2.ap @@ -0,0 +1,109 @@ +V ALLIANCE : 4 +H ao2o22_x2,P,26/ 8/99,10 +A 0,0,450,500 +C 450,30,60,vss,1,EAST,ALU1 +C 450,470,60,vdd,1,EAST,ALU1 +C 0,30,60,vss,0,WEST,ALU1 +C 0,470,60,vdd,0,WEST,ALU1 +R 400,100,ref_con,q_10 +R 400,150,ref_con,q_15 +R 400,250,ref_con,q_25 +R 400,350,ref_con,q_35 +R 400,300,ref_con,q_30 +R 400,200,ref_con,q_20 +R 400,400,ref_con,q_40 +R 250,350,ref_con,i3_35 +R 200,350,ref_con,i2_35 +R 100,350,ref_con,i1_35 +R 100,400,ref_con,i1_40 +R 50,400,ref_con,i0_40 +R 50,350,ref_con,i0_35 +R 250,150,ref_con,i3_15 +R 250,200,ref_con,i3_20 +R 250,250,ref_con,i3_25 +R 250,300,ref_con,i3_30 +R 200,300,ref_con,i2_30 +R 200,250,ref_con,i2_25 +R 200,200,ref_con,i2_20 +R 200,150,ref_con,i2_15 +R 100,200,ref_con,i1_20 +R 100,250,ref_con,i1_25 +R 100,300,ref_con,i1_30 +R 50,300,ref_con,i0_30 +R 50,250,ref_con,i0_25 +R 50,200,ref_con,i0_20 +S 0,30,450,30,60,*,RIGHT,ALU1 +S 0,390,450,390,240,*,RIGHT,NWELL +S 0,470,450,470,60,*,RIGHT,ALU1 +S 300,200,350,200,10,*,RIGHT,ALU1 +S 300,200,300,400,10,*,DOWN,ALU1 +S 160,400,300,400,10,*,LEFT,ALU1 +S 370,260,370,490,10,*,UP,PTRANS +S 400,280,400,470,30,*,DOWN,PDIF +S 340,280,340,470,30,*,DOWN,PDIF +S 340,30,340,120,30,*,UP,NDIF +S 400,30,400,120,30,*,UP,NDIF +S 370,10,370,140,10,*,DOWN,NTRANS +S 370,140,370,260,10,*,DOWN,POLY +S 400,100,400,400,20,*,UP,ALU1 +S 340,50,340,100,20,*,DOWN,ALU1 +S 30,80,30,120,30,*,UP,NDIF +S 250,150,250,350,10,*,DOWN,ALU1 +S 200,150,200,350,10,*,DOWN,ALU1 +S 90,150,150,150,10,*,RIGHT,ALU1 +S 50,200,50,400,10,*,UP,ALU1 +S 100,200,100,400,10,*,DOWN,ALU1 +S 90,80,90,160,30,*,UP,NDIF +S 30,100,270,100,10,*,RIGHT,ALU1 +S 150,150,150,400,10,*,UP,ALU1 +S 270,80,270,120,30,*,UP,NDIF +S 210,40,210,120,30,*,UP,NDIF +S 210,330,210,420,30,*,DOWN,PDIF +S 30,330,30,460,30,*,DOWN,PDIF +S 270,330,270,460,30,*,DOWN,PDIF +S 60,140,60,310,10,*,DOWN,POLY +S 120,140,120,310,10,*,DOWN,POLY +S 180,140,180,310,10,*,DOWN,POLY +S 240,140,240,310,10,*,DOWN,POLY +S 120,60,120,140,10,*,DOWN,NTRANS +S 60,60,60,140,10,*,DOWN,NTRANS +S 240,60,240,140,10,*,DOWN,NTRANS +S 180,60,180,140,10,*,DOWN,NTRANS +S 150,80,150,120,30,*,UP,NDIF +S 120,310,120,440,10,*,UP,PTRANS +S 240,310,240,440,10,*,UP,PTRANS +S 180,310,180,440,10,*,UP,PTRANS +S 150,330,150,420,30,*,DOWN,PDIF +S 60,310,60,440,10,*,UP,PTRANS +S 90,330,90,420,30,*,DOWN,PDIF +S 100,200,120,200,30,*,RIGHT,POLY +S 180,200,200,200,30,*,RIGHT,POLY +V 400,400,CONT_DIF_P +V 400,350,CONT_DIF_P +V 400,300,CONT_DIF_P +V 340,450,CONT_DIF_P +V 400,100,CONT_DIF_N +V 340,100,CONT_DIF_N +V 340,50,CONT_DIF_N +V 350,200,CONT_POLY +V 30,30,CONT_BODY_P +V 90,30,CONT_BODY_P +V 270,30,CONT_BODY_P +V 90,470,CONT_BODY_N +V 210,470,CONT_BODY_N +V 90,150,CONT_DIF_N +V 150,350,CONT_DIF_P +V 30,100,CONT_DIF_N +V 150,100,CONT_DIF_N +V 270,100,CONT_DIF_N +V 210,50,CONT_DIF_N +V 150,400,CONT_DIF_P +V 30,450,CONT_DIF_P +V 270,450,CONT_DIF_P +V 150,470,CONT_BODY_N +V 150,30,CONT_BODY_P +V 50,200,CONT_POLY +V 250,200,CONT_POLY +V 100,200,CONT_POLY +V 200,200,CONT_POLY +EOF diff --git a/alliance/share/cells/sxlib/ao2o22_x2.vbe b/alliance/share/cells/sxlib/ao2o22_x2.vbe new file mode 100644 index 00000000..20a0b078 --- /dev/null +++ b/alliance/share/cells/sxlib/ao2o22_x2.vbe @@ -0,0 +1,44 @@ +ENTITY ao2o22_x2 IS +GENERIC ( + CONSTANT area : NATURAL := 2250; + CONSTANT transistors : NATURAL := 10; + CONSTANT cin_i0 : NATURAL := 8; + CONSTANT cin_i1 : NATURAL := 8; + CONSTANT cin_i2 : NATURAL := 8; + CONSTANT cin_i3 : NATURAL := 8; + CONSTANT tphh_i0_q : NATURAL := 569; + CONSTANT rup_i0_q : NATURAL := 1780; + CONSTANT tpll_i0_q : NATURAL := 450; + CONSTANT rdown_i0_q : NATURAL := 1600; + CONSTANT tphh_i1_q : NATURAL := 505; + CONSTANT rup_i1_q : NATURAL := 1780; + CONSTANT tpll_i1_q : NATURAL := 540; + CONSTANT rdown_i1_q : NATURAL := 1600; + CONSTANT tphh_i3_q : NATURAL := 485; + CONSTANT rup_i3_q : NATURAL := 1780; + CONSTANT tpll_i3_q : NATURAL := 524; + CONSTANT rdown_i3_q : NATURAL := 1600; + CONSTANT tphh_i2_q : NATURAL := 429; + CONSTANT rup_i2_q : NATURAL := 1780; + CONSTANT tpll_i2_q : NATURAL := 625; + CONSTANT rdown_i2_q : NATURAL := 1600 +); +PORT ( + i0 : in BIT; + i1 : in BIT; + i2 : in BIT; + i3 : in BIT; + q : out BIT; + vdd : in BIT; + vss : in BIT +); +END ao2o22_x2; + +ARCHITECTURE behaviour_data_flow OF ao2o22_x2 IS + +BEGIN + ASSERT ((vdd and not (vss)) = '1') + REPORT "power supply is missing on ao2o22_x2" + SEVERITY WARNING; + q <= ((i0 or i1) and (i2 or i3)) after 1200 ps; +END; diff --git a/alliance/share/cells/sxlib/ao2o22_x4.al b/alliance/share/cells/sxlib/ao2o22_x4.al new file mode 100644 index 00000000..b6ff0554 --- /dev/null +++ b/alliance/share/cells/sxlib/ao2o22_x4.al @@ -0,0 +1,44 @@ +V ALLIANCE : 6 +H ao2o22_x4,L,27/ 9/99 +C i0,IN,EXTERNAL,5 +C i1,IN,EXTERNAL,4 +C i2,IN,EXTERNAL,6 +C i3,IN,EXTERNAL,7 +C q,OUT,EXTERNAL,8 +C vdd,IN,EXTERNAL,9 +C vss,IN,EXTERNAL,3 +T P,0.35,5.9,8,1,9,0,0.75,0.75,13.3,13.3,11.1,11.25,tr_00012 +T P,0.35,5.9,9,1,8,0,0.75,0.75,13.3,13.3,12.9,11.25,tr_00011 +T P,0.35,2.9,1,4,11,0,0.75,0.75,7.3,7.3,3.6,11.25,tr_00010 +T P,0.35,2.9,9,7,10,0,0.75,0.75,7.3,7.3,7.2,11.25,tr_00009 +T P,0.35,2.9,10,6,1,0,0.75,0.75,7.3,7.3,5.4,11.25,tr_00008 +T P,0.35,2.9,11,5,9,0,0.75,0.75,7.3,7.3,1.8,11.25,tr_00007 +T N,0.35,2.9,8,1,3,0,0.75,0.75,7.3,7.3,12.9,2.25,tr_00006 +T N,0.35,2.9,3,1,8,0,0.75,0.75,7.3,7.3,11.1,2.25,tr_00005 +T N,0.35,1.4,1,4,2,0,0.75,0.75,4.3,4.3,3.6,3,tr_00004 +T N,0.35,1.4,2,5,1,0,0.75,0.75,4.3,4.3,1.8,3,tr_00003 +T N,0.35,1.4,3,7,2,0,0.75,0.75,4.3,4.3,7.2,3,tr_00002 +T N,0.35,1.4,2,6,3,0,0.75,0.75,4.3,4.3,5.4,3,tr_00001 +S 11,INTERNAL +Q 0 +S 10,INTERNAL +Q 0 +S 9,EXTERNAL,vdd +Q 0.007102 +S 8,EXTERNAL,q +Q 0.00258522 +S 7,EXTERNAL,i3 +Q 0.00295462 +S 6,EXTERNAL,i2 +Q 0.00323197 +S 5,EXTERNAL,i0 +Q 0.00295461 +S 4,EXTERNAL,i1 +Q 0.00323197 +S 3,EXTERNAL,vss +Q 0.00674947 +S 2,INTERNAL +Q 0.00199441 +S 1,INTERNAL +Q 0.00812254 +EOF diff --git a/alliance/share/cells/sxlib/ao2o22_x4.ap b/alliance/share/cells/sxlib/ao2o22_x4.ap new file mode 100644 index 00000000..e4664444 --- /dev/null +++ b/alliance/share/cells/sxlib/ao2o22_x4.ap @@ -0,0 +1,123 @@ +V ALLIANCE : 4 +H ao2o22_x4,P,26/ 8/99,10 +A 0,0,500,500 +C 0,470,60,vdd,0,WEST,ALU1 +C 0,30,60,vss,0,WEST,ALU1 +C 500,30,60,vss,1,EAST,ALU1 +C 500,470,60,vdd,1,EAST,ALU1 +R 50,200,ref_con,i0_20 +R 50,250,ref_con,i0_25 +R 50,300,ref_con,i0_30 +R 100,300,ref_con,i1_30 +R 100,250,ref_con,i1_25 +R 100,200,ref_con,i1_20 +R 200,150,ref_con,i2_15 +R 200,200,ref_con,i2_20 +R 200,250,ref_con,i2_25 +R 200,300,ref_con,i2_30 +R 250,300,ref_con,i3_30 +R 250,250,ref_con,i3_25 +R 250,200,ref_con,i3_20 +R 250,150,ref_con,i3_15 +R 50,350,ref_con,i0_35 +R 50,400,ref_con,i0_40 +R 100,400,ref_con,i1_40 +R 100,350,ref_con,i1_35 +R 200,350,ref_con,i2_35 +R 250,350,ref_con,i3_35 +R 400,400,ref_con,q_40 +R 400,200,ref_con,q_20 +R 400,300,ref_con,q_30 +R 400,350,ref_con,q_35 +R 400,250,ref_con,q_25 +R 400,150,ref_con,q_15 +R 400,100,ref_con,q_10 +S 180,200,200,200,30,*,RIGHT,POLY +S 100,200,120,200,30,*,RIGHT,POLY +S 90,330,90,420,30,*,DOWN,PDIF +S 60,310,60,440,10,*,UP,PTRANS +S 150,330,150,420,30,*,DOWN,PDIF +S 180,310,180,440,10,*,UP,PTRANS +S 240,310,240,440,10,*,UP,PTRANS +S 120,310,120,440,10,*,UP,PTRANS +S 150,80,150,120,30,*,UP,NDIF +S 180,60,180,140,10,*,DOWN,NTRANS +S 240,60,240,140,10,*,DOWN,NTRANS +S 60,60,60,140,10,*,DOWN,NTRANS +S 120,60,120,140,10,*,DOWN,NTRANS +S 240,140,240,310,10,*,DOWN,POLY +S 180,140,180,310,10,*,DOWN,POLY +S 120,140,120,310,10,*,DOWN,POLY +S 60,140,60,310,10,*,DOWN,POLY +S 270,330,270,460,30,*,DOWN,PDIF +S 30,330,30,460,30,*,DOWN,PDIF +S 210,330,210,420,30,*,DOWN,PDIF +S 210,40,210,120,30,*,UP,NDIF +S 270,80,270,120,30,*,UP,NDIF +S 150,150,150,400,10,*,UP,ALU1 +S 30,100,270,100,10,*,RIGHT,ALU1 +S 90,80,90,160,30,*,UP,NDIF +S 100,200,100,400,10,*,DOWN,ALU1 +S 50,200,50,400,10,*,UP,ALU1 +S 90,150,150,150,10,*,RIGHT,ALU1 +S 200,150,200,350,10,*,DOWN,ALU1 +S 250,150,250,350,10,*,DOWN,ALU1 +S 30,80,30,120,30,*,UP,NDIF +S 460,300,460,450,20,*,DOWN,ALU1 +S 460,50,460,100,20,*,DOWN,ALU1 +S 340,50,340,100,20,*,DOWN,ALU1 +S 400,100,400,400,20,*,UP,ALU1 +S 370,140,370,260,10,*,DOWN,POLY +S 430,140,430,260,10,*,DOWN,POLY +S 350,200,430,200,30,*,RIGHT,POLY +S 370,10,370,140,10,*,DOWN,NTRANS +S 460,30,460,120,30,*,UP,NDIF +S 400,30,400,120,30,*,UP,NDIF +S 340,30,340,120,30,*,UP,NDIF +S 430,10,430,140,10,*,DOWN,NTRANS +S 460,280,460,470,30,*,DOWN,PDIF +S 340,280,340,470,30,*,DOWN,PDIF +S 400,280,400,470,30,*,DOWN,PDIF +S 430,260,430,490,10,*,UP,PTRANS +S 370,260,370,490,10,*,UP,PTRANS +S 160,400,300,400,10,*,LEFT,ALU1 +S 300,200,300,400,10,*,DOWN,ALU1 +S 300,200,350,200,10,*,RIGHT,ALU1 +S 0,470,500,470,60,*,RIGHT,ALU1 +S 0,390,500,390,240,*,RIGHT,NWELL +S 0,30,500,30,60,*,RIGHT,ALU1 +V 200,200,CONT_POLY +V 100,200,CONT_POLY +V 250,200,CONT_POLY +V 50,200,CONT_POLY +V 150,30,CONT_BODY_P +V 150,470,CONT_BODY_N +V 270,450,CONT_DIF_P +V 30,450,CONT_DIF_P +V 150,400,CONT_DIF_P +V 210,50,CONT_DIF_N +V 270,100,CONT_DIF_N +V 150,100,CONT_DIF_N +V 30,100,CONT_DIF_N +V 150,350,CONT_DIF_P +V 90,150,CONT_DIF_N +V 210,470,CONT_BODY_N +V 90,470,CONT_BODY_N +V 270,30,CONT_BODY_P +V 90,30,CONT_BODY_P +V 30,30,CONT_BODY_P +V 350,200,CONT_POLY +V 340,50,CONT_DIF_N +V 340,100,CONT_DIF_N +V 460,100,CONT_DIF_N +V 400,100,CONT_DIF_N +V 460,50,CONT_DIF_N +V 340,450,CONT_DIF_P +V 460,450,CONT_DIF_P +V 460,400,CONT_DIF_P +V 460,350,CONT_DIF_P +V 460,300,CONT_DIF_P +V 400,300,CONT_DIF_P +V 400,350,CONT_DIF_P +V 400,400,CONT_DIF_P +EOF diff --git a/alliance/share/cells/sxlib/ao2o22_x4.vbe b/alliance/share/cells/sxlib/ao2o22_x4.vbe new file mode 100644 index 00000000..db7ddce2 --- /dev/null +++ b/alliance/share/cells/sxlib/ao2o22_x4.vbe @@ -0,0 +1,44 @@ +ENTITY ao2o22_x4 IS +GENERIC ( + CONSTANT area : NATURAL := 2500; + CONSTANT transistors : NATURAL := 12; + CONSTANT cin_i0 : NATURAL := 8; + CONSTANT cin_i1 : NATURAL := 8; + CONSTANT cin_i2 : NATURAL := 8; + CONSTANT cin_i3 : NATURAL := 8; + CONSTANT tphh_i3_q : NATURAL := 602; + CONSTANT rup_i3_q : NATURAL := 890; + CONSTANT tpll_i3_q : NATURAL := 637; + CONSTANT rdown_i3_q : NATURAL := 800; + CONSTANT tphh_i2_q : NATURAL := 551; + CONSTANT rup_i2_q : NATURAL := 890; + CONSTANT tpll_i2_q : NATURAL := 742; + CONSTANT rdown_i2_q : NATURAL := 800; + CONSTANT tphh_i0_q : NATURAL := 692; + CONSTANT rup_i0_q : NATURAL := 890; + CONSTANT tpll_i0_q : NATURAL := 567; + CONSTANT rdown_i0_q : NATURAL := 800; + CONSTANT tphh_i1_q : NATURAL := 634; + CONSTANT rup_i1_q : NATURAL := 890; + CONSTANT tpll_i1_q : NATURAL := 664; + CONSTANT rdown_i1_q : NATURAL := 800 +); +PORT ( + i0 : in BIT; + i1 : in BIT; + i2 : in BIT; + i3 : in BIT; + q : out BIT; + vdd : in BIT; + vss : in BIT +); +END ao2o22_x4; + +ARCHITECTURE behaviour_data_flow OF ao2o22_x4 IS + +BEGIN + ASSERT ((vdd and not (vss)) = '1') + REPORT "power supply is missing on ao2o22_x4" + SEVERITY WARNING; + q <= ((i0 or i1) and (i2 or i3)) after 1300 ps; +END; diff --git a/alliance/share/cells/sxlib/nao22_x1.al b/alliance/share/cells/sxlib/nao22_x1.al new file mode 100644 index 00000000..ea284adf --- /dev/null +++ b/alliance/share/cells/sxlib/nao22_x1.al @@ -0,0 +1,31 @@ +V ALLIANCE : 6 +H nao22_x1,L,27/ 9/99 +C i0,IN,EXTERNAL,6 +C i1,IN,EXTERNAL,7 +C i2,IN,EXTERNAL,8 +C nq,OUT,EXTERNAL,1 +C vdd,IN,EXTERNAL,4 +C vss,IN,EXTERNAL,3 +T P,0.35,5.9,4,8,1,0,0.75,0.75,13.3,13.3,5.4,11.25,tr_00006 +T P,0.35,5.9,5,6,4,0,0.75,0.75,13.3,13.3,1.8,11.25,tr_00005 +T P,0.35,5.9,1,7,5,0,0.75,0.75,13.3,13.3,3.6,11.25,tr_00004 +T N,0.35,2.9,2,6,1,0,0.75,0.75,7.3,7.3,1.8,2.25,tr_00003 +T N,0.35,2.9,1,7,2,0,0.75,0.75,7.3,7.3,3.6,2.25,tr_00002 +T N,0.35,2.9,2,8,3,0,0.75,0.75,7.3,7.3,5.4,2.25,tr_00001 +S 8,EXTERNAL,i2 +Q 0.00344864 +S 7,EXTERNAL,i1 +Q 0.00288494 +S 6,EXTERNAL,i0 +Q 0.00260759 +S 5,INTERNAL +Q 0 +S 4,EXTERNAL,vdd +Q 0.00473727 +S 3,EXTERNAL,vss +Q 0.00432598 +S 2,INTERNAL +Q 0.00114171 +S 1,EXTERNAL,nq +Q 0.00282024 +EOF diff --git a/alliance/share/cells/sxlib/nao22_x1.ap b/alliance/share/cells/sxlib/nao22_x1.ap new file mode 100644 index 00000000..fc725778 --- /dev/null +++ b/alliance/share/cells/sxlib/nao22_x1.ap @@ -0,0 +1,77 @@ +V ALLIANCE : 4 +H nao22_x1,P,27/ 8/99,100 +A 0,0,3000,5000 +C 0,300,600,vss,0,WEST,ALU1 +C 0,4700,600,vdd,0,WEST,ALU1 +C 3000,300,600,vss,1,EAST,ALU1 +C 3000,4700,600,vdd,1,EAST,ALU1 +R 1500,3500,ref_con,nq_35 +R 1500,3000,ref_con,nq_30 +R 1500,2500,ref_con,nq_25 +R 1500,2000,ref_con,nq_20 +R 1500,1500,ref_con,nq_15 +R 2000,3500,ref_con,i2_35 +R 2000,3000,ref_con,i2_30 +R 2000,2500,ref_con,i2_25 +R 2000,2000,ref_con,i2_20 +R 2000,1500,ref_con,i2_15 +R 1000,2000,ref_con,i1_20 +R 1000,2500,ref_con,i1_25 +R 1000,3000,ref_con,i1_30 +R 500,3000,ref_con,i0_30 +R 500,2500,ref_con,i0_25 +R 500,2000,ref_con,i0_20 +R 500,4000,ref_con,i0_40 +R 500,3500,ref_con,i0_35 +R 1000,3500,ref_con,i1_35 +R 1000,4000,ref_con,i1_40 +R 1500,4000,ref_con,nq_40 +R 2000,4000,ref_con,i2_40 +R 2000,1000,ref_con,i2_10 +S 900,1500,1550,1500,200,*,RIGHT,ALU1 +S 1500,1450,1500,4000,200,*,UP,ALU1 +S 1000,2000,1200,2000,300,*,RIGHT,POLY +S 1800,2000,2000,2000,300,*,RIGHT,POLY +S 2100,300,2100,1200,300,*,UP,NDIF +S 1800,100,1800,1400,100,*,DOWN,NTRANS +S 1500,300,1500,1200,300,*,UP,NDIF +S 1200,100,1200,1400,100,*,DOWN,NTRANS +S 300,300,300,1200,300,*,UP,NDIF +S 600,100,600,1400,100,*,DOWN,NTRANS +S 1200,2600,1200,4900,100,*,UP,PTRANS +S 900,2800,900,4700,300,*,DOWN,PDIF +S 600,2600,600,4900,100,*,UP,PTRANS +S 300,2800,300,4700,300,*,DOWN,PDIF +S 1500,2800,1500,4700,300,*,DOWN,PDIF +S 1800,2600,1800,4900,100,*,UP,PTRANS +S 2100,2800,2100,4700,300,*,DOWN,PDIF +S 600,1400,600,2600,100,*,DOWN,POLY +S 1200,1400,1200,2600,100,*,DOWN,POLY +S 1800,1400,1800,2600,100,*,DOWN,POLY +S 900,300,900,1600,300,*,UP,NDIF +S 1000,2000,1000,4000,100,*,DOWN,ALU1 +S 500,2000,500,4000,100,*,UP,ALU1 +S 300,1000,1500,1000,100,*,RIGHT,ALU1 +S 0,300,3000,300,600,*,RIGHT,ALU1 +S 0,4700,3000,4700,600,*,RIGHT,ALU1 +S 0,3900,3000,3900,2400,*,RIGHT,NWELL +S 2700,2900,2700,4500,200,*,DOWN,ALU1 +S 2700,500,2700,1700,200,*,DOWN,ALU1 +S 2000,1000,2000,4000,100,*,DOWN,ALU1 +V 500,2000,CONT_POLY +V 1000,2000,CONT_POLY +V 2000,2000,CONT_POLY +V 300,1000,CONT_DIF_N +V 1500,1000,CONT_DIF_N +V 2100,500,CONT_DIF_N +V 300,4500,CONT_DIF_P +V 900,1500,CONT_DIF_N +V 1500,3500,CONT_DIF_P +V 1500,4000,CONT_DIF_P +V 1500,3000,CONT_DIF_P +V 2100,4500,CONT_DIF_P +V 2700,1700,CONT_BODY_P +V 2700,2900,CONT_BODY_N +V 2700,4700,CONT_BODY_N +V 2700,300,CONT_BODY_P +EOF diff --git a/alliance/share/cells/sxlib/nao22_x1.vbe b/alliance/share/cells/sxlib/nao22_x1.vbe new file mode 100644 index 00000000..3ce2f71a --- /dev/null +++ b/alliance/share/cells/sxlib/nao22_x1.vbe @@ -0,0 +1,38 @@ +ENTITY nao22_x1 IS +GENERIC ( + CONSTANT area : NATURAL := 1500; + CONSTANT transistors : NATURAL := 6; + CONSTANT cin_i0 : NATURAL := 14; + CONSTANT cin_i1 : NATURAL := 14; + CONSTANT cin_i2 : NATURAL := 14; + CONSTANT tplh_i0_nq : NATURAL := 226; + CONSTANT rup_i0_nq : NATURAL := 3200; + CONSTANT tphl_i0_nq : NATURAL := 291; + CONSTANT rdown_i0_nq : NATURAL := 2820; + CONSTANT tplh_i1_nq : NATURAL := 286; + CONSTANT rup_i1_nq : NATURAL := 3200; + CONSTANT tphl_i1_nq : NATURAL := 215; + CONSTANT rdown_i1_nq : NATURAL := 2820; + CONSTANT tplh_i2_nq : NATURAL := 237; + CONSTANT rup_i2_nq : NATURAL := 1780; + CONSTANT tphl_i2_nq : NATURAL := 162; + CONSTANT rdown_i2_nq : NATURAL := 2820 +); +PORT ( + i0 : in BIT; + i1 : in BIT; + i2 : in BIT; + nq : out BIT; + vdd : in BIT; + vss : in BIT +); +END nao22_x1; + +ARCHITECTURE behaviour_data_flow OF nao22_x1 IS + +BEGIN + ASSERT ((vdd and not (vss)) = '1') + REPORT "power supply is missing on nao22_x1" + SEVERITY WARNING; + nq <= not (((i0 or i1) and i2)) after 900 ps; +END; diff --git a/alliance/share/cells/sxlib/nao22_x4.al b/alliance/share/cells/sxlib/nao22_x4.al new file mode 100644 index 00000000..70e09efd --- /dev/null +++ b/alliance/share/cells/sxlib/nao22_x4.al @@ -0,0 +1,41 @@ +V ALLIANCE : 6 +H nao22_x4,L,27/ 9/99 +C i0,IN,EXTERNAL,7 +C i1,IN,EXTERNAL,6 +C i2,IN,EXTERNAL,5 +C nq,OUT,EXTERNAL,8 +C vdd,IN,EXTERNAL,9 +C vss,IN,EXTERNAL,4 +T P,0.35,2.9,10,6,3,0,0.75,0.75,7.3,7.3,3.9,11.25,tr_00012 +T P,0.35,2.9,9,7,10,0,0.75,0.75,7.3,7.3,5.7,11.25,tr_00011 +T P,0.35,2.9,3,5,9,0,0.75,0.75,7.3,7.3,2.1,11.25,tr_00010 +T P,0.35,2.9,9,3,2,0,0.75,0.75,7.3,7.3,9.3,9.75,tr_00009 +T P,0.35,5.9,9,2,8,0,0.75,0.75,13.3,13.3,12.9,11.25,tr_00008 +T P,0.35,5.9,8,2,9,0,0.75,0.75,13.3,13.3,11.1,11.25,tr_00007 +T N,0.35,1.4,4,5,1,0,0.75,0.75,4.3,4.3,2.1,3,tr_00006 +T N,0.35,2.9,4,2,8,0,0.75,0.75,7.3,7.3,11.1,2.25,tr_00005 +T N,0.35,1.4,1,6,3,0,0.75,0.75,4.3,4.3,3.9,3,tr_00004 +T N,0.35,1.4,3,7,1,0,0.75,0.75,4.3,4.3,5.7,3,tr_00003 +T N,0.35,1.4,2,3,4,0,0.75,0.75,4.3,4.3,9.3,3,tr_00002 +T N,0.35,2.9,8,2,4,0,0.75,0.75,7.3,7.3,12.9,2.25,tr_00001 +S 10,INTERNAL +Q 0 +S 9,EXTERNAL,vdd +Q 0.00768955 +S 8,EXTERNAL,nq +Q 0.00258522 +S 7,EXTERNAL,i0 +Q 0.00358899 +S 6,EXTERNAL,i1 +Q 0.00295012 +S 5,EXTERNAL,i2 +Q 0.00379567 +S 4,EXTERNAL,vss +Q 0.00616192 +S 3,INTERNAL +Q 0.0066832 +S 2,INTERNAL +Q 0.00580421 +S 1,INTERNAL +Q 0.00114171 +EOF diff --git a/alliance/share/cells/sxlib/nao22_x4.ap b/alliance/share/cells/sxlib/nao22_x4.ap new file mode 100644 index 00000000..ac18ae24 --- /dev/null +++ b/alliance/share/cells/sxlib/nao22_x4.ap @@ -0,0 +1,128 @@ +V ALLIANCE : 4 +H nao22_x4,P,27/ 8/99,100 +A 0,0,5000,5000 +C 0,300,600,vss,0,WEST,ALU1 +C 0,4700,600,vdd,0,WEST,ALU1 +C 5000,4700,600,vdd,1,EAST,ALU1 +C 5000,300,600,vss,1,EAST,ALU1 +R 500,1000,ref_con,i2_10 +R 500,1500,ref_con,i2_15 +R 500,2500,ref_con,i2_25 +R 500,3000,ref_con,i2_30 +R 4000,3500,ref_con,nq_35 +R 4000,3000,ref_con,nq_30 +R 4000,2000,ref_con,nq_20 +R 4000,1000,ref_con,nq_10 +R 4000,1500,ref_con,nq_15 +R 4000,2500,ref_con,nq_25 +R 2000,2000,ref_con,i0_20 +R 2000,2500,ref_con,i0_25 +R 2000,3000,ref_con,i0_30 +R 1500,3000,ref_con,i1_30 +R 1500,2500,ref_con,i1_25 +R 1500,2000,ref_con,i1_20 +R 500,2000,ref_con,i2_20 +R 2000,3500,ref_con,i0_35 +R 1500,3500,ref_con,i1_35 +R 500,3500,ref_con,i2_35 +R 500,4000,ref_con,i2_40 +R 4000,4000,ref_con,nq_40 +R 2500,1500,ref_con,i0_15 +S 2000,2000,2400,2000,200,*,RIGHT,ALU1 +S 500,1000,500,4000,100,*,DOWN,ALU1 +S 2000,2000,2000,3500,100,*,DOWN,ALU1 +S 1000,1500,1600,1500,100,*,RIGHT,ALU1 +S 1500,2000,1500,3500,100,*,DOWN,ALU1 +S 1600,800,1600,1600,300,*,UP,NDIF +S 400,400,400,1200,300,*,UP,NDIF +S 4600,500,4600,1000,200,*,DOWN,ALU1 +S 4600,3000,4600,4500,200,*,DOWN,ALU1 +S 3400,4000,3400,4500,200,*,DOWN,ALU1 +S 2800,2000,3500,2000,100,*,RIGHT,ALU1 +S 3300,2500,3300,3500,100,*,DOWN,ALU1 +S 4000,1000,4000,4000,200,*,UP,ALU1 +S 1100,4000,2800,4000,100,*,LEFT,ALU1 +S 2800,3500,2800,4000,100,*,UP,ALU1 +S 2800,3500,3300,3500,100,*,LEFT,ALU1 +S 1000,1500,1000,4000,100,*,UP,ALU1 +S 0,4700,5000,4700,600,*,RIGHT,ALU1 +S 1000,1000,2200,1000,100,*,RIGHT,ALU1 +S 0,300,5000,300,600,*,RIGHT,ALU1 +S 500,2000,700,2000,300,*,RIGHT,POLY +S 1300,2000,1500,2000,300,*,RIGHT,POLY +S 3500,2000,4300,2000,300,*,RIGHT,POLY +S 3100,2500,3300,2500,300,*,RIGHT,POLY +S 4300,1400,4300,2600,100,*,DOWN,POLY +S 3700,1400,3700,2600,100,*,DOWN,POLY +S 3100,1400,3100,2600,100,*,DOWN,POLY +S 700,1400,700,3100,100,*,DOWN,POLY +S 1300,1400,1300,3100,100,*,DOWN,POLY +S 1900,1400,1900,3100,100,*,DOWN,POLY +S 4300,100,4300,1400,100,*,DOWN,NTRANS +S 3400,300,3400,1200,300,*,UP,NDIF +S 4000,300,4000,1200,300,*,UP,NDIF +S 4600,300,4600,1200,300,*,UP,NDIF +S 3100,600,3100,1400,100,*,DOWN,NTRANS +S 2800,800,2800,1200,300,*,UP,NDIF +S 1900,600,1900,1400,100,*,DOWN,NTRANS +S 1300,600,1300,1400,100,*,DOWN,NTRANS +S 1000,800,1000,1200,300,*,UP,NDIF +S 3700,100,3700,1400,100,*,DOWN,NTRANS +S 2200,800,2200,1200,300,*,UP,NDIF +S 700,600,700,1400,100,*,DOWN,NTRANS +S 1000,3300,1000,4200,300,*,DOWN,PDIF +S 3700,2600,3700,4900,100,*,UP,PTRANS +S 4300,2600,4300,4900,100,*,UP,PTRANS +S 4000,2800,4000,4700,300,*,DOWN,PDIF +S 3400,2800,3400,4700,300,*,DOWN,PDIF +S 4600,2800,4600,4700,300,*,DOWN,PDIF +S 3100,2600,3100,3900,100,*,UP,PTRANS +S 2800,2800,2800,3700,300,*,DOWN,PDIF +S 0,3900,5000,3900,2400,*,RIGHT,NWELL +S 400,3300,400,4600,300,*,DOWN,PDIF +S 1600,3300,1600,4200,300,*,DOWN,PDIF +S 2200,3300,2200,4600,300,*,DOWN,PDIF +S 700,3100,700,4400,100,*,UP,PTRANS +S 1900,3100,1900,4400,100,*,UP,PTRANS +S 1300,3100,1300,4400,100,*,UP,PTRANS +S 2400,1500,2400,2000,100,*,DOWN,ALU1 +S 2400,1500,2500,1500,100,*,RIGHT,ALU1 +S 3500,1000,3500,2000,100,*,DOWN,ALU1 +S 2800,1000,3500,1000,100,*,LEFT,ALU1 +S 2800,2000,2800,3000,100,*,UP,ALU1 +V 1600,1500,CONT_DIF_N +V 400,500,CONT_DIF_N +V 1600,300,CONT_BODY_P +V 500,2000,CONT_POLY +V 1500,2000,CONT_POLY +V 3500,2000,CONT_POLY +V 3300,2500,CONT_POLY +V 2000,2000,CONT_POLY +V 2200,300,CONT_BODY_P +V 1000,300,CONT_BODY_P +V 2800,300,CONT_BODY_P +V 2800,1000,CONT_DIF_N +V 3400,500,CONT_DIF_N +V 4600,500,CONT_DIF_N +V 4000,1000,CONT_DIF_N +V 1000,1000,CONT_DIF_N +V 2200,1000,CONT_DIF_N +V 4600,1000,CONT_DIF_N +V 3400,4000,CONT_DIF_P +V 1000,4700,CONT_BODY_N +V 2800,4700,CONT_BODY_N +V 2800,3000,CONT_DIF_P +V 4600,3000,CONT_DIF_P +V 4600,3500,CONT_DIF_P +V 4600,4000,CONT_DIF_P +V 4600,4500,CONT_DIF_P +V 3400,4500,CONT_DIF_P +V 400,4500,CONT_DIF_P +V 1600,4700,CONT_BODY_N +V 1000,3500,CONT_DIF_P +V 1000,4000,CONT_DIF_P +V 2200,4500,CONT_DIF_P +V 4000,3000,CONT_DIF_P +V 4000,3500,CONT_DIF_P +V 4000,4000,CONT_DIF_P +EOF diff --git a/alliance/share/cells/sxlib/nao22_x4.vbe b/alliance/share/cells/sxlib/nao22_x4.vbe new file mode 100644 index 00000000..eee1648c --- /dev/null +++ b/alliance/share/cells/sxlib/nao22_x4.vbe @@ -0,0 +1,38 @@ +ENTITY nao22_x4 IS +GENERIC ( + CONSTANT area : NATURAL := 2500; + CONSTANT transistors : NATURAL := 12; + CONSTANT cin_i0 : NATURAL := 8; + CONSTANT cin_i1 : NATURAL := 8; + CONSTANT cin_i2 : NATURAL := 9; + CONSTANT tplh_i2_nq : NATURAL := 630; + CONSTANT rup_i2_nq : NATURAL := 890; + CONSTANT tphl_i2_nq : NATURAL := 580; + CONSTANT rdown_i2_nq : NATURAL := 800; + CONSTANT tplh_i0_nq : NATURAL := 635; + CONSTANT rup_i0_nq : NATURAL := 890; + CONSTANT tphl_i0_nq : NATURAL := 724; + CONSTANT rdown_i0_nq : NATURAL := 800; + CONSTANT tplh_i1_nq : NATURAL := 717; + CONSTANT rup_i1_nq : NATURAL := 890; + CONSTANT tphl_i1_nq : NATURAL := 656; + CONSTANT rdown_i1_nq : NATURAL := 800 +); +PORT ( + i0 : in BIT; + i1 : in BIT; + i2 : in BIT; + nq : out BIT; + vdd : in BIT; + vss : in BIT +); +END nao22_x4; + +ARCHITECTURE behaviour_data_flow OF nao22_x4 IS + +BEGIN + ASSERT ((vdd and not (vss)) = '1') + REPORT "power supply is missing on nao22_x4" + SEVERITY WARNING; + nq <= not (((i0 or i1) and i2)) after 1300 ps; +END; diff --git a/alliance/share/cells/sxlib/noa22_x1.al b/alliance/share/cells/sxlib/noa22_x1.al new file mode 100644 index 00000000..52153717 --- /dev/null +++ b/alliance/share/cells/sxlib/noa22_x1.al @@ -0,0 +1,31 @@ +V ALLIANCE : 6 +H noa22_x1,L,27/ 9/99 +C i0,IN,EXTERNAL,6 +C i1,IN,EXTERNAL,7 +C i2,IN,EXTERNAL,8 +C nq,OUT,EXTERNAL,2 +C vdd,IN,EXTERNAL,5 +C vss,IN,EXTERNAL,3 +T P,0.35,5.9,5,8,4,0,0.75,0.75,13.3,13.3,5.4,11.25,tr_00006 +T P,0.35,5.9,2,6,4,0,0.75,0.75,13.3,13.3,1.8,11.25,tr_00005 +T P,0.35,5.9,4,7,2,0,0.75,0.75,13.3,13.3,3.6,11.25,tr_00004 +T N,0.35,2.9,3,6,1,0,0.75,0.75,7.3,7.3,1.8,2.25,tr_00003 +T N,0.35,2.9,1,7,2,0,0.75,0.75,7.3,7.3,3.6,2.25,tr_00002 +T N,0.35,2.9,2,8,3,0,0.75,0.75,7.3,7.3,5.4,2.25,tr_00001 +S 8,EXTERNAL,i2 +Q 0.00344864 +S 7,EXTERNAL,i1 +Q 0.00288494 +S 6,EXTERNAL,i0 +Q 0.00260759 +S 5,EXTERNAL,vdd +Q 0.004561 +S 4,INTERNAL +Q 0.00171257 +S 3,EXTERNAL,vss +Q 0.00450225 +S 2,EXTERNAL,nq +Q 0.0026146 +S 1,INTERNAL +Q 0 +EOF diff --git a/alliance/share/cells/sxlib/noa22_x1.ap b/alliance/share/cells/sxlib/noa22_x1.ap new file mode 100644 index 00000000..a1d75b39 --- /dev/null +++ b/alliance/share/cells/sxlib/noa22_x1.ap @@ -0,0 +1,78 @@ +V ALLIANCE : 4 +H noa22_x1,P,27/ 8/99,100 +A 0,0,3000,5000 +C 0,300,600,vss,0,WEST,ALU1 +C 0,4700,600,vdd,0,WEST,ALU1 +C 3000,300,600,vss,1,EAST,ALU1 +C 3000,4700,600,vdd,1,EAST,ALU1 +R 1500,3500,ref_con,nq_35 +R 1500,3000,ref_con,nq_30 +R 1500,2500,ref_con,nq_25 +R 1500,2000,ref_con,nq_20 +R 1500,1500,ref_con,nq_15 +R 1500,1000,ref_con,nq_10 +R 2000,3500,ref_con,i2_35 +R 2000,3000,ref_con,i2_30 +R 2000,2500,ref_con,i2_25 +R 2000,2000,ref_con,i2_20 +R 2000,1500,ref_con,i2_15 +R 2000,1000,ref_con,i2_10 +R 1000,1000,ref_con,i1_10 +R 1000,1500,ref_con,i1_15 +R 1000,2000,ref_con,i1_20 +R 1000,2500,ref_con,i1_25 +R 1000,3000,ref_con,i1_30 +R 500,3000,ref_con,i0_30 +R 500,2500,ref_con,i0_25 +R 500,2000,ref_con,i0_20 +R 500,1500,ref_con,i0_15 +R 500,1000,ref_con,i0_10 +R 2000,4000,ref_con,i2_40 +S 1500,1000,1500,3550,200,*,UP,ALU1 +S 300,3500,300,4000,100,*,UP,ALU1 +S 900,3500,1500,3500,200,*,RIGHT,ALU1 +S 1000,2000,1200,2000,300,*,RIGHT,POLY +S 1800,2000,2000,2000,300,*,RIGHT,POLY +S 2100,300,2100,1200,300,*,UP,NDIF +S 1800,100,1800,1400,100,*,DOWN,NTRANS +S 1500,300,1500,1200,300,*,UP,NDIF +S 1200,100,1200,1400,100,*,DOWN,NTRANS +S 900,300,900,1200,300,*,UP,NDIF +S 300,300,300,1200,300,*,UP,NDIF +S 600,100,600,1400,100,*,DOWN,NTRANS +S 1200,2600,1200,4900,100,*,UP,PTRANS +S 900,2800,900,4700,300,*,DOWN,PDIF +S 600,2600,600,4900,100,*,UP,PTRANS +S 300,2800,300,4700,300,*,DOWN,PDIF +S 1500,2800,1500,4700,300,*,DOWN,PDIF +S 1800,2600,1800,4900,100,*,UP,PTRANS +S 2100,2800,2100,4700,300,*,DOWN,PDIF +S 600,1400,600,2600,100,*,DOWN,POLY +S 1200,1400,1200,2600,100,*,DOWN,POLY +S 1000,1000,1000,3000,100,*,DOWN,ALU1 +S 500,1000,500,3000,100,*,UP,ALU1 +S 1800,1400,1800,2600,100,*,DOWN,POLY +S 300,4000,1500,4000,100,*,RIGHT,ALU1 +S 2000,1000,2000,4000,100,*,DOWN,ALU1 +S 2700,2900,2700,4500,200,*,DOWN,ALU1 +S 2700,500,2700,1700,200,*,DOWN,ALU1 +S 0,300,3000,300,600,*,RIGHT,ALU1 +S 0,4700,3000,4700,600,*,RIGHT,ALU1 +S 0,3900,3000,3900,2400,*,LEFT,NWELL +V 300,3500,CONT_DIF_P +V 500,2000,CONT_POLY +V 1500,1000,CONT_DIF_N +V 300,500,CONT_DIF_N +V 1000,2000,CONT_POLY +V 2000,2000,CONT_POLY +V 300,4000,CONT_DIF_P +V 1500,4000,CONT_DIF_P +V 2100,4500,CONT_DIF_P +V 900,3500,CONT_DIF_P +V 1500,1000,CONT_DIF_N +V 2100,500,CONT_DIF_N +V 2700,1700,CONT_BODY_P +V 2700,2900,CONT_BODY_N +V 2700,4700,CONT_BODY_N +V 2700,300,CONT_BODY_P +EOF diff --git a/alliance/share/cells/sxlib/noa22_x1.vbe b/alliance/share/cells/sxlib/noa22_x1.vbe new file mode 100644 index 00000000..18472d2a --- /dev/null +++ b/alliance/share/cells/sxlib/noa22_x1.vbe @@ -0,0 +1,38 @@ +ENTITY noa22_x1 IS +GENERIC ( + CONSTANT area : NATURAL := 1500; + CONSTANT transistors : NATURAL := 6; + CONSTANT cin_i0 : NATURAL := 14; + CONSTANT cin_i1 : NATURAL := 14; + CONSTANT cin_i2 : NATURAL := 14; + CONSTANT tplh_i1_nq : NATURAL := 286; + CONSTANT rup_i1_nq : NATURAL := 3200; + CONSTANT tphl_i1_nq : NATURAL := 215; + CONSTANT rdown_i1_nq : NATURAL := 2820; + CONSTANT tplh_i2_nq : NATURAL := 241; + CONSTANT rup_i2_nq : NATURAL := 3200; + CONSTANT tphl_i2_nq : NATURAL := 215; + CONSTANT rdown_i2_nq : NATURAL := 1600; + CONSTANT tplh_i0_nq : NATURAL := 327; + CONSTANT rup_i0_nq : NATURAL := 3200; + CONSTANT tphl_i0_nq : NATURAL := 148; + CONSTANT rdown_i0_nq : NATURAL := 2820 +); +PORT ( + i0 : in BIT; + i1 : in BIT; + i2 : in BIT; + nq : out BIT; + vdd : in BIT; + vss : in BIT +); +END noa22_x1; + +ARCHITECTURE behaviour_data_flow OF noa22_x1 IS + +BEGIN + ASSERT ((vdd and not (vss)) = '1') + REPORT "power supply is missing on noa22_x1" + SEVERITY WARNING; + nq <= not (((i0 and i1) or i2)) after 900 ps; +END; diff --git a/alliance/share/cells/sxlib/noa22_x4.al b/alliance/share/cells/sxlib/noa22_x4.al new file mode 100644 index 00000000..ae6c1b47 --- /dev/null +++ b/alliance/share/cells/sxlib/noa22_x4.al @@ -0,0 +1,41 @@ +V ALLIANCE : 6 +H noa22_x4,L,27/ 9/99 +C i0,IN,EXTERNAL,7 +C i1,IN,EXTERNAL,5 +C i2,IN,EXTERNAL,6 +C nq,OUT,EXTERNAL,8 +C vdd,IN,EXTERNAL,9 +C vss,IN,EXTERNAL,3 +T P,0.35,5.9,8,4,9,0,0.75,0.75,13.3,13.3,11.1,11.25,tr_00012 +T P,0.35,5.9,9,4,8,0,0.75,0.75,13.3,13.3,12.9,11.25,tr_00011 +T P,0.35,2.9,9,1,4,0,0.75,0.75,7.3,7.3,9.3,9.75,tr_00010 +T P,0.35,2.9,10,6,9,0,0.75,0.75,7.3,7.3,2.1,11.25,tr_00009 +T P,0.35,2.9,10,7,1,0,0.75,0.75,7.3,7.3,5.7,11.25,tr_00008 +T P,0.35,2.9,1,5,10,0,0.75,0.75,7.3,7.3,3.9,11.25,tr_00007 +T N,0.35,2.9,8,4,3,0,0.75,0.75,7.3,7.3,12.9,2.25,tr_00006 +T N,0.35,1.4,4,1,3,0,0.75,0.75,4.3,4.3,9.3,3,tr_00005 +T N,0.35,1.4,2,7,3,0,0.75,0.75,4.3,4.3,5.7,3,tr_00004 +T N,0.35,1.4,1,5,2,0,0.75,0.75,4.3,4.3,3.9,3,tr_00003 +T N,0.35,2.9,3,4,8,0,0.75,0.75,7.3,7.3,11.1,2.25,tr_00002 +T N,0.35,1.4,3,6,1,0,0.75,0.75,4.3,4.3,2.1,3,tr_00001 +S 10,INTERNAL +Q 0.00114171 +S 9,EXTERNAL,vdd +Q 0.00768955 +S 8,EXTERNAL,nq +Q 0.00258522 +S 7,EXTERNAL,i0 +Q 0.00295462 +S 6,EXTERNAL,i2 +Q 0.00379567 +S 5,EXTERNAL,i1 +Q 0.00323197 +S 4,INTERNAL +Q 0.00518414 +S 3,EXTERNAL,vss +Q 0.00674947 +S 2,INTERNAL +Q 0 +S 1,INTERNAL +Q 0.00560501 +EOF diff --git a/alliance/share/cells/sxlib/noa22_x4.ap b/alliance/share/cells/sxlib/noa22_x4.ap new file mode 100644 index 00000000..7bf7a94a --- /dev/null +++ b/alliance/share/cells/sxlib/noa22_x4.ap @@ -0,0 +1,122 @@ +V ALLIANCE : 4 +H noa22_x4,P,27/ 8/99,100 +A 0,0,5000,5000 +C 5000,300,600,vss,1,EAST,ALU1 +C 5000,4700,600,vdd,1,EAST,ALU1 +C 0,300,600,vss,0,WEST,ALU1 +C 0,4700,600,vdd,0,WEST,ALU1 +R 2000,1500,ref_con,i0_15 +R 2000,1000,ref_con,i0_10 +R 4000,4000,ref_con,nq_40 +R 1500,1000,ref_con,i1_10 +R 1500,1500,ref_con,i1_15 +R 1500,2000,ref_con,i1_20 +R 1500,2500,ref_con,i1_25 +R 1500,3000,ref_con,i1_30 +R 2000,3000,ref_con,i0_30 +R 2000,2500,ref_con,i0_25 +R 2000,2000,ref_con,i0_20 +R 500,3000,ref_con,i2_30 +R 500,2500,ref_con,i2_25 +R 500,2000,ref_con,i2_20 +R 500,1500,ref_con,i2_15 +R 500,1000,ref_con,i2_10 +R 4000,2500,ref_con,nq_25 +R 4000,1500,ref_con,nq_15 +R 4000,1000,ref_con,nq_10 +R 4000,2000,ref_con,nq_20 +R 4000,3000,ref_con,nq_30 +R 4000,3500,ref_con,nq_35 +R 500,3500,ref_con,i2_35 +R 500,4000,ref_con,i2_40 +S 0,3900,5000,3900,2400,*,RIGHT,NWELL +S 1000,3300,1000,4200,300,*,DOWN,PDIF +S 2200,3300,2200,4200,300,*,DOWN,PDIF +S 1300,3100,1300,4400,100,*,UP,PTRANS +S 1900,3100,1900,4400,100,*,UP,PTRANS +S 700,3100,700,4400,100,*,UP,PTRANS +S 2800,2800,2800,3700,300,*,DOWN,PDIF +S 3100,2600,3100,3900,100,*,UP,PTRANS +S 4600,2800,4600,4700,300,*,DOWN,PDIF +S 3400,2800,3400,4700,300,*,DOWN,PDIF +S 4000,2800,4000,4700,300,*,DOWN,PDIF +S 4300,2600,4300,4900,100,*,UP,PTRANS +S 3700,2600,3700,4900,100,*,UP,PTRANS +S 400,400,400,1200,300,*,UP,NDIF +S 700,600,700,1400,100,*,DOWN,NTRANS +S 2200,400,2200,1200,300,*,UP,NDIF +S 3700,100,3700,1400,100,*,DOWN,NTRANS +S 1000,800,1000,1200,300,*,UP,NDIF +S 1300,600,1300,1400,100,*,DOWN,NTRANS +S 1600,800,1600,1200,300,*,UP,NDIF +S 1900,600,1900,1400,100,*,DOWN,NTRANS +S 2800,800,2800,1200,300,*,UP,NDIF +S 3100,600,3100,1400,100,*,DOWN,NTRANS +S 4600,300,4600,1200,300,*,UP,NDIF +S 4000,300,4000,1200,300,*,UP,NDIF +S 3400,300,3400,1200,300,*,UP,NDIF +S 4300,100,4300,1400,100,*,DOWN,NTRANS +S 1900,1400,1900,3100,100,*,DOWN,POLY +S 1300,1400,1300,3100,100,*,DOWN,POLY +S 700,1400,700,3100,100,*,DOWN,POLY +S 3100,1400,3100,2600,100,*,DOWN,POLY +S 3700,1400,3700,2600,100,*,DOWN,POLY +S 4300,1400,4300,2600,100,*,DOWN,POLY +S 3100,2500,3300,2500,300,*,RIGHT,POLY +S 3500,2000,4300,2000,300,*,RIGHT,POLY +S 1300,2000,1500,2000,300,*,RIGHT,POLY +S 500,2000,700,2000,300,*,RIGHT,POLY +S 0,300,5000,300,600,*,RIGHT,ALU1 +S 0,4700,5000,4700,600,*,RIGHT,ALU1 +S 1000,4000,2200,4000,100,*,RIGHT,ALU1 +S 4000,1000,4000,4000,200,*,UP,ALU1 +S 2000,1000,2000,3000,100,*,DOWN,ALU1 +S 3300,2500,3300,3500,100,*,DOWN,ALU1 +S 2800,2000,3500,2000,100,*,RIGHT,ALU1 +S 3400,4000,3400,4500,200,*,DOWN,ALU1 +S 4600,3000,4600,4500,200,*,DOWN,ALU1 +S 4600,500,4600,1000,200,*,DOWN,ALU1 +S 3400,500,3400,1000,200,*,DOWN,ALU1 +S 1000,1000,1000,3500,100,*,UP,ALU1 +S 2800,1000,2800,3000,100,*,DOWN,ALU1 +S 1500,1000,1500,3000,100,*,DOWN,ALU1 +S 1000,3500,3300,3500,100,*,RIGHT,ALU1 +S 1600,3300,1600,4200,300,*,DOWN,PDIF +S 400,3300,400,4600,300,*,DOWN,PDIF +S 500,1000,500,4000,100,*,DOWN,ALU1 +V 4000,4000,CONT_DIF_P +V 4000,3500,CONT_DIF_P +V 4000,3000,CONT_DIF_P +V 2200,4700,CONT_BODY_N +V 4600,4500,CONT_DIF_P +V 4600,4000,CONT_DIF_P +V 4600,3500,CONT_DIF_P +V 4600,3000,CONT_DIF_P +V 2800,3000,CONT_DIF_P +V 2800,4700,CONT_BODY_N +V 1000,4700,CONT_BODY_N +V 2200,4000,CONT_DIF_P +V 1000,4000,CONT_DIF_P +V 3400,4000,CONT_DIF_P +V 3400,4500,CONT_DIF_P +V 400,500,CONT_DIF_N +V 4000,1000,CONT_DIF_N +V 4600,500,CONT_DIF_N +V 3400,500,CONT_DIF_N +V 2200,500,CONT_DIF_N +V 2800,1000,CONT_DIF_N +V 3400,1000,CONT_DIF_N +V 4600,1000,CONT_DIF_N +V 1000,1000,CONT_DIF_N +V 2800,300,CONT_BODY_P +V 1000,300,CONT_BODY_P +V 1600,300,CONT_BODY_P +V 1500,2000,CONT_POLY +V 500,2000,CONT_POLY +V 2000,2000,CONT_POLY +V 3300,2500,CONT_POLY +V 3500,2000,CONT_POLY +V 1600,3500,CONT_DIF_P +V 400,4500,CONT_DIF_P +V 1600,4700,CONT_BODY_N +EOF diff --git a/alliance/share/cells/sxlib/noa22_x4.vbe b/alliance/share/cells/sxlib/noa22_x4.vbe new file mode 100644 index 00000000..667060f2 --- /dev/null +++ b/alliance/share/cells/sxlib/noa22_x4.vbe @@ -0,0 +1,38 @@ +ENTITY noa22_x4 IS +GENERIC ( + CONSTANT area : NATURAL := 2500; + CONSTANT transistors : NATURAL := 12; + CONSTANT cin_i0 : NATURAL := 8; + CONSTANT cin_i1 : NATURAL := 8; + CONSTANT cin_i2 : NATURAL := 9; + CONSTANT tplh_i1_nq : NATURAL := 706; + CONSTANT rup_i1_nq : NATURAL := 890; + CONSTANT tphl_i1_nq : NATURAL := 634; + CONSTANT rdown_i1_nq : NATURAL := 800; + CONSTANT tplh_i2_nq : NATURAL := 643; + CONSTANT rup_i2_nq : NATURAL := 890; + CONSTANT tphl_i2_nq : NATURAL := 602; + CONSTANT rdown_i2_nq : NATURAL := 800; + CONSTANT tplh_i0_nq : NATURAL := 737; + CONSTANT rup_i0_nq : NATURAL := 890; + CONSTANT tphl_i0_nq : NATURAL := 542; + CONSTANT rdown_i0_nq : NATURAL := 800 +); +PORT ( + i0 : in BIT; + i1 : in BIT; + i2 : in BIT; + nq : out BIT; + vdd : in BIT; + vss : in BIT +); +END noa22_x4; + +ARCHITECTURE behaviour_data_flow OF noa22_x4 IS + +BEGIN + ASSERT ((vdd and not (vss)) = '1') + REPORT "power supply is missing on noa22_x4" + SEVERITY WARNING; + nq <= not (((i0 and i1) or i2)) after 1300 ps; +END; diff --git a/alliance/share/cells/sxlib/oa22_x2.al b/alliance/share/cells/sxlib/oa22_x2.al new file mode 100644 index 00000000..f90b33f3 --- /dev/null +++ b/alliance/share/cells/sxlib/oa22_x2.al @@ -0,0 +1,35 @@ +V ALLIANCE : 6 +H oa22_x2,L,27/ 9/99 +C i0,IN,EXTERNAL,8 +C i1,IN,EXTERNAL,6 +C i2,IN,EXTERNAL,7 +C q,OUT,EXTERNAL,4 +C vdd,IN,EXTERNAL,5 +C vss,IN,EXTERNAL,2 +T P,0.35,2.9,1,6,9,0,0.75,0.75,7.3,7.3,3.6,11.25,tr_00008 +T P,0.35,2.9,9,8,1,0,0.75,0.75,7.3,7.3,1.8,11.25,tr_00007 +T P,0.35,2.9,9,7,5,0,0.75,0.75,7.3,7.3,5.4,11.25,tr_00006 +T P,0.35,5.9,5,1,4,0,0.75,0.75,13.3,13.3,7.2,11.25,tr_00005 +T N,0.35,1.4,1,6,3,0,0.75,0.75,4.3,4.3,3.6,3,tr_00004 +T N,0.35,1.4,3,8,2,0,0.75,0.75,4.3,4.3,1.8,3,tr_00003 +T N,0.35,1.4,2,7,1,0,0.75,0.75,4.3,4.3,5.4,3,tr_00002 +T N,0.35,2.9,4,1,2,0,0.75,0.75,7.3,7.3,7.2,2.25,tr_00001 +S 9,INTERNAL +Q 0.00171257 +S 8,EXTERNAL,i0 +Q 0.00295461 +S 7,EXTERNAL,i2 +Q 0.00383259 +S 6,EXTERNAL,i1 +Q 0.00270208 +S 5,EXTERNAL,vdd +Q 0.00367968 +S 4,EXTERNAL,q +Q 0.00358405 +S 3,INTERNAL +Q 0 +S 2,EXTERNAL,vss +Q 0.00367968 +S 1,INTERNAL +Q 0.00439855 +EOF diff --git a/alliance/share/cells/sxlib/oa22_x2.ap b/alliance/share/cells/sxlib/oa22_x2.ap new file mode 100644 index 00000000..51f23456 --- /dev/null +++ b/alliance/share/cells/sxlib/oa22_x2.ap @@ -0,0 +1,96 @@ +V ALLIANCE : 4 +H oa22_x2,P,27/ 8/99,100 +A 0,0,3000,5000 +C 3000,300,600,vss,1,EAST,ALU1 +C 3000,4700,600,vdd,1,EAST,ALU1 +C 0,4700,600,vdd,0,WEST,ALU1 +C 0,300,600,vss,0,WEST,ALU1 +R 500,1000,ref_con,i0_10 +R 500,1500,ref_con,i0_15 +R 500,2000,ref_con,i0_20 +R 500,2500,ref_con,i0_25 +R 500,3000,ref_con,i0_30 +R 1000,3000,ref_con,i1_30 +R 1000,2500,ref_con,i1_25 +R 1000,2000,ref_con,i1_20 +R 1000,1500,ref_con,i1_15 +R 1000,1000,ref_con,i1_10 +R 2000,4000,ref_con,i2_40 +R 2000,3500,ref_con,i2_35 +R 2000,3000,ref_con,i2_30 +R 2000,2500,ref_con,i2_25 +R 2000,2000,ref_con,i2_20 +R 2000,1500,ref_con,i2_15 +R 2000,1000,ref_con,i2_10 +R 2500,1000,ref_con,q_10 +R 2500,1500,ref_con,q_15 +R 2500,2000,ref_con,q_20 +R 2500,2500,ref_con,q_25 +R 2500,3000,ref_con,q_30 +R 2500,3500,ref_con,q_35 +R 2500,4000,ref_con,q_40 +S 300,3500,300,4000,100,*,UP,ALU1 +S 2500,950,2500,4050,200,*,DOWN,ALU1 +S 1500,2000,2400,2000,100,*,RIGHT,POLY +S 1000,3000,1200,3000,300,*,RIGHT,POLY +S 1000,1500,1200,1500,300,*,RIGHT,POLY +S 1800,2400,1800,3100,100,*,UP,POLY +S 1800,1500,2000,1500,300,*,RIGHT,POLY +S 1800,2500,2000,2500,300,*,RIGHT,POLY +S 2500,1000,2700,1000,200,*,RIGHT,ALU1 +S 2500,3000,2700,3000,200,*,LEFT,ALU1 +S 2500,3500,2700,3500,200,*,RIGHT,ALU1 +S 2500,4000,2700,4000,200,*,RIGHT,ALU1 +S 0,3900,3000,3900,2400,*,RIGHT,NWELL +S 2100,2800,2100,4700,300,*,UP,PDIF +S 2400,2600,2400,4900,100,*,DOWN,PTRANS +S 2700,2800,2700,4700,300,*,UP,PDIF +S 1800,3100,1800,4400,100,*,DOWN,PTRANS +S 600,3100,600,4400,100,*,DOWN,PTRANS +S 1200,3100,1200,4400,100,*,DOWN,PTRANS +S 300,3300,300,4200,300,*,UP,PDIF +S 1500,3300,1500,4200,300,*,UP,PDIF +S 900,3300,900,4200,300,*,UP,PDIF +S 2100,300,2100,1200,300,*,DOWN,NDIF +S 2700,300,2700,1200,300,*,DOWN,NDIF +S 2400,100,2400,1400,100,*,UP,NTRANS +S 300,400,300,1200,300,*,DOWN,NDIF +S 1800,600,1800,1400,100,*,UP,NTRANS +S 600,600,600,1400,100,*,UP,NTRANS +S 900,800,900,1200,300,*,DOWN,NDIF +S 1200,600,1200,1400,100,*,UP,NTRANS +S 1500,800,1500,1200,300,*,DOWN,NDIF +S 2400,1400,2400,2600,100,*,UP,POLY +S 600,1400,600,3100,100,*,UP,POLY +S 0,4700,3000,4700,600,*,RIGHT,ALU1 +S 900,3500,1500,3500,100,*,RIGHT,ALU1 +S 0,300,3000,300,600,*,RIGHT,ALU1 +S 300,4000,1500,4000,100,*,RIGHT,ALU1 +S 1500,1000,1500,3500,100,*,DOWN,ALU1 +S 500,1000,500,3000,100,*,UP,ALU1 +S 2000,1000,2000,4000,100,*,UP,ALU1 +S 1000,1000,1000,3000,100,*,UP,ALU1 +V 300,3500,CONT_DIF_P +V 1500,2000,CONT_POLY +V 1000,3000,CONT_POLY +V 1000,1500,CONT_POLY +V 2000,2500,CONT_POLY +V 2000,1500,CONT_POLY +V 2700,3000,CONT_DIF_P +V 2700,3500,CONT_DIF_P +V 2700,4000,CONT_DIF_P +V 300,4700,CONT_BODY_N +V 2100,4500,CONT_DIF_P +V 900,3500,CONT_DIF_P +V 1500,4000,CONT_DIF_P +V 300,4000,CONT_DIF_P +V 1500,4700,CONT_BODY_N +V 900,4700,CONT_BODY_N +V 2100,500,CONT_DIF_N +V 1500,1000,CONT_DIF_N +V 300,500,CONT_DIF_N +V 2700,1000,CONT_DIF_N +V 900,300,CONT_BODY_P +V 1500,300,CONT_BODY_P +V 500,2000,CONT_POLY +EOF diff --git a/alliance/share/cells/sxlib/oa22_x2.vbe b/alliance/share/cells/sxlib/oa22_x2.vbe new file mode 100644 index 00000000..1d979210 --- /dev/null +++ b/alliance/share/cells/sxlib/oa22_x2.vbe @@ -0,0 +1,38 @@ +ENTITY oa22_x2 IS +GENERIC ( + CONSTANT area : NATURAL := 1500; + CONSTANT transistors : NATURAL := 8; + CONSTANT cin_i0 : NATURAL := 8; + CONSTANT cin_i1 : NATURAL := 8; + CONSTANT cin_i2 : NATURAL := 9; + CONSTANT tphh_i0_q : NATURAL := 386; + CONSTANT rup_i0_q : NATURAL := 1780; + CONSTANT tpll_i0_q : NATURAL := 553; + CONSTANT rdown_i0_q : NATURAL := 1600; + CONSTANT tphh_i2_q : NATURAL := 434; + CONSTANT rup_i2_q : NATURAL := 1780; + CONSTANT tpll_i2_q : NATURAL := 453; + CONSTANT rdown_i2_q : NATURAL := 1600; + CONSTANT tphh_i1_q : NATURAL := 484; + CONSTANT rup_i1_q : NATURAL := 1780; + CONSTANT tpll_i1_q : NATURAL := 523; + CONSTANT rdown_i1_q : NATURAL := 1600 +); +PORT ( + i0 : in BIT; + i1 : in BIT; + i2 : in BIT; + q : out BIT; + vdd : in BIT; + vss : in BIT +); +END oa22_x2; + +ARCHITECTURE behaviour_data_flow OF oa22_x2 IS + +BEGIN + ASSERT ((vdd and not (vss)) = '1') + REPORT "power supply is missing on oa22_x2" + SEVERITY WARNING; + q <= ((i0 and i1) or i2) after 1200 ps; +END; diff --git a/alliance/share/cells/sxlib/oa22_x4.al b/alliance/share/cells/sxlib/oa22_x4.al new file mode 100644 index 00000000..90558c07 --- /dev/null +++ b/alliance/share/cells/sxlib/oa22_x4.al @@ -0,0 +1,37 @@ +V ALLIANCE : 6 +H oa22_x4,L,27/ 9/99 +C i0,IN,EXTERNAL,6 +C i1,IN,EXTERNAL,8 +C i2,IN,EXTERNAL,7 +C q,OUT,EXTERNAL,4 +C vdd,IN,EXTERNAL,5 +C vss,IN,EXTERNAL,2 +T P,0.35,2.9,9,7,5,0,0.75,0.75,7.3,7.3,5.4,11.25,tr_00010 +T P,0.35,2.9,9,6,3,0,0.75,0.75,7.3,7.3,1.8,11.25,tr_00009 +T P,0.35,2.9,3,8,9,0,0.75,0.75,7.3,7.3,3.6,11.25,tr_00008 +T P,0.35,5.9,5,3,4,0,0.75,0.75,13.3,13.3,8.1,11.25,tr_00007 +T P,0.35,5.9,4,3,5,0,0.75,0.75,13.3,13.3,9.9,11.25,tr_00006 +T N,0.35,1.4,2,7,3,0,0.75,0.75,4.3,4.3,5.4,3,tr_00005 +T N,0.35,1.4,1,6,2,0,0.75,0.75,4.3,4.3,1.8,3,tr_00004 +T N,0.35,1.4,3,8,1,0,0.75,0.75,4.3,4.3,3.6,3,tr_00003 +T N,0.35,2.9,2,3,4,0,0.75,0.75,7.3,7.3,9.9,2.25,tr_00002 +T N,0.35,2.9,4,3,2,0,0.75,0.75,7.3,7.3,8.1,2.25,tr_00001 +S 9,INTERNAL +Q 0.00114171 +S 8,EXTERNAL,i1 +Q 0.00270208 +S 7,EXTERNAL,i2 +Q 0.00383259 +S 6,EXTERNAL,i0 +Q 0.00295461 +S 5,EXTERNAL,vdd +Q 0.00606652 +S 4,EXTERNAL,q +Q 0.00258522 +S 3,INTERNAL +Q 0.00611125 +S 2,EXTERNAL,vss +Q 0.00512644 +S 1,INTERNAL +Q 0 +EOF diff --git a/alliance/share/cells/sxlib/oa22_x4.ap b/alliance/share/cells/sxlib/oa22_x4.ap new file mode 100644 index 00000000..44b1e505 --- /dev/null +++ b/alliance/share/cells/sxlib/oa22_x4.ap @@ -0,0 +1,105 @@ +V ALLIANCE : 4 +H oa22_x4,P,27/ 8/99,100 +A 0,0,4000,5000 +C 4000,300,600,vss,1,EAST,ALU1 +C 4000,4700,600,vdd,1,EAST,ALU1 +C 0,4700,600,vdd,0,WEST,ALU1 +C 0,300,600,vss,0,WEST,ALU1 +R 3000,1000,ref_con,q_10 +R 3000,1500,ref_con,q_15 +R 3000,2000,ref_con,q_20 +R 3000,2500,ref_con,q_25 +R 3000,3000,ref_con,q_30 +R 3000,3500,ref_con,q_35 +R 3000,4000,ref_con,q_40 +R 2000,1000,ref_con,i2_10 +R 2000,1500,ref_con,i2_15 +R 2000,2000,ref_con,i2_20 +R 2000,2500,ref_con,i2_25 +R 2000,3000,ref_con,i2_30 +R 2000,3500,ref_con,i2_35 +R 2000,4000,ref_con,i2_40 +R 1000,1000,ref_con,i1_10 +R 1000,1500,ref_con,i1_15 +R 1000,2000,ref_con,i1_20 +R 1000,2500,ref_con,i1_25 +R 1000,3000,ref_con,i1_30 +R 500,3000,ref_con,i0_30 +R 500,2500,ref_con,i0_25 +R 500,2000,ref_con,i0_20 +R 500,1500,ref_con,i0_15 +R 500,1000,ref_con,i0_10 +S 1500,2000,3300,2000,200,*,RIGHT,POLY +S 2300,300,2300,1200,300,*,DOWN,NDIF +S 2300,2800,2300,4700,300,*,UP,PDIF +S 3300,2600,3300,4900,100,*,DOWN,PTRANS +S 3600,2800,3600,4700,300,*,UP,PDIF +S 3000,2800,3000,4700,300,*,UP,PDIF +S 2700,2600,2700,4900,100,*,DOWN,PTRANS +S 2700,100,2700,1400,100,*,UP,NTRANS +S 3000,300,3000,1200,300,*,DOWN,NDIF +S 3300,100,3300,1400,100,*,UP,NTRANS +S 3600,300,3600,1200,300,*,DOWN,NDIF +S 2700,1400,2700,2600,100,*,UP,POLY +S 3300,1400,3300,2600,100,*,DOWN,POLY +S 3000,1000,3000,4000,200,*,DOWN,ALU1 +S 3600,500,3600,1000,200,*,DOWN,ALU1 +S 3600,3000,3600,4500,200,*,UP,ALU1 +S 1000,1000,1000,3000,100,*,UP,ALU1 +S 2000,1000,2000,4000,100,*,UP,ALU1 +S 500,1000,500,3000,100,*,UP,ALU1 +S 1500,1000,1500,3500,100,*,DOWN,ALU1 +S 300,4000,1500,4000,100,*,RIGHT,ALU1 +S 900,3500,1500,3500,100,*,RIGHT,ALU1 +S 600,1400,600,3100,100,*,UP,POLY +S 1500,800,1500,1200,300,*,DOWN,NDIF +S 1200,600,1200,1400,100,*,UP,NTRANS +S 900,800,900,1200,300,*,DOWN,NDIF +S 600,600,600,1400,100,*,UP,NTRANS +S 1800,600,1800,1400,100,*,UP,NTRANS +S 300,400,300,1200,300,*,DOWN,NDIF +S 2100,300,2100,1200,300,*,DOWN,NDIF +S 900,3300,900,4200,300,*,UP,PDIF +S 1500,3300,1500,4200,300,*,UP,PDIF +S 300,3300,300,4200,300,*,UP,PDIF +S 1200,3100,1200,4400,100,*,DOWN,PTRANS +S 600,3100,600,4400,100,*,DOWN,PTRANS +S 1800,3100,1800,4400,100,*,DOWN,PTRANS +S 2100,2800,2100,4700,300,*,UP,PDIF +S 1800,2500,2000,2500,300,*,RIGHT,POLY +S 1800,1500,2000,1500,300,*,RIGHT,POLY +S 1800,2400,1800,3100,100,*,UP,POLY +S 1000,1500,1200,1500,300,*,RIGHT,POLY +S 1000,3000,1200,3000,300,*,RIGHT,POLY +S 0,4700,4000,4700,600,*,RIGHT,ALU1 +S 0,3900,4000,3900,2400,*,RIGHT,NWELL +S 0,300,4000,300,600,*,RIGHT,ALU1 +V 3600,3500,CONT_DIF_P +V 3600,3000,CONT_DIF_P +V 3000,4000,CONT_DIF_P +V 3000,3500,CONT_DIF_P +V 3000,3000,CONT_DIF_P +V 3600,4500,CONT_DIF_P +V 3600,4000,CONT_DIF_P +V 3000,1000,CONT_DIF_N +V 3600,1000,CONT_DIF_N +V 3600,500,CONT_DIF_N +V 500,2000,CONT_POLY +V 1500,300,CONT_BODY_P +V 900,300,CONT_BODY_P +V 300,500,CONT_DIF_N +V 1500,1000,CONT_DIF_N +V 900,4700,CONT_BODY_N +V 1500,4700,CONT_BODY_N +V 300,4000,CONT_DIF_P +V 1500,4000,CONT_DIF_P +V 900,3500,CONT_DIF_P +V 300,4700,CONT_BODY_N +V 2000,1500,CONT_POLY +V 2000,2500,CONT_POLY +V 1000,1500,CONT_POLY +V 1000,3000,CONT_POLY +V 1500,2000,CONT_POLY +V 2300,4500,CONT_DIF_P +V 2300,500,CONT_DIF_N +EOF diff --git a/alliance/share/cells/sxlib/oa22_x4.vbe b/alliance/share/cells/sxlib/oa22_x4.vbe new file mode 100644 index 00000000..f9f86dd2 --- /dev/null +++ b/alliance/share/cells/sxlib/oa22_x4.vbe @@ -0,0 +1,38 @@ +ENTITY oa22_x4 IS +GENERIC ( + CONSTANT area : NATURAL := 2000; + CONSTANT transistors : NATURAL := 10; + CONSTANT cin_i0 : NATURAL := 8; + CONSTANT cin_i1 : NATURAL := 8; + CONSTANT cin_i2 : NATURAL := 9; + CONSTANT tphh_i1_q : NATURAL := 612; + CONSTANT rup_i1_q : NATURAL := 890; + CONSTANT tpll_i1_q : NATURAL := 648; + CONSTANT rdown_i1_q : NATURAL := 800; + CONSTANT tphh_i2_q : NATURAL := 520; + CONSTANT rup_i2_q : NATURAL := 890; + CONSTANT tpll_i2_q : NATURAL := 569; + CONSTANT rdown_i2_q : NATURAL := 800; + CONSTANT tphh_i0_q : NATURAL := 508; + CONSTANT rup_i0_q : NATURAL := 890; + CONSTANT tpll_i0_q : NATURAL := 675; + CONSTANT rdown_i0_q : NATURAL := 800 +); +PORT ( + i0 : in BIT; + i1 : in BIT; + i2 : in BIT; + q : out BIT; + vdd : in BIT; + vss : in BIT +); +END oa22_x4; + +ARCHITECTURE behaviour_data_flow OF oa22_x4 IS + +BEGIN + ASSERT ((vdd and not (vss)) = '1') + REPORT "power supply is missing on oa22_x4" + SEVERITY WARNING; + q <= ((i0 and i1) or i2) after 1300 ps; +END; diff --git a/alliance/share/cells/sxlib/oa2a22_x2.al b/alliance/share/cells/sxlib/oa2a22_x2.al new file mode 100644 index 00000000..f728a704 --- /dev/null +++ b/alliance/share/cells/sxlib/oa2a22_x2.al @@ -0,0 +1,42 @@ +V ALLIANCE : 6 +H oa2a22_x2,L,27/ 9/99 +C i0,IN,EXTERNAL,6 +C i1,IN,EXTERNAL,5 +C i2,IN,EXTERNAL,7 +C i3,IN,EXTERNAL,8 +C q,OUT,EXTERNAL,9 +C vdd,IN,EXTERNAL,10 +C vss,IN,EXTERNAL,1 +T P,0.35,2.9,11,5,3,0,0.75,0.75,7.3,7.3,3.6,11.25,tr_00010 +T P,0.35,2.9,11,8,10,0,0.75,0.75,7.3,7.3,7.2,11.25,tr_00009 +T P,0.35,2.9,10,7,11,0,0.75,0.75,7.3,7.3,5.4,11.25,tr_00008 +T P,0.35,2.9,3,6,11,0,0.75,0.75,7.3,7.3,1.8,11.25,tr_00007 +T P,0.35,5.9,9,3,10,0,0.75,0.75,13.3,13.3,11.1,11.25,tr_00006 +T N,0.35,1.4,2,5,3,0,0.75,0.75,4.3,4.3,3.6,3,tr_00005 +T N,0.35,1.4,1,6,2,0,0.75,0.75,4.3,4.3,1.8,3,tr_00004 +T N,0.35,1.4,4,8,1,0,0.75,0.75,4.3,4.3,7.2,3,tr_00003 +T N,0.35,1.4,3,7,4,0,0.75,0.75,4.3,4.3,5.4,3,tr_00002 +T N,0.35,2.9,1,3,9,0,0.75,0.75,7.3,7.3,11.1,2.25,tr_00001 +S 11,INTERNAL +Q 0.00199441 +S 10,EXTERNAL,vdd +Q 0.00564418 +S 9,EXTERNAL,q +Q 0.00258522 +S 8,EXTERNAL,i3 +Q 0.00295462 +S 7,EXTERNAL,i2 +Q 0.00323197 +S 6,EXTERNAL,i0 +Q 0.00295462 +S 5,EXTERNAL,i1 +Q 0.00323197 +S 4,INTERNAL +Q 0 +S 3,INTERNAL +Q 0.00577862 +S 2,INTERNAL +Q 0 +S 1,EXTERNAL,vss +Q 0.00564418 +EOF diff --git a/alliance/share/cells/sxlib/oa2a22_x2.ap b/alliance/share/cells/sxlib/oa2a22_x2.ap new file mode 100644 index 00000000..ad6f893e --- /dev/null +++ b/alliance/share/cells/sxlib/oa2a22_x2.ap @@ -0,0 +1,108 @@ +V ALLIANCE : 4 +H oa2a22_x2,P,27/ 8/99,100 +A 0,0,4500,5000 +C 4500,4700,600,vdd,1,EAST,ALU1 +C 4500,300,600,vss,1,EAST,ALU1 +C 0,4700,600,vdd,0,WEST,ALU1 +C 0,300,600,vss,0,WEST,ALU1 +R 4000,2500,ref_con,q_25 +R 4000,1500,ref_con,q_15 +R 4000,1000,ref_con,q_10 +R 4000,2000,ref_con,q_20 +R 4000,3000,ref_con,q_30 +R 4000,3500,ref_con,q_35 +R 4000,4000,ref_con,q_40 +R 500,1000,ref_con,i0_10 +R 500,1500,ref_con,i0_15 +R 500,2000,ref_con,i0_20 +R 500,2500,ref_con,i0_25 +R 500,3000,ref_con,i0_30 +R 1000,3000,ref_con,i1_30 +R 1000,2500,ref_con,i1_25 +R 1000,2000,ref_con,i1_20 +R 1000,1500,ref_con,i1_15 +R 1000,1000,ref_con,i1_10 +R 2000,1000,ref_con,i2_10 +R 2000,1500,ref_con,i2_15 +R 2000,2000,ref_con,i2_20 +R 2000,2500,ref_con,i2_25 +R 2000,3000,ref_con,i2_30 +R 2500,3000,ref_con,i3_30 +R 2500,2500,ref_con,i3_25 +R 2500,2000,ref_con,i3_20 +R 2500,1500,ref_con,i3_15 +R 2500,1000,ref_con,i3_10 +S 0,300,4500,300,600,*,RIGHT,ALU1 +S 0,3900,4500,3900,2400,*,RIGHT,NWELL +S 0,4700,4500,4700,600,*,RIGHT,ALU1 +S 3500,2000,3500,3500,100,*,DOWN,ALU1 +S 900,3500,3500,3500,100,*,RIGHT,ALU1 +S 4000,2800,4000,4700,300,*,DOWN,PDIF +S 3700,2600,3700,4900,100,*,UP,PTRANS +S 3400,2800,3400,4700,300,*,DOWN,PDIF +S 3700,100,3700,1400,100,*,DOWN,NTRANS +S 4000,300,4000,1200,300,*,UP,NDIF +S 3400,300,3400,1200,300,*,UP,NDIF +S 3700,1400,3700,2600,100,*,DOWN,POLY +S 3400,500,3400,1000,200,*,DOWN,ALU1 +S 4000,1000,4000,4000,200,*,UP,ALU1 +S 3400,4000,3400,4500,200,*,DOWN,ALU1 +S 1500,1000,1500,3500,100,*,UP,ALU1 +S 500,1000,500,3000,100,*,UP,ALU1 +S 1000,1000,1000,3000,100,*,DOWN,ALU1 +S 300,4000,2700,4000,100,*,RIGHT,ALU1 +S 1800,2000,2000,2000,300,*,RIGHT,POLY +S 1000,2000,1200,2000,300,*,RIGHT,POLY +S 2000,1000,2000,3000,100,*,DOWN,ALU1 +S 2500,1000,2500,3000,100,*,DOWN,ALU1 +S 900,3300,900,4200,300,*,DOWN,PDIF +S 600,3100,600,4400,100,*,UP,PTRANS +S 300,3300,300,4200,300,*,DOWN,PDIF +S 1500,3300,1500,4200,300,*,DOWN,PDIF +S 2700,3300,2700,4200,300,*,DOWN,PDIF +S 1800,3100,1800,4400,100,*,UP,PTRANS +S 2400,3100,2400,4400,100,*,UP,PTRANS +S 1200,3100,1200,4400,100,*,UP,PTRANS +S 1500,800,1500,1200,300,*,UP,NDIF +S 1800,600,1800,1400,100,*,DOWN,NTRANS +S 2100,800,2100,1200,300,*,UP,NDIF +S 2400,600,2400,1400,100,*,DOWN,NTRANS +S 600,600,600,1400,100,*,DOWN,NTRANS +S 900,800,900,1200,300,*,UP,NDIF +S 1200,600,1200,1400,100,*,DOWN,NTRANS +S 2400,1400,2400,3100,100,*,DOWN,POLY +S 1800,1400,1800,3100,100,*,DOWN,POLY +S 1200,1400,1200,3100,100,*,DOWN,POLY +S 600,1400,600,3100,100,*,DOWN,POLY +S 2100,3300,2100,4600,300,*,DOWN,PDIF +S 300,400,300,1200,300,*,UP,NDIF +S 2700,400,2700,1200,300,*,UP,NDIF +V 2100,300,CONT_BODY_P +V 900,300,CONT_BODY_P +V 2700,4700,CONT_BODY_N +V 900,4700,CONT_BODY_N +V 3400,4000,CONT_DIF_P +V 3400,4500,CONT_DIF_P +V 3400,500,CONT_DIF_N +V 3400,1000,CONT_DIF_N +V 4000,1000,CONT_DIF_N +V 3500,2000,CONT_POLY +V 1500,1000,CONT_DIF_N +V 900,3500,CONT_DIF_P +V 2100,4500,CONT_DIF_P +V 2700,4000,CONT_DIF_P +V 1500,4000,CONT_DIF_P +V 300,4000,CONT_DIF_P +V 2000,2000,CONT_POLY +V 1000,2000,CONT_POLY +V 2700,500,CONT_DIF_N +V 300,500,CONT_DIF_N +V 2500,2000,CONT_POLY +V 500,2000,CONT_POLY +V 1500,300,CONT_BODY_P +V 300,4700,CONT_BODY_N +V 1500,4700,CONT_BODY_N +V 4000,3000,CONT_DIF_P +V 4000,3500,CONT_DIF_P +V 4000,4000,CONT_DIF_P +EOF diff --git a/alliance/share/cells/sxlib/oa2a22_x2.vbe b/alliance/share/cells/sxlib/oa2a22_x2.vbe new file mode 100644 index 00000000..1b02e943 --- /dev/null +++ b/alliance/share/cells/sxlib/oa2a22_x2.vbe @@ -0,0 +1,44 @@ +ENTITY oa2a22_x2 IS +GENERIC ( + CONSTANT area : NATURAL := 2250; + CONSTANT transistors : NATURAL := 10; + CONSTANT cin_i0 : NATURAL := 8; + CONSTANT cin_i1 : NATURAL := 8; + CONSTANT cin_i2 : NATURAL := 8; + CONSTANT cin_i3 : NATURAL := 8; + CONSTANT tphh_i0_q : NATURAL := 400; + CONSTANT rup_i0_q : NATURAL := 1780; + CONSTANT tpll_i0_q : NATURAL := 562; + CONSTANT rdown_i0_q : NATURAL := 1600; + CONSTANT tphh_i2_q : NATURAL := 641; + CONSTANT rup_i2_q : NATURAL := 1780; + CONSTANT tpll_i2_q : NATURAL := 485; + CONSTANT rdown_i2_q : NATURAL := 1600; + CONSTANT tphh_i3_q : NATURAL := 533; + CONSTANT rup_i3_q : NATURAL := 1780; + CONSTANT tpll_i3_q : NATURAL := 510; + CONSTANT rdown_i3_q : NATURAL := 1600; + CONSTANT tphh_i1_q : NATURAL := 491; + CONSTANT rup_i1_q : NATURAL := 1780; + CONSTANT tpll_i1_q : NATURAL := 532; + CONSTANT rdown_i1_q : NATURAL := 1600 +); +PORT ( + i0 : in BIT; + i1 : in BIT; + i2 : in BIT; + i3 : in BIT; + q : out BIT; + vdd : in BIT; + vss : in BIT +); +END oa2a22_x2; + +ARCHITECTURE behaviour_data_flow OF oa2a22_x2 IS + +BEGIN + ASSERT ((vdd and not (vss)) = '1') + REPORT "power supply is missing on oa2a22_x2" + SEVERITY WARNING; + q <= ((i0 and i1) or (i2 and i3)) after 1200 ps; +END; diff --git a/alliance/share/cells/sxlib/oa2a22_x4.al b/alliance/share/cells/sxlib/oa2a22_x4.al new file mode 100644 index 00000000..14478c70 --- /dev/null +++ b/alliance/share/cells/sxlib/oa2a22_x4.al @@ -0,0 +1,44 @@ +V ALLIANCE : 6 +H oa2a22_x4,L,27/ 9/99 +C i0,IN,EXTERNAL,7 +C i1,IN,EXTERNAL,5 +C i2,IN,EXTERNAL,6 +C i3,IN,EXTERNAL,8 +C q,OUT,EXTERNAL,9 +C vdd,IN,EXTERNAL,10 +C vss,IN,EXTERNAL,1 +T P,0.35,5.9,9,4,10,0,0.75,0.75,13.3,13.3,11.1,11.25,tr_00012 +T P,0.35,5.9,10,4,9,0,0.75,0.75,13.3,13.3,12.9,11.25,tr_00011 +T P,0.35,2.9,4,7,11,0,0.75,0.75,7.3,7.3,1.8,11.25,tr_00010 +T P,0.35,2.9,10,6,11,0,0.75,0.75,7.3,7.3,5.4,11.25,tr_00009 +T P,0.35,2.9,11,8,10,0,0.75,0.75,7.3,7.3,7.2,11.25,tr_00008 +T P,0.35,2.9,11,5,4,0,0.75,0.75,7.3,7.3,3.6,11.25,tr_00007 +T N,0.35,2.9,1,4,9,0,0.75,0.75,7.3,7.3,11.1,2.25,tr_00006 +T N,0.35,2.9,9,4,1,0,0.75,0.75,7.3,7.3,12.9,2.25,tr_00005 +T N,0.35,1.4,4,6,3,0,0.75,0.75,4.3,4.3,5.4,3,tr_00004 +T N,0.35,1.4,3,8,1,0,0.75,0.75,4.3,4.3,7.2,3,tr_00003 +T N,0.35,1.4,1,7,2,0,0.75,0.75,4.3,4.3,1.8,3,tr_00002 +T N,0.35,1.4,2,5,4,0,0.75,0.75,4.3,4.3,3.6,3,tr_00001 +S 11,INTERNAL +Q 0.00199441 +S 10,EXTERNAL,vdd +Q 0.00768955 +S 9,EXTERNAL,q +Q 0.00258522 +S 8,EXTERNAL,i3 +Q 0.00295462 +S 7,EXTERNAL,i0 +Q 0.00295462 +S 6,EXTERNAL,i2 +Q 0.00323197 +S 5,EXTERNAL,i1 +Q 0.00323197 +S 4,INTERNAL +Q 0.00732866 +S 3,INTERNAL +Q 0 +S 2,INTERNAL +Q 0 +S 1,EXTERNAL,vss +Q 0.00674947 +EOF diff --git a/alliance/share/cells/sxlib/oa2a22_x4.ap b/alliance/share/cells/sxlib/oa2a22_x4.ap new file mode 100644 index 00000000..19d0cf22 --- /dev/null +++ b/alliance/share/cells/sxlib/oa2a22_x4.ap @@ -0,0 +1,122 @@ +V ALLIANCE : 4 +H oa2a22_x4,P,27/ 8/99,100 +A 0,0,5000,5000 +C 0,300,600,vss,0,WEST,ALU1 +C 0,4700,600,vdd,0,WEST,ALU1 +C 5000,4700,600,vdd,1,EAST,ALU1 +C 5000,300,600,vss,1,EAST,ALU1 +R 2500,1000,ref_con,i3_10 +R 2500,1500,ref_con,i3_15 +R 2500,2000,ref_con,i3_20 +R 2500,2500,ref_con,i3_25 +R 2500,3000,ref_con,i3_30 +R 2000,3000,ref_con,i2_30 +R 2000,2500,ref_con,i2_25 +R 2000,2000,ref_con,i2_20 +R 2000,1500,ref_con,i2_15 +R 2000,1000,ref_con,i2_10 +R 1000,1000,ref_con,i1_10 +R 1000,1500,ref_con,i1_15 +R 1000,2000,ref_con,i1_20 +R 1000,2500,ref_con,i1_25 +R 1000,3000,ref_con,i1_30 +R 500,3000,ref_con,i0_30 +R 500,2500,ref_con,i0_25 +R 500,2000,ref_con,i0_20 +R 500,1500,ref_con,i0_15 +R 500,1000,ref_con,i0_10 +R 4000,4000,ref_con,q_40 +R 4000,3500,ref_con,q_35 +R 4000,3000,ref_con,q_30 +R 4000,2000,ref_con,q_20 +R 4000,1000,ref_con,q_10 +R 4000,1500,ref_con,q_15 +R 4000,2500,ref_con,q_25 +S 2700,400,2700,1200,300,*,UP,NDIF +S 300,400,300,1200,300,*,UP,NDIF +S 2100,3300,2100,4600,300,*,DOWN,PDIF +S 600,1400,600,3100,100,*,DOWN,POLY +S 1200,1400,1200,3100,100,*,DOWN,POLY +S 1800,1400,1800,3100,100,*,DOWN,POLY +S 2400,1400,2400,3100,100,*,DOWN,POLY +S 1200,600,1200,1400,100,*,DOWN,NTRANS +S 900,800,900,1200,300,*,UP,NDIF +S 600,600,600,1400,100,*,DOWN,NTRANS +S 2400,600,2400,1400,100,*,DOWN,NTRANS +S 2100,800,2100,1200,300,*,UP,NDIF +S 1800,600,1800,1400,100,*,DOWN,NTRANS +S 1500,800,1500,1200,300,*,UP,NDIF +S 1200,3100,1200,4400,100,*,UP,PTRANS +S 2400,3100,2400,4400,100,*,UP,PTRANS +S 1800,3100,1800,4400,100,*,UP,PTRANS +S 2700,3300,2700,4200,300,*,DOWN,PDIF +S 1500,3300,1500,4200,300,*,DOWN,PDIF +S 300,3300,300,4200,300,*,DOWN,PDIF +S 600,3100,600,4400,100,*,UP,PTRANS +S 900,3300,900,4200,300,*,DOWN,PDIF +S 2500,1000,2500,3000,100,*,DOWN,ALU1 +S 2000,1000,2000,3000,100,*,DOWN,ALU1 +S 1000,2000,1200,2000,300,*,RIGHT,POLY +S 1800,2000,2000,2000,300,*,RIGHT,POLY +S 300,4000,2700,4000,100,*,RIGHT,ALU1 +S 1000,1000,1000,3000,100,*,DOWN,ALU1 +S 500,1000,500,3000,100,*,UP,ALU1 +S 1500,1000,1500,3500,100,*,UP,ALU1 +S 0,4700,5000,4700,600,*,RIGHT,ALU1 +S 0,3900,5000,3900,2400,*,RIGHT,NWELL +S 0,300,5000,300,600,*,RIGHT,ALU1 +S 3400,4000,3400,4500,200,*,DOWN,ALU1 +S 4000,1000,4000,4000,200,*,UP,ALU1 +S 4600,500,4600,1000,200,*,DOWN,ALU1 +S 3400,500,3400,1000,200,*,DOWN,ALU1 +S 4600,3000,4600,4500,200,*,DOWN,ALU1 +S 4300,1400,4300,2600,100,*,DOWN,POLY +S 3700,1400,3700,2600,100,*,DOWN,POLY +S 4300,100,4300,1400,100,*,DOWN,NTRANS +S 3400,300,3400,1200,300,*,UP,NDIF +S 4000,300,4000,1200,300,*,UP,NDIF +S 3700,100,3700,1400,100,*,DOWN,NTRANS +S 4600,300,4600,1200,300,*,UP,NDIF +S 3400,2800,3400,4700,300,*,DOWN,PDIF +S 4600,2800,4600,4700,300,*,DOWN,PDIF +S 4300,2600,4300,4900,100,*,UP,PTRANS +S 3700,2600,3700,4900,100,*,UP,PTRANS +S 4000,2800,4000,4700,300,*,DOWN,PDIF +S 900,3500,3500,3500,100,*,RIGHT,ALU1 +S 3500,2000,3500,3500,100,*,DOWN,ALU1 +S 3500,2000,4300,2000,100,*,RIGHT,POLY +V 4000,4000,CONT_DIF_P +V 4000,3500,CONT_DIF_P +V 4000,3000,CONT_DIF_P +V 1500,4700,CONT_BODY_N +V 300,4700,CONT_BODY_N +V 1500,300,CONT_BODY_P +V 500,2000,CONT_POLY +V 2500,2000,CONT_POLY +V 300,500,CONT_DIF_N +V 2700,500,CONT_DIF_N +V 1000,2000,CONT_POLY +V 2000,2000,CONT_POLY +V 300,4000,CONT_DIF_P +V 1500,4000,CONT_DIF_P +V 2700,4000,CONT_DIF_P +V 2100,4500,CONT_DIF_P +V 900,3500,CONT_DIF_P +V 1500,1000,CONT_DIF_N +V 3500,2000,CONT_POLY +V 4000,1000,CONT_DIF_N +V 3400,1000,CONT_DIF_N +V 3400,500,CONT_DIF_N +V 4600,500,CONT_DIF_N +V 4600,1000,CONT_DIF_N +V 3400,4500,CONT_DIF_P +V 3400,4000,CONT_DIF_P +V 4600,4500,CONT_DIF_P +V 4600,4000,CONT_DIF_P +V 4600,3500,CONT_DIF_P +V 4600,3000,CONT_DIF_P +V 900,4700,CONT_BODY_N +V 2700,4700,CONT_BODY_N +V 900,300,CONT_BODY_P +V 2100,300,CONT_BODY_P +EOF diff --git a/alliance/share/cells/sxlib/oa2a22_x4.vbe b/alliance/share/cells/sxlib/oa2a22_x4.vbe new file mode 100644 index 00000000..9e31873c --- /dev/null +++ b/alliance/share/cells/sxlib/oa2a22_x4.vbe @@ -0,0 +1,44 @@ +ENTITY oa2a22_x4 IS +GENERIC ( + CONSTANT area : NATURAL := 2500; + CONSTANT transistors : NATURAL := 12; + CONSTANT cin_i0 : NATURAL := 8; + CONSTANT cin_i1 : NATURAL := 8; + CONSTANT cin_i2 : NATURAL := 8; + CONSTANT cin_i3 : NATURAL := 8; + CONSTANT tphh_i1_q : NATURAL := 620; + CONSTANT rup_i1_q : NATURAL := 890; + CONSTANT tpll_i1_q : NATURAL := 657; + CONSTANT rdown_i1_q : NATURAL := 800; + CONSTANT tphh_i3_q : NATURAL := 640; + CONSTANT rup_i3_q : NATURAL := 890; + CONSTANT tpll_i3_q : NATURAL := 616; + CONSTANT rdown_i3_q : NATURAL := 800; + CONSTANT tphh_i2_q : NATURAL := 758; + CONSTANT rup_i2_q : NATURAL := 890; + CONSTANT tpll_i2_q : NATURAL := 593; + CONSTANT rdown_i2_q : NATURAL := 800; + CONSTANT tphh_i0_q : NATURAL := 515; + CONSTANT rup_i0_q : NATURAL := 890; + CONSTANT tpll_i0_q : NATURAL := 684; + CONSTANT rdown_i0_q : NATURAL := 800 +); +PORT ( + i0 : in BIT; + i1 : in BIT; + i2 : in BIT; + i3 : in BIT; + q : out BIT; + vdd : in BIT; + vss : in BIT +); +END oa2a22_x4; + +ARCHITECTURE behaviour_data_flow OF oa2a22_x4 IS + +BEGIN + ASSERT ((vdd and not (vss)) = '1') + REPORT "power supply is missing on oa2a22_x4" + SEVERITY WARNING; + q <= ((i0 and i1) or (i2 and i3)) after 1400 ps; +END;