- idem
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@ -15,6 +15,9 @@ simulation.dvi : simulation.tex addac.eps
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simulation.pdf : simulation.dvi
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simulation.pdf : simulation.dvi
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dvipdf simulation.dvi
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dvipdf simulation.dvi
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simulation.ps : simulation.dvi
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dvips simulation.dvi -o simulation.ps
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$(EPS) : $(FIG)
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$(EPS) : $(FIG)
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$(TEX:.tex=.ps) : $(TEX:.tex=.dvi)
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$(TEX:.tex=.ps) : $(TEX:.tex=.dvi)
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@ -87,7 +87,8 @@ xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
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}
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}
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\date{}
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\date{}
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\author{Frederic AK \hspace{2cm} Kai-shing LAM
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\author{Frederic AK \hspace{2cm} Kai-shing LAM\\
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Modified by LJ
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}
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}
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\maketitle
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\maketitle
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@ -135,11 +136,11 @@ manual page.
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{1.2} Behavioral Description
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{1.2} Behavioral Description
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{1.3} Stimuli of test
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{1.3} Stimuli format
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{1.4} Simulation
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{1.4} Simulation
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{1.5}Delay\\
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{1.5} Simulation with Delay\\
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\\
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\\
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{2} {\bf Structural VHDL}
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{2} {\bf Structural VHDL}
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@ -166,7 +167,7 @@ All the files used in this part are located in the \\
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This directory contains two subdirectories and one Makefile :
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This directory contains two subdirectories and one Makefile :
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\begin{itemize}
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\begin{itemize}
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\item The Makefile allows you to validate automatically the entire simulation part
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\item The Makefile allows you to validate automatically the entire simulation part
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\item {\bf addaccu\_beh} = the behavioral description
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\item {\bf addaccu\_beh} = the behavioral description (Register Transfert Level)
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\begin{itemize}
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\begin{itemize}
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\item Makefile to validate automatically the entire behavioral description
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\item Makefile to validate automatically the entire behavioral description
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@ -174,6 +175,7 @@ This directory contains two subdirectories and one Makefile :
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\item patterns.pat is the simulation patterns for addaccu
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\item patterns.pat is the simulation patterns for addaccu
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\item addaccu\_dly.vbe is the behavioral description of addaccu with delay
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\item addaccu\_dly.vbe is the behavioral description of addaccu with delay
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\item patterns\_dly.pat is the simulation patterns for addaccu with delay
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\item patterns\_dly.pat is the simulation patterns for addaccu with delay
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\item addaccu4.vhdl is the behavioral description of addaccu using standard VHDL subset
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\end{itemize}
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\end{itemize}
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\item {\bf addaccu\_struct} = the structural view
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\item {\bf addaccu\_struct} = the structural view
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@ -195,6 +197,7 @@ This directory contains two subdirectories and one Makefile :
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The {\bf ALLIANCE} tools used are :
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The {\bf ALLIANCE} tools used are :
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\begin{itemize}\itemsep=-.8ex
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\begin{itemize}\itemsep=-.8ex
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\item {\bf vasy} : {\bf VHDL} analyzer and convertor.
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\item {\bf asimut} : {\bf VHDL} Compiler and Simulator.
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\item {\bf asimut} : {\bf VHDL} Compiler and Simulator.
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\item{\bf genpat} : Procedural generator of stimuli.
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\item{\bf genpat} : Procedural generator of stimuli.
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\end{itemize}
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\end{itemize}
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@ -330,6 +333,29 @@ under C Shell :
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The meaning of these variables is to be discovered in the {\bf
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The meaning of these variables is to be discovered in the {\bf
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man} of {\bf ASIMUT} tool.
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man} of {\bf ASIMUT} tool.
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\subsection{Description with Standard VHDL subset}
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Alliance tools use a very particular and restricted {\bf VHDL} subset (vbe and
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vst file format).
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If you want to describe the behavior of your circuit (at Register Transfert Level)
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with a more common {\bf VHDL} subset you can use {\bf VASY\}
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to automatically convert your {\bf VHDL} descriptions in
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Alliance subset.
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The file addaccu4.vhdl is a description of the addaccu circuit,
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using classical {\bf VHDL} subset (with process statements,
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IEEE 1164 VHDL types, aritmetic operators etc ...)
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You can convert this description to the {\bf .vbe} file format using
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{\bf VASY}~:
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\begin{commandline}
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> vasy -Vao addaccu4.vhdl
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\end{commandline}
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You can then compile and simulate the generated file addaccu4.vbe
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using {\bf asimut} exactly as it has been done with the addaccu.vbe file.
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\subsection{Stimuli of test}
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\subsection{Stimuli of test}
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Once the behavioral description compiled successfully (without any
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Once the behavioral description compiled successfully (without any
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@ -608,7 +634,7 @@ behavioral description of the block by its structural view:
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\begin{itemize}\itemsep=-.8ex
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\begin{itemize}\itemsep=-.8ex
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\item Write the structural view of the block { \bf (vst) }.
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\item Write the structural view of the block { \bf (vst) }.
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\item
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\item
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Compile this block (asimut - C $<$block\_name$>$) to validate its
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Compile this block (asimut -c $<$block\_name$>$) to validate its
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syntax
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syntax
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\item Remove its identifier from the { \bf CATAL } file.
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\item Remove its identifier from the { \bf CATAL } file.
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\item Simulate circuit addaccu again: \par
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\item Simulate circuit addaccu again: \par
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@ -1,32 +1,25 @@
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TEX = synthesis.tex
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TEX = synthesis.tex
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FIG = automate.fig ex_digicode.fig clavier.fig synthese.fig T_RC.fig graphe1.fig graphe_solution_digicode.fig hier.fig bloc.fig graphe1.fig datap.fig exemple1.fig exemple2.fig ctl-mrs-1.fig ctl-wen-1.fig dpt-all-1.fig dpt-alu-1.fig ctldecode.fig ctldecodebw.fig dptbanc.fig ctl-alu-1.fig
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FIG = automate.fig ex_digicode.fig clavier.fig synthese.fig T_RC.fig graphe1.fig graphe_solution_digicode.fig hier.fig bloc.fig graphe1.fig datap.fig exemple1.fig exemple2.fig ctl-mrs-1.fig ctl-wen-1.fig dpt-all-1.fig dpt-alu-1.fig ctldecode.fig ctldecodebw.fig dptbanc.fig ctl-alu-1.fig
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EPS = $(FIG:.fig=.eps)
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EPS = $(FIG:.fig=.eps)
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PDF = $(EPS:.eps=.pdf)
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all : synthesis.pdf
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%.pdf : %.tex
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cp synthesis.pdf ../../
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pdflatex $<
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%.dvi : %.tex
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synthesis.pdf : synthesis.dvi
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dvipdf $< $@
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synthesis.ps : synthesis.dvi
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dvips $< -o $@
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synthesis.dvi : synthesis.tex $(EPS)
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latex $<
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latex $<
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latex $<
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latex $<
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%.ps : %.dvi
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dvips -o $@ $<
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%.pdf : %.eps
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epstopdf $<
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%.eps : %.fig
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%.eps : %.fig
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fig2dev -L eps $< > $@
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fig2dev -L eps $< > $@
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all : $(TEX:.tex=.ps) $(TEX:.tex=.pdf)
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$(EPS) : $(FIG)
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$(EPS) : $(FIG)
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$(PDF) : $(EPS)
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$(PDF) : $(EPS)
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$(TEX:.tex=.ps) : $(TEX:.tex=.dvi)
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$(TEX:.tex=.dvi) : $(EPS)
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$(TEX:.tex=.pdf) : $(PDF)
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clean :
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clean :
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rm -f *~ *.aux *.log *.pdf *.dvi *.ps *.out *.toc *.eps
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rm -f *~ *.aux *.log *.pdf *.dvi *.ps *.out *.toc *.eps
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