From 6f6d65e31d067e5341c206450a75260f80d8c4c5 Mon Sep 17 00:00:00 2001 From: Pierre Nguyen Tuong Date: Wed, 14 Aug 2002 20:06:42 +0000 Subject: [PATCH] Ajout des objets logiques capacite, resistance et inductance --- alliance/src/mbk/man3/addlocap.3 | 121 ++++++++++++++++++++++++++++++ alliance/src/mbk/man3/addlores.3 | 118 +++++++++++++++++++++++++++++ alliance/src/mbk/man3/addloself.3 | 118 +++++++++++++++++++++++++++++ alliance/src/mbk/man3/addlotrs.3 | 6 +- 4 files changed, 360 insertions(+), 3 deletions(-) create mode 100644 alliance/src/mbk/man3/addlocap.3 create mode 100644 alliance/src/mbk/man3/addlores.3 create mode 100644 alliance/src/mbk/man3/addloself.3 diff --git a/alliance/src/mbk/man3/addlocap.3 b/alliance/src/mbk/man3/addlocap.3 new file mode 100644 index 00000000..59c69893 --- /dev/null +++ b/alliance/src/mbk/man3/addlocap.3 @@ -0,0 +1,121 @@ +.\" $Id: addlocap.3,v 1.1 2002/08/14 20:06:42 pnt Exp $ +.\" @(#)addlocap.2 2.11 91/08/22 ; Labo ASIM cao-vlsi; Author : Pierre Nguyen Tuong +.if t \{\ +.so man1/alc_contents.mac +.XS \n% +.ti 0.2i +addlocap +.XE +.XS2 \n% +.ti 0.2i +addlocap +.XE2 \} +.TH ADDLOCAP 3 "August 14, 2002" "ASIM/LIP6" "MBK LOGICAL FUNCTIONS" +.SH NAME +addlocap \- create a logical capacitor +.so man1/alc_origin.1 +.SH SYNOPSYS +.nf +.if n \{\ +.ft B \} +.if t \{\ +.ft CR \} +.ta 3n 23n +#include "mlo.h" + +locap_list \(**addlocap(ptfig,type,capa,tcon,bcon,name) +lofig_list \(**ptfig ; +char type ; +double capa ; +losig_list \(**tcon, \(**bcon ; +const char \(**name ; +.ft R +.fi +.SH PARAMETERS +.TP 20 +\fIptfig\fP +Pointer to the figure in which the capacitor should be added +.TP +\fItype\fP +Capacitor type +.TP +\fIcapa\fP +Capacitor value in Farads +.TP +\fItcon\fP +Pointer to the signal to be connected on the capacitor top plate +.TP +\fIbcon\fP +Pointer to the signal to be connected on the capacitor bottom plate +.TP +\fIname\fP +Capacitor instance name +.SH DESCRIPTION +\fBaddlocap\fP creates a new capacitor, and adds it to the +list of capacitors pointed to by \fIptfig \-> LOCAP\fP. The new capacitor is +added in front of the list, and becomes itself the list head. +.br +The \fItype\fP parameter can take two values : +.RS +.TP 20 +\fBCAPMIM\fP +for a metal/metal capacitor (the top plate and the bottom plate layers are different metal layers) +.TP +\fBCAPPNWELL\fP +for a POLY/NWELL capacitor (if available in the technology). The top plate layer is POLY, bottom plate is NWELL. +.RE +.LP +The \fIcapa\fP\ argument is the capacitor value in Farads. +.br +Two connectors are created each time a capacitor is added, and the +\fItcon\fP and \fIbcon\fP \fBlosigs\fP are attached to +the \fISIG\fP field of the \fBlocon\fP of the appropriate connector. The +connectors names are \fItcon \fP (top plate) and \fIbcon\fP (bottom plate); their +direction, \fIDIR\fP, are set to \fB'P'\fP, and their \fITYPE\fP \fBINTERNAL\fP. +For details on the structures, see \fBlocon\fP(3) and \fBlocap\fR(3). +.SH RETURN VALUE +\fBaddlocap\fP returns a pointer to the newly created capacitor. +.SH ERRORS +.if n \{\ +.ft B \} +.if t \{\ +.ft CR \} +"\(**\(**\(** mbk error \(**\(**\(** illegal capacitor type : \fItype\fP" +.ft R +.RS +The \fItype\fP is not a legal capacitor type. +.RE +.SH EXAMPLE +.ta 3n 6n 9n 12n 15n 18n 21n +.nf +.if n \{\ +.ft B \} +.if t \{\ +.ft CR \} +#include "mlo.h" + +void parallel_capacitors(void) /\(** netlist of two parallel capacitors \(**/ +{ + lofig_list \(**pt = NULL ; + losig_list \(**in = NULL ; + losig_list \(**out = NULL ; + + pt = addlofig("parallel_capacitors") ; + addlocon(pt,"in",in = givelosig(pt,0),IN) ; + addlocon(pt,"out",out = givelosig(pt,1),OUT) ; + + addlocap(pt,CAPMIM,0.5e-6,in,out,"cap1") ; + addlocap(pt,CAPMIM,0.5e-6,in,out,"cap2") ; +} +.ft R +.fi +.SH SEE ALSO +.BR mbk (1), +.BR lofig (3), +.BR locap (3), +.BR locon (3), +.BR dellocap (3). + + +.so man1/alc_bug_report.1 + diff --git a/alliance/src/mbk/man3/addlores.3 b/alliance/src/mbk/man3/addlores.3 new file mode 100644 index 00000000..16c3992f --- /dev/null +++ b/alliance/src/mbk/man3/addlores.3 @@ -0,0 +1,118 @@ +.\" $Id: addlores.3,v 1.1 2002/08/14 20:05:38 pnt Exp $ +.\" @(#)addlores.2 2.11 91/08/22 ; Labo ASIM cao-vlsi; Author : Pierre Nguyen Tuong +.if t \{\ +.so man1/alc_contents.mac +.XS \n% +.ti 0.2i +addlores +.XE +.XS2 \n% +.ti 0.2i +addlores +.XE2 \} +.TH ADDLORES 3 "August 14, 2002" "ASIM/LIP6" "MBK LOGICAL FUNCTIONS" +.SH NAME +addlores \- create a logical resistor +.so man1/alc_origin.1 +.SH SYNOPSYS +.nf +.if n \{\ +.ft B \} +.if t \{\ +.ft CR \} +.ta 3n 23n +#include "mlo.h" + +lores_list \(**addlores(ptfig,type,resi,rcon1,rcon2,name) +lofig_list \(**ptfig ; +char type ; +double resi ; +losig_list \(**rcon1, \(**rcon2 ; +const char \(**name ; +.ft R +.fi +.SH PARAMETERS +.TP 20 +\fIptfig\fP +Pointer to the figure in which the resistor should be added +.TP +\fItype\fP +Resistor type +.TP +\fIresi\fP +Resistor value in Ohms +.TP +\fIrcon1\fP +Pointer to the signal to be connected on the resistor top plate +.TP +\fIrcon2\fP +Pointer to the signal to be connected on the resistor bottom plate +.TP +\fIname\fP +Resistor instance name +.SH DESCRIPTION +\fBaddlores\fP creates a new resistor, and adds it to the +list of resistors pointed to by \fIptfig \-> LORES\fP. The new resistor is +added in front of the list, and becomes itself the list head. +.br +The \fItype\fP parameter can take one value : +.RS +.TP 20 +\fBRESMIM\fP +for a metal resistor +.RE +.LP +The \fIresi\fP\ argument is the resistor value in Ohms. +.br +Two connectors are created each time a resistor is added, and the +\fIrcon1\fP and \fIrcon2\fP \fBlosigs\fP are attached to +the \fISIG\fP field of the \fBlocon\fP of the appropriate connector. The +connectors names are \fIrcon1 \fP and \fIrcon2\fP; their +direction, \fIDIR\fP, are set to \fB'R'\fP, and their \fITYPE\fP \fBINTERNAL\fP. +For details on the structures, see \fBlocon\fP(3) and \fBlores\fR(3). +.SH RETURN VALUE +\fBaddlores\fP returns a pointer to the newly created resistor. +.SH ERRORS +.if n \{\ +.ft B \} +.if t \{\ +.ft CR \} +"\(**\(**\(** mbk error \(**\(**\(** illegal resistor type : \fItype\fP" +.ft R +.RS +The \fItype\fP is not a legal resistor type. +.RE +.SH EXAMPLE +.ta 3n 6n 9n 12n 15n 18n 21n +.nf +.if n \{\ +.ft B \} +.if t \{\ +.ft CR \} +#include "mlo.h" + +void parallel_resistors(void) /\(** netlist of two parallel resistors \(**/ +{ + lofig_list \(**pt = NULL ; + losig_list \(**in = NULL ; + losig_list \(**out = NULL ; + + pt = addlofig("parallel_resistors") ; + addlocon(pt,"in",in = givelosig(pt,0),IN) ; + addlocon(pt,"out",out = givelosig(pt,1),OUT) ; + + addlores(pt,RESMIM,0.2e-6,in,out,"res1") ; + addlores(pt,RESMIM,0.2e-6,in,out,"res2") ; +} +.ft R +.fi +.SH SEE ALSO +.BR mbk (1), +.BR lofig (3), +.BR lores (3), +.BR locon (3), +.BR dellores (3). + + +.so man1/alc_bug_report.1 + diff --git a/alliance/src/mbk/man3/addloself.3 b/alliance/src/mbk/man3/addloself.3 new file mode 100644 index 00000000..51fc805f --- /dev/null +++ b/alliance/src/mbk/man3/addloself.3 @@ -0,0 +1,118 @@ +.\" $Id: addloself.3,v 1.1 2002/08/14 20:05:38 pnt Exp $ +.\" @(#)addloself.2 2.11 91/08/22 ; Labo ASIM cao-vlsi; Author : Pierre Nguyen Tuong +.if t \{\ +.so man1/alc_contents.mac +.XS \n% +.ti 0.2i +addloself +.XE +.XS2 \n% +.ti 0.2i +addloself +.XE2 \} +.TH ADDLOSELF 3 "August 14, 2002" "ASIM/LIP6" "MBK LOGICAL FUNCTIONS" +.SH NAME +addloself \- create a logical inductor +.so man1/alc_origin.1 +.SH SYNOPSYS +.nf +.if n \{\ +.ft B \} +.if t \{\ +.ft CR \} +.ta 3n 23n +#include "mlo.h" + +loself_list \(**addloself(ptfig,type,self,scon1,scon2,name) +lofig_list \(**ptfig ; +char type ; +double self ; +losig_list \(**scon1, \(**scon2 ; +const char \(**name ; +.ft R +.fi +.SH PARAMETERS +.TP 20 +\fIptfig\fP +Pointer to the figure in which the inductor should be added +.TP +\fItype\fP +Inductor type +.TP +\fIself\fP +Inductor value in Henry +.TP +\fIscon1\fP +Pointer to the signal to be connected on the inductor top plate +.TP +\fIscon2\fP +Pointer to the signal to be connected on the inductor bottom plate +.TP +\fIname\fP +Inductor instance name +.SH DESCRIPTION +\fBaddloself\fP creates a new inductor, and adds it to the +list of inductors pointed to by \fIptfig \-> LOSELF\fP. The new inductor is +added in front of the list, and becomes itself the list head. +.br +The \fItype\fP parameter can take one value : +.RS +.TP 20 +\fBSELFMIM\fP +for a metal inductor +.RE +.LP +The \fIself\fP\ argument is the inductor value in Henry. +.br +Two connectors are created each time a inductor is added, and the +\fIscon1\fP and \fIscon2\fP \fBlosigs\fP are attached to +the \fISIG\fP field of the \fBlocon\fP of the appropriate connector. The +connectors names are \fIscon1 \fP and \fIscon2\fP; their +direction, \fIDIR\fP, are set to \fB'L'\fP, and their \fITYPE\fP \fBINTERNAL\fP. +For details on the structuself, see \fBlocon\fP(3) and \fBloself\fR(3). +.SH RETURN VALUE +\fBaddloself\fP returns a pointer to the newly created inductor. +.SH ERRORS +.if n \{\ +.ft B \} +.if t \{\ +.ft CR \} +"\(**\(**\(** mbk error \(**\(**\(** illegal inductor type : \fItype\fP" +.ft R +.RS +The \fItype\fP is not a legal inductor type. +.RE +.SH EXAMPLE +.ta 3n 6n 9n 12n 15n 18n 21n +.nf +.if n \{\ +.ft B \} +.if t \{\ +.ft CR \} +#include "mlo.h" + +void parallel_inductors(void) /\(** netlist of two parallel inductors \(**/ +{ + lofig_list \(**pt = NULL ; + losig_list \(**in = NULL ; + losig_list \(**out = NULL ; + + pt = addlofig("parallel_inductors") ; + addlocon(pt,"in",in = givelosig(pt,0),IN) ; + addlocon(pt,"out",out = givelosig(pt,1),OUT) ; + + addloself(pt,SELFMIM,0.6e-6,in,out,"self1") ; + addloself(pt,SELFMIM,0.6e-6,in,out,"self2") ; +} +.ft R +.fi +.SH SEE ALSO +.BR mbk (1), +.BR lofig (3), +.BR loself (3), +.BR locon (3), +.BR delloself (3). + + +.so man1/alc_bug_report.1 + diff --git a/alliance/src/mbk/man3/addlotrs.3 b/alliance/src/mbk/man3/addlotrs.3 index 5832a14b..86085140 100644 --- a/alliance/src/mbk/man3/addlotrs.3 +++ b/alliance/src/mbk/man3/addlotrs.3 @@ -1,4 +1,4 @@ -.\" $Id: addlotrs.3,v 1.2 2002/08/06 14:17:24 pnt Exp $ +.\" $Id: addlotrs.3,v 1.3 2002/08/14 20:05:38 pnt Exp $ .\" @(#)addlotrs.2 2.11 91/08/22 ; Labo masi cao-vlsi; Author : Frederic Petrot .if t \{\ .so man1/alc_contents.mac @@ -21,7 +21,7 @@ addlotrs \- create a logical transistor .if t \{\ .ft CR \} .ta 3n 23n -#include "mlo.3" +#include "mlo.h" lotrs_list \(**addlotrs(ptfig, type, x, y, width, length, ps, pd, xs, xd, ptgrid, ptsource, ptdrain, ptbulk, name) @@ -118,7 +118,7 @@ For details on the structures, see \fBlocon\fP(3) and \fBlotrs\fR(3). "\(**\(**\(** mbk error \(**\(**\(** illegal transistor type : \fItype\fP" .ft R .RS -The \fItype\fP is not legal a legal transistor type. +The \fItype\fP is not a legal transistor type. .RE .SH EXAMPLE .ta 3n 6n 9n 12n 15n 18n 21n