diff --git a/alliance/src/documentation/alliance-examples/tuner/README b/alliance/src/documentation/alliance-examples/tuner/README new file mode 100644 index 00000000..ec5ccc2c --- /dev/null +++ b/alliance/src/documentation/alliance-examples/tuner/README @@ -0,0 +1,12 @@ +This directory contains a small design example done using Alliance. +It is in French, but that's life. +The example starts from a behavior and ends up in a layout in a smooth +(too smooth to be honest) manner. +All files in this directory are GPLed, even if not marked as such, and +all have been authored by me, which is not so bad (I've even seen worse) + +A complete run is done using ./build_tuner, but I would advise to +copy/paste from this file to understand what's going on. + +Have fun, +Frédéric Pétrot, Tue Jul 27 22:32:17 CEST 2004 diff --git a/alliance/src/documentation/alliance-examples/tuner/build_tuner b/alliance/src/documentation/alliance-examples/tuner/build_tuner new file mode 100755 index 00000000..b9d0aa62 --- /dev/null +++ b/alliance/src/documentation/alliance-examples/tuner/build_tuner @@ -0,0 +1,153 @@ +####################################### +#Author: Frédéric Pétrot +#Unlike most of the work I've done in Alliance, this very example +#is bilingual +#It was done for educational purpose at the well +#known École Polytechnique, and therefore written in French +#I rapidly translated the content to english in case it could +#be useful to someone +########################################################### + +#Construit le projet complet +#Building the entire project. + +export MBK_IN_LO=vst +export MBK_OUT_LO=vst +export MBK_CATA_LIB=$ALLIANCE_TOP/cells/sxlib:$ALLIANCE_TOP/cells/padlib +export RDS_TECHNO_NAME=$ALLIANCE_TOP/etc/cmos.rds + +#Utilisez cet artefact pour commenter une partie du source +#Use this artifact to comment out part of this code, since +#I didn't want to use a Makefile for simplicity +#You ought to in real projects, however :) +if [ "x" = "y" ] ; then +echo -n "" +fi + +#Simulation du comportement +#Simulate the behavior with simple patterns +genpat core +asimut -b tuner core result > /dev/null + +#Optimisation combinatoire +#Multilevel boolean optimization +boom -V -s tuner tuner_o + +#Vérification que le comportement optimisé est +#identique au comportement initial +#Check by simulation that the initial behaviour is identical to the +#optimized one +asimut -b tuner_o core result > /dev/null + +#Vérification formelle de l'équivalence de deux comportements +#Formal verification of the équivalence of two sets of boolean +#equations and registers +proof tuner_o tuner + +#Projection structurelle sur la bibliotheque standard +#Mapping of the behavior on the standard cell library +export MBK_TARGET_LIB=$ALLIANCE_TOP/cells/sxlib +boog -m 0 tuner_o tuner_x + +#Adaptation de la puissance des portes à leur charge +#Gate sizing to adapt the fanout +loon -x 0 -m 0 tuner_x tuner_o + +#Vous pouvez lancer xsch pour voir l'allure de l'ensemble de portes +#Ce n'est pas très utile, mais ca rassure ! +#You may lauch xsch to see the way your netlist looks +#Not really usefully but sometime pretty. +xsch -l tuner_o + +#Vérification que l'interconnexion de portes logiques est +#identique au comportement initial +#Check by simulation that the gate netlist bahaves as the +#initial behaviour +asimut -zd tuner_o core result > /dev/null + +#Reconstruit un comportement à partir des feuilles de la netlist +#Build a behavior by inserting the gate behavior into the netlist +flatbeh tuner_o tuner_f + +#Vérification formelle de l'équivalence de deux comportements +#Formal verification of the équivalence of two sets of boolean +#equations +proof tuner_f tuner + +#Placement des cellules avec position des connecteurs imposée +#Cell placement with forced I/O pin positions +ocp -v -mdl 10 -ring -ioc tuner tuner_o tuner_p + +#Routage des cellules avec 3 niveaux de metal +#Route the block with 3 levels of metal +nero -V -3 -p tuner_p tuner_o tuner_o + +#Visualisation du circuit après placement/routage des cellules +#Look at the circuit after place and route +graal -l tuner_o + +#Vérification que les règles de dessins symboliques n'ont pas +#été violées par le routeur +#Design rule checking to make sure the router did follow them +druc tuner_o + +#Extraction de l'interconnexion de portes à partir des fils +#tirés par le routeur +#Extract the gate netlist after routing +cougar -f tuner_o tuner_x + +#Vérification que les 2 interconnexions de portes sont isomorphes +#Check that the extracted graph is isomorphic to the initial one +lvx vst vst tuner_o tuner_x + +#Ajout logique des plots d'entrées/sortie +#Adding the I/O pads +genlib tuner_io.c + +#Génération des vecteurs de tests pour le circuit complet +#Produces (very few) test vectors for the whole circuit +genpat circuit + +#Verification du circuit complet avec plots +#Check that inserting the pads was done correctly +asimut -zd tuner circuit result > /dev/null + +#Routage du core et des plots +#Core to pad routing +ring tuner circuit + +#Visualisation du circuit après routage du core et des plots +#Look a the circuit +graal -l circuit + +#Vérification que les règles de dessins symboliques n'ont pas +#été violées par le routeur +#Design rule checking to make sure the router didn't fool up with +#layers +druc circuit + +#Verification du travail de ring +#Extraction de la netlist plots/core +#Check was ring has done +#Extract the core to pad routing +cougar circuit + +#Isomorphisme des graphes résultant +#Check for netlist isomorphism +lvx vst vst tuner circuit + +#Transformation vers la pseudo-technologie +#Nous utilisons une pseudo technologie 0.5 micron +#Adapt the symbolic layout to the target technology +#We use a fake 0.5 micron technology +export RDS_IN=cif +export RDS_OUT=cif +export RDS_TECHNO_NAME=fake05.rds +export DREAL_TECHNO_NAME=fake05.dreal +s2r -v circuit + +#Visualisation du resultat +#And give it a look +dreal -l circuit + +#Now, check the layout with your foundry DRC, ... diff --git a/alliance/src/documentation/alliance-examples/tuner/circuit.c b/alliance/src/documentation/alliance-examples/tuner/circuit.c new file mode 100644 index 00000000..a9da96cb --- /dev/null +++ b/alliance/src/documentation/alliance-examples/tuner/circuit.c @@ -0,0 +1,46 @@ +#include +#include + +#define ARRAY_SIZE(x) (sizeof(x)/sizeof(*x)) + +int main(void) +{ +int i, j, samples[] = {190, 191, 192, 193, 379, 380, 381, 382}; +char s[1024]; + + DEF_GENPAT("circuit"); + + /* interface */ + DECLAR("ck", ":1", "B", IN, "", ""); + DECLAR("d", ":1", "B", IN, "", ""); + DECLAR("o", ":1", "B", OUT, "0 to 22", ""); + DECLAR("vddi", ":2", "B", IN, "", ""); + DECLAR("vssi", ":2", "B", IN, "", ""); + DECLAR("vdde", ":2", "B", IN, "", ""); + DECLAR("vsse", ":2", "B", IN, "", ""); + + LABEL("tuner"); + SETTUNIT("ns"); + AFFECT("0", "ck", "0b0"); + AFFECT("0", "d", "0b0"); + AFFECT("0", "vddi", "0b1"); + AFFECT("0", "vssi", "0b0"); + AFFECT("0", "vdde", "0b1"); + AFFECT("0", "vsse", "0b0"); + + for (j = 0; j < ARRAY_SIZE(samples); j++) { + int n = 0; + AFFECT("+10", "ck", "0b1"); n++; + AFFECT("+10", "d", "0b1"); + AFFECT("+0", "ck", "0b0"); + AFFECT("+10", "ck", "0b1"); n++; + AFFECT("+10", "d", "0b0"); + AFFECT("+0", "ck", "0b0"); + + for (i = 0; i < samples[j] - n; i++) { + AFFECT("+10", "ck", "0b1"); + AFFECT("+10", "ck", "0b0"); + } + } + SAV_GENPAT(); +} diff --git a/alliance/src/documentation/alliance-examples/tuner/core.c b/alliance/src/documentation/alliance-examples/tuner/core.c new file mode 100644 index 00000000..ce6e056b --- /dev/null +++ b/alliance/src/documentation/alliance-examples/tuner/core.c @@ -0,0 +1,50 @@ +#include +#include + +#define ARRAY_SIZE(x) (sizeof(x)/sizeof(*x)) + +int main(void) +{ +int i, j, samples[] = {190, 191, 192, 193, 379, 380, 381, 382}; +char s[1024]; + + DEF_GENPAT("core"); + + /* interface */ + DECLAR("ck", ":1", "B", IN, "", ""); + DECLAR("d", ":1", "B", IN, "", ""); + DECLAR("o", ":1", "B", OUT, "0 to 22", ""); + DECLAR("vdd", ":2", "B", IN, "", ""); + DECLAR("vss", ":2", "B", IN, "", ""); +#if 0 + DECLAR("tuner.start", ":2", "B", SIGNAL, "", ""); + DECLAR("tuner.incr_reg", ":2", "X", REGISTER, "14 downto 0", ""); + DECLAR("tuner.test_out", ":2", "B", SIGNAL, "14", ""); + DECLAR("tuner.norm_reg", ":2", "X", REGISTER, "14 downto 0", ""); + DECLAR("tuner.subs_out", ":2", "X", SIGNAL, "8 downto 0", ""); + DECLAR("tuner.deco_reg", ":2", "X", REGISTER, "7 downto 0", ""); +#endif + + LABEL("tuner"); + SETTUNIT("ns"); + AFFECT("0", "ck", "0b0"); + AFFECT("0", "d", "0b0"); + AFFECT("0", "vdd", "0b1"); + AFFECT("0", "vss", "0b0"); + + for (j = 0; j < ARRAY_SIZE(samples); j++) { + int n = 0; + AFFECT("+10", "ck", "0b1"); n++; + AFFECT("+10", "d", "0b1"); + AFFECT("+0", "ck", "0b0"); + AFFECT("+10", "ck", "0b1"); n++; + AFFECT("+10", "d", "0b0"); + AFFECT("+0", "ck", "0b0"); + + for (i = 0; i < samples[j] - n; i++) { + AFFECT("+10", "ck", "0b1"); + AFFECT("+10", "ck", "0b0"); + } + } + SAV_GENPAT(); +} diff --git a/alliance/src/documentation/alliance-examples/tuner/fake05.dreal b/alliance/src/documentation/alliance-examples/tuner/fake05.dreal new file mode 100644 index 00000000..0d2f79f2 --- /dev/null +++ b/alliance/src/documentation/alliance-examples/tuner/fake05.dreal @@ -0,0 +1,23 @@ +DEFINE DREAL_LOWER_GRID_STEP 10 +DEFINE DREAL_LOWER_FIGURE_STEP 0.1 +DEFINE DREAL_LOWER_INSTANCE_STEP 0.1 +DEFINE DREAL_LOWER_CONNECTOR_STEP 0.5 +DEFINE DREAL_LOWER_SEGMENT_STEP 0.7 +DEFINE DREAL_LOWER_REFERENCE_STEP 1.0 +DEFINE DREAL_CURSOR_COLOR_NAME Gray +DEFINE DREAL_CURSOR_SIZE 10 +TABLE DREAL_RDS_LAYER_NAME + RDS_NWELL NTUB tan Black + RDS_PWELL IMPF coral Black + RDS_POLY POL1 red Black + RDS_CONT CONT dark_violet Black + RDS_ALU1 MET1 royal_blue Black + RDS_VIA1 VIA1 deep_sky_blue Black + RDS_ALU2 MET2 cyan Black + RDS_VIA2 VIA2 deep_pink Black + RDS_ALU3 MET3 light_pink Black + RDS_ACTIV DIFF brown Black + RDS_NIMP NPLS forest_green Black + RDS_PIMP PPLS goldenrod Black + RDS_CPAS PADL gray Black +END diff --git a/alliance/src/documentation/alliance-examples/tuner/fake05.rds b/alliance/src/documentation/alliance-examples/tuner/fake05.rds new file mode 100644 index 00000000..8e40a606 --- /dev/null +++ b/alliance/src/documentation/alliance-examples/tuner/fake05.rds @@ -0,0 +1,261 @@ +#Fake 0.5 micron, twin tub technomogy + +DEFINE PHYSICAL_GRID 0.050 + +DEFINE LAMBDA 0.500 + +TABLE MBK_TO_RDS_SEGMENT + + NWELL RDS_NWELL VW 1.550 3.100 0.000 ALL\ + RDS_PWELL VW 1.550 3.100 0.000 ALL + NDIF RDS_NDIF VW 0.250 0.000 0.000 EXT\ + RDS_ACTIV VW 0.250 0.000 0.000 DRC\ + RDS_NIMP VW 0.650 0.800 0.000 DRC + PDIF RDS_PDIF VW 0.250 0.000 0.000 EXT\ + RDS_ACTIV VW 0.250 0.000 0.000 DRC\ + RDS_PIMP VW 0.650 0.800 0.000 DRC\ + RDS_PWELL VW 2.050 3.600 0.000 DRC\ + RDS_NWELL VW 2.050 3.600 0.000 DRC + NTIE RDS_NTIE VW 0.250 0.000 0.000 EXT\ + RDS_ACTIV VW 0.250 0.000 0.000 DRC\ + RDS_NIMP VW 0.650 0.800 0.000 DRC\ + RDS_NWELL VW 2.050 3.600 0.000 DRC\ + RDS_PWELL VW 2.050 3.600 0.000 DRC + PTIE RDS_PTIE VW 0.250 0.000 0.000 EXT\ + RDS_ACTIV VW 0.250 0.000 0.000 DRC\ + RDS_PIMP VW 0.650 0.800 0.000 DRC + NTRANS RDS_NDIF LCW -0.750 0.950 0.050 EXT\ + RDS_NDIF RCW -0.750 0.950 0.050 EXT\ + RDS_POLY VW 0.000 0.100 0.000 ALL\ + RDS_ACTIV VW -0.600 2.000 0.000 DRC\ + RDS_NIMP VW -0.350 2.800 0.000 DRC + PTRANS RDS_PDIF LCW -0.750 0.950 0.050 EXT\ + RDS_PDIF RCW -0.750 0.950 0.050 EXT\ + RDS_POLY VW 0.000 0.100 0.000 ALL\ + RDS_ACTIV VW -0.750 2.000 0.000 DRC\ + RDS_PIMP VW -0.350 2.800 0.000 DRC\ + RDS_NWELL VW 1.050 5.600 0.000 DRC\ + RDS_PWELL VW 1.050 5.600 0.000 DRC + POLY RDS_POLY VW 0.300 0.100 0.000 ALL + CALU1 RDS_ALU1 VW 0.450 0.400 0.000 ALL + ALU1 RDS_ALU1 VW 0.450 0.400 0.000 ALL + CALU2 RDS_ALU2 VW 0.500 0.000 0.000 ALL + ALU2 RDS_ALU2 VW 0.500 0.000 0.000 ALL + ALU3 RDS_ALU3 VW 0.600 0.200 0.000 ALL + CALU3 RDS_ALU3 VW 0.600 0.200 0.000 ALL +END +TABLE MBK_TO_RDS_CONNECTOR + POLY RDS_POLY 0.300 0.100 + ALU1 RDS_ALU1 0.450 0.400 + ALU2 RDS_ALU2 0.500 0.000 + ALU3 RDS_ALU3 0.600 0.200 +END +TABLE MBK_TO_RDS_REFERENCE + REF_REF RDS_REF 0.900 + REF_CON RDS_REF 0.900 +END +TABLE MBK_TO_RDS_VIA + CONT_BODY_N \ + RDS_ALU1 1.400 ALL\ + RDS_CONT 0.600 ALL\ + RDS_ACTIV 1.500 DRC\ + RDS_NIMP 2.300 DRC\ + RDS_NWELL 5.100 DRC\ + RDS_PWELL 5.100 DRC\ + RDS_NDIF 1.500 EXT + CONT_BODY_P \ + RDS_ALU1 1.400 ALL\ + RDS_CONT 0.600 ALL\ + RDS_ACTIV 1.500 DRC\ + RDS_PIMP 2.300 DRC\ + RDS_PDIF 1.500 EXT + CONT_DIF_N \ + RDS_ALU1 1.400 ALL\ + RDS_CONT 0.600 ALL\ + RDS_ACTIV 1.500 DRC\ + RDS_NIMP 2.300 DRC\ + RDS_NDIF 1.500 EXT + CONT_DIF_P \ + RDS_ALU1 1.400 ALL\ + RDS_CONT 0.600 ALL\ + RDS_ACTIV 1.500 DRC\ + RDS_PIMP 2.300 DRC\ + RDS_PWELL 5.100 DRC\ + RDS_NWELL 5.100 DRC\ + RDS_PDIF 1.500 EXT + CONT_POLY \ + RDS_ALU1 1.400 ALL\ + RDS_CONT 0.600 ALL\ + RDS_POLY 1.600 ALL + CONT_VIA \ + RDS_ALU1 1.500 ALL\ + RDS_VIA1 0.700 ALL\ + RDS_ALU2 1.500 ALL + CONT_VIA2 \ + RDS_ALU2 1.500 ALL\ + RDS_VIA2 0.700 ALL\ + RDS_ALU3 1.500 ALL + C_X_N \ + RDS_POLY 0.600 ALL\ + RDS_ACTIV 2.500 DRC\ + RDS_NIMP 3.300 DRC\ + RDS_NDIF 2.500 EXT + C_X_P \ + RDS_POLY 0.600 ALL\ + RDS_ACTIV 2.500 DRC\ + RDS_PIMP 3.300 DRC\ + RDS_PWELL 6.100 DRC\ + RDS_NWELL 6.100 DRC\ + RDS_PDIF 2.500 EXT +END + +TABLE MBK_TO_RDS_BIGVIA_HOLE +CONT_VIA RDS_VIA1 1 4 ALL +CONT_VIA2 RDS_VIA2 1 4 ALL +CONT_VIA3 RDS_VIA3 1 4 ALL +CONT_VIA5 RDS_VIA3 1 9 ALL +CONT_VIA6 RDS_VIA3 1 9 ALL +END + +TABLE MBK_TO_RDS_BIGVIA_METAL +CONT_VIA RDS_ALU1 0.0 0.5 ALL RDS_ALU2 0.0 0.5 ALL +CONT_VIA2 RDS_ALU2 0.0 0.5 ALL RDS_ALU3 0.0 0.5 ALL +CONT_VIA3 RDS_ALU3 0.0 0.5 ALL RDS_ALU4 0.0 0.5 ALL +CONT_VIA4 RDS_ALU4 0.0 0.5 ALL RDS_ALU5 0.0 0.5 ALL +CONT_VIA5 RDS_ALU5 0.0 0.5 ALL RDS_ALU6 0.0 0.5 ALL +END + +TABLE MBK_TO_RDS_TURNVIA +CONT_TURN1 RDS_ALU1 0 ALL +CONT_TURN2 RDS_ALU2 0 ALL +CONT_TURN3 RDS_ALU3 0 ALL +CONT_TURN4 RDS_ALU4 0 ALL +CONT_TURN5 RDS_ALU5 0 ALL +CONT_TURN6 RDS_ALU6 0 ALL +END + +TABLE CIF_LAYER + RDS_NWELL NTUB + RDS_PWELL FIMP + RDS_POLY POLY1 + RDS_CONT CONT + RDS_ALU1 MET1 + RDS_VIA1 VIA + RDS_ALU2 MET2 + RDS_ACTIV DIFF + RDS_NIMP NPLUS + RDS_PIMP PPLUS + RDS_CPAS PAD + RDS_ALU3 MET3 + RDS_VIA2 VIA2 +END +TABLE GDS_LAYER + RDS_NWELL 5 + RDS_PWELL 8 + RDS_POLY 20 + RDS_CONT 34 + RDS_ALU1 35 + RDS_VIA1 36 + RDS_ALU2 37 + RDS_ACTIV 10 + RDS_NIMP 23 + RDS_PIMP 24 + RDS_CPAS 40 + RDS_ALU3 39 + RDS_VIA2 38 +END +TABLE S2R_OVERSIZE_DENOTCH + RDS_NWELL 2.400 + RDS_PWELL 2.400 + RDS_POLY 0.350 + RDS_ALU1 0.350 + RDS_ALU2 0.350 + RDS_ACTIV 0.550 + RDS_NIMP 0.450 + RDS_PIMP 0.450 + RDS_ALU3 0.450 +END +TABLE S2R_BLOC_RING_WIDTH + RDS_NWELL 4.800 + RDS_PWELL 4.800 + RDS_POLY 0.800 + RDS_ALU1 0.800 + RDS_ALU2 0.800 + RDS_ACTIV 1.200 + RDS_NIMP 0.900 + RDS_PIMP 0.900 + RDS_ALU3 1.000 +END +TABLE S2R_MINIMUM_LAYER_WIDTH + RDS_NWELL 3.000 + RDS_PWELL 3.000 + RDS_POLY 0.600 + RDS_ALU1 0.900 + RDS_ALU2 1.000 + RDS_ACTIV 1.000 + RDS_NIMP 0.900 + RDS_PIMP 0.900 + RDS_ALU3 1.200 +END +TABLE S2R_POST_TREAT + RDS_NWELL TREAT NULL + RDS_PWELL TREAT NULL + RDS_POLY TREAT NULL + RDS_CONT NOTREAT NULL + RDS_ALU1 TREAT NULL + RDS_VIA1 NOTREAT NULL + RDS_ALU2 TREAT NULL + RDS_ACTIV TREAT NULL + RDS_NIMP TREAT RDS_PIMP + RDS_PIMP TREAT RDS_NIMP + RDS_ABOX NOTREAT NULL + RDS_VIA2 NOTREAT NULL + RDS_ALU3 TREAT NULL +END +TABLE LYNX_TRANSISTOR +NTRANS NTRANS C_X_N RDS_POLY RDS_NDIF RDS_ACTIV RDS_PWELL +PTRANS PTRANS C_X_P RDS_POLY RDS_PDIF RDS_ACTIV RDS_NWELL +END +TABLE LYNX_DIFFUSION +RDS_NDIF RDS_ACTIV 1 RDS_NIMP 1 RDS_NWELL 0 +RDS_PDIF RDS_ACTIV 1 RDS_PIMP 1 RDS_NWELL 1 +RDS_NTIE RDS_ACTIV 1 RDS_NIMP 1 RDS_NWELL 1 +RDS_PTIE RDS_ACTIV 1 RDS_PIMP 1 RDS_NWELL 0 +END +TABLE LYNX_RESISTOR + RDS_POLY 0 + RDS_ALU1 0 + RDS_ALU2 0 + RDS_ALU3 0 + RDS_ALU3 0 + RDS_ALU4 0 + RDS_CONT 0 + RDS_VIA1 0 + RDS_VIA2 0 + RDS_VIA3 0 +END +TABLE LYNX_GRAPH + RDS_NDIF RDS_CONT RDS_NDIF + RDS_PDIF RDS_CONT RDS_PDIF + RDS_NTIE RDS_CONT RDS_NTIE + RDS_PTIE RDS_CONT RDS_PTIE + RDS_POLY RDS_CONT RDS_POLY + RDS_CONT RDS_PDIF RDS_NDIF RDS_POLY RDS_ALU1 RDS_CONT + RDS_ALU1 RDS_CONT RDS_VIA1 RDS_ALU1 RDS_REF + RDS_REF RDS_CONT RDS_VIA1 RDS_ALU1 RDS_REF + RDS_VIA1 RDS_ALU1 RDS_ALU2 RDS_VIA1 + RDS_ALU2 RDS_VIA1 RDS_VIA2 RDS_ALU2 + RDS_VIA2 RDS_ALU2 RDS_ALU3 RDS_VIA2 + RDS_ALU3 RDS_VIA2 RDS_ALU3 +END +TABLE LYNX_CAPA + RDS_POLY 9.9e-05 4.8e-05 + RDS_ALU1 4.1e-05 5.1e-05 + RDS_ALU2 2.4e-05 4.6e-05 + RDS_ALU3 2.4e-05 4.6e-05 +END + +TABLE LYNX_BULK_IMPLICIT +# NWELL EXPLICIT +# PWELL IMPLICIT +END diff --git a/alliance/src/documentation/alliance-examples/tuner/padreal.cif b/alliance/src/documentation/alliance-examples/tuner/padreal.cif new file mode 100644 index 00000000..6bd30020 --- /dev/null +++ b/alliance/src/documentation/alliance-examples/tuner/padreal.cif @@ -0,0 +1,501 @@ +(rds to CIF driver cvs version $Revision: 1.1 $ +technology fake05.rds +Tue Jul 27 18:03:47 2004 +padreal +fred); + +DS1 5 2; +9 padreal; +LMET1; +B2994 3120 1693 2700; +B2994 4704 1693 1908; +LVIA; +B40 40 488 1200; +B40 40 288 1200; +B40 40 888 1200; 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+LMET3; +B2994 3120 1693 2700; +DF; + +C1; +E diff --git a/alliance/src/documentation/alliance-examples/tuner/padreal.gds b/alliance/src/documentation/alliance-examples/tuner/padreal.gds new file mode 100644 index 00000000..71127020 Binary files /dev/null and b/alliance/src/documentation/alliance-examples/tuner/padreal.gds differ diff --git a/alliance/src/documentation/alliance-examples/tuner/tuner-fr.pdf b/alliance/src/documentation/alliance-examples/tuner/tuner-fr.pdf new file mode 100644 index 00000000..281b4118 Binary files /dev/null and b/alliance/src/documentation/alliance-examples/tuner/tuner-fr.pdf differ diff --git a/alliance/src/documentation/alliance-examples/tuner/tuner.ioc b/alliance/src/documentation/alliance-examples/tuner/tuner.ioc new file mode 100644 index 00000000..bbcf2cf1 --- /dev/null +++ b/alliance/src/documentation/alliance-examples/tuner/tuner.ioc @@ -0,0 +1,33 @@ +TOP ( + (IOPIN ck.0 ); + (IOPIN d.0 ); + (IOPIN o(0).0 ); + (IOPIN o(1).0 ); + (IOPIN o(2).0 ); +) +RIGHT ( + (IOPIN o(9).0 ); + (IOPIN o(8).0 ); + (IOPIN o(7).0 ); + (IOPIN o(6).0 ); + (IOPIN o(5).0 ); + (IOPIN o(4).0 ); + (IOPIN o(3).0 ); +) +BOTTOM( + (IOPIN o(14).0 ); + (IOPIN o(13).0 ); + (IOPIN o(12).0 ); + (IOPIN o(11).0 ); + (IOPIN o(10).0 ); +) +LEFT ( + (IOPIN o(15).0 ); + (IOPIN o(16).0 ); + (IOPIN o(17).0 ); + (IOPIN o(18).0 ); + (IOPIN o(19).0 ); + (IOPIN o(20).0 ); + (IOPIN o(21).0 ); + (IOPIN o(22).0 ); +) diff --git a/alliance/src/documentation/alliance-examples/tuner/tuner.rin b/alliance/src/documentation/alliance-examples/tuner/tuner.rin new file mode 100644 index 00000000..444e2bcc --- /dev/null +++ b/alliance/src/documentation/alliance-examples/tuner/tuner.rin @@ -0,0 +1,4 @@ +north(pck pd po0 po1 pvdde pvsse po2) +east (po9 po8 po7 po6 po5 po4 po3) +south(po14 po13 po12 pvssi pvddi po11 po10) +west (po15 po16 po17 po18 po19 po20 po21 po22) diff --git a/alliance/src/documentation/alliance-examples/tuner/tuner.vbe b/alliance/src/documentation/alliance-examples/tuner/tuner.vbe new file mode 100644 index 00000000..c12cb705 --- /dev/null +++ b/alliance/src/documentation/alliance-examples/tuner/tuner.vbe @@ -0,0 +1,286 @@ +-- Instrument tuner +-- Frequency of operation is 819200 Hz, obtained by dividing a +-- 3276000 Hz quartz by four +-- Author: Frédéric Pétrot +entity tuner is + port ( + ck : in bit; + d : in bit; + o : out bit_vector(0 to 22); + vdd : in bit; + vss : in bit + ); +end tuner; + +architecture dataflow of tuner is +signal start : bit; +-- input handling +signal d_reg : reg_bit register; -- previous value of input + +-- incrementer related things +signal incr_out : bit_vector (14 downto 0); -- incrementer's result +signal incr_cry : bit_vector (15 downto 0); -- incrementer's carry +signal incr_reg : reg_vector (14 downto 0) register; -- incrementer register + +-- normalizer related things +-- reg must be at most 381 and cannot be less than 190 (hopefully) +constant c382 : bit_vector(14 downto 0) := "000_0001_0111_1110"; +-- we must substract 190 from the shifted result +constant c191 : bit_vector (8 downto 0) := "0_1011_1111"; +signal test_out : bit_vector (14 downto 0); +signal test_cry : bit_vector (15 downto 0); +signal norm_out : bit_vector (14 downto 0); +signal norm_reg : reg_vector (14 downto 0) register; +signal subs_out : bit_vector (8 downto 0); +signal subs_cry : bit_vector (9 downto 0); +signal deco_reg : reg_vector (7 downto 0) register; + +begin + + input : block (ck = '1' and not ck'STABLE) + begin + d_reg <= guarded d; + end block; + + start <= (not d_reg) and d; + + -- compute the result out of the incrementer + -- maximum value is 30582 for an very flat A (26.8 Hz) + -- incr_out <= incr_reg + 1 + incr_out <= incr_reg xor incr_cry(14 downto 0); + incr_cry (0) <= '1'; + incr_cry (15 downto 1) <= (incr_reg and incr_cry (14 downto 0)); + + incr : block (ck = '1' and not ck'stable) + begin + incr_reg <= guarded incr_out when start = '0' else B"000000000000000"; + end block; + + -- normalize the incrementer output: shift until it reaches the + -- [17D, BE] range values, and then subtract BE to fit between 0 and + -- whatever + -- test_out <= norm_reg - c382 = norm_reg + not c382 + 1 + test_out <= norm_reg xor not(c382) xor test_cry(14 downto 0); + test_cry (0) <= '1'; + test_cry (15 downto 1) <= (norm_reg and test_cry (14 downto 0)) or + (not(c382) and test_cry (14 downto 0)) or + (norm_reg and not(c382) ) ; + + -- loop until norm reg is less than 17E, keep its value otherwise + -- norm_out <= norm_reg >> 2 if (norm_reg - c382) > 0 + -- norm_reg otherwise + norm_out <= '0' & norm_reg(14 downto 1) when test_out(14) = '0' + else norm_reg; + + -- load norm_reg with incr_out when start is true + norm : block (ck = '1' and not ck'stable) + begin + norm_reg <= guarded norm_out when start = '0' else incr_out; + end block; + + subs_out <= norm_reg(8 downto 0) xor not(c191) xor subs_cry(8 downto 0); + subs_cry (0) <= '1'; + subs_cry (9 downto 1) <= (norm_reg(8 downto 0) and subs_cry (8 downto 0)) or + (not(c191) and subs_cry (8 downto 0)) or + (norm_reg(8 downto 0) and not(c191)); + + + deco : block (ck = '1' and not ck'stable) + begin + deco_reg <= guarded subs_out(7 downto 0) when test_out(14) = '1' else deco_reg; + end block; + + with deco_reg select + o <= B"1000_0_0000_0111101_0011111" when B"10111110", -- 381 réb 380 (freq: 2161.258631) + B"1000_0_0000_0111101_0011111" when B"10111101", -- 380 réb 380 (freq: 2161.258631) + B"0100_0_0000_0111101_0011111" when B"10111100", -- 379 réb 377 (freq: 2175.174260) + B"0100_0_0000_0111101_0011111" when B"10111011", -- 378 réb 377 (freq: 2175.174260) + B"0100_0_0000_0111101_0011111" when B"10111010", -- 377 réb 377 (freq: 2175.174260) + B"0010_0_0000_0111101_0011111" when B"10111001", -- 376 réb 375 (freq: 2189.179488) + B"0010_0_0000_0111101_0011111" when B"10111000", -- 375 réb 375 (freq: 2189.179488) + B"0001_0_0000_0111101_0011111" when B"10110111", -- 374 réb 373 (freq: 2203.274890) + B"0001_0_0000_0111101_0011111" when B"10110110", -- 373 réb 373 (freq: 2203.274890) + B"0001_0_0000_0111101_0011111" when B"10110101", -- 372 réb 370 (freq: 2217.461048) + B"0001_0_0000_0111101_0011111" when B"10110100", -- 371 réb 370 (freq: 2217.461048) + B"0000_1_0000_0111101_0011111" when B"10110011", -- 370 réb 370 (freq: 2217.461048) + B"0000_0_1000_0111101_0011111" when B"10110010", -- 369 réb 368 (freq: 2231.738546) + B"0000_0_1000_0111101_0011111" when B"10110001", -- 368 réb 368 (freq: 2231.738546) + B"0000_0_0100_0111101_0011111" when B"10110000", -- 367 réb 365 (freq: 2246.107972) + B"0000_0_0100_0111101_0011111" when B"10101111", -- 366 réb 365 (freq: 2246.107972) + B"0000_0_0100_0111101_0011111" when B"10101110", -- 365 réb 365 (freq: 2246.107972) + B"0000_0_0010_0111101_0011111" when B"10101101", -- 364 réb 363 (freq: 2260.569918) + B"0000_0_0010_0111101_0011111" when B"10101100", -- 363 réb 363 (freq: 2260.569918) + B"0000_0_0001_0111101_0011111" when B"10101011", -- 362 réb 361 (freq: 2275.124980) + B"0000_0_0001_0111101_0011111" when B"10101010", -- 361 réb 361 (freq: 2275.124980) + B"1000_0_0000_0111101_0000000" when B"10101001", -- 360 ré 358 (freq: 2289.773757) + B"1000_0_0000_0111101_0000000" when B"10101000", -- 359 ré 358 (freq: 2289.773757) + B"1000_0_0000_0111101_0000000" when B"10100111", -- 358 ré 358 (freq: 2289.773757) + B"0100_0_0000_0111101_0000000" when B"10100110", -- 357 ré 356 (freq: 2304.516853) + B"0100_0_0000_0111101_0000000" when B"10100101", -- 356 ré 356 (freq: 2304.516853) + B"0010_0_0000_0111101_0000000" when B"10100100", -- 355 ré 354 (freq: 2319.354874) + B"0010_0_0000_0111101_0000000" when B"10100011", -- 354 ré 354 (freq: 2319.354874) + B"0001_0_0000_0111101_0000000" when B"10100010", -- 353 ré 352 (freq: 2334.288433) + B"0001_0_0000_0111101_0000000" when B"10100001", -- 352 ré 352 (freq: 2334.288433) + B"0001_0_0000_0111101_0000000" when B"10100000", -- 351 ré 349 (freq: 2349.318144) + B"0001_0_0000_0111101_0000000" when B"10011111", -- 350 ré 349 (freq: 2349.318144) + B"0000_1_0000_0111101_0000000" when B"10011110", -- 349 ré 349 (freq: 2349.318144) + B"0000_0_1000_0111101_0000000" when B"10011101", -- 348 ré 347 (freq: 2364.444626) + B"0000_0_1000_0111101_0000000" when B"10011100", -- 347 ré 347 (freq: 2364.444626) + B"0000_0_0100_0111101_0000000" when B"10011011", -- 346 ré 345 (freq: 2379.668502) + B"0000_0_0100_0111101_0000000" when B"10011010", -- 345 ré 345 (freq: 2379.668502) + B"0000_0_0010_0111101_0000000" when B"10011001", -- 344 ré 343 (freq: 2394.990401) + B"0000_0_0010_0111101_0000000" when B"10011000", -- 343 ré 343 (freq: 2394.990401) + B"0000_0_0001_0111101_0000000" when B"10010111", -- 342 ré 341 (freq: 2410.410951) + B"0000_0_0001_0111101_0000000" when B"10010110", -- 341 ré 341 (freq: 2410.410951) + B"1000_0_0000_1001111_0011111" when B"10010101", -- 340 mib 338 (freq: 2425.930790) + B"1000_0_0000_1001111_0011111" when B"10010100", -- 339 mib 338 (freq: 2425.930790) + B"1000_0_0000_1001111_0011111" when B"10010011", -- 338 mib 338 (freq: 2425.930790) + B"0100_0_0000_1001111_0011111" when B"10010010", -- 337 mib 336 (freq: 2441.550556) + B"0100_0_0000_1001111_0011111" when B"10010001", -- 336 mib 336 (freq: 2441.550556) + B"0010_0_0000_1001111_0011111" when B"10010000", -- 335 mib 334 (freq: 2457.270892) + B"0010_0_0000_1001111_0011111" when B"10001111", -- 334 mib 334 (freq: 2457.270892) + B"0001_0_0000_1001111_0011111" when B"10001110", -- 333 mib 332 (freq: 2473.092446) + B"0001_0_0000_1001111_0011111" when B"10001101", -- 332 mib 332 (freq: 2473.092446) + B"0001_0_0000_1001111_0011111" when B"10001100", -- 331 mib 330 (freq: 2489.015870) + B"0000_1_0000_1001111_0011111" when B"10001011", -- 330 mib 330 (freq: 2489.015870) + B"0000_0_1000_1001111_0011111" when B"10001010", -- 329 mib 328 (freq: 2505.041820) + B"0000_0_1000_1001111_0011111" when B"10001001", -- 328 mib 328 (freq: 2505.041820) + B"0000_0_0100_1001111_0011111" when B"10001000", -- 327 mib 326 (freq: 2521.170955) + B"0000_0_0100_1001111_0011111" when B"10000111", -- 326 mib 326 (freq: 2521.170955) + B"0000_0_0010_1001111_0011111" when B"10000110", -- 325 mib 324 (freq: 2537.403941) + B"0000_0_0010_1001111_0011111" when B"10000101", -- 324 mib 324 (freq: 2537.403941) + B"0000_0_0001_1001111_0011111" when B"10000100", -- 323 mib 321 (freq: 2553.741445) + B"0000_0_0001_1001111_0011111" when B"10000011", -- 322 mib 321 (freq: 2553.741445) + B"0000_0_0001_1001111_0011111" when B"10000010", -- 321 mib 321 (freq: 2553.741445) + B"1000_0_0000_1001111_0000000" when B"10000001", -- 320 mi 319 (freq: 2570.184141) + B"1000_0_0000_1001111_0000000" when B"10000000", -- 319 mi 319 (freq: 2570.184141) + B"0100_0_0000_1001111_0000000" when B"01111111", -- 318 mi 317 (freq: 2586.732707) + B"0100_0_0000_1001111_0000000" when B"01111110", -- 317 mi 317 (freq: 2586.732707) + B"0010_0_0000_1001111_0000000" when B"01111101", -- 316 mi 315 (freq: 2603.387823) + B"0010_0_0000_1001111_0000000" when B"01111100", -- 315 mi 315 (freq: 2603.387823) + B"0001_0_0000_1001111_0000000" when B"01111011", -- 314 mi 313 (freq: 2620.150175) + B"0001_0_0000_1001111_0000000" when B"01111010", -- 313 mi 313 (freq: 2620.150175) + B"0001_0_0000_1001111_0000000" when B"01111001", -- 312 mi 311 (freq: 2637.020456) + B"0000_1_0000_1001111_0000000" when B"01111000", -- 311 mi 311 (freq: 2637.020456) + B"0000_0_1000_1001111_0000000" when B"01110111", -- 310 mi 309 (freq: 2653.999358) + B"0000_0_1000_1001111_0000000" when B"01110110", -- 309 mi 309 (freq: 2653.999358) + B"0000_0_0100_1001111_0000000" when B"01110101", -- 308 mi 307 (freq: 2671.087581) + B"0000_0_0100_1001111_0000000" when B"01110100", -- 307 mi 307 (freq: 2671.087581) + B"0000_0_0010_1001111_0000000" when B"01110011", -- 306 mi 305 (freq: 2688.285831) + B"0000_0_0010_1001111_0000000" when B"01110010", -- 305 mi 305 (freq: 2688.285831) + B"0000_0_0001_1001111_0000000" when B"01110001", -- 304 mi 303 (freq: 2705.594814) + B"0000_0_0001_1001111_0000000" when B"01110000", -- 303 mi 303 (freq: 2705.594814) + B"1000_0_0000_1000111_0000000" when B"01101111", -- 302 fa 302 (freq: 2723.015243) + B"0100_0_0000_1000111_0000000" when B"01101110", -- 301 fa 300 (freq: 2740.547838) + B"0100_0_0000_1000111_0000000" when B"01101101", -- 300 fa 300 (freq: 2740.547838) + B"0010_0_0000_1000111_0000000" when B"01101100", -- 299 fa 298 (freq: 2758.193318) + B"0010_0_0000_1000111_0000000" when B"01101011", -- 298 fa 298 (freq: 2758.193318) + B"0001_0_0000_1000111_0000000" when B"01101010", -- 297 fa 296 (freq: 2775.952413) + B"0001_0_0000_1000111_0000000" when B"01101001", -- 296 fa 296 (freq: 2775.952413) + B"0001_0_0000_1000111_0000000" when B"01101000", -- 295 fa 294 (freq: 2793.825852) + B"0000_1_0000_1000111_0000000" when B"01100111", -- 294 fa 294 (freq: 2793.825852) + B"0000_0_1000_1000111_0000000" when B"01100110", -- 293 fa 292 (freq: 2811.814372) + B"0000_0_1000_1000111_0000000" when B"01100101", -- 292 fa 292 (freq: 2811.814372) + B"0000_0_0100_1000111_0000000" when B"01100100", -- 291 fa 290 (freq: 2829.918714) + B"0000_0_0100_1000111_0000000" when B"01100011", -- 290 fa 290 (freq: 2829.918714) + B"0000_0_0010_1000111_0000000" when B"01100010", -- 289 fa 288 (freq: 2848.139625) + B"0000_0_0010_1000111_0000000" when B"01100001", -- 288 fa 288 (freq: 2848.139625) + B"0000_0_0001_1000111_0000000" when B"01100000", -- 287 fa 286 (freq: 2866.477853) + B"0000_0_0001_1000111_0000000" when B"01011111", -- 286 fa 286 (freq: 2866.477853) + B"1000_0_0000_1111011_0011111" when B"01011110", -- 285 solb 285 (freq: 2884.934156) + B"0100_0_0000_1111011_0011111" when B"01011101", -- 284 solb 283 (freq: 2903.509292) + B"0100_0_0000_1111011_0011111" when B"01011100", -- 283 solb 283 (freq: 2903.509292) + B"0010_0_0000_1111011_0011111" when B"01011011", -- 282 solb 281 (freq: 2922.204028) + B"0010_0_0000_1111011_0011111" when B"01011010", -- 281 solb 281 (freq: 2922.204028) + B"0001_0_0000_1111011_0011111" when B"01011001", -- 280 solb 279 (freq: 2941.019133) + B"0001_0_0000_1111011_0011111" when B"01011000", -- 279 solb 279 (freq: 2941.019133) + B"0001_0_0000_1111011_0011111" when B"01010111", -- 278 solb 277 (freq: 2959.955382) + B"0000_0_0000_1111011_0011111" when B"01010110", -- 277 solb 277 (freq: 2959.955382) + B"0000_0_1000_1111011_0011111" when B"01010101", -- 276 solb 276 (freq: 2979.013555) + B"0000_0_0100_1111011_0011111" when B"01010100", -- 275 solb 274 (freq: 2998.194438) + B"0000_0_0100_1111011_0011111" when B"01010011", -- 274 solb 274 (freq: 2998.194438) + B"0000_0_0010_1111011_0011111" when B"01010010", -- 273 solb 272 (freq: 3017.498820) + B"0000_0_0010_1111011_0011111" when B"01010001", -- 272 solb 272 (freq: 3017.498820) + B"0000_0_0001_1111011_0011111" when B"01010000", -- 271 solb 270 (freq: 3036.927496) + B"0000_0_0001_1111011_0011111" when B"01001111", -- 270 solb 270 (freq: 3036.927496) + B"1000_0_0000_1111011_0000000" when B"01001110", -- 269 sol 269 (freq: 3056.481268) + B"0100_0_0000_1111011_0000000" when B"01001101", -- 268 sol 267 (freq: 3076.160939) + B"0100_0_0000_1111011_0000000" when B"01001100", -- 267 sol 267 (freq: 3076.160939) + B"0010_0_0000_1111011_0000000" when B"01001011", -- 266 sol 265 (freq: 3095.967322) + B"0010_0_0000_1111011_0000000" when B"01001010", -- 265 sol 265 (freq: 3095.967322) + B"0001_0_0000_1111011_0000000" when B"01001001", -- 264 sol 264 (freq: 3115.901231) + B"0001_0_0000_1111011_0000000" when B"01001000", -- 263 sol 262 (freq: 3135.963488) + B"0000_1_0000_1111011_0000000" when B"01000111", -- 262 sol 262 (freq: 3135.963488) + B"0000_0_1000_1111011_0000000" when B"01000110", -- 261 sol 260 (freq: 3156.154919) + B"0000_0_1000_1111011_0000000" when B"01000101", -- 260 sol 260 (freq: 3156.154919) + B"0000_0_0100_1111011_0000000" when B"01000100", -- 259 sol 259 (freq: 3176.476357) + B"0000_0_0010_1111011_0000000" when B"01000011", -- 258 sol 257 (freq: 3196.928637) + B"0000_0_0010_1111011_0000000" when B"01000010", -- 257 sol 257 (freq: 3196.928637) + B"0000_0_0001_1111011_0000000" when B"01000001", -- 256 sol 255 (freq: 3217.512603) + B"0000_0_0001_1111011_0000000" when B"01000000", -- 255 sol 255 (freq: 3217.512603) + B"1000_0_0000_1110111_0011111" when B"00111111", -- 254 lab 254 (freq: 3238.229102) + B"0100_0_0000_1110111_0011111" when B"00111110", -- 253 lab 252 (freq: 3259.078988) + B"0100_0_0000_1110111_0011111" when B"00111101", -- 252 lab 252 (freq: 3259.078988) + B"0010_0_0000_1110111_0011111" when B"00111100", -- 251 lab 250 (freq: 3280.063119) + B"0010_0_0000_1110111_0011111" when B"00111011", -- 250 lab 250 (freq: 3280.063119) + B"0001_0_0000_1110111_0011111" when B"00111010", -- 249 lab 249 (freq: 3301.182360) + B"0001_0_0000_1110111_0011111" when B"00111001", -- 248 lab 247 (freq: 3322.437581) + B"0000_1_0000_1110111_0011111" when B"00111000", -- 247 lab 247 (freq: 3322.437581) + B"0000_0_1000_1110111_0011111" when B"00110111", -- 246 lab 246 (freq: 3343.829657) + B"0000_0_0100_1110111_0011111" when B"00110110", -- 245 lab 244 (freq: 3365.359470) + B"0000_0_0100_1110111_0011111" when B"00110101", -- 244 lab 244 (freq: 3365.359470) + B"0000_0_0010_1110111_0011111" when B"00110100", -- 243 lab 243 (freq: 3387.027906) + B"0000_0_0001_1110111_0011111" when B"00110011", -- 242 lab 241 (freq: 3408.835858) + B"0000_0_0001_1110111_0011111" when B"00110010", -- 241 lab 241 (freq: 3408.835858) + B"1000_0_0000_1110111_0000000" when B"00110001", -- 240 la 239 (freq: 3430.784224) + B"1000_0_0000_1110111_0000000" when B"00110000", -- 239 la 239 (freq: 3430.784224) + B"0100_0_0000_1110111_0000000" when B"00101111", -- 238 la 238 (freq: 3452.873909) + B"0010_0_0000_1110111_0000000" when B"00101110", -- 237 la 236 (freq: 3475.105822) + B"0010_0_0000_1110111_0000000" when B"00101101", -- 236 la 236 (freq: 3475.105822) + B"0001_0_0000_1110111_0000000" when B"00101100", -- 235 la 235 (freq: 3497.480878) + B"0001_0_0000_1110111_0000000" when B"00101011", -- 234 la 233 (freq: 3520.000000) + B"0000_1_0000_1110111_0000000" when B"00101010", -- 233 la 233 (freq: 3520.000000) + B"0000_0_1000_1110111_0000000" when B"00101001", -- 232 la 232 (freq: 3542.664116) + B"0000_0_0100_1110111_0000000" when B"00101000", -- 231 la 230 (freq: 3565.474158) + B"0000_0_0100_1110111_0000000" when B"00100111", -- 230 la 230 (freq: 3565.474158) + B"0000_0_0010_1110111_0000000" when B"00100110", -- 229 la 229 (freq: 3588.431066) + B"0000_0_0001_1110111_0000000" when B"00100101", -- 228 la 227 (freq: 3611.535786) + B"0000_0_0001_1110111_0000000" when B"00100100", -- 227 la 227 (freq: 3611.535786) + B"1000_0_0000_0011111_0011111" when B"00100011", -- 226 sib 226 (freq: 3634.789270) + B"0100_0_0000_0011111_0011111" when B"00100010", -- 225 sib 225 (freq: 3658.192476) + B"0010_0_0000_0011111_0011111" when B"00100001", -- 224 sib 223 (freq: 3681.746367) + B"0010_0_0000_0011111_0011111" when B"00100000", -- 223 sib 223 (freq: 3681.746367) + B"0001_0_0000_0011111_0011111" when B"00011111", -- 222 sib 222 (freq: 3705.451914) + B"0001_0_0000_0011111_0011111" when B"00011110", -- 221 sib 220 (freq: 3729.310092) + B"0000_1_0000_0011111_0011111" when B"00011101", -- 220 sib 220 (freq: 3729.310092) + B"0000_0_1000_0011111_0011111" when B"00011100", -- 219 sib 219 (freq: 3753.321886) + B"0000_0_0100_0011111_0011111" when B"00011011", -- 218 sib 217 (freq: 3777.488284) + B"0000_0_0100_0011111_0011111" when B"00011010", -- 217 sib 217 (freq: 3777.488284) + B"0000_0_0010_0011111_0011111" when B"00011001", -- 216 sib 216 (freq: 3801.810281) + B"0000_0_0001_0011111_0011111" when B"00011000", -- 215 sib 215 (freq: 3826.288880) + B"1000_0_0000_0011111_0000000" when B"00010111", -- 214 si 213 (freq: 3850.925088) + B"1000_0_0000_0011111_0000000" when B"00010110", -- 213 si 213 (freq: 3850.925088) + B"0100_0_0000_0011111_0000000" when B"00010101", -- 212 si 212 (freq: 3875.719920) + B"0010_0_0000_0011111_0000000" when B"00010100", -- 211 si 211 (freq: 3900.674399) + B"0001_0_0000_0011111_0000000" when B"00010011", -- 210 si 209 (freq: 3925.789550) + B"0001_0_0000_0011111_0000000" when B"00010010", -- 209 si 209 (freq: 3925.789550) + B"0000_1_0000_0011111_0000000" when B"00010001", -- 208 si 208 (freq: 3951.066410) + B"0000_0_1000_0011111_0000000" when B"00010000", -- 207 si 207 (freq: 3976.506020) + B"0000_0_0100_0011111_0000000" when B"00001111", -- 206 si 205 (freq: 4002.109426) + B"0000_0_0100_0011111_0000000" when B"00001110", -- 205 si 205 (freq: 4002.109426) + B"0000_0_0010_0011111_0000000" when B"00001101", -- 204 si 204 (freq: 4027.877685) + B"0000_0_0001_0011111_0000000" when B"00001100", -- 203 si 203 (freq: 4053.811856) + B"1000_0_0000_1001110_0000000" when B"00001011", -- 202 do 201 (freq: 4079.913010) + B"1000_0_0000_1001110_0000000" when B"00001010", -- 201 do 201 (freq: 4079.913010) + B"0100_0_0000_1001110_0000000" when B"00001001", -- 200 do 200 (freq: 4106.182220) + B"0010_0_0000_1001110_0000000" when B"00001000", -- 199 do 199 (freq: 4132.620568) + B"0001_0_0000_1001110_0000000" when B"00000111", -- 198 do 198 (freq: 4159.229145) + B"0001_0_0000_1001110_0000000" when B"00000110", -- 197 do 196 (freq: 4186.009045) + B"0000_1_0000_1001110_0000000" when B"00000101", -- 196 do 196 (freq: 4186.009045) + B"0000_0_1000_1001110_0000000" when B"00000100", -- 195 do 195 (freq: 4212.961372) + B"0000_0_0100_1001110_0000000" when B"00000011", -- 194 do 194 (freq: 4240.087237) + B"0000_0_0010_1001110_0000000" when B"00000010", -- 193 do 193 (freq: 4267.387756) + B"0000_0_0001_1001110_0000000" when B"00000001", -- 192 do 191 (freq: 4294.864053) + B"0000_0_0001_1001110_0000000" when B"00000000", -- 191 do 191 (freq: 4294.864053) + B"0000_0_0000_1111111_1111111" when others; +end; diff --git a/alliance/src/documentation/alliance-examples/tuner/tuner_io.c b/alliance/src/documentation/alliance-examples/tuner/tuner_io.c new file mode 100644 index 00000000..c9b2fcfd --- /dev/null +++ b/alliance/src/documentation/alliance-examples/tuner/tuner_io.c @@ -0,0 +1,33 @@ +#include + +int main(void) +{ + int i; + + GENLIB_DEF_LOFIG("tuner"); + GENLIB_LOCON("ck", IN, "ck"); + GENLIB_LOCON("d", IN, "d"); + GENLIB_LOCON("o[0:22]", OUT, "o[0:22]"); + GENLIB_LOCON("vdde", IN, "vdde"); + GENLIB_LOCON("vddi", IN, "vddi"); + GENLIB_LOCON("vsse", IN, "vsse"); + GENLIB_LOCON("vssi", IN, "vssi"); + GENLIB_LOINS("tuner_o", "core", "ckc", "di", "oi[0:22]", "vddi", "vssi", 0); + GENLIB_LOINS("pck_sp", "pck", "ck", "cki", "vdde", "vddi", "vsse", "vssi", 0); + GENLIB_LOINS("pi_sp", "pd", "d", "di", "cki", "vdde", "vddi", "vsse", "vssi", 0); + /* outputs */ + for (i = 0; i < 23; i++) + GENLIB_LOINS("po_sp", GENLIB_NAME("po%d", i), + GENLIB_ELM("oi", i), + GENLIB_ELM("o", i), + "cki", "vdde", "vddi", "vsse", "vssi", 0); + /* Power supplies for the buffers */ + GENLIB_LOINS("pvddeck_sp", "pvdde", "ckc", "cki", "vdde", "vddi", "vsse", "vssi", 0); + GENLIB_LOINS("pvsseck_sp", "pvsse", "ckc", "cki", "vdde", "vddi", "vsse", "vssi", 0); + /* Power supplies for the core */ + GENLIB_LOINS("pvddick_sp", "pvddi", "ckc", "cki", "vdde", "vddi", "vsse", "vssi", 0); + GENLIB_LOINS("pvssick_sp", "pvssi", "ckc", "cki", "vdde", "vddi", "vsse", "vssi", 0); + + GENLIB_SAVE_LOFIG(); + exit(0); +}