From 59edd60882aaab7e9e9d801c68d52f03f80b731b Mon Sep 17 00:00:00 2001
From: Christophe Alexandre <alliance-cvs@asim.lip6.fr>
Date: Wed, 9 Oct 2002 19:54:19 +0000
Subject: [PATCH] old references

---
 alliance/src/mbk/man5/catal.5 | 4 ++--
 alliance/src/mbk/man5/vbe.5   | 4 ++--
 alliance/src/mbk/man5/vhdl.5  | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/alliance/src/mbk/man5/catal.5 b/alliance/src/mbk/man5/catal.5
index 394a8ff3..21d1b639 100644
--- a/alliance/src/mbk/man5/catal.5
+++ b/alliance/src/mbk/man5/catal.5
@@ -1,4 +1,4 @@
-.\"   $Id: catal.5,v 1.1 2002/09/24 08:44:43 czo Exp $
+.\"   $Id: catal.5,v 1.2 2002/10/09 19:54:19 xtof Exp $
 .\" @(#)catal.2 2.11 91/08/22 ; Labo masi cao-vlsi; Author : Frederic Petrot
 .TH CATAL 5 "October 1, 1997" "ASIM/LIP6" "ALLIANCE FILE FORMATS"
 .if t \{\
@@ -127,7 +127,7 @@ tie_y   F
 .fi
 .SH SEE ALSO
 .BR mbk (1),
-.BR sclib (1),
+.BR sxlib (1),
 .BR incatalog (3),
 .BR incatalogdelete (3),
 .BR incatalogfeed (3),
diff --git a/alliance/src/mbk/man5/vbe.5 b/alliance/src/mbk/man5/vbe.5
index cf589d96..9df80764 100644
--- a/alliance/src/mbk/man5/vbe.5
+++ b/alliance/src/mbk/man5/vbe.5
@@ -1,4 +1,4 @@
-.\"   $Id: vbe.5,v 1.1 2002/09/24 08:44:44 czo Exp $
+.\"   $Id: vbe.5,v 1.2 2002/10/09 19:54:19 xtof Exp $
 .\" @(#)VBE.5 1.0 Jan 28 1992 UPMC ; VUONG H.N.
 .TH VBE 5 "October 1, 1997" "ASIM/LIP6" "VHDL subset of ASIM/LIP6/CAO-VLSI lab."
 
@@ -276,7 +276,7 @@ end;
 
 .SH SEE ALSO
 .PP
-vhdl(5), vst(5), bop(1), glop(1), scmap(1), c4map(1), asimut(1), proof(1), yagle(1)
+vhdl(5), vst(5), boom(1), loon(1), boog(1), asimut(1), proof(1)
 
 
 .so man1/alc_bug_report.1
diff --git a/alliance/src/mbk/man5/vhdl.5 b/alliance/src/mbk/man5/vhdl.5
index d911b749..6b620429 100644
--- a/alliance/src/mbk/man5/vhdl.5
+++ b/alliance/src/mbk/man5/vhdl.5
@@ -1,4 +1,4 @@
-.\"   $Id: vhdl.5,v 1.1 2002/09/24 08:44:44 czo Exp $
+.\"   $Id: vhdl.5,v 1.2 2002/10/09 19:54:19 xtof Exp $
 .\" @(#)vhdl.5 1.0 Jan 28 1993 UPMC ; VUONG H.N.
 .TH VHDL 5 "October 1, 1997" "ASIM/LIP6" "VHDL subset of ASIM/LIP6/CAO-VLSI lab."
 
@@ -126,7 +126,7 @@ In the next ALLIANCE release the VHDL subset will be largely extended
 
 .SH SEE ALSO
 .PP
-vst(5), vbe(5), asimut(1), bop(1), glop(1), scmap(1), c4map(1),  proof(1), yagle(1)
+vst(5), vbe(5), asimut(1), boom(1), loon(1), boog(1), proof(1)
 
 
 .so man1/alc_bug_report.1