From 574e26cc30868b3984ca6406716dfa63e489f1be Mon Sep 17 00:00:00 2001 From: Ludovic Jacomme Date: Sun, 23 May 2004 19:10:08 +0000 Subject: [PATCH] - Multiplier 16 bits with output registers --- .../alliance-examples/multi16b-reg/Makefile | 314 ++++++ .../multi16b-reg/multi16.ioc | 72 ++ .../multi16b-reg/multi16.lax | 294 ++++++ .../multi16b-reg/multi16.pat | 928 ++++++++++++++++++ .../multi16b-reg/multi16.vhdl | 369 +++++++ 5 files changed, 1977 insertions(+) create mode 100644 alliance/src/documentation/alliance-examples/multi16b-reg/Makefile create mode 100644 alliance/src/documentation/alliance-examples/multi16b-reg/multi16.ioc create mode 100644 alliance/src/documentation/alliance-examples/multi16b-reg/multi16.lax create mode 100644 alliance/src/documentation/alliance-examples/multi16b-reg/multi16.pat create mode 100644 alliance/src/documentation/alliance-examples/multi16b-reg/multi16.vhdl diff --git a/alliance/src/documentation/alliance-examples/multi16b-reg/Makefile b/alliance/src/documentation/alliance-examples/multi16b-reg/Makefile new file mode 100644 index 00000000..5829c6b5 --- /dev/null +++ b/alliance/src/documentation/alliance-examples/multi16b-reg/Makefile @@ -0,0 +1,314 @@ +# /*------------------------------------------------------------\ +# | | +# | File : Makefile | +# | | +# | Author : Jacomme Ludovic | +# | | +# \------------------------------------------------------------*/ +# /*------------------------------------------------------------\ +# | | +# | Cells | +# | | +# \------------------------------------------------------------*/ +# /*------------------------------------------------------------\ +# | | +# | Binary | +# | | +# \------------------------------------------------------------*/ + +ALLIANCE_BIN = $(ALLIANCE_TOP)/bin + +VASY = $(ALLIANCE_BIN)/vasy +ASIMUT = $(ALLIANCE_BIN)/asimut +BOOM = $(ALLIANCE_BIN)/boom +BOOG = $(ALLIANCE_BIN)/boog +LOON = $(ALLIANCE_BIN)/loon +OCP = $(ALLIANCE_BIN)/ocp +OCR = $(ALLIANCE_BIN)/ocr +NERO = $(ALLIANCE_BIN)/nero +COUGAR = $(ALLIANCE_BIN)/cougar +LVX = $(ALLIANCE_BIN)/lvx +DRUC = $(ALLIANCE_BIN)/druc +S2R = $(ALLIANCE_BIN)/s2r + +DREAL = $(ALLIANCE_BIN)/dreal +GRAAL = $(ALLIANCE_BIN)/graal +XSCH = $(ALLIANCE_BIN)/xsch +XPAT = $(ALLIANCE_BIN)/xpat +XFSM = $(ALLIANCE_BIN)/xfsm + +TOUCH = touch + +TARGET_LIB = $(ALLIANCE_TOP)/cells/sxlib +RDS_TECHNO_SYMB = ../etc/techno-symb.rds +RDS_TECHNO = ../etc/techno-035.rds +SPI_MODEL = $(ALLIANCE_TOP)/etc/spimodel.cfg +METAL_LEVEL = 8 + +# /*------------------------------------------------------------\ +# | | +# | Environement | +# | | +# \------------------------------------------------------------*/ + +ENV_VASY = MBK_WORK_LIB=.; export MBK_WORK_LIB;\ + MBK_CATAL_NAME=NO_CATAL; export MBK_CATAL_NAME + +ENV_BOOM = MBK_WORK_LIB=.; export MBK_WORK_LIB;\ + MBK_CATAL_NAME=CATAL; export MBK_CATAL_NAME + +ENV_BOOG = MBK_WORK_LIB=.; export MBK_WORK_LIB; \ + MBK_IN_LO=vst; export MBK_IN_LO; \ + MBK_OUT_LO=vst; export MBK_OUT_LO; \ + MBK_TARGET_LIB=$(TARGET_LIB); export MBK_TARGET_LIB; \ + MBK_CATAL_NAME=CATAL; export MBK_CATAL_NAME + +ENV_LOON = MBK_WORK_LIB=.; export MBK_WORK_LIB; \ + MBK_IN_LO=vst; export MBK_IN_LO; \ + MBK_OUT_LO=vst; export MBK_OUT_LO; \ + MBK_TARGET_LIB=$(TARGET_LIB); export MBK_TARGET_LIB; \ + MBK_CATA_LIB=$(TARGET_LIB); export MBK_CATA_LIB; \ + MBK_CATAL_NAME=CATAL; export MBK_CATAL_NAME + + +ENV_ASIMUT_VASY = MBK_WORK_LIB=.; export MBK_WORK_LIB;\ + MBK_CATAL_NAME=CATAL_ASIMUT_VASY; export MBK_CATAL_NAME;\ + MBK_IN_LO=vst; export MBK_IN_LO;\ + MBK_OUT_LO=vst; export MBK_OUT_LO + +ENV_ASIMUT_SYNTH = MBK_WORK_LIB=.; export MBK_WORK_LIB;\ + MBK_CATAL_NAME=CATAL; export MBK_CATAL_NAME;\ + MBK_CATA_LIB=$(TARGET_LIB); export MBK_CATA_LIB; \ + MBK_IN_LO=vst; export MBK_IN_LO;\ + MBK_OUT_LO=vst; export MBK_OUT_LO + +ENV_OCP = MBK_WORK_LIB=.; export MBK_WORK_LIB; \ + MBK_IN_LO=vst; export MBK_IN_LO; \ + MBK_OUT_LO=vst; export MBK_OUT_LO; \ + MBK_CATA_LIB=$(TARGET_LIB); export MBK_CATA_LIB; \ + MBK_IN_PH=ap; export MBK_IN_PH; \ + MBK_OUT_PH=ap; export MBK_OUT_PH; \ + MBK_CATAL_NAME=CATAL; export MBK_CATAL_NAME + +ENV_OCR = MBK_WORK_LIB=.; export MBK_WORK_LIB; \ + MBK_IN_LO=vst; export MBK_IN_LO; \ + MBK_OUT_LO=vst; export MBK_OUT_LO; \ + MBK_CATA_LIB=$(TARGET_LIB); export MBK_CATA_LIB; \ + MBK_IN_PH=ap; export MBK_IN_PH; \ + MBK_OUT_PH=ap; export MBK_OUT_PH; \ + MBK_CATAL_NAME=CATAL; export MBK_CATAL_NAME + +ENV_COUGAR_SPI = MBK_WORK_LIB=.; export MBK_WORK_LIB; \ + MBK_IN_LO=spi; export MBK_IN_LO; \ + MBK_OUT_LO=spi; export MBK_OUT_LO; \ + MBK_SPI_MODEL=$(SPI_MODEL); export MBK_SPI_MODEL; \ + MBK_SPI_NAMEDNODES="true"; export MBK_SPI_NAMEDNODES; \ + RDS_TECHNO_NAME=$(RDS_TECHNO); export RDS_TECHNO_NAME; \ + RDS_IN=cif; export RDS_IN; \ + RDS_OUT=cif; export RDS_OUT; \ + MBK_CATA_LIB=$(TARGET_LIB); export MBK_CATA_LIB; \ + MBK_IN_PH=ap; export MBK_IN_PH; \ + MBK_OUT_PH=ap; export MBK_OUT_PH; \ + MBK_CATAL_NAME=CATAL; export MBK_CATAL_NAME + +ENV_COUGAR = MBK_WORK_LIB=.; export MBK_WORK_LIB; \ + MBK_IN_LO=al; export MBK_IN_LO; \ + MBK_OUT_LO=al; export MBK_OUT_LO; \ + RDS_TECHNO_NAME=$(RDS_TECHNO); export RDS_TECHNO_NAME; \ + RDS_IN=cif; export RDS_IN; \ + RDS_OUT=cif; export RDS_OUT; \ + MBK_CATA_LIB=$(TARGET_LIB); export MBK_CATA_LIB; \ + MBK_IN_PH=ap; export MBK_IN_PH; \ + MBK_OUT_PH=ap; export MBK_OUT_PH; \ + MBK_CATAL_NAME=CATAL; export MBK_CATAL_NAME + +ENV_LVX = MBK_WORK_LIB=.; export MBK_WORK_LIB; \ + MBK_IN_LO=vst; export MBK_IN_LO; \ + MBK_OUT_LO=vst; export MBK_OUT_LO; \ + MBK_CATA_LIB=$(TARGET_LIB); export MBK_CATA_LIB; \ + MBK_CATAL_NAME=CATAL; export MBK_CATAL_NAME + +ENV_DRUC = MBK_WORK_LIB=.; export MBK_WORK_LIB; \ + RDS_TECHNO_NAME=$(RDS_TECHNO_SYMB); export RDS_TECHNO_NAME; \ + MBK_IN_PH=ap; export MBK_IN_PH; \ + MBK_OUT_PH=ap; export MBK_OUT_PH; \ + MBK_CATA_LIB=$(TARGET_LIB); export MBK_CATA_LIB; \ + MBK_CATAL_NAME=CATAL; export MBK_CATAL_NAME + +ENV_S2R = MBK_WORK_LIB=.; export MBK_WORK_LIB; \ + RDS_TECHNO_NAME=$(RDS_TECHNO); export RDS_TECHNO_NAME; \ + RDS_IN=cif; export RDS_IN; \ + RDS_OUT=cif; export RDS_OUT; \ + MBK_IN_PH=ap; export MBK_IN_PH; \ + MBK_OUT_PH=ap; export MBK_OUT_PH; \ + MBK_CATA_LIB=$(TARGET_LIB); export MBK_CATA_LIB; \ + MBK_CATAL_NAME=CATAL; export MBK_CATAL_NAME + + +all : multi16.cif + +# /*------------------------------------------------------------\ +# | | +# | Vasy | +# | | +# \------------------------------------------------------------*/ + +multi16.vbe : multi16.vhdl + $(ENV_VASY); $(VASY) -a -B -L -o -p -I vhdl multi16 + +# /*------------------------------------------------------------\ +# | | +# | Asimut | +# | | +# \------------------------------------------------------------*/ + +res_vasy_1.pat : multi16.vbe + $(ENV_ASIMUT_VASY); $(ASIMUT) -b multi16 multi16 res_vasy_1 + +res_synth_1.pat : multi16.vst + $(ENV_ASIMUT_SYNTH); $(ASIMUT) multi16 multi16 res_synth_1 + +res_synth_2.pat : + $(ENV_ASIMUT_SYNTH); $(ASIMUT) -zd multi16 multi16 res_synth_2 + +# /*------------------------------------------------------------\ +# | | +# | Boom | +# | | +# \------------------------------------------------------------*/ + +boom.done : multi16_o.vbe + @$(TOUCH) boom.done + +multi16_o.vbe : multi16.vbe multi16.boom res_vasy_1.pat + $(ENV_BOOM); $(BOOM) -VAP multi16 multi16_o + +# /*------------------------------------------------------------\ +# | | +# | Boog | +# | | +# \------------------------------------------------------------*/ + +boog.done : multi16_o.vst + @$(TOUCH) boog.done + +multi16.vst : multi16_o.vbe + $(ENV_BOOG); $(BOOG) multi16_o multi16 + +# /*------------------------------------------------------------\ +# | | +# | Loon | +# | | +# \------------------------------------------------------------*/ + +loon.done : multi16.vst + @$(TOUCH) loon.done + +# multi16.vst : multi16_o.vst +# $(ENV_LOON); $(LOON) multi16_o multi16 + +# /*------------------------------------------------------------\ +# | | +# | OCP | +# | | +# \------------------------------------------------------------*/ + +multi16_p.ap : res_synth_1.pat + $(ENV_OCP); $(OCP) -v -gnuplot -ioc multi16 multi16 multi16_p + +# /*------------------------------------------------------------\ +# | | +# | OCR | +# | | +# \------------------------------------------------------------*/ + +multi16.ap : multi16_p.ap multi16.vst + $(ENV_OCR); $(OCR) -i 1000 -v -l $(METAL_LEVEL) -L multi16 -P multi16_p -O multi16 + +multi16_nero.ap : multi16_p.ap multi16.vst + $(ENV_OCR); $(NERO) -v -$(METAL_LEVEL) -p multi16_p multi16 multi16 + +# /*------------------------------------------------------------\ +# | | +# | Cougar | +# | | +# \------------------------------------------------------------*/ + +multi16_e.spi : multi16.ap + $(ENV_COUGAR_SPI); $(COUGAR) -v -ac multi16 multi16_e + +multi16_e.al : multi16.ap + $(ENV_COUGAR); $(COUGAR) -v -ac multi16 multi16_e + +multi16_et.al : multi16.ap + $(ENV_COUGAR); $(COUGAR) -v -ac -t multi16 multi16_et + +multi16_et.spi : multi16.ap + $(ENV_COUGAR_SPI); $(COUGAR) -v -ac -t multi16 multi16_et + +multi16_er.al : multi16.cif + $(ENV_COUGAR); $(COUGAR) -v -r -t multi16 multi16_er + +# /*------------------------------------------------------------\ +# | | +# | Lvx | +# | | +# \------------------------------------------------------------*/ + +lvx.done : multi16.vst multi16_e.al multi16_e.spi + $(ENV_LVX); $(LVX) vst al multi16 multi16_e -f + $(TOUCH) lvx.done + +# /*------------------------------------------------------------\ +# | | +# | Druc | +# | | +# \------------------------------------------------------------*/ + +druc.done : lvx.done multi16.ap + $(ENV_DRUC); $(DRUC) multi16 + $(TOUCH) druc.done + +# /*------------------------------------------------------------\ +# | | +# | S2R | +# | | +# \------------------------------------------------------------*/ + +multi16.cif : druc.done + $(ENV_S2R); $(S2R) -v multi16 + +# /*------------------------------------------------------------\ +# | | +# | TOOLS | +# | | +# \------------------------------------------------------------*/ + +graal: multi16.ap + $(ENV_S2R); $(GRAAL) -l multi16 + +xsch: multi16.vst + $(ENV_LOON); $(XSCH) -l multi16 + +xscht: multi16_et.al + $(ENV_COUGAR); $(XSCH) -l multi16_et + +xpat: res_synth_1.pat + $(ENV_ASIMUT_SYNTH); $(XPAT) -l res_synth_1 + +dreal: multi16.cif + $(ENV_S2R); $(DREAL) -l multi16 + + +# /*------------------------------------------------------------\ +# | | +# | Clean | +# | | +# \------------------------------------------------------------*/ + +realclean : clean + +clean : + $(RM) -f *.vst multi16_e.spi *.vbe res_*.pat *.boom *.done *.xsc *.gpl \ + *.ap *.drc *.dat *.gds *.cif *.rep *.stm-data *.stm-plot \ + *.log *.out *.raw *.al diff --git a/alliance/src/documentation/alliance-examples/multi16b-reg/multi16.ioc b/alliance/src/documentation/alliance-examples/multi16b-reg/multi16.ioc new file mode 100644 index 00000000..7de11926 --- /dev/null +++ b/alliance/src/documentation/alliance-examples/multi16b-reg/multi16.ioc @@ -0,0 +1,72 @@ + +TOP ( # IOs are ordered from left to right + (IOPIN x(15).0 ); + (IOPIN x(14).0 ); + (IOPIN x(13).0 ); + (IOPIN x(12).0 ); + (IOPIN x(11).0 ); + (IOPIN x(10).0 ); + (IOPIN x(9).0 ); + (IOPIN x(8).0 ); + (IOPIN x(7).0 ); + (IOPIN x(6).0 ); + (IOPIN x(5).0 ); + (IOPIN x(4).0 ); + (IOPIN x(3).0 ); + (IOPIN x(2).0 ); + (IOPIN x(1).0 ); + (IOPIN x(0).0 ); + (IOPIN y(15).0 ); + (IOPIN y(14).0 ); + (IOPIN y(13).0 ); + (IOPIN y(12).0 ); + (IOPIN y(11).0 ); + (IOPIN y(10).0 ); + (IOPIN y(9).0 ); + (IOPIN y(8).0 ); + (IOPIN y(7).0 ); + (IOPIN y(6).0 ); + (IOPIN y(5).0 ); + (IOPIN y(4).0 ); + (IOPIN y(3).0 ); + (IOPIN y(2).0 ); + (IOPIN y(1).0 ); + (IOPIN y(0).0 ); + (IOPIN ck.0 ); +) +BOTTOM ( # IOs are ordered from left to right + (IOPIN r(31).0 ); + (IOPIN r(30).0 ); + (IOPIN r(29).0 ); + (IOPIN r(28).0 ); + (IOPIN r(27).0 ); + (IOPIN r(26).0 ); + (IOPIN r(25).0 ); + (IOPIN r(24).0 ); + (IOPIN r(23).0 ); + (IOPIN r(22).0 ); + (IOPIN r(21).0 ); + (IOPIN r(20).0 ); + (IOPIN r(19).0 ); + (IOPIN r(18).0 ); + (IOPIN r(17).0 ); + (IOPIN r(16).0 ); + (IOPIN r(15).0 ); + (IOPIN r(14).0 ); + (IOPIN r(13).0 ); + (IOPIN r(12).0 ); + (IOPIN r(11).0 ); + (IOPIN r(10).0 ); + (IOPIN r(9).0 ); + (IOPIN r(8).0 ); + (IOPIN r(7).0 ); + (IOPIN r(6).0 ); + (IOPIN r(5).0 ); + (IOPIN r(4).0 ); + (IOPIN r(3).0 ); + (IOPIN r(2).0 ); + (IOPIN r(1).0 ); + (IOPIN r(0).0 ); +) +IGNORE ( # IOs are ignored(not placed) by IO Placer +) diff --git a/alliance/src/documentation/alliance-examples/multi16b-reg/multi16.lax b/alliance/src/documentation/alliance-examples/multi16b-reg/multi16.lax new file mode 100644 index 00000000..c4aadf7e --- /dev/null +++ b/alliance/src/documentation/alliance-examples/multi16b-reg/multi16.lax @@ -0,0 +1,294 @@ +## +## Generated by VASY +## +#S{ +rtlcarry_28_17; +rtlcarry_28_16; +rtlcarry_28_15; +rtlcarry_28_14; +rtlcarry_28_13; +rtlcarry_28_12; +rtlcarry_28_11; +rtlcarry_28_10; +rtlcarry_28_9; +rtlcarry_28_8; +rtlcarry_28_7; +rtlcarry_28_6; +rtlcarry_28_5; +rtlcarry_28_4; +rtlcarry_28_3; +rtlcarry_28_2; +rtlcarry_28_1; +rtlcarry_27_17; +rtlcarry_27_16; +rtlcarry_27_15; +rtlcarry_27_14; +rtlcarry_27_13; +rtlcarry_27_12; +rtlcarry_27_11; +rtlcarry_27_10; +rtlcarry_27_9; +rtlcarry_27_8; +rtlcarry_27_7; +rtlcarry_27_6; +rtlcarry_27_5; +rtlcarry_27_4; +rtlcarry_27_3; +rtlcarry_27_2; +rtlcarry_27_1; +rtlcarry_26_17; +rtlcarry_26_16; +rtlcarry_26_15; +rtlcarry_26_14; +rtlcarry_26_13; +rtlcarry_26_12; +rtlcarry_26_11; +rtlcarry_26_10; +rtlcarry_26_9; +rtlcarry_26_8; +rtlcarry_26_7; +rtlcarry_26_6; +rtlcarry_26_5; +rtlcarry_26_4; +rtlcarry_26_3; +rtlcarry_26_2; +rtlcarry_26_1; +rtlcarry_25_17; +rtlcarry_25_16; +rtlcarry_25_15; +rtlcarry_25_14; +rtlcarry_25_13; +rtlcarry_25_12; +rtlcarry_25_11; +rtlcarry_25_10; +rtlcarry_25_9; +rtlcarry_25_8; +rtlcarry_25_7; +rtlcarry_25_6; +rtlcarry_25_5; +rtlcarry_25_4; +rtlcarry_25_3; +rtlcarry_25_2; +rtlcarry_25_1; +rtlcarry_24_17; +rtlcarry_24_16; +rtlcarry_24_15; +rtlcarry_24_14; +rtlcarry_24_13; +rtlcarry_24_12; +rtlcarry_24_11; +rtlcarry_24_10; +rtlcarry_24_9; +rtlcarry_24_8; +rtlcarry_24_7; +rtlcarry_24_6; +rtlcarry_24_5; +rtlcarry_24_4; +rtlcarry_24_3; +rtlcarry_24_2; +rtlcarry_24_1; +rtlcarry_23_17; +rtlcarry_23_16; +rtlcarry_23_15; +rtlcarry_23_14; +rtlcarry_23_13; +rtlcarry_23_12; +rtlcarry_23_11; +rtlcarry_23_10; +rtlcarry_23_9; +rtlcarry_23_8; +rtlcarry_23_7; +rtlcarry_23_6; +rtlcarry_23_5; +rtlcarry_23_4; +rtlcarry_23_3; +rtlcarry_23_2; +rtlcarry_23_1; +rtlcarry_22_17; +rtlcarry_22_16; +rtlcarry_22_15; +rtlcarry_22_14; +rtlcarry_22_13; +rtlcarry_22_12; +rtlcarry_22_11; +rtlcarry_22_10; +rtlcarry_22_9; +rtlcarry_22_8; +rtlcarry_22_7; +rtlcarry_22_6; +rtlcarry_22_5; +rtlcarry_22_4; +rtlcarry_22_3; +rtlcarry_22_2; +rtlcarry_22_1; +rtlcarry_21_17; +rtlcarry_21_16; +rtlcarry_21_15; +rtlcarry_21_14; +rtlcarry_21_13; +rtlcarry_21_12; +rtlcarry_21_11; +rtlcarry_21_10; +rtlcarry_21_9; +rtlcarry_21_8; +rtlcarry_21_7; +rtlcarry_21_6; +rtlcarry_21_5; +rtlcarry_21_4; +rtlcarry_21_3; +rtlcarry_21_2; +rtlcarry_21_1; +rtlcarry_18_19; +rtlcarry_18_18; +rtlcarry_18_17; +rtlcarry_18_16; +rtlcarry_18_15; +rtlcarry_18_14; +rtlcarry_18_13; +rtlcarry_18_12; +rtlcarry_18_11; +rtlcarry_18_10; +rtlcarry_18_9; +rtlcarry_18_8; +rtlcarry_18_7; +rtlcarry_18_6; +rtlcarry_18_5; +rtlcarry_18_4; +rtlcarry_18_3; +rtlcarry_18_2; +rtlcarry_18_1; +rtlcarry_15_19; +rtlcarry_15_18; +rtlcarry_15_17; +rtlcarry_15_16; +rtlcarry_15_15; +rtlcarry_15_14; +rtlcarry_15_13; +rtlcarry_15_12; +rtlcarry_15_11; +rtlcarry_15_10; +rtlcarry_15_9; +rtlcarry_15_8; +rtlcarry_15_7; +rtlcarry_15_6; +rtlcarry_15_5; +rtlcarry_15_4; +rtlcarry_15_3; +rtlcarry_15_2; +rtlcarry_15_1; +rtlcarry_12_19; +rtlcarry_12_18; +rtlcarry_12_17; +rtlcarry_12_16; +rtlcarry_12_15; +rtlcarry_12_14; +rtlcarry_12_13; +rtlcarry_12_12; +rtlcarry_12_11; +rtlcarry_12_10; +rtlcarry_12_9; +rtlcarry_12_8; +rtlcarry_12_7; +rtlcarry_12_6; +rtlcarry_12_5; +rtlcarry_12_4; +rtlcarry_12_3; +rtlcarry_12_2; +rtlcarry_12_1; +rtlcarry_9_19; +rtlcarry_9_18; +rtlcarry_9_17; +rtlcarry_9_16; +rtlcarry_9_15; +rtlcarry_9_14; +rtlcarry_9_13; +rtlcarry_9_12; +rtlcarry_9_11; +rtlcarry_9_10; +rtlcarry_9_9; +rtlcarry_9_8; +rtlcarry_9_7; +rtlcarry_9_6; +rtlcarry_9_5; +rtlcarry_9_4; +rtlcarry_9_3; +rtlcarry_9_2; +rtlcarry_9_1; +rtlcarry_6_23; +rtlcarry_6_22; +rtlcarry_6_21; +rtlcarry_6_20; +rtlcarry_6_19; +rtlcarry_6_18; +rtlcarry_6_17; +rtlcarry_6_16; +rtlcarry_6_15; +rtlcarry_6_14; +rtlcarry_6_13; +rtlcarry_6_12; +rtlcarry_6_11; +rtlcarry_6_10; +rtlcarry_6_9; +rtlcarry_6_8; +rtlcarry_6_7; +rtlcarry_6_6; +rtlcarry_6_5; +rtlcarry_6_4; +rtlcarry_6_3; +rtlcarry_6_2; +rtlcarry_6_1; +rtlcarry_3_23; +rtlcarry_3_22; +rtlcarry_3_21; +rtlcarry_3_20; +rtlcarry_3_19; +rtlcarry_3_18; +rtlcarry_3_17; +rtlcarry_3_16; +rtlcarry_3_15; +rtlcarry_3_14; +rtlcarry_3_13; +rtlcarry_3_12; +rtlcarry_3_11; +rtlcarry_3_10; +rtlcarry_3_9; +rtlcarry_3_8; +rtlcarry_3_7; +rtlcarry_3_6; +rtlcarry_3_5; +rtlcarry_3_4; +rtlcarry_3_3; +rtlcarry_3_2; +rtlcarry_3_1; +rtlcarry_0_31; +rtlcarry_0_30; +rtlcarry_0_29; +rtlcarry_0_28; +rtlcarry_0_27; +rtlcarry_0_26; +rtlcarry_0_25; +rtlcarry_0_24; +rtlcarry_0_23; +rtlcarry_0_22; +rtlcarry_0_21; +rtlcarry_0_20; +rtlcarry_0_19; +rtlcarry_0_18; +rtlcarry_0_17; +rtlcarry_0_16; +rtlcarry_0_15; +rtlcarry_0_14; +rtlcarry_0_13; +rtlcarry_0_12; +rtlcarry_0_11; +rtlcarry_0_10; +rtlcarry_0_9; +rtlcarry_0_8; +rtlcarry_0_7; +rtlcarry_0_6; +rtlcarry_0_5; +rtlcarry_0_4; +rtlcarry_0_3; +rtlcarry_0_2; +rtlcarry_0_1; +} diff --git a/alliance/src/documentation/alliance-examples/multi16b-reg/multi16.pat b/alliance/src/documentation/alliance-examples/multi16b-reg/multi16.pat new file mode 100644 index 00000000..5e06743e --- /dev/null +++ b/alliance/src/documentation/alliance-examples/multi16b-reg/multi16.pat @@ -0,0 +1,928 @@ + +in ck B;;; +in x (15 downto 0) X;;; +in y (15 downto 0) X;;; +out r (31 downto 0) X;;; +in vss B;; +in vdd B;; + +begin + +-- Pattern description : +-- C A B Res V V +-- k + +< +20ns>: 0 fff0 0000 ?******** 0 1; +< +20ns>: 0 fff0 0000 ?******** 0 1; +< +20ns>: 1 fff0 0000 ?******** 0 1; +< +20ns>: 1 fff0 0000 ?******** 0 1; +< +20ns>: 0 fff0 0001 ?******** 0 1; +< +20ns>: 0 fff0 0001 ?******** 0 1; +< +20ns>: 1 fff0 0001 ?******** 0 1; +< +20ns>: 1 fff0 0001 ?******** 0 1; +< +20ns>: 0 fff1 0000 ?******** 0 1; +< +20ns>: 0 fff1 0000 ?******** 0 1; +< +20ns>: 1 fff1 0000 ?******** 0 1; +< +20ns>: 1 fff1 0000 ?******** 0 1; +< +20ns>: 0 fff1 0001 ?******** 0 1; +< +20ns>: 0 fff1 0001 ?******** 0 1; +< +20ns>: 1 fff1 0001 ?******** 0 1; +< +20ns>: 1 fff1 0001 ?******** 0 1; +< +20ns>: 0 fff1 0002 ?******** 0 1; +< +20ns>: 0 fff1 0002 ?******** 0 1; +< +20ns>: 1 fff1 0002 ?******** 0 1; +< +20ns>: 1 fff1 0002 ?******** 0 1; +< +20ns>: 0 fff1 0003 ?******** 0 1; +< +20ns>: 0 fff1 0003 ?******** 0 1; +< +20ns>: 1 fff1 0003 ?******** 0 1; +< +20ns>: 1 fff1 0003 ?******** 0 1; +< +20ns>: 0 fff1 0004 ?******** 0 1; +< +20ns>: 0 fff1 0004 ?******** 0 1; +< +20ns>: 1 fff1 0004 ?******** 0 1; +< +20ns>: 1 fff1 0004 ?******** 0 1; +< +20ns>: 0 fff1 0005 ?******** 0 1; +< +20ns>: 0 fff1 0005 ?******** 0 1; +< +20ns>: 1 fff1 0005 ?******** 0 1; +< +20ns>: 1 fff1 0005 ?******** 0 1; +< +20ns>: 0 fff1 0006 ?******** 0 1; +< +20ns>: 0 fff1 0006 ?******** 0 1; +< +20ns>: 1 fff1 0006 ?******** 0 1; +< +20ns>: 1 fff1 0006 ?******** 0 1; +< +20ns>: 0 fff1 0007 ?******** 0 1; +< +20ns>: 0 fff1 0007 ?******** 0 1; +< +20ns>: 1 fff1 0007 ?******** 0 1; +< +20ns>: 1 fff1 0007 ?******** 0 1; +< +20ns>: 0 fff1 0008 ?******** 0 1; +< +20ns>: 0 fff1 0008 ?******** 0 1; +< +20ns>: 1 fff1 0008 ?******** 0 1; +< +20ns>: 1 fff1 0008 ?******** 0 1; +< +20ns>: 0 fff1 0009 ?******** 0 1; +< +20ns>: 0 fff1 0009 ?******** 0 1; +< +20ns>: 1 fff1 0009 ?******** 0 1; +< +20ns>: 1 fff1 0009 ?******** 0 1; +< +20ns>: 0 fff1 000a ?******** 0 1; +< +20ns>: 0 fff1 000a ?******** 0 1; +< +20ns>: 1 fff1 000a ?******** 0 1; +< +20ns>: 1 fff1 000a ?******** 0 1; +< +20ns>: 0 fff1 000b ?******** 0 1; +< +20ns>: 0 fff1 000b ?******** 0 1; +< +20ns>: 1 fff1 000b ?******** 0 1; +< +20ns>: 1 fff1 000b ?******** 0 1; +< +20ns>: 0 fff1 000c ?******** 0 1; +< +20ns>: 0 fff1 000c ?******** 0 1; +< +20ns>: 1 fff1 000c ?******** 0 1; +< +20ns>: 1 fff1 000c ?******** 0 1; +< +20ns>: 0 fff1 000d ?******** 0 1; +< +20ns>: 0 fff1 000d ?******** 0 1; +< +20ns>: 1 fff1 000d ?******** 0 1; +< +20ns>: 1 fff1 000d ?******** 0 1; +< +20ns>: 0 fff1 000e ?******** 0 1; +< +20ns>: 0 fff1 000e ?******** 0 1; +< +20ns>: 1 fff1 000e ?******** 0 1; +< +20ns>: 1 fff1 000e ?******** 0 1; +< +20ns>: 0 fff1 000f ?******** 0 1; +< +20ns>: 0 fff1 000f ?******** 0 1; +< +20ns>: 1 fff1 000f ?******** 0 1; +< +20ns>: 1 fff1 000f ?******** 0 1; +< +20ns>: 0 fff2 0001 ?******** 0 1; +< +20ns>: 0 fff2 0001 ?******** 0 1; +< +20ns>: 1 fff2 0001 ?******** 0 1; +< +20ns>: 1 fff2 0001 ?******** 0 1; +< +20ns>: 0 fff2 0002 ?******** 0 1; +< +20ns>: 0 fff2 0002 ?******** 0 1; +< +20ns>: 1 fff2 0002 ?******** 0 1; +< +20ns>: 1 fff2 0002 ?******** 0 1; +< +20ns>: 0 fff2 0003 ?******** 0 1; +< +20ns>: 0 fff2 0003 ?******** 0 1; +< +20ns>: 1 fff2 0003 ?******** 0 1; +< +20ns>: 1 fff2 0003 ?******** 0 1; +< +20ns>: 0 fff2 0004 ?******** 0 1; +< +20ns>: 0 fff2 0004 ?******** 0 1; +< +20ns>: 1 fff2 0004 ?******** 0 1; +< +20ns>: 1 fff2 0004 ?******** 0 1; +< +20ns>: 0 fff2 0005 ?******** 0 1; +< +20ns>: 0 fff2 0005 ?******** 0 1; +< +20ns>: 1 fff2 0005 ?******** 0 1; +< +20ns>: 1 fff2 0005 ?******** 0 1; +< +20ns>: 0 fff2 0006 ?******** 0 1; +< +20ns>: 0 fff2 0006 ?******** 0 1; +< +20ns>: 1 fff2 0006 ?******** 0 1; +< +20ns>: 1 fff2 0006 ?******** 0 1; +< +20ns>: 0 fff2 0007 ?******** 0 1; +< +20ns>: 0 fff2 0007 ?******** 0 1; +< +20ns>: 1 fff2 0007 ?******** 0 1; +< +20ns>: 1 fff2 0007 ?******** 0 1; +< +20ns>: 0 fff2 0008 ?******** 0 1; +< +20ns>: 0 fff2 0008 ?******** 0 1; +< +20ns>: 1 fff2 0008 ?******** 0 1; +< +20ns>: 1 fff2 0008 ?******** 0 1; +< +20ns>: 0 fff2 0009 ?******** 0 1; +< +20ns>: 0 fff2 0009 ?******** 0 1; +< +20ns>: 1 fff2 0009 ?******** 0 1; +< +20ns>: 1 fff2 0009 ?******** 0 1; +< +20ns>: 0 fff2 000a ?******** 0 1; +< +20ns>: 0 fff2 000a ?******** 0 1; +< +20ns>: 1 fff2 000a ?******** 0 1; +< +20ns>: 1 fff2 000a ?******** 0 1; +< +20ns>: 0 fff2 000b ?******** 0 1; +< +20ns>: 0 fff2 000b ?******** 0 1; +< +20ns>: 1 fff2 000b ?******** 0 1; +< +20ns>: 1 fff2 000b ?******** 0 1; +< +20ns>: 0 fff2 000c ?******** 0 1; +< +20ns>: 0 fff2 000c ?******** 0 1; +< +20ns>: 1 fff2 000c ?******** 0 1; +< +20ns>: 1 fff2 000c ?******** 0 1; +< +20ns>: 0 fff2 000d ?******** 0 1; +< +20ns>: 0 fff2 000d ?******** 0 1; +< +20ns>: 1 fff2 000d ?******** 0 1; +< +20ns>: 1 fff2 000d ?******** 0 1; +< +20ns>: 0 fff2 000e ?******** 0 1; +< +20ns>: 0 fff2 000e ?******** 0 1; +< +20ns>: 1 fff2 000e ?******** 0 1; +< +20ns>: 1 fff2 000e ?******** 0 1; +< +20ns>: 0 fff2 000f ?******** 0 1; +< +20ns>: 0 fff2 000f ?******** 0 1; +< +20ns>: 1 fff2 000f ?******** 0 1; +< +20ns>: 1 fff2 000f ?******** 0 1; +< +20ns>: 0 fff3 0001 ?******** 0 1; +< +20ns>: 0 fff3 0001 ?******** 0 1; +< +20ns>: 1 fff3 0001 ?******** 0 1; +< +20ns>: 1 fff3 0001 ?******** 0 1; +< +20ns>: 0 fff3 0002 ?******** 0 1; +< +20ns>: 0 fff3 0002 ?******** 0 1; +< +20ns>: 1 fff3 0002 ?******** 0 1; +< +20ns>: 1 fff3 0002 ?******** 0 1; +< +20ns>: 0 fff3 0003 ?******** 0 1; +< +20ns>: 0 fff3 0003 ?******** 0 1; +< +20ns>: 1 fff3 0003 ?******** 0 1; +< +20ns>: 1 fff3 0003 ?******** 0 1; +< +20ns>: 0 fff3 0004 ?******** 0 1; +< +20ns>: 0 fff3 0004 ?******** 0 1; +< +20ns>: 1 fff3 0004 ?******** 0 1; +< +20ns>: 1 fff3 0004 ?******** 0 1; +< +20ns>: 0 fff3 0005 ?******** 0 1; +< +20ns>: 0 fff3 0005 ?******** 0 1; +< +20ns>: 1 fff3 0005 ?******** 0 1; +< +20ns>: 1 fff3 0005 ?******** 0 1; +< +20ns>: 0 fff3 0006 ?******** 0 1; +< +20ns>: 0 fff3 0006 ?******** 0 1; +< +20ns>: 1 fff3 0006 ?******** 0 1; +< +20ns>: 1 fff3 0006 ?******** 0 1; +< +20ns>: 0 fff3 0007 ?******** 0 1; +< +20ns>: 0 fff3 0007 ?******** 0 1; +< +20ns>: 1 fff3 0007 ?******** 0 1; +< +20ns>: 1 fff3 0007 ?******** 0 1; +< +20ns>: 0 fff3 0008 ?******** 0 1; +< +20ns>: 0 fff3 0008 ?******** 0 1; +< +20ns>: 1 fff3 0008 ?******** 0 1; +< +20ns>: 1 fff3 0008 ?******** 0 1; +< +20ns>: 0 fff3 0009 ?******** 0 1; +< +20ns>: 0 fff3 0009 ?******** 0 1; +< +20ns>: 1 fff3 0009 ?******** 0 1; +< +20ns>: 1 fff3 0009 ?******** 0 1; +< +20ns>: 0 fff3 000a ?******** 0 1; +< +20ns>: 0 fff3 000a ?******** 0 1; +< +20ns>: 1 fff3 000a ?******** 0 1; +< +20ns>: 1 fff3 000a ?******** 0 1; +< +20ns>: 0 fff3 000b ?******** 0 1; +< +20ns>: 0 fff3 000b ?******** 0 1; +< +20ns>: 1 fff3 000b ?******** 0 1; +< +20ns>: 1 fff3 000b ?******** 0 1; +< +20ns>: 0 fff3 000c ?******** 0 1; +< +20ns>: 0 fff3 000c ?******** 0 1; +< +20ns>: 1 fff3 000c ?******** 0 1; +< +20ns>: 1 fff3 000c ?******** 0 1; +< +20ns>: 0 fff3 000d ?******** 0 1; +< +20ns>: 0 fff3 000d ?******** 0 1; +< +20ns>: 1 fff3 000d ?******** 0 1; +< +20ns>: 1 fff3 000d ?******** 0 1; +< +20ns>: 0 fff3 000e ?******** 0 1; +< +20ns>: 0 fff3 000e ?******** 0 1; +< +20ns>: 1 fff3 000e ?******** 0 1; +< +20ns>: 1 fff3 000e ?******** 0 1; +< +20ns>: 0 fff3 000f ?******** 0 1; +< +20ns>: 0 fff3 000f ?******** 0 1; +< +20ns>: 1 fff3 000f ?******** 0 1; +< +20ns>: 1 fff3 000f ?******** 0 1; +< +20ns>: 0 fff4 0001 ?******** 0 1; +< +20ns>: 0 fff4 0001 ?******** 0 1; +< +20ns>: 1 fff4 0001 ?******** 0 1; +< +20ns>: 1 fff4 0001 ?******** 0 1; +< +20ns>: 0 fff4 0002 ?******** 0 1; +< +20ns>: 0 fff4 0002 ?******** 0 1; +< +20ns>: 1 fff4 0002 ?******** 0 1; +< +20ns>: 1 fff4 0002 ?******** 0 1; +< +20ns>: 0 fff4 0003 ?******** 0 1; +< +20ns>: 0 fff4 0003 ?******** 0 1; +< +20ns>: 1 fff4 0003 ?******** 0 1; +< +20ns>: 1 fff4 0003 ?******** 0 1; +< +20ns>: 0 fff4 0004 ?******** 0 1; +< +20ns>: 0 fff4 0004 ?******** 0 1; +< +20ns>: 1 fff4 0004 ?******** 0 1; +< +20ns>: 1 fff4 0004 ?******** 0 1; +< +20ns>: 0 fff4 0005 ?******** 0 1; +< +20ns>: 0 fff4 0005 ?******** 0 1; +< +20ns>: 1 fff4 0005 ?******** 0 1; +< +20ns>: 1 fff4 0005 ?******** 0 1; +< +20ns>: 0 fff4 0006 ?******** 0 1; +< +20ns>: 0 fff4 0006 ?******** 0 1; +< +20ns>: 1 fff4 0006 ?******** 0 1; +< +20ns>: 1 fff4 0006 ?******** 0 1; +< +20ns>: 0 fff4 0007 ?******** 0 1; +< +20ns>: 0 fff4 0007 ?******** 0 1; +< +20ns>: 1 fff4 0007 ?******** 0 1; +< +20ns>: 1 fff4 0007 ?******** 0 1; +< +20ns>: 0 fff4 0008 ?******** 0 1; +< +20ns>: 0 fff4 0008 ?******** 0 1; +< +20ns>: 1 fff4 0008 ?******** 0 1; +< +20ns>: 1 fff4 0008 ?******** 0 1; +< +20ns>: 0 fff4 0009 ?******** 0 1; +< +20ns>: 0 fff4 0009 ?******** 0 1; +< +20ns>: 1 fff4 0009 ?******** 0 1; +< +20ns>: 1 fff4 0009 ?******** 0 1; +< +20ns>: 0 fff4 000a ?******** 0 1; +< +20ns>: 0 fff4 000a ?******** 0 1; +< +20ns>: 1 fff4 000a ?******** 0 1; +< +20ns>: 1 fff4 000a ?******** 0 1; +< +20ns>: 0 fff4 000b ?******** 0 1; +< +20ns>: 0 fff4 000b ?******** 0 1; +< +20ns>: 1 fff4 000b ?******** 0 1; +< +20ns>: 1 fff4 000b ?******** 0 1; +< +20ns>: 0 fff4 000c ?******** 0 1; +< +20ns>: 0 fff4 000c ?******** 0 1; +< +20ns>: 1 fff4 000c ?******** 0 1; +< +20ns>: 1 fff4 000c ?******** 0 1; +< +20ns>: 0 fff4 000d ?******** 0 1; +< +20ns>: 0 fff4 000d ?******** 0 1; +< +20ns>: 1 fff4 000d ?******** 0 1; +< +20ns>: 1 fff4 000d ?******** 0 1; +< +20ns>: 0 fff4 000e ?******** 0 1; +< +20ns>: 0 fff4 000e ?******** 0 1; +< +20ns>: 1 fff4 000e ?******** 0 1; +< +20ns>: 1 fff4 000e ?******** 0 1; +< +20ns>: 0 fff4 000f ?******** 0 1; +< +20ns>: 0 fff4 000f ?******** 0 1; +< +20ns>: 1 fff4 000f ?******** 0 1; +< +20ns>: 1 fff4 000f ?******** 0 1; +< +20ns>: 0 fff5 0001 ?******** 0 1; +< +20ns>: 0 fff5 0001 ?******** 0 1; +< +20ns>: 1 fff5 0001 ?******** 0 1; +< +20ns>: 1 fff5 0001 ?******** 0 1; +< +20ns>: 0 fff5 0002 ?******** 0 1; +< +20ns>: 0 fff5 0002 ?******** 0 1; +< +20ns>: 1 fff5 0002 ?******** 0 1; +< +20ns>: 1 fff5 0002 ?******** 0 1; +< +20ns>: 0 fff5 0003 ?******** 0 1; +< +20ns>: 0 fff5 0003 ?******** 0 1; +< +20ns>: 1 fff5 0003 ?******** 0 1; +< +20ns>: 1 fff5 0003 ?******** 0 1; +< +20ns>: 0 fff5 0004 ?******** 0 1; +< +20ns>: 0 fff5 0004 ?******** 0 1; +< +20ns>: 1 fff5 0004 ?******** 0 1; +< +20ns>: 1 fff5 0004 ?******** 0 1; +< +20ns>: 0 fff5 0005 ?******** 0 1; +< +20ns>: 0 fff5 0005 ?******** 0 1; +< +20ns>: 1 fff5 0005 ?******** 0 1; +< +20ns>: 1 fff5 0005 ?******** 0 1; +< +20ns>: 0 fff5 0006 ?******** 0 1; +< +20ns>: 0 fff5 0006 ?******** 0 1; +< +20ns>: 1 fff5 0006 ?******** 0 1; +< +20ns>: 1 fff5 0006 ?******** 0 1; +< +20ns>: 0 fff5 0007 ?******** 0 1; +< +20ns>: 0 fff5 0007 ?******** 0 1; +< +20ns>: 1 fff5 0007 ?******** 0 1; +< +20ns>: 1 fff5 0007 ?******** 0 1; +< +20ns>: 0 fff5 0008 ?******** 0 1; +< +20ns>: 0 fff5 0008 ?******** 0 1; +< +20ns>: 1 fff5 0008 ?******** 0 1; +< +20ns>: 1 fff5 0008 ?******** 0 1; +< +20ns>: 0 fff5 0009 ?******** 0 1; +< +20ns>: 0 fff5 0009 ?******** 0 1; +< +20ns>: 1 fff5 0009 ?******** 0 1; +< +20ns>: 1 fff5 0009 ?******** 0 1; +< +20ns>: 0 fff5 000a ?******** 0 1; +< +20ns>: 0 fff5 000a ?******** 0 1; +< +20ns>: 1 fff5 000a ?******** 0 1; +< +20ns>: 1 fff5 000a ?******** 0 1; +< +20ns>: 0 fff5 000b ?******** 0 1; +< +20ns>: 0 fff5 000b ?******** 0 1; +< +20ns>: 1 fff5 000b ?******** 0 1; +< +20ns>: 1 fff5 000b ?******** 0 1; +< +20ns>: 0 fff5 000c ?******** 0 1; +< +20ns>: 0 fff5 000c ?******** 0 1; +< +20ns>: 1 fff5 000c ?******** 0 1; +< +20ns>: 1 fff5 000c ?******** 0 1; +< +20ns>: 0 fff5 000d ?******** 0 1; +< +20ns>: 0 fff5 000d ?******** 0 1; +< +20ns>: 1 fff5 000d ?******** 0 1; +< +20ns>: 1 fff5 000d ?******** 0 1; +< +20ns>: 0 fff5 000e ?******** 0 1; +< +20ns>: 0 fff5 000e ?******** 0 1; +< +20ns>: 1 fff5 000e ?******** 0 1; +< +20ns>: 1 fff5 000e ?******** 0 1; +< +20ns>: 0 fff5 000f ?******** 0 1; +< +20ns>: 0 fff5 000f ?******** 0 1; +< +20ns>: 1 fff5 000f ?******** 0 1; +< +20ns>: 1 fff5 000f ?******** 0 1; +< +20ns>: 0 fff6 0001 ?******** 0 1; +< +20ns>: 0 fff6 0001 ?******** 0 1; +< +20ns>: 1 fff6 0001 ?******** 0 1; +< +20ns>: 1 fff6 0001 ?******** 0 1; +< +20ns>: 0 fff6 0002 ?******** 0 1; +< +20ns>: 0 fff6 0002 ?******** 0 1; +< +20ns>: 1 fff6 0002 ?******** 0 1; +< +20ns>: 1 fff6 0002 ?******** 0 1; +< +20ns>: 0 fff6 0003 ?******** 0 1; +< +20ns>: 0 fff6 0003 ?******** 0 1; +< +20ns>: 1 fff6 0003 ?******** 0 1; +< +20ns>: 1 fff6 0003 ?******** 0 1; +< +20ns>: 0 fff6 0004 ?******** 0 1; +< +20ns>: 0 fff6 0004 ?******** 0 1; +< +20ns>: 1 fff6 0004 ?******** 0 1; +< +20ns>: 1 fff6 0004 ?******** 0 1; +< +20ns>: 0 fff6 0005 ?******** 0 1; +< +20ns>: 0 fff6 0005 ?******** 0 1; +< +20ns>: 1 fff6 0005 ?******** 0 1; +< +20ns>: 1 fff6 0005 ?******** 0 1; +< +20ns>: 0 fff6 0006 ?******** 0 1; +< +20ns>: 0 fff6 0006 ?******** 0 1; +< +20ns>: 1 fff6 0006 ?******** 0 1; +< +20ns>: 1 fff6 0006 ?******** 0 1; +< +20ns>: 0 fff6 0007 ?******** 0 1; +< +20ns>: 0 fff6 0007 ?******** 0 1; +< +20ns>: 1 fff6 0007 ?******** 0 1; +< +20ns>: 1 fff6 0007 ?******** 0 1; +< +20ns>: 0 fff6 0008 ?******** 0 1; +< +20ns>: 0 fff6 0008 ?******** 0 1; +< +20ns>: 1 fff6 0008 ?******** 0 1; +< +20ns>: 1 fff6 0008 ?******** 0 1; +< +20ns>: 0 fff6 0009 ?******** 0 1; +< +20ns>: 0 fff6 0009 ?******** 0 1; +< +20ns>: 1 fff6 0009 ?******** 0 1; +< +20ns>: 1 fff6 0009 ?******** 0 1; +< +20ns>: 0 fff6 000a ?******** 0 1; +< +20ns>: 0 fff6 000a ?******** 0 1; +< +20ns>: 1 fff6 000a ?******** 0 1; +< +20ns>: 1 fff6 000a ?******** 0 1; +< +20ns>: 0 fff6 000b ?******** 0 1; +< +20ns>: 0 fff6 000b ?******** 0 1; +< +20ns>: 1 fff6 000b ?******** 0 1; +< +20ns>: 1 fff6 000b ?******** 0 1; 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+< +20ns>: 1 fffe 0006 ?******** 0 1; +< +20ns>: 0 fffe 0007 ?******** 0 1; +< +20ns>: 0 fffe 0007 ?******** 0 1; +< +20ns>: 1 fffe 0007 ?******** 0 1; +< +20ns>: 1 fffe 0007 ?******** 0 1; +< +20ns>: 0 fffe 0008 ?******** 0 1; +< +20ns>: 0 fffe 0008 ?******** 0 1; +< +20ns>: 1 fffe 0008 ?******** 0 1; +< +20ns>: 1 fffe 0008 ?******** 0 1; +< +20ns>: 0 fffe 0009 ?******** 0 1; +< +20ns>: 0 fffe 0009 ?******** 0 1; +< +20ns>: 1 fffe 0009 ?******** 0 1; +< +20ns>: 1 fffe 0009 ?******** 0 1; +< +20ns>: 0 fffe 000a ?******** 0 1; +< +20ns>: 0 fffe 000a ?******** 0 1; +< +20ns>: 1 fffe 000a ?******** 0 1; +< +20ns>: 1 fffe 000a ?******** 0 1; +< +20ns>: 0 fffe 000b ?******** 0 1; +< +20ns>: 0 fffe 000b ?******** 0 1; +< +20ns>: 1 fffe 000b ?******** 0 1; +< +20ns>: 1 fffe 000b ?******** 0 1; +< +20ns>: 0 fffe 000c ?******** 0 1; +< +20ns>: 0 fffe 000c ?******** 0 1; +< +20ns>: 1 fffe 000c ?******** 0 1; +< +20ns>: 1 fffe 000c ?******** 0 1; +< +20ns>: 0 fffe 000d ?******** 0 1; +< +20ns>: 0 fffe 000d ?******** 0 1; +< +20ns>: 1 fffe 000d ?******** 0 1; +< +20ns>: 1 fffe 000d ?******** 0 1; +< +20ns>: 0 fffe 000e ?******** 0 1; +< +20ns>: 0 fffe 000e ?******** 0 1; +< +20ns>: 1 fffe 000e ?******** 0 1; +< +20ns>: 1 fffe 000e ?******** 0 1; +< +20ns>: 0 fffe 000f ?******** 0 1; +< +20ns>: 0 fffe 000f ?******** 0 1; +< +20ns>: 1 fffe 000f ?******** 0 1; +< +20ns>: 1 fffe 000f ?******** 0 1; +< +20ns>: 0 ffff 0001 ?******** 0 1; +< +20ns>: 0 ffff 0001 ?******** 0 1; +< +20ns>: 1 ffff 0001 ?******** 0 1; +< +20ns>: 1 ffff 0001 ?******** 0 1; +< +20ns>: 0 ffff 0002 ?******** 0 1; +< +20ns>: 0 ffff 0002 ?******** 0 1; +< +20ns>: 1 ffff 0002 ?******** 0 1; +< +20ns>: 1 ffff 0002 ?******** 0 1; +< +20ns>: 0 ffff 0003 ?******** 0 1; +< +20ns>: 0 ffff 0003 ?******** 0 1; +< +20ns>: 1 ffff 0003 ?******** 0 1; +< +20ns>: 1 ffff 0003 ?******** 0 1; +< +20ns>: 0 ffff 0004 ?******** 0 1; +< +20ns>: 0 ffff 0004 ?******** 0 1; +< +20ns>: 1 ffff 0004 ?******** 0 1; +< +20ns>: 1 ffff 0004 ?******** 0 1; +< +20ns>: 0 ffff 0005 ?******** 0 1; +< +20ns>: 0 ffff 0005 ?******** 0 1; +< +20ns>: 1 ffff 0005 ?******** 0 1; +< +20ns>: 1 ffff 0005 ?******** 0 1; +< +20ns>: 0 ffff 0006 ?******** 0 1; +< +20ns>: 0 ffff 0006 ?******** 0 1; +< +20ns>: 1 ffff 0006 ?******** 0 1; +< +20ns>: 1 ffff 0006 ?******** 0 1; +< +20ns>: 0 ffff 0007 ?******** 0 1; +< +20ns>: 0 ffff 0007 ?******** 0 1; +< +20ns>: 1 ffff 0007 ?******** 0 1; +< +20ns>: 1 ffff 0007 ?******** 0 1; +< +20ns>: 0 ffff 0008 ?******** 0 1; +< +20ns>: 0 ffff 0008 ?******** 0 1; +< +20ns>: 1 ffff 0008 ?******** 0 1; +< +20ns>: 1 ffff 0008 ?******** 0 1; +< +20ns>: 0 ffff 0009 ?******** 0 1; +< +20ns>: 0 ffff 0009 ?******** 0 1; +< +20ns>: 1 ffff 0009 ?******** 0 1; +< +20ns>: 1 ffff 0009 ?******** 0 1; +< +20ns>: 0 ffff 000a ?******** 0 1; +< +20ns>: 0 ffff 000a ?******** 0 1; +< +20ns>: 1 ffff 000a ?******** 0 1; +< +20ns>: 1 ffff 000a ?******** 0 1; +< +20ns>: 0 ffff 000b ?******** 0 1; +< +20ns>: 0 ffff 000b ?******** 0 1; +< +20ns>: 1 ffff 000b ?******** 0 1; +< +20ns>: 1 ffff 000b ?******** 0 1; +< +20ns>: 0 ffff 000c ?******** 0 1; +< +20ns>: 0 ffff 000c ?******** 0 1; +< +20ns>: 1 ffff 000c ?******** 0 1; +< +20ns>: 1 ffff 000c ?******** 0 1; +< +20ns>: 0 ffff 000d ?******** 0 1; +< +20ns>: 0 ffff 000d ?******** 0 1; +< +20ns>: 1 ffff 000d ?******** 0 1; +< +20ns>: 1 ffff 000d ?******** 0 1; +< +20ns>: 0 ffff 000e ?******** 0 1; +< +20ns>: 0 ffff 000e ?******** 0 1; +< +20ns>: 1 ffff 000e ?******** 0 1; +< +20ns>: 1 ffff 000e ?******** 0 1; +< +20ns>: 0 ffff 000f ?******** 0 1; +< +20ns>: 0 ffff 000f ?******** 0 1; +< +20ns>: 1 ffff 000f ?******** 0 1; +< +20ns>: 1 ffff 000f ?******** 0 1; + +end; diff --git a/alliance/src/documentation/alliance-examples/multi16b-reg/multi16.vhdl b/alliance/src/documentation/alliance-examples/multi16b-reg/multi16.vhdl new file mode 100644 index 00000000..c72615e3 --- /dev/null +++ b/alliance/src/documentation/alliance-examples/multi16b-reg/multi16.vhdl @@ -0,0 +1,369 @@ +library IEEE; +use IEEE.STD_LOGIC_1164.ALL; + +entity Multi8 is + + + port ( CK : in std_logic; + X : in Std_Logic_Vector(15 downto 0) ; + Y : in Std_Logic_Vector(15 downto 0) ; + R : out Std_Logic_Vector(31 downto 0) ); + +end Multi8; + +---------------------------------------------------------------------- + +architecture beh OF Multi8 is + + signal PP1 : Std_Logic_Vector(16 downto 0); + signal PP2 : Std_Logic_Vector(16 downto 0); + signal PP3 : Std_Logic_Vector(16 downto 0); + signal PP4 : Std_Logic_Vector(16 downto 0); + signal PP5 : Std_Logic_Vector(16 downto 0); + signal PP6 : Std_Logic_Vector(16 downto 0); + signal PP7 : Std_Logic_Vector(16 downto 0); + signal PP8 : Std_Logic_Vector(16 downto 0); + signal PP9 : Std_Logic_Vector(16 downto 0); + signal PP10 : Std_Logic_Vector(16 downto 0); + signal PP11 : Std_Logic_Vector(16 downto 0); + signal PP12 : Std_Logic_Vector(16 downto 0); + signal PP13 : Std_Logic_Vector(16 downto 0); + signal PP14 : Std_Logic_Vector(16 downto 0); + signal PP15 : Std_Logic_Vector(16 downto 0); + signal PP16 : Std_Logic_Vector(16 downto 0); + + signal PP1_2 : Std_Logic_Vector(17 downto 0); + signal PP3_4 : Std_Logic_Vector(17 downto 0); + signal PP5_6 : Std_Logic_Vector(17 downto 0); + signal PP7_8 : Std_Logic_Vector(17 downto 0); + signal PP9_10 : Std_Logic_Vector(17 downto 0); + signal PP11_12 : Std_Logic_Vector(17 downto 0); + signal PP13_14 : Std_Logic_Vector(17 downto 0); + signal PP15_16 : Std_Logic_Vector(17 downto 0); + + signal R1, R2, R3, R4 : Std_Logic_Vector(19 downto 0); + + signal R12, R34 : Std_Logic_Vector(23 downto 0); + + signal R_int, R_out : Std_Logic_Vector(31 downto 0); + +begin + + PP1(0) <= Y(0) and X(0); + PP1(1) <= Y(0) and X(1); + PP1(2) <= Y(0) and X(2); + PP1(3) <= Y(0) and X(3); + PP1(4) <= Y(0) and X(4); + PP1(5) <= Y(0) and X(5); + PP1(6) <= Y(0) and X(6); + PP1(7) <= Y(0) and X(7); + PP1(8) <= Y(0) and X(8); + PP1(9) <= Y(0) and X(9); + PP1(10) <= Y(0) and X(10); + PP1(11) <= Y(0) and X(11); + PP1(12) <= Y(0) and X(12); + PP1(13) <= Y(0) and X(13); + PP1(14) <= Y(0) and X(14); + PP1(15) <= Y(0) and X(15); + PP1(16) <= '0'; + + PP2(0) <= '0'; + PP2(1) <= Y(1) and X(0); + PP2(2) <= Y(1) and X(1); + PP2(3) <= Y(1) and X(2); + PP2(4) <= Y(1) and X(3); + PP2(5) <= Y(1) and X(4); + PP2(6) <= Y(1) and X(5); + PP2(7) <= Y(1) and X(6); + PP2(8) <= Y(1) and X(7); + PP2(9) <= Y(1) and X(8); + PP2(10) <= Y(1) and X(9); + PP2(11) <= Y(1) and X(10); + PP2(12) <= Y(1) and X(11); + PP2(13) <= Y(1) and X(12); + PP2(14) <= Y(1) and X(13); + PP2(15) <= Y(1) and X(14); + PP2(16) <= Y(1) and X(15); + + PP3(0) <= Y(2) and X(0); + PP3(1) <= Y(2) and X(1); + PP3(2) <= Y(2) and X(2); + PP3(3) <= Y(2) and X(3); + PP3(4) <= Y(2) and X(4); + PP3(5) <= Y(2) and X(5); + PP3(6) <= Y(2) and X(6); + PP3(7) <= Y(2) and X(7); + PP3(8) <= Y(2) and X(8); + PP3(9) <= Y(2) and X(9); + PP3(10) <= Y(2) and X(10); + PP3(11) <= Y(2) and X(11); + PP3(12) <= Y(2) and X(12); + PP3(13) <= Y(2) and X(13); + PP3(14) <= Y(2) and X(14); + PP3(15) <= Y(2) and X(15); + PP3(16) <= '0'; + + PP4(0) <= '0'; + PP4(1) <= Y(3) and X(0); + PP4(2) <= Y(3) and X(1); + PP4(3) <= Y(3) and X(2); + PP4(4) <= Y(3) and X(3); + PP4(5) <= Y(3) and X(4); + PP4(6) <= Y(3) and X(5); + PP4(7) <= Y(3) and X(6); + PP4(8) <= Y(3) and X(7); + PP4(9) <= Y(3) and X(8); + PP4(10) <= Y(3) and X(9); + PP4(11) <= Y(3) and X(10); + PP4(12) <= Y(3) and X(11); + PP4(13) <= Y(3) and X(12); + PP4(14) <= Y(3) and X(13); + PP4(15) <= Y(3) and X(14); + PP4(16) <= Y(3) and X(15); + + PP5(0) <= Y(4) and X(0); + PP5(1) <= Y(4) and X(1); + PP5(2) <= Y(4) and X(2); + PP5(3) <= Y(4) and X(3); + PP5(4) <= Y(4) and X(4); + PP5(5) <= Y(4) and X(5); + PP5(6) <= Y(4) and X(6); + PP5(7) <= Y(4) and X(7); + PP5(8) <= Y(4) and X(8); + PP5(9) <= Y(4) and X(9); + PP5(10) <= Y(4) and X(10); + PP5(11) <= Y(4) and X(11); + PP5(12) <= Y(4) and X(12); + PP5(13) <= Y(4) and X(13); + PP5(14) <= Y(4) and X(14); + PP5(15) <= Y(4) and X(15); + PP5(16) <= '0'; + + PP6(0) <= '0'; + PP6(1) <= Y(5) and X(0); + PP6(2) <= Y(5) and X(1); + PP6(3) <= Y(5) and X(2); + PP6(4) <= Y(5) and X(3); + PP6(5) <= Y(5) and X(4); + PP6(6) <= Y(5) and X(5); + PP6(7) <= Y(5) and X(6); + PP6(8) <= Y(5) and X(7); + PP6(9) <= Y(5) and X(8); + PP6(10) <= Y(5) and X(9); + PP6(11) <= Y(5) and X(10); + PP6(12) <= Y(5) and X(11); + PP6(13) <= Y(5) and X(12); + PP6(14) <= Y(5) and X(13); + PP6(15) <= Y(5) and X(14); + PP6(16) <= Y(5) and X(15); + + PP7(0) <= Y(6) and X(0); + PP7(1) <= Y(6) and X(1); + PP7(2) <= Y(6) and X(2); + PP7(3) <= Y(6) and X(3); + PP7(4) <= Y(6) and X(4); + PP7(5) <= Y(6) and X(5); + PP7(6) <= Y(6) and X(6); + PP7(7) <= Y(6) and X(7); + PP7(8) <= Y(6) and X(8); + PP7(9) <= Y(6) and X(9); + PP7(10) <= Y(6) and X(10); + PP7(11) <= Y(6) and X(11); + PP7(12) <= Y(6) and X(12); + PP7(13) <= Y(6) and X(13); + PP7(14) <= Y(6) and X(14); + PP7(15) <= Y(6) and X(15); + PP7(16) <= '0'; + + PP8(0) <= '0'; + PP8(1) <= Y(7) and X(0); + PP8(2) <= Y(7) and X(1); + PP8(3) <= Y(7) and X(2); + PP8(4) <= Y(7) and X(3); + PP8(5) <= Y(7) and X(4); + PP8(6) <= Y(7) and X(5); + PP8(7) <= Y(7) and X(6); + PP8(8) <= Y(7) and X(7); + PP8(9) <= Y(7) and X(8); + PP8(10) <= Y(7) and X(9); + PP8(11) <= Y(7) and X(10); + PP8(12) <= Y(7) and X(11); + PP8(13) <= Y(7) and X(12); + PP8(14) <= Y(7) and X(13); + PP8(15) <= Y(7) and X(14); + PP8(16) <= Y(7) and X(15); + + PP9(0) <= Y(8) and X(0); + PP9(1) <= Y(8) and X(1); + PP9(2) <= Y(8) and X(2); + PP9(3) <= Y(8) and X(3); + PP9(4) <= Y(8) and X(4); + PP9(5) <= Y(8) and X(5); + PP9(6) <= Y(8) and X(6); + PP9(7) <= Y(8) and X(7); + PP9(8) <= Y(8) and X(8); + PP9(9) <= Y(8) and X(9); + PP9(10) <= Y(8) and X(10); + PP9(11) <= Y(8) and X(11); + PP9(12) <= Y(8) and X(12); + PP9(13) <= Y(8) and X(13); + PP9(14) <= Y(8) and X(14); + PP9(15) <= Y(8) and X(15); + PP9(16) <= '0'; + + PP10(0) <= '0'; + PP10(1) <= Y(9) and X(0); + PP10(2) <= Y(9) and X(1); + PP10(3) <= Y(9) and X(2); + PP10(4) <= Y(9) and X(3); + PP10(5) <= Y(9) and X(4); + PP10(6) <= Y(9) and X(5); + PP10(7) <= Y(9) and X(6); + PP10(8) <= Y(9) and X(7); + PP10(9) <= Y(9) and X(8); + PP10(10) <= Y(9) and X(9); + PP10(11) <= Y(9) and X(10); + PP10(12) <= Y(9) and X(11); + PP10(13) <= Y(9) and X(12); + PP10(14) <= Y(9) and X(13); + PP10(15) <= Y(9) and X(14); + PP10(16) <= Y(9) and X(15); + + PP11(0) <= Y(10) and X(0); + PP11(1) <= Y(10) and X(1); + PP11(2) <= Y(10) and X(2); + PP11(3) <= Y(10) and X(3); + PP11(4) <= Y(10) and X(4); + PP11(5) <= Y(10) and X(5); + PP11(6) <= Y(10) and X(6); + PP11(7) <= Y(10) and X(7); + PP11(8) <= Y(10) and X(8); + PP11(9) <= Y(10) and X(9); + PP11(10) <= Y(10) and X(10); + PP11(11) <= Y(10) and X(11); + PP11(12) <= Y(10) and X(12); + PP11(13) <= Y(10) and X(13); + PP11(14) <= Y(10) and X(14); + PP11(15) <= Y(10) and X(15); + PP11(16) <= '0'; + + PP12(0) <= '0'; + PP12(1) <= Y(11) and X(0); + PP12(2) <= Y(11) and X(1); + PP12(3) <= Y(11) and X(2); + PP12(4) <= Y(11) and X(3); + PP12(5) <= Y(11) and X(4); + PP12(6) <= Y(11) and X(5); + PP12(7) <= Y(11) and X(6); + PP12(8) <= Y(11) and X(7); + PP12(9) <= Y(11) and X(8); + PP12(10) <= Y(11) and X(9); + PP12(11) <= Y(11) and X(10); + PP12(12) <= Y(11) and X(11); + PP12(13) <= Y(11) and X(12); + PP12(14) <= Y(11) and X(13); + PP12(15) <= Y(11) and X(14); + PP12(16) <= Y(11) and X(15); + + PP13(0) <= Y(12) and X(0); + PP13(1) <= Y(12) and X(1); + PP13(2) <= Y(12) and X(2); + PP13(3) <= Y(12) and X(3); + PP13(4) <= Y(12) and X(4); + PP13(5) <= Y(12) and X(5); + PP13(6) <= Y(12) and X(6); + PP13(7) <= Y(12) and X(7); + PP13(8) <= Y(12) and X(8); + PP13(9) <= Y(12) and X(9); + PP13(10) <= Y(12) and X(10); + PP13(11) <= Y(12) and X(11); + PP13(12) <= Y(12) and X(12); + PP13(13) <= Y(12) and X(13); + PP13(14) <= Y(12) and X(14); + PP13(15) <= Y(12) and X(15); + PP13(16) <= '0'; + + PP14(0) <= '0'; + PP14(1) <= Y(13) and X(0); + PP14(2) <= Y(13) and X(1); + PP14(3) <= Y(13) and X(2); + PP14(4) <= Y(13) and X(3); + PP14(5) <= Y(13) and X(4); + PP14(6) <= Y(13) and X(5); + PP14(7) <= Y(13) and X(6); + PP14(8) <= Y(13) and X(7); + PP14(9) <= Y(13) and X(8); + PP14(10) <= Y(13) and X(9); + PP14(11) <= Y(13) and X(10); + PP14(12) <= Y(13) and X(11); + PP14(13) <= Y(13) and X(12); + PP14(14) <= Y(13) and X(13); + PP14(15) <= Y(13) and X(14); + PP14(16) <= Y(13) and X(15); + + PP15(0) <= Y(14) and X(0); + PP15(1) <= Y(14) and X(1); + PP15(2) <= Y(14) and X(2); + PP15(3) <= Y(14) and X(3); + PP15(4) <= Y(14) and X(4); + PP15(5) <= Y(14) and X(5); + PP15(6) <= Y(14) and X(6); + PP15(7) <= Y(14) and X(7); + PP15(8) <= Y(14) and X(8); + PP15(9) <= Y(14) and X(9); + PP15(10) <= Y(14) and X(10); + PP15(11) <= Y(14) and X(11); + PP15(12) <= Y(14) and X(12); + PP15(13) <= Y(14) and X(13); + PP15(14) <= Y(14) and X(14); + PP15(15) <= Y(14) and X(15); + PP15(16) <= '0'; + + PP16(0) <= '0'; + PP16(1) <= Y(15) and X(0); + PP16(2) <= Y(15) and X(1); + PP16(3) <= Y(15) and X(2); + PP16(4) <= Y(15) and X(3); + PP16(5) <= Y(15) and X(4); + PP16(6) <= Y(15) and X(5); + PP16(7) <= Y(15) and X(6); + PP16(8) <= Y(15) and X(7); + PP16(9) <= Y(15) and X(8); + PP16(10) <= Y(15) and X(9); + PP16(11) <= Y(15) and X(10); + PP16(12) <= Y(15) and X(11); + PP16(13) <= Y(15) and X(12); + PP16(14) <= Y(15) and X(13); + PP16(15) <= Y(15) and X(14); + PP16(16) <= Y(15) and X(15); + + PP1_2 <= PP1 + PP2; + PP3_4 <= PP3 + PP4; + PP5_6 <= PP5 + PP6; + PP7_8 <= PP7 + PP8; + PP9_10 <= PP9 + PP10; + PP11_12 <= PP11 + PP12; + PP13_14 <= PP13 + PP14; + PP15_16 <= PP15 + PP16; + + R1 <= ("00" & PP1_2) + (PP3_4 & "00"); + R2 <= ("00" & PP5_6) + (PP7_8 & "00"); + + R3 <= ("00" & PP9_10 ) + (PP11_12 & "00"); + R4 <= ("00" & PP13_14) + (PP15_16 & "00"); + + R12 <= ("0000" & R1) + (R2 & "0000"); + R34 <= ("0000" & R3) + (R4 & "0000"); + + R_int <= ("00000000" & R12) + (R34 & "00000000"); + + process( ck ) + begin + if ( ck='1' and ck'event) + then R_out <= not(R_int); + end if; + end process; + + R <= not(R_out); + +end beh;