Bug in mbk/vel, when SEPAR is *not* '.', the separator is kept as is.
* Bug: In mbk/src/vel_drive.c, when making the signal names VHDL compliants, we should transliterate the SEPAR character, whatever it is, by an '_'. It seems that cougar/lynx was not abiding with the SEPAR and creates signal names with '.' anyway. So we add a test to check for '.' in addition to SEPAR. This problem was causing invalid VHDL to be written, with dots in signal names. * Change: In rds/src/etc/cmos.rds, correctly generate GDS for CALUx.
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@ -656,7 +656,7 @@ int sigi = 0;
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int i, t; /* This sucks and I'm not very proud of that, but really,
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int i, t; /* This sucks and I'm not very proud of that, but really,
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at least it should work */
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at least it should work */
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for (t = 0, i = 0; name[i] != 0; i++)
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for (t = 0, i = 0; name[i] != 0; i++)
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if (name[i] == SEPAR) {
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if ((name[i] == SEPAR) || (name[i] == '.')) {
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name[i]='_'; /* Shaaaaaaaame on meeeeeeeeee */
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name[i]='_'; /* Shaaaaaaaame on meeeeeeeeee */
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t = 1;
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t = 1;
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}
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}
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@ -75,7 +75,7 @@ TABLE MBK_TO_RDS_SEGMENT
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RDS_NDIF RCW -1.5 2.0 0.0 EXT \
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RDS_NDIF RCW -1.5 2.0 0.0 EXT \
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RDS_NDIF VW -1.5 4.0 0.0 DRC \
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RDS_NDIF VW -1.5 4.0 0.0 DRC \
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RDS_ACTIV VW -1.5 5.0 0.0 ALL \
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RDS_ACTIV VW -1.5 5.0 0.0 ALL \
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RDS_PWELL VW -1.5 0.0 0.0 EXT
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RDS_PWELL VW -1.5 0.0 0.0 EXT
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PTRANS RDS_POLY VW 0.0 0.0 0.0 ALL \
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PTRANS RDS_POLY VW 0.0 0.0 0.0 ALL \
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RDS_PDIF LCW -1.5 2.0 0.0 EXT \
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RDS_PDIF LCW -1.5 2.0 0.0 EXT \
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RDS_PDIF RCW -1.5 2.0 0.0 EXT \
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RDS_PDIF RCW -1.5 2.0 0.0 EXT \
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@ -123,6 +123,11 @@ TABLE MBK_TO_RDS_CONNECTOR
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ALU4 RDS_ALU4 1.0 0
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ALU4 RDS_ALU4 1.0 0
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ALU5 RDS_ALU5 1.0 0
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ALU5 RDS_ALU5 1.0 0
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ALU6 RDS_ALU6 1.0 0
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ALU6 RDS_ALU6 1.0 0
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CALU1 RDS_ALU1 .5 0
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CALU2 RDS_ALU2 1.0 0
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CALU3 RDS_ALU3 1.0 0
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CALU4 RDS_ALU4 1.0 0
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CALU5 RDS_ALU5 1.0 0
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END
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END
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@ -484,24 +489,24 @@ TABLE GDS_LAYER
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RDS_POLY2 8
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RDS_POLY2 8
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RDS_TPOLY 9
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RDS_TPOLY 9
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RDS_CONT 10
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RDS_CONT 10
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RDS_ALU1 11
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RDS_ALU1 11 11
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RDS_VALU1 12
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RDS_VALU1 12
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RDS_TALU1 13
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RDS_TALU1 13
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RDS_VIA1 14
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RDS_VIA1 14
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RDS_TVIA1 15
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RDS_TVIA1 15
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RDS_ALU2 16
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RDS_ALU2 16 16
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RDS_TALU2 17
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RDS_TALU2 17
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RDS_VIA2 18
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RDS_VIA2 18
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RDS_ALU3 19
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RDS_ALU3 19 19
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RDS_TALU3 20
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RDS_TALU3 20
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RDS_VIA3 21
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RDS_VIA3 21
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RDS_ALU4 22
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RDS_ALU4 22 22
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RDS_TALU4 23
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RDS_TALU4 23
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RDS_VIA4 25
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RDS_VIA4 25
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RDS_ALU5 26
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RDS_ALU5 26 26
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RDS_TALU5 27
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RDS_TALU5 27
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RDS_VIA5 28
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RDS_VIA5 28
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RDS_ALU6 29
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RDS_ALU6 29 29
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RDS_TALU6 30
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RDS_TALU6 30
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RDS_REF 24
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RDS_REF 24
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