diff --git a/alliance/share/cells/sxlib/000000002.dat b/alliance/share/cells/sxlib/000000002.dat new file mode 100644 index 00000000..17af25bd Binary files /dev/null and b/alliance/share/cells/sxlib/000000002.dat differ diff --git a/alliance/share/cells/sxlib/000000003.dat b/alliance/share/cells/sxlib/000000003.dat new file mode 100644 index 00000000..65e8f6f5 Binary files /dev/null and b/alliance/share/cells/sxlib/000000003.dat differ diff --git a/alliance/share/cells/sxlib/000000004.dat b/alliance/share/cells/sxlib/000000004.dat new file mode 100644 index 00000000..debcadf9 Binary files /dev/null and b/alliance/share/cells/sxlib/000000004.dat differ diff --git a/alliance/share/cells/sxlib/000000005.dat b/alliance/share/cells/sxlib/000000005.dat new file mode 100644 index 00000000..555e4bc2 Binary files /dev/null and b/alliance/share/cells/sxlib/000000005.dat differ diff --git a/alliance/share/cells/sxlib/000000006.dat b/alliance/share/cells/sxlib/000000006.dat new file mode 100644 index 00000000..d76a7a68 Binary files /dev/null and b/alliance/share/cells/sxlib/000000006.dat differ diff --git a/alliance/share/cells/sxlib/000000007.dat b/alliance/share/cells/sxlib/000000007.dat new file mode 100644 index 00000000..26613a76 Binary files /dev/null and b/alliance/share/cells/sxlib/000000007.dat differ diff --git a/alliance/share/cells/sxlib/000000008.dat b/alliance/share/cells/sxlib/000000008.dat new file mode 100644 index 00000000..383432a6 Binary files /dev/null and b/alliance/share/cells/sxlib/000000008.dat differ diff --git a/alliance/share/cells/sxlib/000000009.dat b/alliance/share/cells/sxlib/000000009.dat new file mode 100644 index 00000000..3a345542 Binary files /dev/null and b/alliance/share/cells/sxlib/000000009.dat differ diff --git a/alliance/share/cells/sxlib/000000010.dat b/alliance/share/cells/sxlib/000000010.dat new file mode 100644 index 00000000..0d846578 Binary files /dev/null and b/alliance/share/cells/sxlib/000000010.dat differ diff --git a/alliance/share/cells/sxlib/000000011.dat b/alliance/share/cells/sxlib/000000011.dat new file mode 100644 index 00000000..616e04f9 Binary files /dev/null and b/alliance/share/cells/sxlib/000000011.dat differ diff --git a/alliance/share/cells/sxlib/000000012.dat b/alliance/share/cells/sxlib/000000012.dat new file mode 100644 index 00000000..10f5273e Binary files /dev/null and b/alliance/share/cells/sxlib/000000012.dat differ diff --git a/alliance/share/cells/sxlib/000000013.dat b/alliance/share/cells/sxlib/000000013.dat new file mode 100644 index 00000000..088e5fd7 Binary files /dev/null and b/alliance/share/cells/sxlib/000000013.dat differ diff --git a/alliance/share/cells/sxlib/000000014.dat b/alliance/share/cells/sxlib/000000014.dat new file mode 100644 index 00000000..bd4226c9 Binary files /dev/null and b/alliance/share/cells/sxlib/000000014.dat differ diff --git a/alliance/share/cells/sxlib/000000015.dat b/alliance/share/cells/sxlib/000000015.dat new file mode 100644 index 00000000..093e7c80 Binary files /dev/null and b/alliance/share/cells/sxlib/000000015.dat differ diff --git a/alliance/share/cells/sxlib/000000016.dat b/alliance/share/cells/sxlib/000000016.dat new file mode 100644 index 00000000..2aa30d71 Binary files /dev/null and b/alliance/share/cells/sxlib/000000016.dat differ diff --git a/alliance/share/cells/sxlib/000000017.dat b/alliance/share/cells/sxlib/000000017.dat new file mode 100644 index 00000000..f935a6eb Binary files /dev/null and b/alliance/share/cells/sxlib/000000017.dat differ diff --git a/alliance/share/cells/sxlib/000000018.dat b/alliance/share/cells/sxlib/000000018.dat new file mode 100644 index 00000000..e81f70de Binary files /dev/null and b/alliance/share/cells/sxlib/000000018.dat differ diff --git a/alliance/share/cells/sxlib/000000019.dat b/alliance/share/cells/sxlib/000000019.dat new file mode 100644 index 00000000..84821d8d Binary files /dev/null and b/alliance/share/cells/sxlib/000000019.dat differ diff --git a/alliance/share/cells/sxlib/000000020.dat b/alliance/share/cells/sxlib/000000020.dat new file mode 100644 index 00000000..797261d5 Binary files /dev/null and b/alliance/share/cells/sxlib/000000020.dat differ diff --git a/alliance/share/cells/sxlib/000000021.dat b/alliance/share/cells/sxlib/000000021.dat new file mode 100644 index 00000000..873a6351 Binary files /dev/null and b/alliance/share/cells/sxlib/000000021.dat differ diff --git a/alliance/share/cells/sxlib/000000022.dat b/alliance/share/cells/sxlib/000000022.dat new file mode 100644 index 00000000..308b20c6 Binary files /dev/null and b/alliance/share/cells/sxlib/000000022.dat differ diff --git a/alliance/share/cells/sxlib/000000023.dat b/alliance/share/cells/sxlib/000000023.dat new file mode 100644 index 00000000..c49c97f3 Binary files /dev/null and b/alliance/share/cells/sxlib/000000023.dat differ diff --git a/alliance/share/cells/sxlib/000000024.dat b/alliance/share/cells/sxlib/000000024.dat new file mode 100644 index 00000000..3fcb3ccf Binary files /dev/null and b/alliance/share/cells/sxlib/000000024.dat differ diff --git a/alliance/share/cells/sxlib/000000025.dat b/alliance/share/cells/sxlib/000000025.dat new file mode 100644 index 00000000..a6c512e4 Binary files /dev/null and b/alliance/share/cells/sxlib/000000025.dat differ diff --git a/alliance/share/cells/sxlib/000000026.dat b/alliance/share/cells/sxlib/000000026.dat new file mode 100644 index 00000000..a09aa419 Binary files /dev/null and b/alliance/share/cells/sxlib/000000026.dat differ diff --git a/alliance/share/cells/sxlib/000000027.dat b/alliance/share/cells/sxlib/000000027.dat new file mode 100644 index 00000000..bdd58e7f Binary files /dev/null and b/alliance/share/cells/sxlib/000000027.dat differ diff --git a/alliance/share/cells/sxlib/000000028.dat b/alliance/share/cells/sxlib/000000028.dat new file mode 100644 index 00000000..c820c970 Binary files /dev/null and b/alliance/share/cells/sxlib/000000028.dat differ diff --git a/alliance/share/cells/sxlib/000000029.dat b/alliance/share/cells/sxlib/000000029.dat new file mode 100644 index 00000000..9a07fe50 Binary files /dev/null and b/alliance/share/cells/sxlib/000000029.dat differ diff --git a/alliance/share/cells/sxlib/000000030.dat b/alliance/share/cells/sxlib/000000030.dat new file mode 100644 index 00000000..f86511c0 Binary files /dev/null and b/alliance/share/cells/sxlib/000000030.dat differ diff --git a/alliance/share/cells/sxlib/000000031.dat b/alliance/share/cells/sxlib/000000031.dat new file mode 100644 index 00000000..823d4779 Binary files /dev/null and b/alliance/share/cells/sxlib/000000031.dat differ diff --git a/alliance/share/cells/sxlib/000000032.dat b/alliance/share/cells/sxlib/000000032.dat new file mode 100644 index 00000000..b6791b99 Binary files /dev/null and b/alliance/share/cells/sxlib/000000032.dat differ diff --git a/alliance/share/cells/sxlib/000000033.dat b/alliance/share/cells/sxlib/000000033.dat new file mode 100644 index 00000000..77233378 Binary files /dev/null and b/alliance/share/cells/sxlib/000000033.dat differ diff --git a/alliance/share/cells/sxlib/000000034.dat b/alliance/share/cells/sxlib/000000034.dat new file mode 100644 index 00000000..a46039da Binary files /dev/null and b/alliance/share/cells/sxlib/000000034.dat differ diff --git a/alliance/share/cells/sxlib/000000035.dat b/alliance/share/cells/sxlib/000000035.dat new file mode 100644 index 00000000..b55a4dd2 Binary files /dev/null and b/alliance/share/cells/sxlib/000000035.dat differ diff --git a/alliance/share/cells/sxlib/000000036.dat b/alliance/share/cells/sxlib/000000036.dat new file mode 100644 index 00000000..42456cf1 Binary files /dev/null and b/alliance/share/cells/sxlib/000000036.dat differ diff --git a/alliance/share/cells/sxlib/000000037.dat b/alliance/share/cells/sxlib/000000037.dat new file mode 100644 index 00000000..ef6f7639 Binary files /dev/null and b/alliance/share/cells/sxlib/000000037.dat differ diff --git a/alliance/share/cells/sxlib/000000038.dat b/alliance/share/cells/sxlib/000000038.dat new file mode 100644 index 00000000..cb4f4327 Binary files /dev/null and b/alliance/share/cells/sxlib/000000038.dat differ diff --git a/alliance/share/cells/sxlib/000000039.dat b/alliance/share/cells/sxlib/000000039.dat new file mode 100644 index 00000000..dd683973 Binary files /dev/null and b/alliance/share/cells/sxlib/000000039.dat differ diff --git a/alliance/share/cells/sxlib/000000040.dat b/alliance/share/cells/sxlib/000000040.dat new file mode 100644 index 00000000..94e86746 Binary files /dev/null and b/alliance/share/cells/sxlib/000000040.dat differ diff --git a/alliance/share/cells/sxlib/000000041.dat b/alliance/share/cells/sxlib/000000041.dat new file mode 100644 index 00000000..c775cab4 Binary files /dev/null and b/alliance/share/cells/sxlib/000000041.dat differ diff --git a/alliance/share/cells/sxlib/000000042.dat b/alliance/share/cells/sxlib/000000042.dat new file mode 100644 index 00000000..762d9054 Binary files /dev/null and b/alliance/share/cells/sxlib/000000042.dat differ diff --git a/alliance/share/cells/sxlib/000000043.dat b/alliance/share/cells/sxlib/000000043.dat new file mode 100644 index 00000000..9f717bd8 Binary files /dev/null and b/alliance/share/cells/sxlib/000000043.dat differ diff --git a/alliance/share/cells/sxlib/000000044.dat b/alliance/share/cells/sxlib/000000044.dat new file mode 100644 index 00000000..0b4fdfad Binary files /dev/null and b/alliance/share/cells/sxlib/000000044.dat differ diff --git a/alliance/share/cells/sxlib/000000045.dat b/alliance/share/cells/sxlib/000000045.dat new file mode 100644 index 00000000..aabd206d Binary files /dev/null and b/alliance/share/cells/sxlib/000000045.dat differ diff --git a/alliance/share/cells/sxlib/000000046.dat b/alliance/share/cells/sxlib/000000046.dat new file mode 100644 index 00000000..11cf01bc Binary files /dev/null and b/alliance/share/cells/sxlib/000000046.dat differ diff --git a/alliance/share/cells/sxlib/000000047.dat b/alliance/share/cells/sxlib/000000047.dat new file mode 100644 index 00000000..0e068a99 Binary files /dev/null and b/alliance/share/cells/sxlib/000000047.dat differ diff --git a/alliance/share/cells/sxlib/000000048.dat b/alliance/share/cells/sxlib/000000048.dat new file mode 100644 index 00000000..8a6b1555 Binary files /dev/null and b/alliance/share/cells/sxlib/000000048.dat differ diff --git a/alliance/share/cells/sxlib/000000049.dat b/alliance/share/cells/sxlib/000000049.dat new file mode 100644 index 00000000..34058fcf Binary files /dev/null and b/alliance/share/cells/sxlib/000000049.dat differ diff --git a/alliance/share/cells/sxlib/000000050.dat b/alliance/share/cells/sxlib/000000050.dat new file mode 100644 index 00000000..bcb8f55c Binary files /dev/null and b/alliance/share/cells/sxlib/000000050.dat differ diff --git a/alliance/share/cells/sxlib/000000051.dat b/alliance/share/cells/sxlib/000000051.dat new file mode 100644 index 00000000..a8f74a1b Binary files /dev/null and b/alliance/share/cells/sxlib/000000051.dat differ diff --git a/alliance/share/cells/sxlib/000000052.dat b/alliance/share/cells/sxlib/000000052.dat new file mode 100644 index 00000000..a8edaff3 Binary files /dev/null and b/alliance/share/cells/sxlib/000000052.dat differ diff --git a/alliance/share/cells/sxlib/000000053.dat b/alliance/share/cells/sxlib/000000053.dat new file mode 100644 index 00000000..9d46a2d1 Binary files /dev/null and b/alliance/share/cells/sxlib/000000053.dat differ diff --git a/alliance/share/cells/sxlib/000000054.dat b/alliance/share/cells/sxlib/000000054.dat new file mode 100644 index 00000000..9f982c0a Binary files /dev/null and b/alliance/share/cells/sxlib/000000054.dat differ diff --git a/alliance/share/cells/sxlib/000000055.dat b/alliance/share/cells/sxlib/000000055.dat new file mode 100644 index 00000000..56416a3f Binary files /dev/null and b/alliance/share/cells/sxlib/000000055.dat differ diff --git a/alliance/share/cells/sxlib/000000056.dat b/alliance/share/cells/sxlib/000000056.dat new file mode 100644 index 00000000..474bef3f Binary files /dev/null and b/alliance/share/cells/sxlib/000000056.dat differ diff --git a/alliance/share/cells/sxlib/000000057.dat b/alliance/share/cells/sxlib/000000057.dat new file mode 100644 index 00000000..87c65eb4 Binary files /dev/null and b/alliance/share/cells/sxlib/000000057.dat differ diff --git a/alliance/share/cells/sxlib/000000058.dat b/alliance/share/cells/sxlib/000000058.dat new file mode 100644 index 00000000..9117d37a Binary files /dev/null and b/alliance/share/cells/sxlib/000000058.dat differ diff --git a/alliance/share/cells/sxlib/000000059.dat b/alliance/share/cells/sxlib/000000059.dat new file mode 100644 index 00000000..61990003 Binary files /dev/null and b/alliance/share/cells/sxlib/000000059.dat differ diff --git a/alliance/share/cells/sxlib/000000060.dat b/alliance/share/cells/sxlib/000000060.dat new file mode 100644 index 00000000..f39e2a40 Binary files /dev/null and b/alliance/share/cells/sxlib/000000060.dat differ diff --git a/alliance/share/cells/sxlib/000000061.dat b/alliance/share/cells/sxlib/000000061.dat new file mode 100644 index 00000000..56fdb2bc Binary files /dev/null and b/alliance/share/cells/sxlib/000000061.dat differ diff --git a/alliance/share/cells/sxlib/000000062.dat b/alliance/share/cells/sxlib/000000062.dat new file mode 100644 index 00000000..f86d175d Binary files /dev/null and b/alliance/share/cells/sxlib/000000062.dat differ diff --git a/alliance/share/cells/sxlib/000000063.dat b/alliance/share/cells/sxlib/000000063.dat new file mode 100644 index 00000000..7f516307 Binary files /dev/null and b/alliance/share/cells/sxlib/000000063.dat differ diff --git a/alliance/share/cells/sxlib/000000064.dat b/alliance/share/cells/sxlib/000000064.dat new file mode 100644 index 00000000..40ce3611 Binary files /dev/null and b/alliance/share/cells/sxlib/000000064.dat differ diff --git a/alliance/share/cells/sxlib/000000065.dat b/alliance/share/cells/sxlib/000000065.dat new file mode 100644 index 00000000..e6d17249 Binary files /dev/null and b/alliance/share/cells/sxlib/000000065.dat differ diff --git a/alliance/share/cells/sxlib/000000066.dat b/alliance/share/cells/sxlib/000000066.dat new file mode 100644 index 00000000..6847f03f Binary files /dev/null and b/alliance/share/cells/sxlib/000000066.dat differ diff --git a/alliance/share/cells/sxlib/CIRCUIT.IDX b/alliance/share/cells/sxlib/CIRCUIT.IDX new file mode 100644 index 00000000..c1c86ba7 --- /dev/null +++ b/alliance/share/cells/sxlib/CIRCUIT.IDX @@ -0,0 +1,68 @@ +SystemHILO +xTSWTF040HMODA2ZV +66 +3 A2_X2 2 +3 A2_X4 3 +3 A3_X2 4 +3 A3_X4 5 +3 A4_X2 6 +3 A4_X4 7 +3 AO22_X2 8 +3 AO22_X4 9 +3 AO2O22_X2 10 +3 AO2O22_X4 11 +3 BUF_X2 12 +3 BUF_X4 13 +3 BUF_X8 14 +3 INV_X1 15 +3 INV_X2 16 +3 INV_X4 17 +3 INV_X8 18 +3 MX2_X2 19 +3 MX2_X4 20 +3 NA2_X1 21 +3 NA2_X4 22 +3 NA3_X1 23 +3 NA3_X4 24 +3 NA4_X1 25 +3 NA4_X4 26 +3 NAO22_X1 27 +3 NAO22_X4 28 +3 NAO2O22_X1 29 +3 NAO2O22_X4 30 +3 NMX2_X1 31 +3 NMX2_X4 32 +3 NO2_X1 33 +3 NO2_X4 34 +3 NO3_X1 35 +3 NO3_X4 36 +3 NO4_X1 37 +3 NO4_X4 38 +3 NOA22_X1 39 +3 NOA22_X4 40 +3 NOA2A22_X1 41 +3 NOA2A22_X4 42 +3 NTS_X1 43 +3 NTS_X2 44 +3 NXR2_X1 45 +3 NXR2_X4 46 +3 O2_X2 47 +3 O2_X4 48 +3 O3_X2 49 +3 O3_X4 50 +3 O4_X2 51 +3 O4_X4 52 +3 OA22_X2 53 +3 OA22_X4 54 +3 OA2A22_X2 55 +3 OA2A22_X4 56 +3 ONE_X0 57 +3 ROWEND_X0 58 +3 SFF1_X4 59 +3 SFF2_X4 60 +3 TIE_X0 61 +3 TS_X4 62 +3 TS_X8 63 +3 XR2_X1 64 +3 XR2_X4 65 +3 ZERO_X0 66 diff --git a/alliance/share/cells/sxlib/sxlib.cct b/alliance/share/cells/sxlib/sxlib.cct new file mode 100644 index 00000000..277434c9 --- /dev/null +++ b/alliance/share/cells/sxlib/sxlib.cct @@ -0,0 +1,638 @@ +Circuit a2_x2 ( + Input i0 , + Input i1 , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE q := (i0 and i1) ; +EndCircuit +Circuit a2_x4 ( + Input i0 , + Input i1 , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE q := (i0 and i1) ; +EndCircuit +Circuit a3_x2 ( + Input i0 , + Input i1 , + Input i2 , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE q := ((i0 and i1) and i2) ; +EndCircuit +Circuit a3_x4 ( + Input i0 , + Input i1 , + Input i2 , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE q := ((i0 and i1) and i2) ; +EndCircuit +Circuit a4_x2 ( + Input i0 , + Input i1 , + Input i2 , + Input i3 , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE q := (((i0 and i1) and i2) and i3) ; +EndCircuit +Circuit a4_x4 ( + Input i0 , + Input i1 , + Input i2 , + Input i3 , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE q := (((i0 and i1) and i2) and i3) ; +EndCircuit +Circuit ao22_x2 ( + Input i0 , + Input i1 , + Input i2 , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE q := ((i0 or i1) and i2) ; +EndCircuit +Circuit ao22_x4 ( + Input i0 , + Input i1 , + Input i2 , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE q := ((i0 or i1) and i2) ; +EndCircuit +Circuit ao2o22_x2 ( + Input i0 , + Input i1 , + Input i2 , + Input i3 , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE q := ((i0 or i1) and (i2 or i3)) ; +EndCircuit +Circuit ao2o22_x4 ( + Input i0 , + Input i1 , + Input i2 , + Input i3 , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE q := ((i0 or i1) and (i2 or i3)) ; +EndCircuit +Circuit buf_x2 ( + Input i , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE q := i ; +EndCircuit +Circuit buf_x4 ( + Input i , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE q := i ; +EndCircuit +Circuit buf_x8 ( + Input i , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE q := i ; +EndCircuit +Circuit inv_x1 ( + Input i , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := not i ; +EndCircuit +Circuit inv_x2 ( + Input i , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := not i ; +EndCircuit +Circuit inv_x4 ( + Input i , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := not i ; +EndCircuit +Circuit inv_x8 ( + Input i , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := not i ; +EndCircuit +Circuit mx2_x2 ( + Input cmd , + Input i0 , + Input i1 , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE q := ((i1 and cmd) or (not cmd and i0)) ; +EndCircuit +Circuit mx2_x4 ( + Input cmd , + Input i0 , + Input i1 , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE q := ((i1 and cmd) or (not cmd and i0)) ; +EndCircuit +Circuit na2_x1 ( + Input i0 , + Input i1 , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := not (i0 and i1) ; +EndCircuit +Circuit na2_x4 ( + Input i0 , + Input i1 , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := not (i0 and i1) ; +EndCircuit +Circuit na3_x1 ( + Input i0 , + Input i1 , + Input i2 , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := not ((i0 and i1) and i2) ; +EndCircuit +Circuit na3_x4 ( + Input i0 , + Input i1 , + Input i2 , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := not ((i0 and i1) and i2) ; +EndCircuit +Circuit na4_x1 ( + Input i0 , + Input i1 , + Input i2 , + Input i3 , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := not (((i0 and i1) and i2) and i3) ; +EndCircuit +Circuit na4_x4 ( + Input i0 , + Input i1 , + Input i2 , + Input i3 , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := not (((i0 and i1) and i2) and i3) ; +EndCircuit +Circuit nao22_x1 ( + Input i0 , + Input i1 , + Input i2 , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := not ((i0 or i1) and i2) ; +EndCircuit +Circuit nao22_x4 ( + Input i0 , + Input i1 , + Input i2 , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := not ((i0 or i1) and i2) ; +EndCircuit +Circuit nao2o22_x1 ( + Input i0 , + Input i1 , + Input i2 , + Input i3 , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := not ((i0 or i1) and (i2 or i3)) ; +EndCircuit +Circuit nao2o22_x4 ( + Input i0 , + Input i1 , + Input i2 , + Input i3 , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := not ((i0 or i1) and (i2 or i3)) ; +EndCircuit +Circuit nmx2_x1 ( + Input cmd , + Input i0 , + Input i1 , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := not ((i0 and not cmd) or (i1 and cmd)) ; +EndCircuit +Circuit nmx2_x4 ( + Input cmd , + Input i0 , + Input i1 , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := not ((i0 and not cmd) or (i1 and cmd)) ; +EndCircuit +Circuit no2_x1 ( + Input i0 , + Input i1 , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := not (i0 or i1) ; +EndCircuit +Circuit no2_x4 ( + Input i0 , + Input i1 , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := not (i0 or i1) ; +EndCircuit +Circuit no3_x1 ( + Input i0 , + Input i1 , + Input i2 , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := not ((i0 or i1) or i2) ; +EndCircuit +Circuit no3_x4 ( + Input i0 , + Input i1 , + Input i2 , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := not ((i0 or i1) or i2) ; +EndCircuit +Circuit no4_x1 ( + Input i0 , + Input i1 , + Input i2 , + Input i3 , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := not (((i0 or i1) or i2) or i3) ; +EndCircuit +Circuit no4_x4 ( + Input i0 , + Input i1 , + Input i2 , + Input i3 , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := not (((i0 or i1) or i2) or i3) ; +EndCircuit +Circuit noa22_x1 ( + Input i0 , + Input i1 , + Input i2 , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := not ((i0 and i1) or i2) ; +EndCircuit +Circuit noa22_x4 ( + Input i0 , + Input i1 , + Input i2 , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := not ((i0 and i1) or i2) ; +EndCircuit +Circuit noa2a22_x1 ( + Input i0 , + Input i1 , + Input i2 , + Input i3 , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := not ((i0 and i1) or (i2 and i3)) ; +EndCircuit +Circuit noa2a22_x4 ( + Input i0 , + Input i1 , + Input i2 , + Input i3 , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := not ((i0 and i1) or (i2 and i3)) ; +EndCircuit +Circuit nts_x1 ( + Input cmd , + Input i , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE commande_0_nq := cmd ; +WIRE data_0_nq := not i ; +TRI1 nq ; + BUFIF1 tri_0_nq (nq,data_0_nq,commande_0_nq) ; +EndCircuit +Circuit nts_x2 ( + Input cmd , + Input i , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE commande_0_nq := cmd ; +WIRE data_0_nq := not i ; +TRI1 nq ; + BUFIF1 tri_0_nq (nq,data_0_nq,commande_0_nq) ; +EndCircuit +Circuit nxr2_x1 ( + Input i0 , + Input i1 , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := not (i0 xor i1) ; +EndCircuit +Circuit nxr2_x4 ( + Input i0 , + Input i1 , + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := not (i0 xor i1) ; +EndCircuit +Circuit o2_x2 ( + Input i0 , + Input i1 , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE q := (i0 or i1) ; +EndCircuit +Circuit o2_x4 ( + Input i0 , + Input i1 , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE q := (i0 or i1) ; +EndCircuit +Circuit o3_x2 ( + Input i0 , + Input i1 , + Input i2 , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE q := ((i0 or i1) or i2) ; +EndCircuit +Circuit o3_x4 ( + Input i0 , + Input i1 , + Input i2 , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE q := ((i0 or i1) or i2) ; +EndCircuit +Circuit o4_x2 ( + Input i0 , + Input i1 , + Input i2 , + Input i3 , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE q := (((i0 or i1) or i2) or i3) ; +EndCircuit +Circuit o4_x4 ( + Input i0 , + Input i1 , + Input i2 , + Input i3 , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE q := (((i0 or i1) or i2) or i3) ; +EndCircuit +Circuit oa22_x2 ( + Input i0 , + Input i1 , + Input i2 , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE q := ((i0 and i1) or i2) ; +EndCircuit +Circuit oa22_x4 ( + Input i0 , + Input i1 , + Input i2 , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE q := ((i0 and i1) or i2) ; +EndCircuit +Circuit oa2a22_x2 ( + Input i0 , + Input i1 , + Input i2 , + Input i3 , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE q := ((i0 and i1) or (i2 and i3)) ; +EndCircuit +Circuit oa2a22_x4 ( + Input i0 , + Input i1 , + Input i2 , + Input i3 , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE q := ((i0 and i1) or (i2 and i3)) ; +EndCircuit +Circuit one_x0 ( + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE q := 1 ; +EndCircuit +Circuit rowend_x0 ( + Supply1 vdd , + Supply0 vss + ); +EndCircuit +Circuit sff1_x4 ( + Input ck , + Input i , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE sff_m_bcond_0 := ck ; +REGISTER (1,1) sff_m ; +WHEN sff_m_bcond_0 (0 TO 1) DO sff_m := i ; +WIRE q := sff_m ; +EndCircuit +Circuit sff2_x4 ( + Input ck , + Input cmd , + Input i0 , + Input i1 , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE sff_m_bcond_0 := ck ; +REGISTER (1,1) sff_m ; +WHEN sff_m_bcond_0 (0 TO 1) DO sff_m := ((i1 and cmd) or (i0 and not cmd)) ; +WIRE q := sff_m ; +EndCircuit +Circuit tie_x0 ( + Supply1 vdd , + Supply0 vss + ); +EndCircuit +Circuit ts_x4 ( + Input cmd , + Input i , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE commande_0_q := cmd ; +WIRE data_0_q := i ; +TRI1 q ; + BUFIF1 tri_0_q (q,data_0_q,commande_0_q) ; +EndCircuit +Circuit ts_x8 ( + Input cmd , + Input i , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE commande_0_q := cmd ; +WIRE data_0_q := i ; +TRI1 q ; + BUFIF1 tri_0_q (q,data_0_q,commande_0_q) ; +EndCircuit +Circuit xr2_x1 ( + Input i0 , + Input i1 , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE q := (i0 xor i1) ; +EndCircuit +Circuit xr2_x4 ( + Input i0 , + Input i1 , + Output q , + Supply1 vdd , + Supply0 vss + ); +WIRE q := (i0 xor i1) ; +EndCircuit +Circuit zero_x0 ( + Output nq , + Supply1 vdd , + Supply0 vss + ); +WIRE nq := 0 ; +EndCircuit diff --git a/alliance/share/cells/sxlib/sxlib.db b/alliance/share/cells/sxlib/sxlib.db new file mode 100644 index 00000000..e50ca55f Binary files /dev/null and b/alliance/share/cells/sxlib/sxlib.db differ diff --git a/alliance/share/cells/sxlib/sxlib.lib b/alliance/share/cells/sxlib/sxlib.lib new file mode 100644 index 00000000..0cd6c3b1 --- /dev/null +++ b/alliance/share/cells/sxlib/sxlib.lib @@ -0,0 +1,3087 @@ +/* --------------------------------------------- */ +/* written by Franck LE DU and Franck Wajsburt */ +/* */ +/* DEF_SXLIB modified : Sep 27, 1999 */ +/* */ +/* This file is obtained from */ +/* the technolocal parameters contained in the */ +/* VHDL generic data included in the .vbe files. */ +/* This file should not be edited directly. */ +/* */ +/* NOTE FOR NEW REVISION THAT ALL NON ZERO VALUE */ +/* MUST BE UPDATED TO THE NEW TECHNOLOGY AND ALL */ +/* ZERO VALUE SHOULD REMAIN ZERO (CHANGE */ +/* DEFAULT_WIRE_LOAD_RESISTANCE MAY HAVE NO */ +/* EFFECT SINCE ALL USEFUL PARAMETER REQUIRED TO */ +/* TAKE RESISTANCE INTO ACCOUNT ARE NOT DEFINED */ +/* IN THIS FILE */ +/* --------------------------------------------- */ + +library (sxlib) { + + date : "Mon Sep 27 18:56:01 MET DST 1999"; + revision : 1.2; + + /* --------------------------------------------- */ + /* Set of default values required for Synopsys */ + /* technology library generation */ + /* --------------------------------------------- */ + + /* --------------------------------------------- */ + /* default values intended to represent a */ + /* typical na2_x1 cell */ + /* --------------------------------------------- */ + + default_inout_pin_cap : 0.011; /* pf= + */ + default_inout_pin_fall_res : 2.820; /* kOhms */ + default_inout_pin_rise_res : 3.710; /* kOhms */ + default_input_pin_cap : 0.011; /* pf= + */ + default_intrinsic_fall : 0.057; /* ns */ + default_intrinsic_rise : 0.057; /* ns */ + default_output_pin_cap : 0; /* must be 0 */ + default_output_pin_fall_res : 2.820; /* kOhms */ + default_output_pin_rise_res : 3.710; /* kOhms */ + default_slope_fall : 0.1; /* worst case meaning propagation */ + /* time is delayed of .1 the */ + /* transition time of the previous*/ + /* gate */ + default_slope_rise : 0.1; /* idem */ + default_fanout_load : 0.011; /* max of input capacities in pF */ + default_max_fanout : 0.078; /* max output capacitance in pF */ + /* computed in order to a inv_x1 */ + /* be able to drive 10 inv_x1 */ + + /* --------------------------------------------- */ + /* default_wire_load_capacitance in pf/lambda */ + /* is capacitance-per-unit-length value of */ + /* the routing wire */ + /* --------------------------------------------- */ + + default_wire_load_capacitance : 0.00015;/* pf/lambda */ + default_wire_load_resistance : 0; /* must be 0 */ + default_wire_load_area : 0; /* must be 0 */ + default_wire_load_mode : enclosed;/* top/segmented/enclosed */ + + /* --------------------------------------------- */ + /* all these parameters are neglected since */ + /* we choose to only time design with worst case */ + /* operating conditions (must be 0) */ + /* --------------------------------------------- */ + + k_process_drive_fall : 0.0; + k_process_drive_rise : 0.0; + k_process_intrinsic_fall : 0.0; + k_process_intrinsic_rise : 0.0; + k_process_pin_cap : 0.0; + k_process_slope_fall : 0.0; + k_process_slope_rise : 0.0; + k_process_wire_cap : 0.0; + k_process_wire_res : 0.0; + k_temp_drive_fall : 0.0; + k_temp_drive_rise : 0.0; + k_temp_intrinsic_fall : 0.0; + k_temp_intrinsic_rise : 0.0; + k_temp_pin_cap : 0.0; + k_temp_slope_fall : 0.0; + k_temp_slope_rise : 0.0; + k_temp_wire_cap : 0.0; + k_temp_wire_res : 0.0; + k_volt_drive_fall : 0.0; + k_volt_drive_rise : 0.0; + k_volt_intrinsic_fall : 0.0; + k_volt_intrinsic_rise : 0.0; + k_volt_pin_cap : 0.0; + k_volt_slope_fall : 0.0; + k_volt_slope_rise : 0.0; + k_volt_wire_cap : 0.0; + k_volt_wire_res : 0.0; + + /* -------------------------------------------- */ + /* values given as information (unused for */ + /* timing design computation) */ + /* -------------------------------------------- */ + + time_unit : "1ns"; + voltage_unit : "1V"; + current_unit : "1uA"; + pulling_resistance_unit : "1kohm"; + capacitive_load_unit (1,pf); + + /* -------------------------------------------- */ + /* Operating conditions */ + /* -------------------------------------------- */ + + nom_process : 1.5; + nom_temperature : 70.0; + nom_voltage : 3.0; + + in_place_swap_mode : match_footprint; + + /* -------------------------------------------- */ + /* slope and fanout_length are expressed */ + /* in lambda. it represents the average wire */ + /* length from the driver output to one of the */ + /* following input. It means it needs 50 */ + /* lambdas of wire to connect 2 cells whatever */ + /* in small case */ + /* -------------------------------------------- */ + + wire_load("small") { + resistance : 0 ; /* must be 0 */ + capacitance : 0.00015 ; /* pf/lambda */ + area : 0 ; /* must be 0 */ + slope : 50; /* lambda */ + fanout_length(1,50) ; /* first parameter must be 1, second in lambda */ + } + wire_load("medium") { + resistance : 0 ; /* must be 0 */ + capacitance : 0.00015 ; /* pf/lambda */ + area : 0 ; /* must be 0 */ + slope : 100; /* lambda */ + fanout_length(1,100) ; /* first parameter must be 1, second in lambda */ + } + wire_load("big") { + resistance : 0 ; /* must be 0 */ + capacitance : 0.00015 ; /* pf/lambda */ + area : 0 ; /* must be 0 */ + slope : 200; /* lambda */ + fanout_length(1,200) ; /* first parameter must be 1, second in lambda */ + } + + wire_load_selection(medium) { + wire_load_from_area(0,500,"small"); /* less about 200 gates */ + wire_load_from_area(500,1500,"medium"); /* less about 500 gates */ + wire_load_from_area(1500,3000,"big"); /* less about 1000 gates */ + } + default_wire_load_selection : medium + + /*---------------------------------------------- */ + /* Combinationnal cells part 1 */ + /*---------------------------------------------- */ + + cell (buf_x2) { + area : 1.3 /* pitchs */ + cell_footprint : "buf"; + pin(i) { + direction : input; + capacitance : 0.006; + fanout_load : 0.006; + } + pin(q) { + direction : output; + max_fanout : 0.162; + function : "i"; + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.408; + intrinsic_fall : 0.389; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i"; + } + } + } + cell (buf_x4) { + area : 1.7 /* pitchs */ + cell_footprint : "buf"; + pin(i) { + direction : input; + capacitance : 0.009; + fanout_load : 0.009; + } + pin(q) { + direction : output; + max_fanout : 0.324; + function : "i"; + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.377; + intrinsic_fall : 0.408; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i"; + } + } + } + cell (buf_x8) { + area : 2.7 /* pitchs */ + cell_footprint : "buf"; + pin(i) { + direction : input; + capacitance : 0.015; + fanout_load : 0.015; + } + pin(q) { + direction : output; + max_fanout : 0.656; + function : "i"; + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.339; + intrinsic_fall : 0.395; + rise_resistance : 0.440; + fall_resistance : 0.400; + related_pin : "i"; + } + } + } + cell (inv_x1) { + area : 1.0 /* pitchs */ + cell_footprint : "inv"; + pin(i) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(nq) { + direction : output; + max_fanout : 0.078; + function : "i'"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.100; + intrinsic_fall : 0.139; + rise_resistance : 3.710; + fall_resistance : 3.610; + related_pin : "i"; + } + } + } + cell (inv_x2) { + area : 1.0 /* pitchs */ + cell_footprint : "inv"; + pin(i) { + direction : input; + capacitance : 0.012; + fanout_load : 0.012; + } + pin(nq) { + direction : output; + max_fanout : 0.120; + function : "i'"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.068; + intrinsic_fall : 0.162; + rise_resistance : 2.410; + fall_resistance : 1.600; + related_pin : "i"; + } + } + } + cell (inv_x4) { + area : 1.3 /* pitchs */ + cell_footprint : "inv"; + pin(i) { + direction : input; + capacitance : 0.026; + fanout_load : 0.026; + } + pin(nq) { + direction : output; + max_fanout : 0.272; + function : "i'"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.070; + intrinsic_fall : 0.142; + rise_resistance : 1.060; + fall_resistance : 0.800; + related_pin : "i"; + } + } + } + cell (inv_x8) { + area : 2.3 /* pitchs */ + cell_footprint : "inv"; + pin(i) { + direction : input; + capacitance : 0.054; + fanout_load : 0.054; + } + pin(nq) { + direction : output; + max_fanout : 0.656; + function : "i'"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.084; + intrinsic_fall : 0.132; + rise_resistance : 0.440; + fall_resistance : 0.400; + related_pin : "i"; + } + } + } + cell (o2_x2) { + area : 1.7 /* pitchs */ + cell_footprint : "o2"; + pin(i0) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(i1) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(q) { + direction : output; + max_fanout : 0.162; + function : "(i0 + i1)"; + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.403; + intrinsic_fall : 0.296; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i0"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.332; + intrinsic_fall : 0.363; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i1"; + } + } + } + cell (o2_x4) { + area : 2.0 /* pitchs */ + cell_footprint : "o2"; + pin(i0) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(i1) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(q) { + direction : output; + max_fanout : 0.324; + function : "(i0 + i1)"; + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.487; + intrinsic_fall : 0.381; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i0"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.423; + intrinsic_fall : 0.462; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i1"; + } + } + } + cell (o3_x2) { + area : 2.0 /* pitchs */ + cell_footprint : "o3"; + pin(i0) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(i1) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(i2) { + direction : input; + capacitance : 0.009; + fanout_load : 0.009; + } + pin(q) { + direction : output; + max_fanout : 0.162; + function : "(i0 + i1 + i2)"; + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.491; + intrinsic_fall : 0.405; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i0"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.427; + intrinsic_fall : 0.480; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i1"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.358; + intrinsic_fall : 0.504; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i2"; + } + } + } + cell (o3_x4) { + area : 2.3 /* pitchs */ + cell_footprint : "o3"; + pin(i0) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(i1) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(i2) { + direction : input; + capacitance : 0.009; + fanout_load : 0.009; + } + pin(q) { + direction : output; + max_fanout : 0.324; + function : "(i0 + i1 + i2)"; + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.565; + intrinsic_fall : 0.499; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i0"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.507; + intrinsic_fall : 0.583; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i1"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.444; + intrinsic_fall : 0.620; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i2"; + } + } + } + cell (o4_x2) { + area : 2.3 /* pitchs */ + cell_footprint : "o4"; + pin(i0) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(i1) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(i2) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(i3) { + direction : input; + capacitance : 0.009; + fanout_load : 0.009; + } + pin(q) { + direction : output; + max_fanout : 0.162; + function : "(i0 + i1 + i2 + i3)"; + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.505; + intrinsic_fall : 0.589; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i0"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.443; + intrinsic_fall : 0.619; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i1"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.564; + intrinsic_fall : 0.520; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i2"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.376; + intrinsic_fall : 0.624; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i3"; + } + } + } + cell (o4_x4) { + area : 2.7 /* pitchs */ + cell_footprint : "o4"; + pin(i0) { + direction : input; + capacitance : 0.012; + fanout_load : 0.012; + } + pin(i1) { + direction : input; + capacitance : 0.012; + fanout_load : 0.012; + } + pin(i2) { + direction : input; + capacitance : 0.012; + fanout_load : 0.012; + } + pin(i3) { + direction : input; + capacitance : 0.012; + fanout_load : 0.012; + } + pin(q) { + direction : output; + max_fanout : 0.324; + function : "(i0 + i1 + i2 + i3)"; + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.570; + intrinsic_fall : 0.635; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i0"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.489; + intrinsic_fall : 0.640; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i1"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.646; + intrinsic_fall : 0.609; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i2"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.717; + intrinsic_fall : 0.533; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i3"; + } + } + } + cell (no2_x1) { + area : 1.3 /* pitchs */ + cell_footprint : "no2"; + pin(i0) { + direction : input; + capacitance : 0.012; + fanout_load : 0.012; + } + pin(i1) { + direction : input; + capacitance : 0.012; + fanout_load : 0.012; + } + pin(nq) { + direction : output; + max_fanout : 0.080; + function : "(i0 + i1)'"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.303; + intrinsic_fall : 0.121; + rise_resistance : 3.200; + fall_resistance : 3.610; + related_pin : "i0"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.199; + intrinsic_fall : 0.161; + rise_resistance : 3.200; + fall_resistance : 3.610; + related_pin : "i1"; + } + } + } + cell (no2_x4) { + area : 2.3 /* pitchs */ + cell_footprint : "no2"; + pin(i0) { + direction : input; + capacitance : 0.012; + fanout_load : 0.012; + } + pin(i1) { + direction : input; + capacitance : 0.011; + fanout_load : 0.011; + } + pin(nq) { + direction : output; + max_fanout : 0.324; + function : "(i0 + i1)'"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.610; + intrinsic_fall : 0.444; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i0"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.515; + intrinsic_fall : 0.494; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i1"; + } + } + } + cell (no3_x1) { + area : 1.7 /* pitchs */ + cell_footprint : "no3"; + pin(i0) { + direction : input; + capacitance : 0.012; + fanout_load : 0.012; + } + pin(i1) { + direction : input; + capacitance : 0.012; + fanout_load : 0.012; + } + pin(i2) { + direction : input; + capacitance : 0.012; + fanout_load : 0.012; + } + pin(nq) { + direction : output; + max_fanout : 0.062; + function : "(i0 + i1 + i2)'"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.322; + intrinsic_fall : 0.246; + rise_resistance : 4.670; + fall_resistance : 3.610; + related_pin : "i0"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.221; + intrinsic_fall : 0.243; + rise_resistance : 4.670; + fall_resistance : 3.610; + related_pin : "i1"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.410; + intrinsic_fall : 0.191; + rise_resistance : 4.670; + fall_resistance : 3.610; + related_pin : "i2"; + } + } + } + cell (no3_x4) { + area : 2.7 /* pitchs */ + cell_footprint : "no3"; + pin(i0) { + direction : input; + capacitance : 0.012; + fanout_load : 0.012; + } + pin(i1) { + direction : input; + capacitance : 0.012; + fanout_load : 0.012; + } + pin(i2) { + direction : input; + capacitance : 0.011; + fanout_load : 0.011; + } + pin(nq) { + direction : output; + max_fanout : 0.324; + function : "(i0 + i1 + i2)'"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.717; + intrinsic_fall : 0.553; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i0"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.634; + intrinsic_fall : 0.616; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i1"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.541; + intrinsic_fall : 0.632; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i2"; + } + } + } + cell (no4_x1) { + area : 2.0 /* pitchs */ + cell_footprint : "no4"; + pin(i0) { + direction : input; + capacitance : 0.012; + fanout_load : 0.012; + } + pin(i1) { + direction : input; + capacitance : 0.012; + fanout_load : 0.012; + } + pin(i2) { + direction : input; + capacitance : 0.012; + fanout_load : 0.012; + } + pin(i3) { + direction : input; + capacitance : 0.012; + fanout_load : 0.012; + } + pin(nq) { + direction : output; + max_fanout : 0.047; + function : "(i0 + i1 + i2 + i3)'"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.334; + intrinsic_fall : 0.339; + rise_resistance : 6.170; + fall_resistance : 3.610; + related_pin : "i0"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.235; + intrinsic_fall : 0.319; + rise_resistance : 6.170; + fall_resistance : 3.610; + related_pin : "i1"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.421; + intrinsic_fall : 0.332; + rise_resistance : 6.170; + fall_resistance : 3.610; + related_pin : "i2"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.501; + intrinsic_fall : 0.270; + rise_resistance : 6.170; + fall_resistance : 3.610; + related_pin : "i3"; + } + } + } + cell (no4_x4) { + area : 3.3 /* pitchs */ + cell_footprint : "no4"; + pin(i0) { + direction : input; + capacitance : 0.012; + fanout_load : 0.012; + } + pin(i1) { + direction : input; + capacitance : 0.012; + fanout_load : 0.012; + } + pin(i2) { + direction : input; + capacitance : 0.012; + fanout_load : 0.012; + } + pin(i3) { + direction : input; + capacitance : 0.012; + fanout_load : 0.012; + } + pin(nq) { + direction : output; + max_fanout : 0.324; + function : "(i0 + i1 + i2 + i3)'"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.657; + intrinsic_fall : 0.771; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i0"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.567; + intrinsic_fall : 0.762; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i1"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.739; + intrinsic_fall : 0.755; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i2"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.815; + intrinsic_fall : 0.687; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i3"; + } + } + } + cell (a2_x2) { + area : 1.7 /* pitchs */ + cell_footprint : "a2"; + pin(i0) { + direction : input; + capacitance : 0.009; + fanout_load : 0.009; + } + pin(i1) { + direction : input; + capacitance : 0.011; + fanout_load : 0.011; + } + pin(q) { + direction : output; + max_fanout : 0.162; + function : "(i0 * i1)"; + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.259; + intrinsic_fall : 0.394; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i0"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.201; + intrinsic_fall : 0.440; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i1"; + } + } + } + cell (a2_x4) { + area : 2.0 /* pitchs */ + cell_footprint : "a2"; + pin(i0) { + direction : input; + capacitance : 0.009; + fanout_load : 0.009; + } + pin(i1) { + direction : input; + capacitance : 0.011; + fanout_load : 0.011; + } + pin(q) { + direction : output; + max_fanout : 0.324; + function : "(i0 * i1)"; + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.334; + intrinsic_fall : 0.479; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i0"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.261; + intrinsic_fall : 0.521; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i1"; + } + } + } + cell (a3_x2) { + area : 2.0 /* pitchs */ + cell_footprint : "a3"; + pin(i0) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(i1) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(i2) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(q) { + direction : output; + max_fanout : 0.162; + function : "(i0 * i1 * i2)"; + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.391; + intrinsic_fall : 0.440; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i0"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.349; + intrinsic_fall : 0.483; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i1"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.286; + intrinsic_fall : 0.525; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i2"; + } + } + } + cell (a3_x4) { + area : 2.3 /* pitchs */ + cell_footprint : "a3"; + pin(i0) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(i1) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(i2) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(q) { + direction : output; + max_fanout : 0.324; + function : "(i0 * i1 * i2)"; + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.473; + intrinsic_fall : 0.518; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i0"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.423; + intrinsic_fall : 0.558; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i1"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.352; + intrinsic_fall : 0.596; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i2"; + } + } + } + cell (a4_x2) { + area : 2.3 /* pitchs */ + cell_footprint : "a4"; + pin(i0) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(i1) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(i2) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(i3) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(q) { + direction : output; + max_fanout : 0.162; + function : "(i0 * i1 * i2 * i3)"; + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.370; + intrinsic_fall : 0.582; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i0"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.436; + intrinsic_fall : 0.543; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i1"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.477; + intrinsic_fall : 0.502; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i2"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.501; + intrinsic_fall : 0.460; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i3"; + } + } + } + cell (a4_x4) { + area : 2.7 /* pitchs */ + cell_footprint : "a4"; + pin(i0) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(i1) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(i2) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(i3) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(q) { + direction : output; + max_fanout : 0.324; + function : "(i0 * i1 * i2 * i3)"; + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.499; + intrinsic_fall : 0.653; + rise_resistance : 0.890; + fall_resistance : 0.530; + related_pin : "i0"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.572; + intrinsic_fall : 0.618; + rise_resistance : 0.890; + fall_resistance : 0.530; + related_pin : "i1"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.620; + intrinsic_fall : 0.581; + rise_resistance : 0.890; + fall_resistance : 0.530; + related_pin : "i2"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.654; + intrinsic_fall : 0.543; + rise_resistance : 0.890; + fall_resistance : 0.530; + related_pin : "i3"; + } + } + } + cell (na2_x1) { + area : 1.3 /* pitchs */ + cell_footprint : "na2"; + pin(i0) { + direction : input; + capacitance : 0.011; + fanout_load : 0.011; + } + pin(i1) { + direction : input; + capacitance : 0.011; + fanout_load : 0.011; + } + pin(nq) { + direction : output; + max_fanout : 0.078; + function : "(i0 * i1)'"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.057; + intrinsic_fall : 0.294; + rise_resistance : 3.710; + fall_resistance : 2.820; + related_pin : "i0"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.109; + intrinsic_fall : 0.242; + rise_resistance : 3.710; + fall_resistance : 2.820; + related_pin : "i1"; + } + } + } + cell (na2_x4) { + area : 2.3 /* pitchs */ + cell_footprint : "na2"; + pin(i0) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(i1) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(nq) { + direction : output; + max_fanout : 0.324; + function : "(i0 * i1)'"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.408; + intrinsic_fall : 0.557; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i0"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.349; + intrinsic_fall : 0.606; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i1"; + } + } + } + cell (na3_x1) { + area : 1.7 /* pitchs */ + cell_footprint : "na3"; + pin(i0) { + direction : input; + capacitance : 0.011; + fanout_load : 0.011; + } + pin(i1) { + direction : input; + capacitance : 0.011; + fanout_load : 0.011; + } + pin(i2) { + direction : input; + capacitance : 0.011; + fanout_load : 0.011; + } + pin(nq) { + direction : output; + max_fanout : 0.071; + function : "(i0 * i1 * i2)'"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.117; + intrinsic_fall : 0.369; + rise_resistance : 3.710; + fall_resistance : 4.070; + related_pin : "i0"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.168; + intrinsic_fall : 0.322; + rise_resistance : 3.710; + fall_resistance : 4.070; + related_pin : "i1"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.191; + intrinsic_fall : 0.272; + rise_resistance : 3.710; + fall_resistance : 4.070; + related_pin : "i2"; + } + } + } + cell (na3_x4) { + area : 2.7 /* pitchs */ + cell_footprint : "na3"; + pin(i0) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(i1) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(i2) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(nq) { + direction : output; + max_fanout : 0.324; + function : "(i0 * i1 * i2)'"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.550; + intrinsic_fall : 0.605; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i0"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.454; + intrinsic_fall : 0.694; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i1"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.512; + intrinsic_fall : 0.651; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i2"; + } + } + } + cell (na4_x1) { + area : 2.0 /* pitchs */ + cell_footprint : "na4"; + pin(i0) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(i1) { + direction : input; + capacitance : 0.011; + fanout_load : 0.011; + } + pin(i2) { + direction : input; + capacitance : 0.011; + fanout_load : 0.011; + } + pin(i3) { + direction : input; + capacitance : 0.011; + fanout_load : 0.011; + } + pin(nq) { + direction : output; + max_fanout : 0.054; + function : "(i0 * i1 * i2 * i3)'"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.175; + intrinsic_fall : 0.437; + rise_resistance : 3.710; + fall_resistance : 5.340; + related_pin : "i0"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.234; + intrinsic_fall : 0.395; + rise_resistance : 3.710; + fall_resistance : 5.340; + related_pin : "i1"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.265; + intrinsic_fall : 0.350; + rise_resistance : 3.710; + fall_resistance : 5.340; + related_pin : "i2"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.279; + intrinsic_fall : 0.301; + rise_resistance : 3.710; + fall_resistance : 5.340; + related_pin : "i3"; + } + } + } + cell (na4_x4) { + area : 3.3 /* pitchs */ + cell_footprint : "na4"; + pin(i0) { + direction : input; + capacitance : 0.010; + fanout_load : 0.010; + } + pin(i1) { + direction : input; + capacitance : 0.011; + fanout_load : 0.011; + } + pin(i2) { + direction : input; + capacitance : 0.011; + fanout_load : 0.011; + } + pin(i3) { + direction : input; + capacitance : 0.011; + fanout_load : 0.011; + } + pin(nq) { + direction : output; + max_fanout : 0.324; + function : "(i0 * i1 * i2 * i3)'"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.573; + intrinsic_fall : 0.773; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i0"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.637; + intrinsic_fall : 0.733; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i1"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.675; + intrinsic_fall : 0.691; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i2"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.697; + intrinsic_fall : 0.647; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i3"; + } + } + } + cell (noa22_x1) { + area : 2.0 /* pitchs */ + cell_footprint : "noa22"; + pin(i0) { + direction : input; + capacitance : 0.014; + fanout_load : 0.014; + } + pin(i1) { + direction : input; + capacitance : 0.014; + fanout_load : 0.014; + } + pin(i2) { + direction : input; + capacitance : 0.014; + fanout_load : 0.014; + } + pin(nq) { + direction : output; + max_fanout : 0.090; + function : "((i0 * i1) + i2)'"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.148; + intrinsic_fall : 0.327; + rise_resistance : 3.200; + fall_resistance : 2.820; + related_pin : "i0"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.215; + intrinsic_fall : 0.286; + rise_resistance : 3.200; + fall_resistance : 2.820; + related_pin : "i1"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.215; + intrinsic_fall : 0.241; + rise_resistance : 3.200; + fall_resistance : 1.600; + related_pin : "i2"; + } + } + } + cell (noa22_x4) { + area : 3.3 /* pitchs */ + cell_footprint : "noa22"; + pin(i0) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i1) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i2) { + direction : input; + capacitance : 0.009; + fanout_load : 0.009; + } + pin(nq) { + direction : output; + max_fanout : 0.324; + function : "((i0 * i1) + i2)'"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.542; + intrinsic_fall : 0.737; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i0"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.634; + intrinsic_fall : 0.706; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i1"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.602; + intrinsic_fall : 0.643; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i2"; + } + } + } + cell (nao22_x1) { + area : 2.0 /* pitchs */ + cell_footprint : "nao22"; + pin(i0) { + direction : input; + capacitance : 0.014; + fanout_load : 0.014; + } + pin(i1) { + direction : input; + capacitance : 0.014; + fanout_load : 0.014; + } + pin(i2) { + direction : input; + capacitance : 0.014; + fanout_load : 0.014; + } + pin(nq) { + direction : output; + max_fanout : 0.090; + function : "((i0 + i1) * i2)'"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.291; + intrinsic_fall : 0.226; + rise_resistance : 3.200; + fall_resistance : 2.820; + related_pin : "i0"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.215; + intrinsic_fall : 0.286; + rise_resistance : 3.200; + fall_resistance : 2.820; + related_pin : "i1"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.162; + intrinsic_fall : 0.237; + rise_resistance : 1.780; + fall_resistance : 2.820; + related_pin : "i2"; + } + } + } + cell (nao22_x4) { + area : 3.3 /* pitchs */ + cell_footprint : "nao22"; + pin(i0) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i1) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i2) { + direction : input; + capacitance : 0.009; + fanout_load : 0.009; + } + pin(nq) { + direction : output; + max_fanout : 0.324; + function : "((i0 + i1) * i2)'"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.724; + intrinsic_fall : 0.635; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i0"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.656; + intrinsic_fall : 0.717; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i1"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.580; + intrinsic_fall : 0.630; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i2"; + } + } + } + cell (oa22_x2) { + area : 2.0 /* pitchs */ + cell_footprint : "oa22"; + pin(i0) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i1) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i2) { + direction : input; + capacitance : 0.009; + fanout_load : 0.009; + } + pin(q) { + direction : output; + max_fanout : 0.162; + function : "((i0 * i1) + i2)"; + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.386; + intrinsic_fall : 0.553; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i0"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.484; + intrinsic_fall : 0.523; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i1"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.434; + intrinsic_fall : 0.453; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i2"; + } + } + } + cell (oa22_x4) { + area : 2.7 /* pitchs */ + cell_footprint : "oa22"; + pin(i0) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i1) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i2) { + direction : input; + capacitance : 0.009; + fanout_load : 0.009; + } + pin(q) { + direction : output; + max_fanout : 0.324; + function : "((i0 * i1) + i2)"; + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.508; + intrinsic_fall : 0.675; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i0"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.612; + intrinsic_fall : 0.648; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i1"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.520; + intrinsic_fall : 0.569; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i2"; + } + } + } + cell (ao22_x2) { + area : 2.0 /* pitchs */ + cell_footprint : "ao22"; + pin(i0) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i1) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i2) { + direction : input; + capacitance : 0.009; + fanout_load : 0.009; + } + pin(q) { + direction : output; + max_fanout : 0.162; + function : "((i0 + i1) * i2)"; + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.554; + intrinsic_fall : 0.444; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i0"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.489; + intrinsic_fall : 0.523; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i1"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.416; + intrinsic_fall : 0.423; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i2"; + } + } + } + cell (ao22_x4) { + area : 2.7 /* pitchs */ + cell_footprint : "ao22"; + pin(i0) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i1) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i2) { + direction : input; + capacitance : 0.009; + fanout_load : 0.009; + } + pin(q) { + direction : output; + max_fanout : 0.324; + function : "((i0 + i1) * i2)"; + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.670; + intrinsic_fall : 0.550; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i0"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.612; + intrinsic_fall : 0.645; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i1"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.523; + intrinsic_fall : 0.503; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i2"; + } + } + } + cell (nao2o22_x1) { + area : 2.3 /* pitchs */ + cell_footprint : "nao2o22"; + pin(i0) { + direction : input; + capacitance : 0.014; + fanout_load : 0.014; + } + pin(i1) { + direction : input; + capacitance : 0.014; + fanout_load : 0.014; + } + pin(i2) { + direction : input; + capacitance : 0.014; + fanout_load : 0.014; + } + pin(i3) { + direction : input; + capacitance : 0.014; + fanout_load : 0.014; + } + pin(nq) { + direction : output; + max_fanout : 0.090; + function : "((i0 + i1) * (i2 + i3))'"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.291; + intrinsic_fall : 0.226; + rise_resistance : 3.200; + fall_resistance : 2.820; + related_pin : "i0"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.215; + intrinsic_fall : 0.286; + rise_resistance : 3.200; + fall_resistance : 2.820; + related_pin : "i1"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.234; + intrinsic_fall : 0.306; + rise_resistance : 3.200; + fall_resistance : 2.820; + related_pin : "i2"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.171; + intrinsic_fall : 0.381; + rise_resistance : 3.200; + fall_resistance : 2.820; + related_pin : "i3"; + } + } + } + cell (nao2o22_x4) { + area : 3.7 /* pitchs */ + cell_footprint : "nao2o22"; + pin(i0) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i1) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i2) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i3) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(nq) { + direction : output; + max_fanout : 0.324; + function : "((i0 + i1) * (i2 + i3))'"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.722; + intrinsic_fall : 0.631; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i0"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.654; + intrinsic_fall : 0.713; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i1"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.644; + intrinsic_fall : 0.709; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i2"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.587; + intrinsic_fall : 0.803; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i3"; + } + } + } + cell (noa2a22_x1) { + area : 2.3 /* pitchs */ + cell_footprint : "noa2a22"; + pin(i0) { + direction : input; + capacitance : 0.014; + fanout_load : 0.014; + } + pin(i1) { + direction : input; + capacitance : 0.014; + fanout_load : 0.014; + } + pin(i2) { + direction : input; + capacitance : 0.014; + fanout_load : 0.014; + } + pin(i3) { + direction : input; + capacitance : 0.014; + fanout_load : 0.014; + } + pin(nq) { + direction : output; + max_fanout : 0.090; + function : "((i0 * i1) + (i2 * i3))'"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.148; + intrinsic_fall : 0.327; + rise_resistance : 3.200; + fall_resistance : 2.820; + related_pin : "i0"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.215; + intrinsic_fall : 0.286; + rise_resistance : 3.200; + fall_resistance : 2.820; + related_pin : "i1"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.280; + intrinsic_fall : 0.288; + rise_resistance : 3.200; + fall_resistance : 2.820; + related_pin : "i2"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.368; + intrinsic_fall : 0.255; + rise_resistance : 3.200; + fall_resistance : 2.820; + related_pin : "i3"; + } + } + } + cell (noa2a22_x4) { + area : 3.7 /* pitchs */ + cell_footprint : "noa2a22"; + pin(i0) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i1) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i2) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i3) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(nq) { + direction : output; + max_fanout : 0.324; + function : "((i0 * i1) + (i2 * i3))'"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.553; + intrinsic_fall : 0.742; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i0"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.636; + intrinsic_fall : 0.711; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i1"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.691; + intrinsic_fall : 0.700; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i2"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.794; + intrinsic_fall : 0.674; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i3"; + } + } + } + cell (ao2o22_x2) { + area : 3.0 /* pitchs */ + cell_footprint : "ao2o22"; + pin(i0) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i1) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i2) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i3) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(q) { + direction : output; + max_fanout : 0.162; + function : "((i0 + i1) * (i2 + i3))"; + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.569; + intrinsic_fall : 0.450; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i0"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.505; + intrinsic_fall : 0.540; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i1"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.429; + intrinsic_fall : 0.625; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i2"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.485; + intrinsic_fall : 0.524; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i3"; + } + } + } + cell (ao2o22_x4) { + area : 3.3 /* pitchs */ + cell_footprint : "ao2o22"; + pin(i0) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i1) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i2) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i3) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(q) { + direction : output; + max_fanout : 0.324; + function : "((i0 + i1) * (i2 + i3))"; + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.692; + intrinsic_fall : 0.567; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i0"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.634; + intrinsic_fall : 0.664; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i1"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.551; + intrinsic_fall : 0.742; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i2"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.602; + intrinsic_fall : 0.637; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i3"; + } + } + } + cell (oa2a22_x2) { + area : 3.0 /* pitchs */ + cell_footprint : "oa2a22"; + pin(i0) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i1) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i2) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i3) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(q) { + direction : output; + max_fanout : 0.162; + function : "((i0 * i1) + (i2 * i3))"; + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.400; + intrinsic_fall : 0.562; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i0"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.491; + intrinsic_fall : 0.532; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i1"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.641; + intrinsic_fall : 0.485; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i2"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.533; + intrinsic_fall : 0.510; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i3"; + } + } + } + cell (oa2a22_x4) { + area : 3.3 /* pitchs */ + cell_footprint : "oa2a22"; + pin(i0) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i1) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i2) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i3) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(q) { + direction : output; + max_fanout : 0.324; + function : "((i0 * i1) + (i2 * i3))"; + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.515; + intrinsic_fall : 0.684; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i0"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.620; + intrinsic_fall : 0.657; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i1"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.758; + intrinsic_fall : 0.593; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i2"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.640; + intrinsic_fall : 0.616; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i3"; + } + } + } + cell (nxr2_x1) { + area : 3.0 /* pitchs */ + cell_footprint : "nxr2"; + pin(i0) { + direction : input; + capacitance : 0.021; + fanout_load : 0.021; + } + pin(i1) { + direction : input; + capacitance : 0.022; + fanout_load : 0.022; + } + pin(nq) { + direction : output; + max_fanout : 0.090; + function : "(i0 ^ i1)'"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.284; + intrinsic_fall : 0.292; + rise_resistance : 3.200; + fall_resistance : 2.820; + related_pin : "i0"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.153; + intrinsic_fall : 0.327; + rise_resistance : 3.200; + fall_resistance : 2.820; + related_pin : "i1"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.363; + intrinsic_fall : 0.388; + rise_resistance : 3.200; + fall_resistance : 2.820; + related_pin : "i0"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.392; + intrinsic_fall : 0.500; + rise_resistance : 3.200; + fall_resistance : 2.820; + related_pin : "i1"; + } + } + } + cell (nxr2_x4) { + area : 4.0 /* pitchs */ + cell_footprint : "nxr2"; + pin(i0) { + direction : input; + capacitance : 0.020; + fanout_load : 0.020; + } + pin(i1) { + direction : input; + capacitance : 0.021; + fanout_load : 0.021; + } + pin(nq) { + direction : output; + max_fanout : 0.324; + function : "(i0 ^ i1)'"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.517; + intrinsic_fall : 0.548; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i0"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.549; + intrinsic_fall : 0.540; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i1"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.465; + intrinsic_fall : 0.479; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i0"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.563; + intrinsic_fall : 0.451; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i1"; + } + } + } + cell (xr2_x1) { + area : 3.0 /* pitchs */ + cell_footprint : "xr2"; + pin(i0) { + direction : input; + capacitance : 0.021; + fanout_load : 0.021; + } + pin(i1) { + direction : input; + capacitance : 0.022; + fanout_load : 0.022; + } + pin(q) { + direction : output; + max_fanout : 0.090; + function : "(i0 ^ i1)"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.288; + intrinsic_fall : 0.292; + rise_resistance : 3.200; + fall_resistance : 2.820; + related_pin : "i0"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.373; + intrinsic_fall : 0.260; + rise_resistance : 3.200; + fall_resistance : 2.820; + related_pin : "i1"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.363; + intrinsic_fall : 0.388; + rise_resistance : 3.200; + fall_resistance : 2.820; + related_pin : "i0"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.402; + intrinsic_fall : 0.386; + rise_resistance : 3.200; + fall_resistance : 2.820; + related_pin : "i1"; + } + } + } + cell (xr2_x4) { + area : 4.0 /* pitchs */ + cell_footprint : "xr2"; + pin(i0) { + direction : input; + capacitance : 0.020; + fanout_load : 0.020; + } + pin(i1) { + direction : input; + capacitance : 0.021; + fanout_load : 0.021; + } + pin(q) { + direction : output; + max_fanout : 0.324; + function : "(i0 ^ i1)"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.518; + intrinsic_fall : 0.558; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i0"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.537; + intrinsic_fall : 0.653; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i1"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.472; + intrinsic_fall : 0.478; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i0"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.353; + intrinsic_fall : 0.537; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i1"; + } + } + } + cell (mx2_x2) { + area : 3.0 /* pitchs */ + cell_footprint : "mx2"; + pin(cmd) { + direction : input; + capacitance : 0.017; + fanout_load : 0.017; + } + pin(i0) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i1) { + direction : input; + capacitance : 0.009; + fanout_load : 0.009; + } + pin(q) { + direction : output; + max_fanout : 0.162; + function : "(cmd' * i0)+(cmd * i1)"; + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.481; + intrinsic_fall : 0.520; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "cmd"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.448; + intrinsic_fall : 0.467; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i0"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.448; + intrinsic_fall : 0.467; + rise_resistance : 1.780; + fall_resistance : 1.600; + related_pin : "i1"; + } + } + } + cell (mx2_x4) { + area : 3.3 /* pitchs */ + cell_footprint : "mx2"; + pin(cmd) { + direction : input; + capacitance : 0.017; + fanout_load : 0.017; + } + pin(i0) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i1) { + direction : input; + capacitance : 0.009; + fanout_load : 0.009; + } + pin(q) { + direction : output; + max_fanout : 0.324; + function : "(cmd' * i0)+(cmd * i1)"; + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.612; + intrinsic_fall : 0.645; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "cmd"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.560; + intrinsic_fall : 0.574; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i0"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.560; + intrinsic_fall : 0.574; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i1"; + } + } + } + cell (nmx2_x1) { + area : 2.3 /* pitchs */ + cell_footprint : "nmx2"; + pin(cmd) { + direction : input; + capacitance : 0.021; + fanout_load : 0.021; + } + pin(i0) { + direction : input; + capacitance : 0.014; + fanout_load : 0.014; + } + pin(i1) { + direction : input; + capacitance : 0.014; + fanout_load : 0.014; + } + pin(nq) { + direction : output; + max_fanout : 0.090; + function : "((cmd' * i0)+(cmd * i1))'"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.215; + intrinsic_fall : 0.286; + rise_resistance : 3.200; + fall_resistance : 2.820; + related_pin : "cmd"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.214; + intrinsic_fall : 0.255; + rise_resistance : 3.200; + fall_resistance : 2.820; + related_pin : "i0"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.214; + intrinsic_fall : 0.255; + rise_resistance : 3.200; + fall_resistance : 2.820; + related_pin : "i1"; + } + } + } + cell (nmx2_x4) { + area : 4.0 /* pitchs */ + cell_footprint : "nmx2"; + pin(cmd) { + direction : input; + capacitance : 0.017; + fanout_load : 0.017; + } + pin(i0) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(i1) { + direction : input; + capacitance : 0.009; + fanout_load : 0.009; + } + pin(nq) { + direction : output; + max_fanout : 0.324; + function : "((cmd' * i0)+(cmd * i1))'"; + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.628; + intrinsic_fall : 0.700; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "cmd"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.606; + intrinsic_fall : 0.646; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i0"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.606; + intrinsic_fall : 0.646; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i1"; + } + } + } + /* --------------------------------------------- */ + /* combinationnal cells part 2: Three-State */ + /* --------------------------------------------- */ + + cell (nts_x1) { + area : 2.0 /* pitchs */ + cell_footprint : "nts"; + pin(i) { + direction : input; + capacitance : 0.014; + fanout_load : 0.014; + } + pin(cmd) { + direction : input; + capacitance : 0.014; + fanout_load : 0.014; + } + pin(nq) { + direction : output; + max_fanout : 0.090; + function : "i'"; + three_state : "cmd'"; + timing() { + intrinsic_rise : 0.248; + intrinsic_fall : 0.040; + rise_resistance : 3.200; + fall_resistance : 2.820; + related_pin : "cmd"; + } + timing() { + timing_type : three_state_disable; + intrinsic_rise : 0.248; + intrinsic_fall : 0.040; + rise_resistance : 3.200; + fall_resistance : 2.820; + related_pin : "cmd"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.166; + intrinsic_fall : 0.200; + rise_resistance : 3.200; + fall_resistance : 2.820; + related_pin : "i"; + } + } + } + cell (nts_x2) { + area : 2.7 /* pitchs */ + cell_footprint : "nts"; + pin(i) { + direction : input; + capacitance : 0.028; + fanout_load : 0.028; + } + pin(cmd) { + direction : input; + capacitance : 0.018; + fanout_load : 0.018; + } + pin(nq) { + direction : output; + max_fanout : 0.181; + function : "i'"; + three_state : "cmd'"; + timing() { + intrinsic_rise : 0.328; + intrinsic_fall : 0.032; + rise_resistance : 1.600; + fall_resistance : 1.410; + related_pin : "cmd"; + } + timing() { + timing_type : three_state_disable; + intrinsic_rise : 0.328; + intrinsic_fall : 0.032; + rise_resistance : 1.600; + fall_resistance : 1.410; + related_pin : "cmd"; + } + timing() { + timing_sense : negative_unate; + intrinsic_rise : 0.164; + intrinsic_fall : 0.200; + rise_resistance : 1.600; + fall_resistance : 1.410; + related_pin : "i"; + } + } + } + cell (ts_x4) { + area : 3.3 /* pitchs */ + cell_footprint : "ts"; + pin(i) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(cmd) { + direction : input; + capacitance : 0.019; + fanout_load : 0.019; + } + pin(q) { + direction : output; + max_fanout : 0.324; + function : "i"; + three_state : "cmd'"; + timing() { + intrinsic_rise : 0.489; + intrinsic_fall : 0.399; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "cmd"; + } + timing() { + timing_type : three_state_disable; + intrinsic_rise : 0.489; + intrinsic_fall : 0.399; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "cmd"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.471; + intrinsic_fall : 0.442; + rise_resistance : 0.890; + fall_resistance : 0.800; + related_pin : "i"; + } + } + } + cell (ts_x8) { + area : 3.8 /* pitchs */ + cell_footprint : "ts"; + pin(i) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + pin(cmd) { + direction : input; + capacitance : 0.019; + fanout_load : 0.019; + } + pin(q) { + direction : output; + max_fanout : 0.656; + function : "i"; + three_state : "cmd'"; + timing() { + intrinsic_rise : 0.622; + intrinsic_fall : 0.456; + rise_resistance : 0.440; + fall_resistance : 0.400; + related_pin : "cmd"; + } + timing() { + timing_type : three_state_disable; + intrinsic_rise : 0.622; + intrinsic_fall : 0.456; + rise_resistance : 0.440; + fall_resistance : 0.400; + related_pin : "cmd"; + } + timing() { + timing_sense : positive_unate; + intrinsic_rise : 0.609; + intrinsic_fall : 0.559; + rise_resistance : 0.440; + fall_resistance : 0.400; + related_pin : "i"; + } + } + } + + + /* --------------------------------------------- */ + /* Pull-Up, Pull-Down Cells */ + /* --------------------------------------------- */ + + cell (one_x0) { + area : 1.0 /* pitchs */ + cell_footprint : "one"; + pin(q) { + direction : output ; + max_fanout : 7.78437; + function : "1"; + driver_type : pull_up ; + } + } + + cell (zero_x0) { + area : 1.0 /* pitchs */ + cell_footprint : "zero"; + pin(nq) { + direction : output ; + max_fanout : 7.78437; + function : "0"; + driver_type : pull_down ; + } + } + + /* --------------------------------------------- */ + /* Sequential cells part 1 : Flip-Flops */ + /* --------------------------------------------- */ + + cell (sff1_x4) { + area : 600.0 /* pitchs */ + cell_footprint : "sff1"; + pin(i) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + timing() { + timing_type : setup_rising; + intrinsic_rise : 0.476; + intrinsic_fall : 0.585; + related_pin : "ck"; + } + timing() { + timing_type : hold_rising; + intrinsic_rise : 0.000; + intrinsic_fall : 0.000; + related_pin : "ck"; + } + } + pin(ck) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + ff("IQ","IQN") { + next_state : "i"; + clocked_on : "ck"; + } + pin(q) { + direction : output; + max_fanout : 0.324; + function : "IQ"; + timing() { + timing_type : rising_edge; + intrinsic_rise : 0.500; + intrinsic_fall : 0.500; + rise_resistance : 0.890; + fall_resistance : 0.890; + related_pin : "ck"; + } + } + } + cell (sff2_x4) { + area : 800.0 /* pitchs */ + cell_footprint : "sff2"; + dont_use : true; + pin(i0) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + timing() { + timing_type : setup_rising; + intrinsic_rise : 0.666; + intrinsic_fall : 0.764; + related_pin : "ck"; + } + timing() { + timing_type : hold_rising; + intrinsic_rise : 0.000; + intrinsic_fall : 0.000; + related_pin : "ck"; + } + } + pin(i1) { + direction : input; + capacitance : 0.007; + fanout_load : 0.007; + timing() { + timing_type : setup_rising; + intrinsic_rise : 0.666; + intrinsic_fall : 0.764; + related_pin : "ck"; + } + timing() { + timing_type : hold_rising; + intrinsic_rise : 0.000; + intrinsic_fall : 0.000; + related_pin : "ck"; + } + } + pin(cmd) { + direction : input; + capacitance : 0.016; + fanout_load : 0.016; + timing() { + timing_type : setup_rising; + intrinsic_rise : 0.770; + intrinsic_fall : 0.833; + related_pin : "ck"; + } + timing() { + timing_type : hold_rising; + intrinsic_rise : 0.000; + intrinsic_fall : 0.000; + related_pin : "ck"; + } + } + pin(ck) { + direction : input; + capacitance : 0.008; + fanout_load : 0.008; + } + ff("IQ","IQN") { + next_state : "(cmd * i1) + (cmd' * i0)"; + clocked_on : "ck"; + } + pin(q) { + direction : output; + max_fanout : 0.324; + function : "IQ"; + timing() { + timing_type : rising_edge; + intrinsic_rise : 0.500; + intrinsic_fall : 0.500; + rise_resistance : 0.890; + fall_resistance : 0.890; + related_pin : "ck"; + } + } + test_cell() { + ff("IQ","IQN") { + next_state : "i0"; + clocked_on : "ck"; + } + pin(i0,ck) { + direction : input; + } + pin(i1) { + direction : input; + signal_type : test_scan_in; + } + pin(cmd) { + direction : input; + signal_type : test_scan_enable; + } + pin(q) { + direction : output; + function : "IQ"; + signal_type : test_scan_out; + } + } + } +} diff --git a/alliance/share/cells/sxlib/sxlib.sdb b/alliance/share/cells/sxlib/sxlib.sdb new file mode 100644 index 00000000..2f1a7e18 Binary files /dev/null and b/alliance/share/cells/sxlib/sxlib.sdb differ