From 2391b7e3e433166dfeab4f02db06183d9c37314a Mon Sep 17 00:00:00 2001
From: Ludovic Jacomme <alliance-cvs@asim.lip6.fr>
Date: Fri, 9 Nov 2007 20:25:55 +0000
Subject: [PATCH] Bug: In the "synopsys" vhdl driver, output port could read
 after type conversion step ! Fix: apply SimplifyRtlFigure one more time

---
 alliance/src/vasy/src/vasy_drvsyn.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/alliance/src/vasy/src/vasy_drvsyn.c b/alliance/src/vasy/src/vasy_drvsyn.c
index 7c0ace2b..8a376c4a 100644
--- a/alliance/src/vasy/src/vasy_drvsyn.c
+++ b/alliance/src/vasy/src/vasy_drvsyn.c
@@ -2495,6 +2495,7 @@ void VasyDriveSynopsysRtlFig( RtlFigure, FileName )
 ** Special treatments for Synopsys
 */
     VasyDriveSynopsysTreatFigure( RtlFigure );
+    VasySimplifyRtlFig( RtlFigure );
     VasyDriveSynopsysEntity( RtlFigure );
     VasyDriveSynopsysArchi( RtlFigure );