voila une version correcte
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Francois Donnet
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.\" with the GNU C Library; see the file COPYING. If not, write to the Free
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.\" Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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.\"
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.\"
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.\" Tool : Man pages
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.\" Date : 1991,92,2000
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.\"
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.\"
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.pl -.4
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.TH BOOG 1 "Jun 29 2000" "ASIM/LIP6" "CAO\-VLSI Reference Manual"
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.TH LOON 1 "Sept 01 2000" "ASIM/LIP6" "CAO\-VLSI Reference Manual"
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.SH NAME
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.TP
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LooN \- Light optimizing on Nets.
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@ -43,102 +42,60 @@ LooN \- Light optimizing on Nets.
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.SH SYNOPSIS
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.TP
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\f4loon\fP \fIinput_file\fP \fIoutput_file\fP [\fIlax_file\fP]
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\f4loon\fP \-h
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\f4loon\fP [\-v] [\-m \fImode\fP] \fIinput_file\fP [\-o \fIoutput_file\fP] [\-l \fIlax_file\fP]
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\f4loon\fP [-hmxl] \fIinput_file\fP \fIoutput_file\fP [\fIlax_file\fP]
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.br
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.SH DESCRIPTION
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.br
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Loon is a mapper of a behavioural description onto a standard cell library.
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.br
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\fB Input description\fP
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\f4loon\fP is a CAD tool that permits to remove fanout problems within a gates netlist and to optimize the delay. The netlist can be hierarchical and is flattened if necessary. \f4loon\fP run in batch mode and a parameter file can be used (see man \f4lax\fP) to parametrize optimization by adding informations on outputs (fanin), inputs (fanout, delay) and by setting general parameters such as optimization level.
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\f4loon\fP permits to compute delays of gates in the netlist and gives the critical path in the netlist. The global optimization of \f4loon\fP performs gate repowering to decrease the critical path delay. No buffers are inserted at this state of development of \f4loon\fP.
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.br
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.br
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The logic level behavioural description (.vbe file) uses the same VHDL subset as the logic simulator \fBasimut\fP, the FSM synthesizer \fBsyf\fP, the functional abstractor \fByagle\fP and the formal prover \fBproof\fP (for further information about the subset of VHDL, see the "vbe" manual).
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.br
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A special feature has been introduced in the VHDL subset in order to allow the don't care description for external outputs and internal registers : A bit signal can take the 'd' value.
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This value is interpreted as a '0' by the logic simulator \fBasimut\fP.
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Don't Cares are automatically generated by \fBsyf\fP in the resulting '.vbe' file.
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.br
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For the register signal, only one signal can appear in a guarded expression since the STABLE attribute is used. This attribute is only supported by technology mapping onto a standard cell library as \fBsxlib\fP. Indeed you can associate a write enable signal in condition register. To resume only 2 descriptions are accepted as followed:
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\fIlabel: BLOCK (NOT ck 'STABLE and ck='1')
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.nf
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# Example
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BEGIN
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reg <= expr;
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END BLOCK;\fP
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or
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\fIlabel: BLOCK (NOT ck 'STABLE and ck='1' and wen='1')
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BEGIN
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reg <= expr;
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END BLOCK;\fP
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.fi
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.ti 7
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\fBloon\fP is the second step of the logic synthesis : it builds a gate network using
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a predefined standard cell library as SXLIB.
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.br
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.br
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\fB Mapping with a standard cell library\fP
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.br
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.br
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Every cell appearing in the directory defined by the environment variable MBK_TARGET_LIB may be used by \fBloon\fP since they are described as a '.vbe' file. There are some restrictions about the type of the cell used. Every cell has to have only one output.
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The cell must be characterized. The timing and area informations required by \fBloon\fP are specified in the "generic" clause of the ".vbe" file.
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.br
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.br
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\fB Parameter file '.lax'\fP
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\f4 lax Parameter file description\fP
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.br
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The lax file is common with other logic synthesis tools and is used
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for driving the synthesis process.
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See \fBlax\fP(5) manual for more detail.
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See \f4lax\fP(5) manual for more detail.
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.br
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\fBlax\fP uses a lot of parameters to guide every step of the synthesis process.
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Some parameters are globally used (for example, \fIoptimization level\fP whereas others are specifically used (\fBload capacitance\fP for the netlist optimization only).
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\f4lax\fP uses a lot of parameters to guide every step of the synthesis process.
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Some parameters are globally used (for example, \fIoptimization level\fP whereas others are specifically used (\f4load capacitance\fP for the netlist optimization only).
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Here is the default lax file (see the user's manual for further information about the syntax of the '.lax' file):
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.br
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.br
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Optimization mode = 3 (25% area - 75% delay)
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Optimization mode = 2 (50% area - 50% delay)
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.br
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Delayed input = 0
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Input impedance = 0
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.br
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Early output = 0
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Output capacitance = 0
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.br
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Auxiliary signal saved = 0
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Delayed input = none
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.br
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Auxiliary signal saved = none
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.br
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.SH OPTION
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.TP 10
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\f4\-h\fP
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Help mode. Displays possible uses of \fBloon\fP.
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Help mode. Displays possible uses of \f4loon\fP.
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.TP 10
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\f4\-v\fP
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Verbose mode. Displays timing and area informations.
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.TP 10
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\f4\-m mode\fP
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\f4\-m optim_mode\fP
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Optimization mode. Can be defined in lax file, it's only a shortcut to define it on command line. This mode number has an array defined between \fI0\fP and \fI4\fP. It indicates the way of optimization the user wants. If \fI0\fP is chosen, the circuit area will be improved. On the other hand, \fI4\fP will improve circuit delays. \fI2\fP is a medium value for optimization.
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.TP 10
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\f4\-o output_file\fP
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Just another way to show explicitely the \fBVST\fP output file name.
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\f4\-x xsch_mode\fP
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Generate a '.xsc' file. It is a color map for each signals contained in \fIoutput_file\fP network. This file is used by \f4xsch\fP to view the netlist. By choosing level 0 or 1 for xsch_mode, you can color respectively the critical path or all signals with delay graduation.
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.TP 10
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\f4\-l lax_file\fP
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Just another way to show explicitely the \fBLAX\fP parameter file name.
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.TP 10
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\f4\-d debug_file\fP
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Generates a \fBVBE\f debug file. It comes from internal result algorithm. Users aren't concerned.
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Just another way to show explicitely the \f4LAX\fP parameter file name.
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.br
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.SH ENVIRONMENT VARIABLES
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.br
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The following environment variables have to be set before using \fBloon\fP :
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The following environment variables have to be set before using \f4loon\fP :
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.HP
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.ti 7
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\fIMBK_CATA_LIB\fP gives the auxiliary paths of the directories of input files (behavioural description).
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@ -147,7 +104,7 @@ The following environment variables have to be set before using \fBloon\fP :
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\fIMBK_TARGET_LIB\fP gives the path (single) of the directory of the selected standard cell library.
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.HP
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.ti 7
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\fIMBK_IN_LO\fP gives the format of models instantiated in the structural description.
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\fIMBK_IN_LO\fP gives the input format of the structural description.
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.HP
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.ti 7
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\fIMBK_OUT_LO\fP gives the output format of the structural description.
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@ -155,18 +112,17 @@ The following environment variables have to be set before using \fBloon\fP :
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.SH EXAMPLE
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.br
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You can call \fBloon\fP as follows :
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You can call \f4loon\fP as follows :
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.br
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.br
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loon alu alu
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loon alu alu_loon
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.SH SEE ALSO
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.br
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loon(1), boog(1), scmap(1), c4map(1), xlmap(1), proof(1), yagle(1), asimut(1), vhdl(5), scr(1), sclib(1), sxlib(1).
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loon(1), boog(1), boom(1), lax(1), vbe(1), scmap(1), bop(1), glop(1), c4map(1), xlmap(1), proof(1), yagle(1), asimut(1), vhdl(5), scr(1), sclib(1), sxlib(1).
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.br
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.so man1/alc_bug_rprt.1
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.so man1/alc_bug_report.1
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