Merging GenLib & DpGen.
This commit is contained in:
Jean-Paul Chaput
parent
a6f4ba8c40
commit
185b62a6c4
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@ -0,0 +1,100 @@
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/*
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* $Id: GNU_Defs.h,v 1.1 2002/04/29 13:40:54 jpc Exp $
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*
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* /----------------------------------------------------------------\
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* | |
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* | A l l i a n c e C A D S y s t e m |
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* | S i l i c o n E n s e m b l e / A l l i a n c e |
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* | |
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* | Author : Jean-Paul CHAPUT |
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* | E-mail : alliance-support@asim.lip6.fr |
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* | ============================================================== |
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* | C Header : "./GNU_Defs.h" |
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* | ************************************************************** |
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* | |
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* | U p d a t e s |
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* | |
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* \----------------------------------------------------------------/
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*/
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# ifdef __GNUC__
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# if defined(__sparc__) && !defined(__svr4__)
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# define __MISS_GNU_PROTO__ 1
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# else
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# define __MISS_GNU_PROTO__ 0
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# endif
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/* ----------------------------------------------------------------------
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* Functions from "<errno.h>".
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*/
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# ifdef _ERRNO_H
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# define _errno_h 1
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# endif
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# ifdef _errno_h
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# if __MISS_GNU_PROTO__
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extern void perror __FP(( char* ));
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# endif
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# endif
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/* ----------------------------------------------------------------------
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* Functions from "<signal.h>".
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*/
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# ifdef _SIGNAL_H
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# define __signal_h 1
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# endif
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# ifdef __signal_h
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# if __MISS_GNU_PROTO__
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extern void (*ssignal())();
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extern int gsignal __FP(( int ));
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# endif
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# endif
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/* ----------------------------------------------------------------------
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* Functions from "<unistd.h>".
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*/
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# ifdef _SYS_UNISTD_H
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# define __sys_unistd_h 1
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# endif
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# ifdef __sys_unistd_h
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# if __MISS_GNU_PROTO__
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extern int read __FP(( int, void*, __SIZE_TYPE__ ));
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# endif
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# endif
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/* ----------------------------------------------------------------------
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* Functions from "<stdio.h>".
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*/
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# ifdef _STDIO_H
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# define __stdio_h 1
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# endif
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# ifdef FILE
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# define __stdio_h 1
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# endif
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# ifdef __stdio_h
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# if __MISS_GNU_PROTO__
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extern int fclose __FP(( FILE* ));
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extern int fflush __FP(( FILE* ));
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extern int printf __FP(( char*, ... ));
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extern int fprintf __FP(( FILE*, char*, ... ));
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extern int vfprintf __FP(( FILE*, char*, va_list ));
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extern int vsprintf __FP(( char*, char*, va_list ));
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extern int fputs __FP(( char*, FILE* ));
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# endif
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# endif
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# endif
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@ -1,7 +1,25 @@
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AM_CFLAGS = @ALLIANCE_CFLAGS@
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lib_LIBRARIES = libMgn.a
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include_HEADERS = mgn.h mbkgen.h genlib.h
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libMgn_a_SOURCES = genlib.c
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include_HEADERS = mgn.h mbkgen.h genlib.h dgn.h
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libMgn_a_SOURCES = genlib.c \
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debugon.h \
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debugoff.h \
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GNU_Defs.h \
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util_Defs.h \
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util_Sys.c \
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util_Misc.c \
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util_Genlib.c \
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util_Const.c \
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dpgen_Defs.h \
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dpgen_Regular.c \
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dpgen_RF1.c \
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dpgen_RF2.c \
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dpgen_Nul.c \
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dpgen_Macro.c \
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dpgen_Adder.c \
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dpgen_uROM.c \
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dpgen_Shifter.c
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bin_SCRIPTS = genlib
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CLEANFILES = genlib
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/*
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* $Id: debugoff.h,v 1.1 2002/04/29 13:40:54 jpc Exp $
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*
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* /----------------------------------------------------------------\
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* | |
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* | A l l i a n c e C A D S y s t e m |
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* | D p G e n |
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* | |
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* | Author : Jean-Paul CHAPUT |
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* | E-mail : alliance-support@asim.lip6.fr |
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* | ============================================================== |
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* | C Header : "./debugoff.h" |
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* | ************************************************************** |
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* | Compile without debug specific code. |
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* | |
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* | U p d a t e s |
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* | |
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* \----------------------------------------------------------------/
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*/
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# ifdef __DBG__
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# undef __DBG__
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# endif
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# ifdef __DBG
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# undef __DBG
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# endif
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# define __DBG(code)
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/*
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* $Id: debugon.h,v 1.1 2002/04/29 13:40:54 jpc Exp $
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*
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* /----------------------------------------------------------------\
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* | |
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* | A l l i a n c e C A D S y s t e m |
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* | D p G e n |
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* | |
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* | Author : Jean-Paul CHAPUT |
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* | E-mail : alliance-support@asim.lip6.fr |
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* | ============================================================== |
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* | C Header : "./debugon.h" |
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* | ************************************************************** |
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* | Compile with debug specific code. |
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* | |
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* | U p d a t e s |
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* | |
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* \----------------------------------------------------------------/
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*/
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# ifndef __DBG__
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# define __DBG__
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# endif
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# ifdef __DBG
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# undef __DBG
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# endif
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# define __DBG(code) code
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/*
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* $Id: dgn.h,v 1.1 2002/04/29 13:40:54 jpc Exp $
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*
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* /----------------------------------------------------------------\
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* | |
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* | A l l i a n c e C A D S y s t e m |
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* | D p G e n |
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* | |
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* | Author : Jean-Paul CHAPUT |
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* | E-mail : alliance-support@asim.lip6.fr |
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* | ============================================================== |
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* | Header : "./dpgen.h" |
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* | ************************************************************** |
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* | U p d a t e s |
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* | |
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* \----------------------------------------------------------------/
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*/
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# ifndef __dpgen__
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# define __dpgen__
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/* ----------------------------------------------------------------------
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* Looks if functions prototypes are availables.
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*/
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# ifndef __FP
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# ifdef __STDC__
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/* Compiler is ANSI C compliant. */
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# include <unistd.h>
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# include <stdarg.h>
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# define __FP( arguments ) arguments
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# define __FPV( arguments ) arguments
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# define __KR_C( code )
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# define __ANSI_C( code ) code
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# else
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/* Compiler is K&R C. */
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# include <unistd.h>
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# include <varargs.h>
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# define __FP( arguments ) ()
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# define __FPV( arguments ) (va_alist) va_dcl
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# define __KR_C( code ) code
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# define __ANSI_C( code )
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# endif
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# endif
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/* ----------------------------------------------------------------------
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* Avalaibles values (i.e. kind of generators) for the "function"
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* argument of "GENLIB_MACRO".
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*/
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# define DPGEN_INV 1
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# define DPGEN_BUFF 2
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# define DPGEN_NAND2 3
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# define DPGEN_NAND3 4
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# define DPGEN_NAND4 5
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# define DPGEN_AND2 6
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# define DPGEN_AND3 7
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# define DPGEN_AND4 8
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# define DPGEN_NOR2 9
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# define DPGEN_NOR3 10
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# define DPGEN_NOR4 11
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# define DPGEN_OR2 12
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# define DPGEN_OR3 13
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# define DPGEN_OR4 14
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# define DPGEN_XNOR2 15
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# define DPGEN_XOR2 16
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# define DPGEN_NMUX2 17
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# define DPGEN_MUX2 18
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# define DPGEN_NBUSE 19
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# define DPGEN_BUSE 20
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# define DPGEN_NAND2MASK 21
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# define DPGEN_NOR2MASK 22
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# define DPGEN_XNOR2MASK 23
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# define DPGEN_ADSB2F 24
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# define DPGEN_SHIFT 25
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# define DPGEN_NUL 26
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# define DPGEN_CONST 27
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# define DPGEN_RF1 28
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# define DPGEN_RF1R0 29
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# define DPGEN_RF1D 30
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# define DPGEN_RF1DR0 31
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# define DPGEN_FIFO 32
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# define DPGEN_RF2 33
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# define DPGEN_RF2R0 34
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# define DPGEN_RF2D 35
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# define DPGEN_RF2DR0 36
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# define DPGEN_DFF 37
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# define DPGEN_DFFT 38
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# define DPGEN_SFF 39
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# define DPGEN_SFFT 40
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# define DPGEN_ROM2 41
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# define DPGEN_ROM4 42
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# define DPGEN_UNKNOWN 43
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/* ----------------------------------------------------------------------
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* Avalaibles flags values (i.e. views & terminal index) for the "flags"
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* argument of "GENLIB_MACRO".
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*/
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# define F_LSB_FIRST 0x00000000
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# define F_MSB_FIRST 0x00000001
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# define F_PLACE 0x00000002
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# define F_BEHAV 0x00000004
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/* ----------------------------------------------------------------------
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*/
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extern void GENLIB_MACRO __FPV((long function, ...));
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# endif
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@ -0,0 +1,387 @@
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/*
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* $Id: dpgen_Adder.c,v 1.1 2002/04/29 13:40:54 jpc Exp $
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*
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* /----------------------------------------------------------------\
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* | |
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* | A l l i a n c e C A D S y s t e m |
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* | D p G e n |
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* | |
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* | R e c u r r e n c e S o l v e r |
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* | |
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* | Authors : Alain HOUELLE |
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* | Nicolas VAUCHER |
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* | E-mail : alliance-support@asim.lip6.fr |
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* | ============================================================== |
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* | Module : "./dpgen_Adder.c" |
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* | ************************************************************** |
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* | |
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* | U p d a t e s |
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* | |
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* \----------------------------------------------------------------/
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*/
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# include "util_Defs.h"
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# include "dpgen_Defs.h"
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# include "dgn.h"
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/* ------------------------------------------------------------------
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* Local constants.
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*/
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# define SIZE_SNAME 1024
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/* ------------------------------------------------------------------
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* Local variables (prefix "LV_").
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*/
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static long LV_function;
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static char *LV_modelName;
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static FILE *LV_FILE;
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static long LV_adderFlags;
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static long LV_flags;
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static long LV_N;
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/* ------------------------------------------------------------------
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* Internal macros declarations.
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*/
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/* ------------------------------------------------------------------
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* Internal function declarations.
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*/
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static void RSA_Layout __FP((void));
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static void RSA_netlist __FP((void));
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static void RSA_Behav __FP((void));
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/*
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* /----------------------------------------------------------------\
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* | Functions Definitions |
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* \----------------------------------------------------------------/
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*/
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/* ------------------------------------------------------------------
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* Function : "RSA_Layout ()".
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*/
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static void RSA_Layout ()
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{
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int pi, i, n, posy;
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int twostage = -1;
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GENLIB_DEF_PHFIG (LV_modelName);
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/* Placement ligne des XOR */
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for (i = 0; i < LV_N; i++) {
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DPGEN_PLACE ("xr2_x1", GENLIB_NAME ("XORB%d", i), -45, i * 50);
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}
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/* Placement ligne des PI GI */
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for (i = 1; i < LV_N; i++) {
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DPGEN_PLACE ("halfadder_x2", GENLIB_NAME ("PIGI%d", i), 0, i * 50);
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}
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/* Placement ligne des PG */
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for (n = 1; n <= ilog2 (LV_N); n += 2) {
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twostage++;
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for(pi = i = LV_N - 1; i > 0 ; i--) {
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if((i >= iexp2 (n) + iexp2 (n - 1)) && (i & (1 << (n - 1)))) {
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DPGEN_PLACE ("a2_x2",
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GENLIB_NAME ("PG_i1_%d_%d", n, i),
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80 + twostage * 55, // (n + 1)
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50 * pi);
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DPGEN_PLACE ("oa22_x2",
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GENLIB_NAME ("PG_i2_%d_%d", n, i),
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80 + 25 + twostage * 55, // (n + 1)
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50 * pi--);
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}
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if((i >= iexp2 (n + 1) + iexp2 (n)) && (i & (1 << (n)))) {
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DPGEN_PLACE ("a2_x2",
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GENLIB_NAME ("PG_i1_%d_%d", n + 1, i),
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80 + twostage * 55, // (n + 1)
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50 * pi);
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DPGEN_PLACE ("oa22_x2",
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GENLIB_NAME("PG_i2_%d_%d", n + 1, i),
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80 + 25 + twostage * 55, // (n + 1)
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50 * pi--);
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}
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}
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||||
}
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||||
|
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posy = n;
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||||
|
||||
|
||||
/* LV_N n'est pas une puissance entiere de 2. */
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if (LV_N % (iexp2 (ilog2 (LV_N) - 1))) twostage++;
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|
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/* Placement ligne retenue */
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for (n = 2 ; n <= LV_N ; n++) {
|
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DPGEN_PLACE ("oa22_x2",
|
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GENLIB_NAME ("R%d", n),
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80 + 55 * (twostage),
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(n - 1) * 50);
|
||||
}
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||||
|
||||
|
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/* Placement ligne somme */
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||||
for(n = 1; n < LV_N; n++) {
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DPGEN_PLACE ("xr2_x1" ,
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GENLIB_NAME ("S%d", n),
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80 + 30 + 55 * (twostage) ,
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||||
(n - 1) * 50);
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}
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||||
|
||||
DPGEN_PLACE ("fulladder_x2", GENLIB_NAME ("S%d", 0), 0, 0 * 50);
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||||
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||||
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GENLIB_DEF_AB (0, 0, 0, 0);
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||||
GENLIB_SAVE_PHFIG ();
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "RSA_Netlist ()".
|
||||
*/
|
||||
|
||||
static void RSA_netlist ()
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||||
{
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||||
int i, n, isr, ipg, npg, inpg;
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||||
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GENLIB_DEF_LOFIG (LV_modelName);
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GENLIB_LOCON ("add_sub", IN , "add_sub");
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GENLIB_LOCON ("c31" , OUT, GENLIB_NAME ("R_%d", LV_N )); /* cout. */
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GENLIB_LOCON ("c30" , OUT, GENLIB_NAME ("R_%d", LV_N - 1)); /* over. */
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GENLIB_LOCON ( FULL_BUS ("i0" , LV_N, (LV_flags & F_MSB_FIRST)),
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IN, FULL_BUS ("INA", LV_N, (LV_flags & F_MSB_FIRST)));
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GENLIB_LOCON ( FULL_BUS ("i1" , LV_N, (LV_flags & F_MSB_FIRST)),
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IN, FULL_BUS ("INB", LV_N, (LV_flags & F_MSB_FIRST)));
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GENLIB_LOCON ( FULL_BUS ("q" , LV_N, (LV_flags & F_MSB_FIRST)),
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OUT, FULL_BUS ("S" , LV_N, (LV_flags & F_MSB_FIRST)));
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GENLIB_LOCON ("vdd", IN, "vdd");
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GENLIB_LOCON ("vss", IN, "vss");
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|
||||
|
||||
/* Ligne des XOR. */
|
||||
for (i = 0; i < LV_N; i++) {
|
||||
GENLIB_LOINS ("xr2_x1", GENLIB_NAME ("XORB%d", i),
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||||
"add_sub",
|
||||
GENLIB_ELM ("INB" , i),
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||||
GENLIB_ELM ("XORB", i),
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||||
"VDD", "VSS", 0);
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||||
}
|
||||
|
||||
|
||||
/* Ligne des PI GI */
|
||||
for (i = 1; i < LV_N; i++) {
|
||||
GENLIB_LOINS ("halfadder_x2", GENLIB_NAME ("PIGI%d", i),
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||||
GENLIB_ELM ("INA" , i),
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||||
GENLIB_ELM ("XORB", i),
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||||
GENLIB_NAME ("GI_0_%d", i),
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||||
GENLIB_NAME ("PI_0_%d", i),
|
||||
"VDD", "VSS", 0);
|
||||
}
|
||||
|
||||
|
||||
/* Calcul somme et retenue du LSB */
|
||||
GENLIB_LOINS ("fulladder_x2", "S0",
|
||||
GENLIB_ELM ("INA",0),
|
||||
GENLIB_ELM ("INA",0),
|
||||
GENLIB_ELM ("INA",0),
|
||||
GENLIB_ELM ("INA",0),
|
||||
GENLIB_ELM ("XORB",0),
|
||||
GENLIB_ELM ("XORB",0),
|
||||
GENLIB_ELM ("XORB",0),
|
||||
GENLIB_ELM ("XORB",0),
|
||||
"add_sub",
|
||||
"add_sub",
|
||||
"add_sub",
|
||||
"R_1",
|
||||
GENLIB_ELM ("S", 0),
|
||||
"VDD", "VSS", 0);
|
||||
|
||||
|
||||
for (n = 1; n <= ilog2 (LV_N); n++) {
|
||||
/* Calcul des retenues (carry) */
|
||||
for (isr = 0; isr < iexp2 (n - 1) && iexp2 (n - 1) + isr < LV_N; isr++) {
|
||||
GENLIB_LOINS ("oa22_x2",
|
||||
GENLIB_NAME ("R%d" , iexp2 (n - 1) + isr + 1),
|
||||
GENLIB_NAME ("PI_%d_%d", ilog2 (isr), iexp2 (n - 1 ) + isr),
|
||||
GENLIB_NAME ("R_%d" , iexp2 (n - 1)),
|
||||
GENLIB_NAME ("GI_%d_%d", ilog2 (isr), iexp2(n - 1) + isr),
|
||||
GENLIB_NAME ("R_%d" , iexp2 (n - 1) + isr + 1),
|
||||
"VDD", "VSS", 0);
|
||||
}
|
||||
|
||||
/* Calcul des PI GI intermediaires (PG) */
|
||||
for (ipg = iexp2 (n) + iexp2 (n - 1); ipg < LV_N; ipg += iexp2 (n)) {
|
||||
for(npg = 0, inpg = ipg;
|
||||
npg < iexp2 (n - 1) && inpg < LV_N; npg++, inpg++) {
|
||||
GENLIB_LOINS("a2_x2",
|
||||
GENLIB_NAME ("PG_i1_%d_%d", n, inpg),
|
||||
GENLIB_NAME ("PI_%d_%d" , n - 1, ipg - 1),
|
||||
GENLIB_NAME ("PI_%d_%d" , ilog2 (npg), inpg),
|
||||
GENLIB_NAME ("PI_%d_%d" , n, inpg),
|
||||
"VDD", "VSS", 0);
|
||||
|
||||
GENLIB_LOINS("oa22_x2",
|
||||
GENLIB_NAME ("PG_i2_%d_%d", n, inpg),
|
||||
GENLIB_NAME ("PI_%d_%d" , ilog2 (npg), inpg),
|
||||
GENLIB_NAME ("GI_%d_%d" , n - 1, ipg - 1),
|
||||
GENLIB_NAME ("GI_%d_%d" , ilog2 (npg), inpg),
|
||||
GENLIB_NAME ("GI_%d_%d" , n, inpg),
|
||||
"VDD", "VSS", 0);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* Calcul des Sommes (sum) */
|
||||
for (i = 1; i < LV_N; i++) {
|
||||
GENLIB_LOINS("xr2_x1",
|
||||
GENLIB_NAME ("S%d", i),
|
||||
GENLIB_NAME ("PI_0_%d", i),
|
||||
GENLIB_NAME ("R_%d", i),
|
||||
GENLIB_ELM ("S", i),
|
||||
"VDD","VSS",0);
|
||||
}
|
||||
|
||||
|
||||
GENLIB_SAVE_LOFIG();
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "RSA_Behav ()".
|
||||
*/
|
||||
|
||||
static void RSA_Behav ()
|
||||
{
|
||||
char sBusWide0[SIZE_SNAME];
|
||||
char sBusWide1[SIZE_SNAME];
|
||||
char sBusWide2[SIZE_SNAME];
|
||||
long i;
|
||||
|
||||
|
||||
LV_FILE = mbkfopen (LV_modelName, "vbe", WRITE_TEXT);
|
||||
|
||||
if (!LV_FILE) {
|
||||
eprinth ("*** dpgen ***");
|
||||
eprintf ("\n Unable to create file \"%s.vbe\".\n", LV_modelName);
|
||||
EXIT (1);
|
||||
}
|
||||
|
||||
|
||||
VHDL_BUS_WIDE (sBusWide0, LV_N - 1, 0);
|
||||
VHDL_BUS_WIDE (sBusWide1, LV_N , 1);
|
||||
VHDL_BUS_WIDE (sBusWide2, LV_N , 0);
|
||||
|
||||
|
||||
/* Entity description. */
|
||||
fprintf (LV_FILE, "\nENTITY %s IS\n PORT (\n", LV_modelName);
|
||||
|
||||
fprintf (LV_FILE, "%14s : in BIT;\n", "add_sub");
|
||||
fprintf (LV_FILE, "%14s : out BIT;\n", "c31");
|
||||
fprintf (LV_FILE, "%14s : out BIT;\n", "c30");
|
||||
fprintf (LV_FILE, "%14s : in BIT_VECTOR %s;\n", "i0", sBusWide0);
|
||||
fprintf (LV_FILE, "%14s : in BIT_VECTOR %s;\n", "i1", sBusWide0);
|
||||
fprintf (LV_FILE, "%14s : out BIT_VECTOR %s;\n", "q", sBusWide0);
|
||||
fprintf (LV_FILE, "%14s : in BIT;\n", "vdd");
|
||||
fprintf (LV_FILE, "%14s : in BIT\n" , "vss");
|
||||
|
||||
fprintf (LV_FILE, " );\nEND %s;\n\n\n", LV_modelName);
|
||||
|
||||
|
||||
/* Architecture description. */
|
||||
fprintf (LV_FILE, "ARCHITECTURE VBE OF %s IS\n\n", LV_modelName);
|
||||
|
||||
fprintf (LV_FILE, " SIGNAL %20s : BIT_VECTOR %s;\n", "carry", sBusWide2);
|
||||
fprintf (LV_FILE, " SIGNAL %20s : BIT_VECTOR %s;\n", "xor_b", sBusWide0);
|
||||
|
||||
fprintf (LV_FILE, "\nBEGIN\n\n");
|
||||
|
||||
|
||||
for (i = LV_N - 1; i >= 0; i--)
|
||||
fprintf (LV_FILE, " xor_b(%ld) <= i1(%ld) xor add_sub;\n", i, i);
|
||||
fprintf (LV_FILE, "\n");
|
||||
|
||||
fprintf (LV_FILE, " carry(0) <= add_sub;\n\n");
|
||||
|
||||
|
||||
fprintf (LV_FILE, " q <= i0\n");
|
||||
fprintf (LV_FILE, " xor xor_b\n");
|
||||
fprintf (LV_FILE, " xor carry%s;\n\n", sBusWide0);
|
||||
|
||||
fprintf (LV_FILE, " c31 <= carry(%ld);\n" , LV_N);
|
||||
fprintf (LV_FILE, " c30 <= carry(%ld);\n\n", LV_N - 1);
|
||||
|
||||
fprintf (LV_FILE, " carry%s <= ( i0 and xor_b)\n" , sBusWide1);
|
||||
fprintf (LV_FILE, " or ( i0 and carry%s)\n" , sBusWide0);
|
||||
fprintf (LV_FILE, " or (xor_b and carry%s);\n\n\n", sBusWide0);
|
||||
|
||||
|
||||
fprintf(LV_FILE, " ASSERT (vdd = '1')\n");
|
||||
fprintf(LV_FILE,
|
||||
" REPORT \"Power supply is missing on vdd of model %s.\"\n",
|
||||
LV_modelName);
|
||||
fprintf(LV_FILE, " SEVERITY WARNING;\n\n");
|
||||
|
||||
|
||||
fprintf(LV_FILE, " ASSERT (vss = '0')\n");
|
||||
fprintf(LV_FILE,
|
||||
" REPORT \"Power supply is missing on vss of model %s.\"\n",
|
||||
LV_modelName);
|
||||
fprintf(LV_FILE, " SEVERITY WARNING;\n\n");
|
||||
|
||||
|
||||
/* End of Architectural description. */
|
||||
fprintf (LV_FILE, "END VBE;\n");
|
||||
|
||||
|
||||
fclose (LV_FILE);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "dpgen_Adder ()".
|
||||
*/
|
||||
|
||||
extern void dpgen_Adder (aFunction, aFlags, aAL)
|
||||
long aFunction;
|
||||
long aFlags;
|
||||
va_list aAL;
|
||||
{
|
||||
LV_function = aFunction;
|
||||
LV_adderFlags = aFlags;
|
||||
LV_modelName = va_arg (aAL, char*);
|
||||
LV_flags = va_arg (aAL, long );
|
||||
LV_N = va_arg (aAL, long );
|
||||
|
||||
|
||||
RSA_netlist ();
|
||||
if (LV_flags & F_PLACE) RSA_Layout ();
|
||||
if (LV_flags & F_BEHAV) RSA_Behav ();
|
||||
}
|
||||
|
|
@ -0,0 +1,100 @@
|
|||
/*
|
||||
* $Id: dpgen_Defs.h,v 1.1 2002/04/29 13:40:54 jpc Exp $
|
||||
*
|
||||
* /----------------------------------------------------------------\
|
||||
* | |
|
||||
* | A l l i a n c e C A D S y s t e m |
|
||||
* | D p G e n |
|
||||
* | |
|
||||
* | Author : Jean-Paul CHAPUT |
|
||||
* | E-mail : alliance-support@asim.lip6.fr |
|
||||
* | ============================================================== |
|
||||
* | Header : "./dpgen_Defs.h" |
|
||||
* | ************************************************************** |
|
||||
* | U p d a t e s |
|
||||
* | |
|
||||
* \----------------------------------------------------------------/
|
||||
*/
|
||||
|
||||
|
||||
# ifndef __dpgen_Defs__
|
||||
# define __dpgen_Defs__
|
||||
|
||||
|
||||
|
||||
|
||||
# define Y_SLICE 50
|
||||
|
||||
|
||||
# define SLICE_TO_Y(s,N) ((s) * Y_SLICE)
|
||||
# define SLICE_TO_SYM(s,N) (((s) % 2) ? SYM_Y : NOSYM)
|
||||
# define SLICE_TO_BIT(s,N,m) ((m) ? ((N) - 1 - (s)) : (s))
|
||||
# define FULL_BUS(name,N,m) (GENLIB_BUS( \
|
||||
(name), \
|
||||
SLICE_TO_BIT((N) - 1, (N), (m)), \
|
||||
SLICE_TO_BIT( 0 , (N), (m)) ))
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Module : "dpgen_Macro.c"
|
||||
*/
|
||||
|
||||
extern char *function_To_String __FP((long aFunction));
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Module : "dpgen_Regular.c"
|
||||
*/
|
||||
|
||||
extern void dpgen_Regular __FP((long aFunction, va_list aAL));
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Module : "dpgen_RF1.c"
|
||||
*/
|
||||
|
||||
extern void dpgen_RF1 __FP((long aFunction, va_list aAL));
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Module : "dpgen_RF2.c"
|
||||
*/
|
||||
|
||||
extern void dpgen_RF2 __FP((long aFunction, va_list aAL));
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Module : "dpgen_Shifter.c"
|
||||
*/
|
||||
|
||||
extern void dpgen_Shifter __FP((long aFunction, va_list aAL));
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Module : "dpgen_Adder.c"
|
||||
*/
|
||||
|
||||
|
||||
# define F_ADDER_CIN 0x00000001
|
||||
# define F_ADDER_SIGN 0x00000002
|
||||
# define F_ADDER_OVER 0x00000004
|
||||
|
||||
|
||||
extern void dpgen_Adder __FP((long aFunction, long aFlags, va_list aAL));
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Module : "dpgen_uROM.c"
|
||||
*/
|
||||
|
||||
extern void dpgen_uROM __FP((long aFunction, va_list aAL));
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Module : "dpgen_Nul.c"
|
||||
*/
|
||||
|
||||
extern void dpgen_Nul __FP((long aFunction, va_list aAL));
|
||||
|
||||
|
||||
# endif
|
||||
|
|
@ -0,0 +1,180 @@
|
|||
/*
|
||||
* $Id: dpgen_Macro.c,v 1.1 2002/04/29 13:40:54 jpc Exp $
|
||||
*
|
||||
* /----------------------------------------------------------------\
|
||||
* | |
|
||||
* | A l l i a n c e C A D S y s t e m |
|
||||
* | D p G e n |
|
||||
* | |
|
||||
* | Author : Jean-Paul CHAPUT |
|
||||
* | E-mail : alliance-support@asim.lip6.fr |
|
||||
* | ============================================================== |
|
||||
* | Module : "./dpgen_Macro.c" |
|
||||
* | ************************************************************** |
|
||||
* | U p d a t e s |
|
||||
* | |
|
||||
* \----------------------------------------------------------------/
|
||||
*/
|
||||
|
||||
|
||||
# include "util_Defs.h"
|
||||
# include "dpgen_Defs.h"
|
||||
# include "dgn.h"
|
||||
# include "debugoff.h"
|
||||
|
||||
|
||||
/*
|
||||
* /----------------------------------------------------------------\
|
||||
* | Functions Definitions |
|
||||
* \----------------------------------------------------------------/
|
||||
*/
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "function_To_String()".
|
||||
*/
|
||||
|
||||
extern char *function_To_String(aFunction)
|
||||
long aFunction;
|
||||
{
|
||||
switch (aFunction) {
|
||||
case DPGEN_INV: return ("DPGEN_INV");
|
||||
case DPGEN_BUFF: return ("DPGEN_BUFF");
|
||||
case DPGEN_NAND2: return ("DPGEN_NAND2");
|
||||
case DPGEN_NAND3: return ("DPGEN_NAND3");
|
||||
case DPGEN_NAND4: return ("DPGEN_NAND4");
|
||||
case DPGEN_AND2: return ("DPGEN_AND2");
|
||||
case DPGEN_AND3: return ("DPGEN_AND3");
|
||||
case DPGEN_AND4: return ("DPGEN_AND4");
|
||||
case DPGEN_NOR2: return ("DPGEN_NOR2");
|
||||
case DPGEN_NOR3: return ("DPGEN_NOR3");
|
||||
case DPGEN_NOR4: return ("DPGEN_NOR4");
|
||||
case DPGEN_OR2: return ("DPGEN_OR2");
|
||||
case DPGEN_OR3: return ("DPGEN_OR3");
|
||||
case DPGEN_OR4: return ("DPGEN_OR4");
|
||||
case DPGEN_XNOR2: return ("DPGEN_XNOR2");
|
||||
case DPGEN_XOR2: return ("DPGEN_XOR2");
|
||||
case DPGEN_NMUX2: return ("DPGEN_NMUX2");
|
||||
case DPGEN_MUX2: return ("DPGEN_MUX2");
|
||||
case DPGEN_NBUSE: return ("DPGEN_NBUSE");
|
||||
case DPGEN_BUSE: return ("DPGEN_BUSE");
|
||||
case DPGEN_NAND2MASK: return ("DPGEN_NAND2MASK");
|
||||
case DPGEN_NOR2MASK: return ("DPGEN_NOR2MASK");
|
||||
case DPGEN_XNOR2MASK: return ("DPGEN_XNOR2MASK");
|
||||
case DPGEN_CONST: return ("DPGEN_CONST");
|
||||
case DPGEN_DFF: return ("DPGEN_DFF");
|
||||
case DPGEN_DFFT: return ("DPGEN_DFFT");
|
||||
case DPGEN_SFF: return ("DPGEN_SFF");
|
||||
case DPGEN_SFFT: return ("DPGEN_SFFT");
|
||||
case DPGEN_ADSB2F: return ("DPGEN_ADSB2F");
|
||||
case DPGEN_SHIFT: return ("DPGEN_SHIFT");
|
||||
case DPGEN_NUL: return ("DPGEN_NUL");
|
||||
case DPGEN_RF1: return ("DPGEN_RF1");
|
||||
case DPGEN_FIFO: return ("DPGEN_FIFO");
|
||||
default: return ("unknown?!");
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "GENLIB_MACRO()".
|
||||
*/
|
||||
|
||||
extern void GENLIB_MACRO __FPV((long aFunction, ...))
|
||||
{
|
||||
va_list aAL;
|
||||
__KR_C( long aFunction; )
|
||||
static long firstCall = TRUE;
|
||||
|
||||
|
||||
if (firstCall) {
|
||||
firstCall = FALSE;
|
||||
util_init (C_VerboseLevel0, F_DUMPCORE, "dpgen");
|
||||
}
|
||||
|
||||
|
||||
__ANSI_C( va_start (aAL, aFunction); )
|
||||
__KR_C( va_start (aAL); )
|
||||
__KR_C( aFunction = va_arg (aAL, long); )
|
||||
|
||||
|
||||
switch (aFunction) {
|
||||
case DPGEN_INV:
|
||||
case DPGEN_BUFF:
|
||||
case DPGEN_NAND2:
|
||||
case DPGEN_NAND3:
|
||||
case DPGEN_NAND4:
|
||||
case DPGEN_AND2:
|
||||
case DPGEN_AND3:
|
||||
case DPGEN_AND4:
|
||||
case DPGEN_NOR2:
|
||||
case DPGEN_NOR3:
|
||||
case DPGEN_NOR4:
|
||||
case DPGEN_OR2:
|
||||
case DPGEN_OR3:
|
||||
case DPGEN_OR4:
|
||||
case DPGEN_XNOR2:
|
||||
case DPGEN_XOR2:
|
||||
case DPGEN_NMUX2:
|
||||
case DPGEN_MUX2:
|
||||
case DPGEN_NBUSE:
|
||||
case DPGEN_BUSE:
|
||||
case DPGEN_NAND2MASK:
|
||||
case DPGEN_NOR2MASK:
|
||||
case DPGEN_XNOR2MASK:
|
||||
case DPGEN_CONST:
|
||||
case DPGEN_DFF:
|
||||
case DPGEN_DFFT:
|
||||
case DPGEN_SFF:
|
||||
case DPGEN_SFFT:
|
||||
dpgen_Regular (aFunction, aAL);
|
||||
break;
|
||||
case DPGEN_ROM2:
|
||||
case DPGEN_ROM4:
|
||||
dpgen_uROM (aFunction, aAL);
|
||||
break;
|
||||
case DPGEN_ADSB2F:
|
||||
dpgen_Adder (aFunction, F_ADDER_SIGN, aAL);
|
||||
break;
|
||||
case DPGEN_SHIFT:
|
||||
dpgen_Shifter (aFunction, aAL);
|
||||
break;
|
||||
case DPGEN_NUL:
|
||||
dpgen_Nul (aFunction, aAL);
|
||||
break;
|
||||
case DPGEN_RF1:
|
||||
dpgen_RF1 (aFunction, aAL);
|
||||
break;
|
||||
case DPGEN_RF1R0:
|
||||
dpgen_RF1 (aFunction, aAL);
|
||||
break;
|
||||
case DPGEN_RF1D:
|
||||
dpgen_RF1 (aFunction, aAL);
|
||||
break;
|
||||
case DPGEN_RF1DR0:
|
||||
dpgen_RF1 (aFunction, aAL);
|
||||
break;
|
||||
case DPGEN_FIFO:
|
||||
dpgen_RF1 (aFunction, aAL);
|
||||
break;
|
||||
case DPGEN_RF2:
|
||||
dpgen_RF2 (aFunction, aAL);
|
||||
break;
|
||||
case DPGEN_RF2R0:
|
||||
dpgen_RF2 (aFunction, aAL);
|
||||
break;
|
||||
case DPGEN_RF2D:
|
||||
dpgen_RF2 (aFunction, aAL);
|
||||
break;
|
||||
case DPGEN_RF2DR0:
|
||||
dpgen_RF2 (aFunction, aAL);
|
||||
break;
|
||||
default:
|
||||
eprinth (NULL);
|
||||
eprintf ("GENLIB_MACRO: Unknown function Id: %ld.\n", aFunction);
|
||||
eprints (" Please have a look to \"dgnVRR.h\" in which all ");
|
||||
eprints ( "authorized\n values are listed.\n");
|
||||
EXIT (1);
|
||||
}
|
||||
|
||||
va_end(aAL);
|
||||
}
|
||||
|
|
@ -0,0 +1,510 @@
|
|||
/*
|
||||
* $Id: dpgen_Nul.c,v 1.1 2002/04/29 13:40:54 jpc Exp $
|
||||
*
|
||||
* /----------------------------------------------------------------\
|
||||
* | |
|
||||
* | A l l i a n c e C A D S y s t e m |
|
||||
* | D p G e n |
|
||||
* | |
|
||||
* | Author : Jean-Paul CHAPUT |
|
||||
* | E-mail : alliance-support@asim.lip6.fr |
|
||||
* | ============================================================== |
|
||||
* | Module : "./dpgen_Nul.c" |
|
||||
* | ************************************************************** |
|
||||
* | U p d a t e s |
|
||||
* | |
|
||||
* \----------------------------------------------------------------/
|
||||
*/
|
||||
|
||||
|
||||
# include "util_Defs.h"
|
||||
# include "dpgen_Defs.h"
|
||||
# include "dgn.h"
|
||||
# include "debugon.h"
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Local constants.
|
||||
*/
|
||||
|
||||
# define SIZE_SNAME 1024
|
||||
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Local variables (prefix "LV_").
|
||||
*/
|
||||
|
||||
static FILE *LV_FILE;
|
||||
static char *LV_modelName;
|
||||
static long LV_flags;
|
||||
static long LV_N;
|
||||
static long LV_prevTreeOut;
|
||||
static long LV_oneShift;
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Internal macros declarations.
|
||||
*/
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Internal function declarations.
|
||||
*/
|
||||
|
||||
static long create_Netlist_Tree __FP((long aOffset,
|
||||
long amDepth,
|
||||
long amDepthNext));
|
||||
static void create_Netlist __FP((void));
|
||||
static long create_Layout_Tree __FP((long aOffset,
|
||||
long amDepth,
|
||||
long amDepthNext));
|
||||
static void create_Layout __FP((void));
|
||||
static void create_Layout __FP((void));
|
||||
static void create_VHDL __FP((void));
|
||||
|
||||
|
||||
/*
|
||||
* /----------------------------------------------------------------\
|
||||
* | Functions Definitions |
|
||||
* \----------------------------------------------------------------/
|
||||
*/
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "create_Netlist_Tree ()".
|
||||
*/
|
||||
|
||||
static long create_Netlist_Tree (aOffset, amDepth, amDepthNext)
|
||||
long aOffset, amDepth, amDepthNext;
|
||||
{
|
||||
long depth, mk, k, polarity;
|
||||
long cell_index, i0_index, i1_index, i_offset;
|
||||
char *sModel;
|
||||
char sInstance[SIZE_SNAME];
|
||||
char *sQ, *sI0, *sI1;
|
||||
|
||||
|
||||
if (amDepthNext > 0) {
|
||||
polarity = (amDepthNext % 2);
|
||||
} else {
|
||||
polarity = (amDepth % 2);
|
||||
}
|
||||
|
||||
|
||||
if (!amDepth) {
|
||||
if (!amDepthNext) {
|
||||
/* Pathological case : the zero detect is reduced to only
|
||||
* one bit! This is only a inversor.
|
||||
*/
|
||||
GENLIB_LOINSE ("inv_x4",
|
||||
s64printf("nul_%ld", aOffset),
|
||||
s64printf("i => i0[%ld]", aOffset),
|
||||
"nq => nul",
|
||||
"vdd => vdd",
|
||||
"vss => vss", 0);
|
||||
} else {
|
||||
LV_prevTreeOut = aOffset;
|
||||
|
||||
if ((amDepth % 2) == polarity) {
|
||||
/* This branch will skip an even number of layer, we keep
|
||||
* the same polarity.
|
||||
*/
|
||||
GENLIB_LOSIGMERGE (s64printf("i0[%ld]", aOffset),
|
||||
s64printf("nul_%ld", aOffset));
|
||||
|
||||
} else {
|
||||
/* There is a polarity inversion. */
|
||||
GENLIB_LOINSE ("inv_x4",
|
||||
s64printf("nul_%ld", aOffset),
|
||||
s64printf("i => i0[%ld]", aOffset),
|
||||
s64printf("nq => nul_%ld", aOffset),
|
||||
"vdd => vdd",
|
||||
"vss => vss", 0);
|
||||
|
||||
}
|
||||
LV_oneShift = 1; aOffset++;
|
||||
}
|
||||
|
||||
return (++aOffset);
|
||||
}
|
||||
|
||||
|
||||
/* Build the tree. */
|
||||
for (depth = 0; depth < amDepth; depth++) {
|
||||
mk = iexp2 (amDepth - depth - 1);
|
||||
|
||||
__DBG(
|
||||
fprintf (stderr, "depth := %ld\n", depth);
|
||||
fprintf (stderr, "mk := %ld\n", mk);
|
||||
fflush (stderr);
|
||||
)
|
||||
|
||||
for (k = 0; k < mk; k++) {
|
||||
i_offset = (depth == 0) ? 0 : (iexp2 (depth - 1) - 1);
|
||||
cell_index = iexp2 (depth + 1) * k + iexp2 (depth) - 1 + aOffset;
|
||||
i1_index = iexp2 (depth + 1) * k + iexp2 (depth) + i_offset + aOffset;
|
||||
i0_index = iexp2 (depth + 1) * k + i_offset + aOffset;
|
||||
|
||||
__DBG(
|
||||
fprintf (stderr, "i0 := %ld\n", i0_index);
|
||||
fprintf (stderr, "i1 := %ld\n", i1_index);
|
||||
fflush (stderr);
|
||||
)
|
||||
|
||||
sModel = (depth % 2) ? "na2_x1" : "no2_x1";
|
||||
sprintf (sInstance, "nul_%ld", cell_index);
|
||||
|
||||
sQ = s64printf("nq => nul_%ld", cell_index);
|
||||
sI0 = s64printf("i0 => nul_%ld", i0_index);
|
||||
sI1 = s64printf("i1 => nul_%ld", i1_index);
|
||||
if (!depth) {
|
||||
sI0 = s64printf("i0 => i0[%ld]", i0_index - LV_oneShift);
|
||||
sI1 = s64printf("i1 => i0[%ld]", i1_index - LV_oneShift);
|
||||
}
|
||||
|
||||
/* Special case of the last layer. */
|
||||
if ((mk == 1) && (LV_prevTreeOut < 0)) {
|
||||
__DBG( fprintf(stderr, "Last Layer of the first tree.\n"); )
|
||||
if (!amDepthNext) {
|
||||
/* This is the only tree in the operator. */
|
||||
sModel = (depth % 2) ? "a2_x4" : "no2_x4";
|
||||
sQ = (depth % 2) ? "q => nul" : "nq => nul";
|
||||
|
||||
__DBG( fprintf(stderr, "This is a pure tree.\n"); )
|
||||
} else {
|
||||
if ((depth % 2) == polarity) {
|
||||
/* Only for the first tree : adjust the polarity. */
|
||||
sModel = (depth % 2) ? "a2_x2" : "o2_x2";
|
||||
sQ = s64printf("q => nul_%ld", cell_index);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
GENLIB_LOINSE (sModel,
|
||||
sInstance,
|
||||
sI0, sI1, sQ,
|
||||
"vdd => vdd",
|
||||
"vss => vss", 0);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* Check if there is a ripple part. */
|
||||
if (LV_prevTreeOut < 0) {
|
||||
LV_prevTreeOut = cell_index;
|
||||
|
||||
return (aOffset + iexp2 (amDepth));
|
||||
}
|
||||
|
||||
|
||||
/* Add the ripple part. */
|
||||
|
||||
cell_index = aOffset - 1;
|
||||
|
||||
if (!amDepthNext) {
|
||||
sModel = (depth % 2) ? "a2_x4" : "no2_x4";
|
||||
sQ = (depth % 2) ? "q => nul" : "nq => nul";
|
||||
} else {
|
||||
sModel = (depth % 2) ? "na2_x1" : "no2_x1";
|
||||
sQ = s64printf("nq => nul_%ld", cell_index);
|
||||
|
||||
if ((depth % 2) == polarity) {
|
||||
sModel = (depth % 2) ? "a2_x2" : "o2_x2";
|
||||
sQ = s64printf("q => nul_%ld", cell_index);
|
||||
}
|
||||
}
|
||||
|
||||
sprintf (sInstance, "nul_%ld", aOffset - 1);
|
||||
|
||||
i1_index = iexp2 (amDepth - 1) - 1 + aOffset;
|
||||
i0_index = LV_prevTreeOut;
|
||||
|
||||
GENLIB_LOINSE (sModel,
|
||||
sInstance,
|
||||
s64printf("i0 => nul_%ld", i0_index),
|
||||
s64printf("i1 => nul_%ld", i1_index),
|
||||
sQ,
|
||||
"vdd => vdd",
|
||||
"vss => vss", 0);
|
||||
|
||||
LV_prevTreeOut = cell_index;
|
||||
|
||||
|
||||
return (aOffset + iexp2 (amDepth));
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "create_Netlist ()".
|
||||
*/
|
||||
|
||||
static void create_Netlist ()
|
||||
{
|
||||
long mDepth, depth, depthNext, offset;
|
||||
|
||||
|
||||
mDepth = ilog2 (LV_N);
|
||||
|
||||
LV_prevTreeOut = -1;
|
||||
LV_oneShift = 0;
|
||||
|
||||
|
||||
GENLIB_DEF_LOFIG (LV_modelName);
|
||||
|
||||
DPGEN_LOCON_BUS ("i0", IN);
|
||||
GENLIB_LOCON ("nul", OUT, "nul");
|
||||
GENLIB_LOCON ("vdd", IN , "vdd");
|
||||
GENLIB_LOCON ("vss", IN , "vss");
|
||||
|
||||
|
||||
offset = 0;
|
||||
depthNext = get_depth (LV_N, 0);
|
||||
|
||||
do {
|
||||
depth = depthNext;
|
||||
depthNext = get_depth (LV_N, depth + 1);
|
||||
|
||||
__DBG(
|
||||
fprintf (stderr, "prevTreeOut := %ld\n", LV_prevTreeOut);
|
||||
fprintf (stderr, "depth := %ld\n", depth);
|
||||
fprintf (stderr, "depthNext := %ld\n", depthNext);
|
||||
fflush (stderr);
|
||||
)
|
||||
offset = create_Netlist_Tree (offset, depth, depthNext);
|
||||
} while (depthNext);
|
||||
|
||||
|
||||
GENLIB_SAVE_LOFIG ();
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "create_Layout_Tree ()".
|
||||
*/
|
||||
|
||||
static long create_Layout_Tree (aOffset, amDepth, amDepthNext)
|
||||
long aOffset, amDepth, amDepthNext;
|
||||
{
|
||||
long depth, mk, k, polarity;
|
||||
long cell_index;
|
||||
char *sModel;
|
||||
char sInstance[SIZE_SNAME];
|
||||
|
||||
|
||||
if (amDepthNext > 0) {
|
||||
polarity = (amDepthNext % 2);
|
||||
} else {
|
||||
polarity = (amDepth % 2);
|
||||
}
|
||||
|
||||
|
||||
if (!amDepth) {
|
||||
if (!amDepthNext) {
|
||||
/* Pathological case : the zero detect is reduced to only
|
||||
* one bit! This is only a inversor.
|
||||
*/
|
||||
DPGEN_PLACE ("inv_x4", s64printf("nul_%ld", aOffset), 0, aOffset * 50);
|
||||
} else {
|
||||
LV_prevTreeOut = aOffset;
|
||||
|
||||
if ((amDepth % 2) != polarity) {
|
||||
/* There is a polarity inversion. */
|
||||
DPGEN_PLACE ("inv_x4", s64printf("nul_%ld", aOffset), 0, aOffset * 50);
|
||||
}
|
||||
LV_oneShift = 1; aOffset++;
|
||||
}
|
||||
|
||||
return (++aOffset);
|
||||
}
|
||||
|
||||
|
||||
/* Build the tree. */
|
||||
for (depth = 0; depth < amDepth; depth++) {
|
||||
mk = iexp2 (amDepth - depth - 1);
|
||||
|
||||
for (k = 0; k < mk; k++) {
|
||||
cell_index = iexp2 (depth + 1) * k + iexp2 (depth) - 1 + aOffset;
|
||||
|
||||
sModel = (depth % 2) ? "na2_x1" : "no2_x1";
|
||||
sprintf (sInstance, "nul_%ld", cell_index);
|
||||
|
||||
/* Special case of the last layer. */
|
||||
if ((mk == 1) && (LV_prevTreeOut < 0)) {
|
||||
if (!amDepthNext) {
|
||||
/* This is the only tree in the operator. */
|
||||
sModel = (depth % 2) ? "a2_x4" : "no2_x4";
|
||||
} else {
|
||||
if ((depth % 2) == polarity) {
|
||||
/* Only for the first tree : adjust the polarity. */
|
||||
sModel = (depth % 2) ? "a2_x2" : "o2_x2";
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
DPGEN_PLACE (sModel, sInstance, 0, cell_index * 50);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* Check if there is a ripple part. */
|
||||
if (LV_prevTreeOut < 0) {
|
||||
LV_prevTreeOut = cell_index;
|
||||
|
||||
return (aOffset + iexp2 (amDepth));
|
||||
}
|
||||
|
||||
|
||||
/* Add the ripple part. */
|
||||
|
||||
cell_index = aOffset - 1;
|
||||
|
||||
if (!amDepthNext) {
|
||||
sModel = (depth % 2) ? "a2_x4" : "no2_x4";
|
||||
} else {
|
||||
sModel = (depth % 2) ? "na2_x1" : "no2_x1";
|
||||
|
||||
if ((depth % 2) == polarity) {
|
||||
sModel = (depth % 2) ? "a2_x2" : "o2_x2";
|
||||
}
|
||||
}
|
||||
|
||||
sprintf (sInstance, "nul_%ld", aOffset - 1);
|
||||
|
||||
DPGEN_PLACE (sModel, sInstance, 0, (aOffset - 1) * 50);
|
||||
|
||||
LV_prevTreeOut = cell_index;
|
||||
|
||||
|
||||
return (aOffset + iexp2 (amDepth));
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "create_Layout ()".
|
||||
*/
|
||||
|
||||
static void create_Layout ()
|
||||
{
|
||||
long mDepth, depth, depthNext, offset;
|
||||
|
||||
|
||||
mDepth = ilog2 (LV_N);
|
||||
|
||||
LV_prevTreeOut = -1;
|
||||
LV_oneShift = 0;
|
||||
|
||||
|
||||
GENLIB_DEF_PHFIG (LV_modelName);
|
||||
|
||||
|
||||
offset = 0;
|
||||
depthNext = get_depth (LV_N, 0);
|
||||
|
||||
do {
|
||||
depth = depthNext;
|
||||
depthNext = get_depth (LV_N, depth + 1);
|
||||
|
||||
offset = create_Layout_Tree (offset, depth, depthNext);
|
||||
} while (depthNext);
|
||||
|
||||
|
||||
GENLIB_DEF_AB (0, 0, 0, 0);
|
||||
GENLIB_SAVE_PHFIG ();
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "create_VHDL ()".
|
||||
*/
|
||||
|
||||
static void create_VHDL ()
|
||||
{
|
||||
char sConst[SIZE_SNAME];
|
||||
char sBusWide[SIZE_SNAME];
|
||||
struct xlong_s *xl_zero;
|
||||
|
||||
|
||||
LV_FILE = mbkfopen (LV_modelName, "vbe", WRITE_TEXT);
|
||||
|
||||
if (!LV_FILE) {
|
||||
eprinth ("*** dpgen ***");
|
||||
eprintf ("\n Unable to create file \"%s.vbe\".\n", LV_modelName);
|
||||
EXIT (1);
|
||||
}
|
||||
|
||||
|
||||
VHDL_BUS_WIDE (sBusWide, LV_N - 1, 0);
|
||||
|
||||
|
||||
/* Entity description. */
|
||||
fprintf (LV_FILE, "\nENTITY %s IS\n PORT (\n", LV_modelName);
|
||||
|
||||
fprintf (LV_FILE, "%14s : in BIT_VECTOR %s;\n", "i0", sBusWide);
|
||||
fprintf (LV_FILE, "%14s : out BIT;\n", "nul");
|
||||
|
||||
fprintf (LV_FILE, "%14s : in BIT;\n", "vdd");
|
||||
fprintf (LV_FILE, "%14s : in BIT\n" , "vss");
|
||||
|
||||
/* End of entity description. */
|
||||
fprintf (LV_FILE, " );\nEND %s;\n\n\n", LV_modelName);
|
||||
|
||||
|
||||
/* Architecture description. */
|
||||
fprintf (LV_FILE, "ARCHITECTURE VBE OF %s IS\n\n", LV_modelName);
|
||||
|
||||
|
||||
fprintf (LV_FILE, "BEGIN\n\n");
|
||||
|
||||
xl_zero = newxl ();
|
||||
xl_zero->size = LV_N;
|
||||
|
||||
fprintf (LV_FILE,
|
||||
" nul <= \'1\' WHEN (i0 = %s)\n",
|
||||
xltovhdl (xl_zero, sConst));
|
||||
fprintf (LV_FILE, " ELSE \'0\';\n\n\n");
|
||||
|
||||
|
||||
fprintf(LV_FILE, " ASSERT (vdd = '1')\n");
|
||||
fprintf(LV_FILE,
|
||||
" REPORT \"Power supply is missing on vdd of model %s.\"\n",
|
||||
LV_modelName);
|
||||
fprintf(LV_FILE, " SEVERITY WARNING;\n\n");
|
||||
|
||||
|
||||
fprintf(LV_FILE, " ASSERT (vss = '0')\n");
|
||||
fprintf(LV_FILE,
|
||||
" REPORT \"Power supply is missing on vss of model %s.\"\n",
|
||||
LV_modelName);
|
||||
fprintf(LV_FILE, " SEVERITY WARNING;\n\n");
|
||||
|
||||
|
||||
/* End of architecture description. */
|
||||
fprintf (LV_FILE, "END VBE;\n");
|
||||
|
||||
|
||||
fclose (LV_FILE);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "dpgen_Nul ()".
|
||||
*/
|
||||
|
||||
extern void dpgen_Nul (aFunction, aAL)
|
||||
long aFunction;
|
||||
va_list aAL;
|
||||
{
|
||||
/* Parses the mandatory arguments. */
|
||||
LV_modelName = va_arg (aAL, char*);
|
||||
LV_flags = va_arg (aAL, long );
|
||||
LV_N = va_arg (aAL, long );
|
||||
|
||||
__DBG (fprintf (stderr, "LV_flags := %ld.\n", LV_flags);)
|
||||
|
||||
|
||||
/* Always create the netlist. */
|
||||
create_Netlist ();
|
||||
|
||||
if (LV_flags & F_PLACE) create_Layout ();
|
||||
if (LV_flags & F_BEHAV) create_VHDL ();
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,842 @@
|
|||
//
|
||||
// $Id: dpgen_RF2.c,v 1.1 2002/04/29 13:40:54 jpc Exp $
|
||||
//
|
||||
// auteur Alain Greiner
|
||||
//
|
||||
// Derniere modification 08/04/2001
|
||||
//
|
||||
// Banc de registre triple acces : deux lectures, une ecriture
|
||||
// Le programme genere une net-list et un placement optimise.
|
||||
//
|
||||
// La largeur est egale a (nmot * 35) + 150
|
||||
// La hauteur est egale a (nbit + 8) * 50
|
||||
//
|
||||
// Pour la partie "donnees", on utilise les cellules suivantes :
|
||||
// colonne d'entree
|
||||
// - rf2_inmux_mem
|
||||
// - rf2_inmux_buf
|
||||
// colonne centrale
|
||||
// - rf2_mid_mem
|
||||
// - rf2_mid_mem_r0
|
||||
// - rf2_mid_buf
|
||||
// colonne de sortie
|
||||
// - rf2_out_mem
|
||||
// - rf2_out_buf
|
||||
//
|
||||
// Pour le decodeur, on utilise les cellules suivantes :
|
||||
// - rf2_dec_bufad0
|
||||
// - rf2_dec_bufad1_l
|
||||
// - rf2_dec_bufad2_l
|
||||
// - rf2_dec_bufad1_r
|
||||
// - rf2_dec_bufad2_r
|
||||
// - rf2_dec_nbuf
|
||||
// - rf2_dec_nor3
|
||||
// - rf2_dec_nao3
|
||||
// - rf2_dec_nand2
|
||||
// - rf2_dec_nand3
|
||||
// - rf2_dec_nand4
|
||||
|
||||
# include "util_Defs.h"
|
||||
# include "dpgen_Defs.h"
|
||||
# include "dgn.h"
|
||||
# include "debugon.h"
|
||||
|
||||
//----------------------------------------------------------------
|
||||
// DEBUT PROGRAMME PRINCIPAL
|
||||
//----------------------------------------------------------------
|
||||
// aFunction : le type :
|
||||
// DPGEN_RF2 (sans decodeur)
|
||||
// DPGEN_RF2R0 (sand decodeur, avec R0 colle a 0)
|
||||
// DPGEN_RF2D (avec decodeur)
|
||||
// DPGEN_RF2DR0 (avec decodeur, avec R0 colle a 0)
|
||||
//
|
||||
// aAL : liste des parametres :
|
||||
// model_name : nom de modele.
|
||||
// flags : indexation des connecteurs.
|
||||
// nbit : nombre de bits (largeur du bus).
|
||||
// nmot : nombre de mots.
|
||||
// - le nombre de mots doit etre pair, 6 =< nmot =< 32
|
||||
// - le nombre de bits doit etre pair, 2 =< nbit =< 64
|
||||
//----------------------------------------------------------------
|
||||
|
||||
extern void dpgen_RF2 (aFunction, aAL)
|
||||
long aFunction;
|
||||
va_list aAL;
|
||||
|
||||
{
|
||||
long nmot; /* nombre de mots */
|
||||
long nbit; /* nombre de bits */
|
||||
long type; /* avec ou sans decodeurs */
|
||||
long flags; /* indexation : bit 0 en bas si flags = 0 */
|
||||
|
||||
long HCELL = 50;
|
||||
|
||||
long bottom;
|
||||
long i,j;
|
||||
long half,max;
|
||||
long sym1,sym2;
|
||||
long adrange;
|
||||
|
||||
char x1[10];
|
||||
char x2[10];
|
||||
char x3[10];
|
||||
char x4[10];
|
||||
|
||||
char *model_name; // le nom du modele.
|
||||
|
||||
//////////////////////////////////////////////////////////
|
||||
//
|
||||
// Lecture et verification des parametres
|
||||
//
|
||||
//////////////////////////////////////////////////////////
|
||||
|
||||
model_name = va_arg (aAL, char*);
|
||||
flags = va_arg (aAL, long );
|
||||
nbit = va_arg (aAL, long );
|
||||
nmot = va_arg (aAL, long );
|
||||
|
||||
switch(aFunction) {
|
||||
case DPGEN_RF2 :
|
||||
type = 0;
|
||||
break;
|
||||
case DPGEN_RF2R0 :
|
||||
type = 1;
|
||||
break;
|
||||
case DPGEN_RF2D :
|
||||
type = 2;
|
||||
break;
|
||||
case DPGEN_RF2DR0 :
|
||||
type = 3;
|
||||
break;
|
||||
default :
|
||||
printf("\n\n!!! DPGEN register file : illegal value for the type \n\n");
|
||||
EXIT (1);
|
||||
}
|
||||
|
||||
if ((nmot%2 == 1) || (nmot > 32) || (nmot < 4)) {
|
||||
printf("\n!!! DPGEN Register file : the word number must be even !!!\n");
|
||||
printf("\n!!! larger than 4 and no larger than 32 !!!\n\n");
|
||||
EXIT (1);
|
||||
}
|
||||
|
||||
if ((nmot == 4) && ((type == 2) || (type == 3))) {
|
||||
printf("\n!!! DPGEN Register file with internal decoder !!!\n");
|
||||
printf("\n!!! The word number must be larger than 4 !!!\n\n");
|
||||
EXIT (1);
|
||||
}
|
||||
|
||||
if ((nbit%2 == 1) || (nbit > 64) || (nbit < 2)) {
|
||||
printf("\n!!! DPGEN Register file : the bit number must be even !!!\n");
|
||||
printf("\n!!! and no larger than 64 !!!\n\n");
|
||||
EXIT (1);
|
||||
}
|
||||
|
||||
GENLIB_DEF_PHFIG(model_name);
|
||||
GENLIB_DEF_LOFIG(model_name);
|
||||
|
||||
///////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Definition de l'interface logique
|
||||
//
|
||||
///////////////////////////////////////////////////////////////////
|
||||
|
||||
adrange = 2;
|
||||
if (nmot > 4) adrange = 3;
|
||||
if (nmot > 8) adrange = 4;
|
||||
if (nmot > 16) adrange = 5;
|
||||
|
||||
if(type < 2){ /* c'est un banc de registres sans decodeur */
|
||||
|
||||
GENLIB_LOCON("ck",IN,"ckok");
|
||||
GENLIB_LOCON("sel",IN,"sel");
|
||||
GENLIB_LOCON(GENLIB_BUS("sela",nmot-1,0),IN,GENLIB_BUS("sela",nmot-1,0));
|
||||
GENLIB_LOCON(GENLIB_BUS("selb",nmot-1,0),IN,GENLIB_BUS("selb",nmot-1,0));
|
||||
GENLIB_LOCON(GENLIB_BUS("selw",nmot-1,0),IN,GENLIB_BUS("selw",nmot-1,0));
|
||||
GENLIB_LOCON(GENLIB_BUS("datain0",nbit-1,0),IN,GENLIB_BUS("datain0",nbit-1,0));
|
||||
GENLIB_LOCON(GENLIB_BUS("datain1",nbit-1,0),IN,GENLIB_BUS("datain1",nbit-1,0));
|
||||
GENLIB_LOCON(GENLIB_BUS("dataouta",nbit-1,0),OUT,GENLIB_BUS("dataouta",nbit-1,0));
|
||||
GENLIB_LOCON(GENLIB_BUS("dataoutb",nbit-1,0),OUT,GENLIB_BUS("dataoutb",nbit-1,0));
|
||||
GENLIB_LOCON("vdd",IN,"vdd");
|
||||
GENLIB_LOCON("vss",IN,"vss");
|
||||
}
|
||||
|
||||
else { /* c'est un banc de registres avec decodeur */
|
||||
|
||||
GENLIB_LOCON("ck",IN,"ckok");
|
||||
GENLIB_LOCON("sel",IN,"sel");
|
||||
GENLIB_LOCON("wen",IN,"wen");
|
||||
GENLIB_LOCON("rena",IN,"rena");
|
||||
GENLIB_LOCON("renb",IN,"renb");
|
||||
GENLIB_LOCON(GENLIB_BUS("adra",adrange-1,0),IN,GENLIB_BUS("adra",adrange-1,0));
|
||||
GENLIB_LOCON(GENLIB_BUS("adrb",adrange-1,0),IN,GENLIB_BUS("adrb",adrange-1,0));
|
||||
GENLIB_LOCON(GENLIB_BUS("adw",adrange-1,0),IN,GENLIB_BUS("adw",adrange-1,0));
|
||||
GENLIB_LOCON(GENLIB_BUS("datain0",nbit-1,0),IN,GENLIB_BUS("datain0",nbit-1,0));
|
||||
GENLIB_LOCON(GENLIB_BUS("datain1",nbit-1,0),IN,GENLIB_BUS("datain1",nbit-1,0));
|
||||
GENLIB_LOCON(GENLIB_BUS("dataouta",nbit-1,0),OUT,GENLIB_BUS("dataouta",nbit-1,0));
|
||||
GENLIB_LOCON(GENLIB_BUS("dataoutb",nbit-1,0),OUT,GENLIB_BUS("dataoutb",nbit-1,0));
|
||||
GENLIB_LOCON("vdd",IN,"vdd");
|
||||
GENLIB_LOCON("vss",IN,"vss");
|
||||
}
|
||||
|
||||
|
||||
///////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// placement des lignes de bit en dessous des buffers
|
||||
//
|
||||
///////////////////////////////////////////////////////////////////
|
||||
|
||||
bottom = 0;
|
||||
sym1 = NOSYM;
|
||||
sym2 = SYM_X;
|
||||
for(i=0;i<nbit;i++){
|
||||
switch(i%2){
|
||||
case 0: // lignes paires
|
||||
sym1 = NOSYM;
|
||||
sym2 = SYM_X;
|
||||
break;
|
||||
case 1: // lignes impaires
|
||||
sym1 = SYM_Y;
|
||||
sym2 = SYMXY;
|
||||
break;
|
||||
}
|
||||
GENLIB_PLACE("rf2_inmux_mem",GENLIB_NAME("in%d",nbit-1-i),sym1,0,bottom+i*HCELL);
|
||||
GENLIB_LOINS("rf2_inmux_mem",GENLIB_NAME("in%d",nbit-1-i),
|
||||
GENLIB_NAME("datain0[%d]",nbit-1-i),
|
||||
GENLIB_NAME("datain1[%d]",nbit-1-i),
|
||||
"sel0",
|
||||
"sel1",
|
||||
GENLIB_NAME("dinx[%d]",nbit-1-i),
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
for (j=0;j<nmot;j+=2){
|
||||
if ((j == 0) && (type % 2 == 1)) {
|
||||
GENLIB_PLACE_RIGHT("rf2_mid_mem_r0",GENLIB_NAME("bit%d_%d",nbit-1-i,j),sym1);
|
||||
GENLIB_LOINS("rf2_mid_mem_r0",GENLIB_NAME("bit%d_%d",nbit-1-i,j),
|
||||
GENLIB_NAME("dinx[%d]",nbit-1-i),
|
||||
GENLIB_NAME("write%d",j),
|
||||
GENLIB_NAME("reada%d",j),
|
||||
GENLIB_NAME("readb%d",j),
|
||||
GENLIB_NAME("busa[%d]",nbit-1-i),
|
||||
GENLIB_NAME("busb[%d]",nbit-1-i),
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
}
|
||||
else {
|
||||
GENLIB_PLACE_RIGHT("rf2_mid_mem",GENLIB_NAME("bit%d_%d",nbit-1-i,j),sym1);
|
||||
GENLIB_LOINS("rf2_mid_mem",GENLIB_NAME("bit%d_%d",nbit-1-i,j),
|
||||
GENLIB_NAME("dinx[%d]",nbit-1-i),
|
||||
GENLIB_NAME("write%d",j),
|
||||
GENLIB_NAME("reada%d",j),
|
||||
GENLIB_NAME("readb%d",j),
|
||||
GENLIB_NAME("busa[%d]",nbit-1-i),
|
||||
GENLIB_NAME("busb[%d]",nbit-1-i),
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
}
|
||||
GENLIB_PLACE_RIGHT("rf2_mid_mem",GENLIB_NAME("bit%d_%d",nbit-1-i,j+1),sym2);
|
||||
GENLIB_LOINS("rf2_mid_mem",GENLIB_NAME("bit%d_%d",nbit-1-i,j+1),
|
||||
GENLIB_NAME("dinx[%d]",nbit-1-i),
|
||||
GENLIB_NAME("write%d",j+1),
|
||||
GENLIB_NAME("reada%d",j+1),
|
||||
GENLIB_NAME("readb%d",j+1),
|
||||
GENLIB_NAME("busa[%d]",nbit-1-i),
|
||||
GENLIB_NAME("busb[%d]",nbit-1-i),
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
}
|
||||
GENLIB_PLACE_RIGHT("rf2_out_mem",GENLIB_NAME("out%d",nbit-1-i),sym1);
|
||||
GENLIB_LOINS("rf2_out_mem",GENLIB_NAME("out%d",nbit-1-i),
|
||||
GENLIB_NAME("busa[%d]",nbit-1-i),
|
||||
GENLIB_NAME("busb[%d]",nbit-1-i),
|
||||
"xcks",
|
||||
GENLIB_NAME("dataouta[%d]",nbit-1-i),
|
||||
GENLIB_NAME("dataoutb[%d]",nbit-1-i),
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
}
|
||||
|
||||
///////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// placement de la ligne contenant les buffers
|
||||
//
|
||||
///////////////////////////////////////////////////////////////////
|
||||
|
||||
bottom = nbit * HCELL;
|
||||
GENLIB_PLACE("rf2_inmux_buf","inbuf",NOSYM,0,bottom);
|
||||
GENLIB_LOINS("rf2_inmux_buf","inbuf",
|
||||
"sel",
|
||||
"sel0",
|
||||
"sel1",
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
for (j=0;j<nmot;j+=2){
|
||||
GENLIB_PLACE_RIGHT("rf2_mid_buf",GENLIB_NAME("buf%d",j),NOSYM);
|
||||
GENLIB_LOINS("rf2_mid_buf",GENLIB_NAME("buf%d",j),
|
||||
GENLIB_ELM("selra",j),
|
||||
GENLIB_ELM("selrb",j),
|
||||
GENLIB_ELM("selw",j),
|
||||
"nck",
|
||||
GENLIB_NAME("reada%d",j),
|
||||
GENLIB_NAME("readb%d",j),
|
||||
GENLIB_NAME("write%d",j),
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
GENLIB_PLACE_RIGHT("rf2_mid_buf",GENLIB_NAME("buf%d",j+1),SYM_X);
|
||||
GENLIB_LOINS("rf2_mid_buf",GENLIB_NAME("buf%d",j+1),
|
||||
GENLIB_ELM("selra",j+1),
|
||||
GENLIB_ELM("selrb",j+1),
|
||||
GENLIB_ELM("selw",j+1),
|
||||
"nck",
|
||||
GENLIB_NAME("reada%d",j+1),
|
||||
GENLIB_NAME("readb%d",j+1),
|
||||
GENLIB_NAME("write%d",j+1),
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
}
|
||||
GENLIB_PLACE_RIGHT("rf2_out_buf","outbuf",NOSYM);
|
||||
GENLIB_LOINS("rf2_out_buf","outbuf",
|
||||
"ck",
|
||||
"nck",
|
||||
"xcks",
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
|
||||
///////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// placement des cellules du decodeur ecriture
|
||||
//
|
||||
///////////////////////////////////////////////////////////////////
|
||||
|
||||
if((type == 2) || (type == 3)) {
|
||||
|
||||
half = nmot >> 1;
|
||||
|
||||
// Premiere ligne decodeur ecriture
|
||||
|
||||
bottom = (nbit+2) * HCELL;
|
||||
GENLIB_PLACE("rf2_dec_bufad0","adw0",NOSYM,0,bottom);
|
||||
GENLIB_LOINS("rf2_dec_bufad0","adw0",
|
||||
"adw[0]",
|
||||
"nadw0x",
|
||||
"adw0x",
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
for(j=0 ; j<half ; j++) {
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_nor3",GENLIB_NAME("selw%d",2*j),SYM_X);
|
||||
GENLIB_LOINS("rf2_dec_nor3",GENLIB_NAME("selw%d",2*j),
|
||||
GENLIB_NAME("nandw%d",j),
|
||||
"adw0x",
|
||||
"nwen",
|
||||
GENLIB_ELM("selw",2*j),
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_nor3",GENLIB_NAME("selw%d",2*j+1),NOSYM);
|
||||
GENLIB_LOINS("rf2_dec_nor3",GENLIB_NAME("selw%d",2*j+1),
|
||||
GENLIB_NAME("nandw%d",j),
|
||||
"nadw0x",
|
||||
"nwen",
|
||||
GENLIB_ELM("selw",2*j+1),
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
}
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_nbuf","wen",NOSYM);
|
||||
GENLIB_LOINS("rf2_dec_nbuf","wen",
|
||||
"wen",
|
||||
"nwen",
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
|
||||
// Deuxieme ligne decodeur ecriture
|
||||
|
||||
bottom = (nbit+3) * HCELL;
|
||||
|
||||
if (adrange == 5) { /* adresse sur 5 bits */
|
||||
|
||||
GENLIB_PLACE("rf2_dec_bufad2_l","adw12",SYM_Y,0,bottom);
|
||||
GENLIB_LOINS("rf2_dec_bufad2_l","adw12",
|
||||
"adw[1]",
|
||||
"adw[2]",
|
||||
"nadw1x",
|
||||
"adw1x",
|
||||
"nadw2x",
|
||||
"adw2x",
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
for(j=0 ; j<half ; j++) {
|
||||
if (j % 2 == 0) strcpy(x1,"nadw1x");
|
||||
else strcpy(x1,"adw1x");
|
||||
if ((j >> 1) % 2 == 0) strcpy(x2,"nadw2x");
|
||||
else strcpy(x2,"adw2x");
|
||||
if ((j >> 2) % 2 == 0) strcpy(x3,"nadw3x");
|
||||
else strcpy(x3,"adw3x");
|
||||
if ((j >> 3) % 2 == 0) strcpy(x4,"nadw4x");
|
||||
else strcpy(x4,"adw4x");
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_nand4",GENLIB_NAME("nand4w%d",j),SYM_Y);
|
||||
GENLIB_LOINS("rf2_dec_nand4",GENLIB_NAME("nand4w%d",j),
|
||||
x1,
|
||||
x2,
|
||||
x3,
|
||||
x4,
|
||||
GENLIB_NAME("nandw%d",j),
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
}
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_bufad2_l","adw34",SYMXY);
|
||||
GENLIB_LOINS("rf2_dec_bufad2_l","adw34",
|
||||
"adw[3]",
|
||||
"adw[4]",
|
||||
"nadw3x",
|
||||
"adw3x",
|
||||
"nadw4x",
|
||||
"adw4x",
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
}
|
||||
|
||||
if (adrange == 4) { /* adresse sur 4 bits */
|
||||
|
||||
GENLIB_PLACE("rf2_dec_bufad2_l","adw12",SYM_Y,0,bottom);
|
||||
GENLIB_LOINS("rf2_dec_bufad2_l","adw12",
|
||||
"adw[1]",
|
||||
"adw[2]",
|
||||
"nadw1x",
|
||||
"adw1x",
|
||||
"nadw2x",
|
||||
"adw2x",
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
for(j=0 ; j<half ; j++) {
|
||||
if (j % 2 == 0) strcpy(x1,"nadw1x");
|
||||
else strcpy(x1,"adw1x");
|
||||
if ((j >> 1) % 2 == 0) strcpy(x2,"nadw2x");
|
||||
else strcpy(x2,"adw2x");
|
||||
if ((j >> 2) % 2 == 0) strcpy(x3,"nadw3x");
|
||||
else strcpy(x3,"adw3x");
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_nand3",GENLIB_NAME("nand3w%d",j),SYM_Y);
|
||||
GENLIB_LOINS("rf2_dec_nand3",GENLIB_NAME("nand3w%d",j),
|
||||
x1,
|
||||
x2,
|
||||
x3,
|
||||
GENLIB_NAME("nandw%d",j),
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
}
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_bufad1_r","adw3",SYMXY);
|
||||
GENLIB_LOINS("rf2_dec_bufad1_r","adw3",
|
||||
"adw[3]",
|
||||
"nadw3x",
|
||||
"adw3x",
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
}
|
||||
|
||||
if (adrange == 3) { /* adresse sur 3 bits */
|
||||
|
||||
GENLIB_PLACE("rf2_dec_bufad1_l","adw1",SYM_Y,0,bottom);
|
||||
GENLIB_LOINS("rf2_dec_bufad1_l","adw1",
|
||||
"adw[1]",
|
||||
"nadw1x",
|
||||
"adw1x",
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
for(j=0 ; j<half ; j++) {
|
||||
if (j % 2 == 0) strcpy(x1,"nadw1x");
|
||||
else strcpy(x1,"adw1x");
|
||||
if ((j >> 1) % 2 == 0) strcpy(x2,"nadw2x");
|
||||
else strcpy(x2,"adw2x");
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_nand2",GENLIB_NAME("nand2w%d",j),SYM_Y);
|
||||
GENLIB_LOINS("rf2_dec_nand2",GENLIB_NAME("nand2w%d",j),
|
||||
x1,
|
||||
x2,
|
||||
GENLIB_NAME("nandw%d",j),
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
}
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_bufad1_r","adw2",SYMXY);
|
||||
GENLIB_LOINS("rf2_dec_bufad1_r","adw2",
|
||||
"adw[2]",
|
||||
"nadw2x",
|
||||
"adw2x",
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
}
|
||||
}
|
||||
|
||||
///////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// placement des cellules du decodeur lecture A
|
||||
//
|
||||
///////////////////////////////////////////////////////////////////
|
||||
|
||||
if((type == 2) || (type == 3)) {
|
||||
|
||||
half = nmot >> 1;
|
||||
|
||||
// Premiere ligne decodeur lecture A
|
||||
|
||||
bottom = (nbit+4) * HCELL;
|
||||
GENLIB_PLACE("rf2_dec_bufad0","adra0",NOSYM,0,bottom);
|
||||
GENLIB_LOINS("rf2_dec_bufad0","adra0",
|
||||
"adra[0]",
|
||||
"nadra0x",
|
||||
"adra0x",
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
for(j=0 ; j<half ; j++) {
|
||||
if (j == 0) {
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_nao3",GENLIB_NAME("selra%d",2*j),NOSYM);
|
||||
GENLIB_LOINS("rf2_dec_nao3",GENLIB_NAME("selra%d",2*j),
|
||||
GENLIB_NAME("nandra%d",j),
|
||||
"adra0x",
|
||||
"rena",
|
||||
GENLIB_ELM("selra",2*j),
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
} else {
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_nor3",GENLIB_NAME("selra%d",2*j),NOSYM);
|
||||
GENLIB_LOINS("rf2_dec_nor3",GENLIB_NAME("selra%d",2*j),
|
||||
GENLIB_NAME("nandra%d",j),
|
||||
"adra0x",
|
||||
"nrena",
|
||||
GENLIB_ELM("selra",2*j),
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
}
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_nor3",GENLIB_NAME("selra%d",2*j+1),SYM_X);
|
||||
GENLIB_LOINS("rf2_dec_nor3",GENLIB_NAME("selra%d",2*j+1),
|
||||
GENLIB_NAME("nandra%d",j),
|
||||
"nadra0x",
|
||||
"nrena",
|
||||
GENLIB_ELM("selra",2*j+1),
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
}
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_nbuf","rena",NOSYM);
|
||||
GENLIB_LOINS("rf2_dec_nbuf","rena",
|
||||
"rena",
|
||||
"nrena",
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
|
||||
// Deuxieme ligne decodeur lecture A
|
||||
|
||||
bottom = (nbit+5) * HCELL;
|
||||
|
||||
if (adrange == 5) { /* adresse sur 5 bits */
|
||||
|
||||
GENLIB_PLACE("rf2_dec_bufad2_l","adra12",SYM_Y,0,bottom);
|
||||
GENLIB_LOINS("rf2_dec_bufad2_l","adra12",
|
||||
"adra[1]",
|
||||
"adra[2]",
|
||||
"nadra1x",
|
||||
"adra1x",
|
||||
"nadra2x",
|
||||
"adra2x",
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
for(j=0 ; j<half ; j++) {
|
||||
if (j % 2 == 0) strcpy(x1,"nadra1x");
|
||||
else strcpy(x1,"adra1x");
|
||||
if ((j >> 1) % 2 == 0) strcpy(x2,"nadra2x");
|
||||
else strcpy(x2,"adra2x");
|
||||
if ((j >> 2) % 2 == 0) strcpy(x3,"nadra3x");
|
||||
else strcpy(x3,"adra3x");
|
||||
if ((j >> 3) % 2 == 0) strcpy(x4,"nadra4x");
|
||||
else strcpy(x4,"adra4x");
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_nand4",GENLIB_NAME("nand4ra%d",j),SYM_Y);
|
||||
GENLIB_LOINS("rf2_dec_nand4",GENLIB_NAME("nand4ra%d",j),
|
||||
x1,
|
||||
x2,
|
||||
x3,
|
||||
x4,
|
||||
GENLIB_NAME("nandra%d",j),
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
}
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_bufad2_r","adra34",SYMXY);
|
||||
GENLIB_LOINS("rf2_dec_bufad2_r","adra34",
|
||||
"adra[3]",
|
||||
"adra[4]",
|
||||
"nadra3x",
|
||||
"adra3x",
|
||||
"nadra4x",
|
||||
"adra4x",
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
}
|
||||
|
||||
if (adrange == 4) { /* adresse sur 4 bits */
|
||||
|
||||
GENLIB_PLACE("rf2_dec_bufad2_l","adra12",SYM_Y,0,bottom);
|
||||
GENLIB_LOINS("rf2_dec_bufad2_l","adra12",
|
||||
"adra[1]",
|
||||
"adra[2]",
|
||||
"nadra1x",
|
||||
"adra1x",
|
||||
"nadra2x",
|
||||
"adra2x",
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
for(j=0 ; j<half ; j++) {
|
||||
if (j % 2 == 0) strcpy(x1,"nadra1x");
|
||||
else strcpy(x1,"adra1x");
|
||||
if ((j >> 1) % 2 == 0) strcpy(x2,"nadra2x");
|
||||
else strcpy(x2,"adra2x");
|
||||
if ((j >> 2) % 2 == 0) strcpy(x3,"nadra3x");
|
||||
else strcpy(x3,"adra3x");
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_nand3",GENLIB_NAME("nand3ra%d",j),SYM_Y);
|
||||
GENLIB_LOINS("rf2_dec_nand3",GENLIB_NAME("nand3ra%d",j),
|
||||
x1,
|
||||
x2,
|
||||
x3,
|
||||
GENLIB_NAME("nandra%d",j),
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
}
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_bufad1_r","adra3",SYMXY);
|
||||
GENLIB_LOINS("rf2_dec_bufad1_r","adra3",
|
||||
"adra[3]",
|
||||
"nadra3x",
|
||||
"adra3x",
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
}
|
||||
|
||||
if (adrange == 3) { /* adresse sur 3 bits */
|
||||
|
||||
GENLIB_PLACE("rf2_dec_bufad1_l","adra1",SYM_Y,0,bottom);
|
||||
GENLIB_LOINS("rf2_dec_bufad1_l","adra1",
|
||||
"adra[1]",
|
||||
"nadra1x",
|
||||
"adra1x",
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
for(j=0 ; j<half ; j++) {
|
||||
if (j % 2 == 0) strcpy(x1,"nadra1x");
|
||||
else strcpy(x1,"adra1x");
|
||||
if ((j >> 1) % 2 == 0) strcpy(x2,"nadra2x");
|
||||
else strcpy(x2,"adra2x");
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_nand2",GENLIB_NAME("nand2ra%d",j),SYM_Y);
|
||||
GENLIB_LOINS("rf2_dec_nand2",GENLIB_NAME("nand2ra%d",j),
|
||||
x1,
|
||||
x2,
|
||||
GENLIB_NAME("nandra%d",j),
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
}
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_bufad1_r","adra2",SYMXY);
|
||||
GENLIB_LOINS("rf2_dec_bufad1_r","adra2",
|
||||
"adra[2]",
|
||||
"nadra2x",
|
||||
"adra2x",
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
}
|
||||
}
|
||||
|
||||
///////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// placement des cellules du decodeur lecture B
|
||||
//
|
||||
///////////////////////////////////////////////////////////////////
|
||||
|
||||
if((type == 2) || (type == 3)) {
|
||||
|
||||
half = nmot >> 1;
|
||||
|
||||
// Premiere ligne decodeur lecture A
|
||||
|
||||
bottom = (nbit+6) * HCELL;
|
||||
GENLIB_PLACE("rf2_dec_bufad0","adrb0",NOSYM,0,bottom);
|
||||
GENLIB_LOINS("rf2_dec_bufad0","adrb0",
|
||||
"adrb[0]",
|
||||
"nadrb0x",
|
||||
"adrb0x",
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
for(j=0 ; j<half ; j++) {
|
||||
if (j == 0) {
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_nao3",GENLIB_NAME("selrb%d",2*j),NOSYM);
|
||||
GENLIB_LOINS("rf2_dec_nao3",GENLIB_NAME("selrb%d",2*j),
|
||||
GENLIB_NAME("nandrb%d",j),
|
||||
"adrb0x",
|
||||
"renb",
|
||||
GENLIB_ELM("selrb",2*j),
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
} else {
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_nor3",GENLIB_NAME("selrb%d",2*j),NOSYM);
|
||||
GENLIB_LOINS("rf2_dec_nor3",GENLIB_NAME("selrb%d",2*j),
|
||||
GENLIB_NAME("nandrb%d",j),
|
||||
"adrb0x",
|
||||
"nrenb",
|
||||
GENLIB_ELM("selrb",2*j),
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
}
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_nor3",GENLIB_NAME("selrb%d",2*j+1),SYM_X);
|
||||
GENLIB_LOINS("rf2_dec_nor3",GENLIB_NAME("selrb%d",2*j+1),
|
||||
GENLIB_NAME("nandrb%d",j),
|
||||
"nadrb0x",
|
||||
"nrenb",
|
||||
GENLIB_ELM("selrb",2*j+1),
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
}
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_nbuf","renb",NOSYM);
|
||||
GENLIB_LOINS("rf2_dec_nbuf","renb",
|
||||
"renb",
|
||||
"nrenb",
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
|
||||
// Deuxieme ligne decodeur lecture A
|
||||
|
||||
bottom = (nbit+7) * HCELL;
|
||||
|
||||
if (adrange == 5) { /* adresse sur 5 bits */
|
||||
|
||||
GENLIB_PLACE("rf2_dec_bufad2_l","adrb12",SYM_Y,0,bottom);
|
||||
GENLIB_LOINS("rf2_dec_bufad2_l","adrb12",
|
||||
"adrb[1]",
|
||||
"adrb[2]",
|
||||
"nadrb1x",
|
||||
"adrb1x",
|
||||
"nadrb2x",
|
||||
"adrb2x",
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
for(j=0 ; j<half ; j++) {
|
||||
if (j % 2 == 0) strcpy(x1,"nadrb1x");
|
||||
else strcpy(x1,"adrb1x");
|
||||
if ((j >> 1) % 2 == 0) strcpy(x2,"nadrb2x");
|
||||
else strcpy(x2,"adrb2x");
|
||||
if ((j >> 2) % 2 == 0) strcpy(x3,"nadrb3x");
|
||||
else strcpy(x3,"adrb3x");
|
||||
if ((j >> 3) % 2 == 0) strcpy(x4,"nadrb4x");
|
||||
else strcpy(x4,"adrb4x");
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_nand4",GENLIB_NAME("nand4rb%d",j),SYM_Y);
|
||||
GENLIB_LOINS("rf2_dec_nand4",GENLIB_NAME("nand4rb%d",j),
|
||||
x1,
|
||||
x2,
|
||||
x3,
|
||||
x4,
|
||||
GENLIB_NAME("nandrb%d",j),
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
}
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_bufad2_r","adrb34",SYMXY);
|
||||
GENLIB_LOINS("rf2_dec_bufad2_r","adrb34",
|
||||
"adrb[3]",
|
||||
"adrb[4]",
|
||||
"nadrb3x",
|
||||
"adrb3x",
|
||||
"nadrb4x",
|
||||
"adrb4x",
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
}
|
||||
|
||||
if (adrange == 4) { /* adresse sur 4 bits */
|
||||
|
||||
GENLIB_PLACE("rf2_dec_bufad2_l","adrb12",SYM_Y,0,bottom);
|
||||
GENLIB_LOINS("rf2_dec_bufad2_l","adrb12",
|
||||
"adrb[1]",
|
||||
"adrb[2]",
|
||||
"nadrb1x",
|
||||
"adrb1x",
|
||||
"nadrb2x",
|
||||
"adrb2x",
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
for(j=0 ; j<half ; j++) {
|
||||
if (j % 2 == 0) strcpy(x1,"nadrb1x");
|
||||
else strcpy(x1,"adrb1x");
|
||||
if ((j >> 1) % 2 == 0) strcpy(x2,"nadrb2x");
|
||||
else strcpy(x2,"adrb2x");
|
||||
if ((j >> 2) % 2 == 0) strcpy(x3,"nadrb3x");
|
||||
else strcpy(x3,"adrb3x");
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_nand3",GENLIB_NAME("nand3rb%d",j),SYM_Y);
|
||||
GENLIB_LOINS("rf2_dec_nand3",GENLIB_NAME("nand3rb%d",j),
|
||||
x1,
|
||||
x2,
|
||||
x3,
|
||||
GENLIB_NAME("nandrb%d",j),
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
}
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_bufad1_r","adrb3",SYMXY);
|
||||
GENLIB_LOINS("rf2_dec_bufad1_r","adrb3",
|
||||
"adrb[3]",
|
||||
"nadrb3x",
|
||||
"adrb3x",
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
}
|
||||
|
||||
if (adrange == 3) { /* adresse sur 3 bits */
|
||||
|
||||
GENLIB_PLACE("rf2_dec_bufad1_l","adrb1",SYM_Y,0,bottom);
|
||||
GENLIB_LOINS("rf2_dec_bufad1_l","adrb1",
|
||||
"adrb[1]",
|
||||
"nadrb1x",
|
||||
"adrb1x",
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
for(j=0 ; j<half ; j++) {
|
||||
if (j % 2 == 0) strcpy(x1,"nadrb1x");
|
||||
else strcpy(x1,"adrb1x");
|
||||
if ((j >> 1) % 2 == 0) strcpy(x2,"nadrb2x");
|
||||
else strcpy(x2,"adrb2x");
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_nand2",GENLIB_NAME("nand2rb%d",j),SYM_Y);
|
||||
GENLIB_LOINS("rf2_dec_nand2",GENLIB_NAME("nand2rb%d",j),
|
||||
x1,
|
||||
x2,
|
||||
GENLIB_NAME("nandrb%d",j),
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
}
|
||||
GENLIB_PLACE_RIGHT("rf2_dec_bufad1_r","adrb2",SYMXY);
|
||||
GENLIB_LOINS("rf2_dec_bufad1_r","adrb2",
|
||||
"adrb[2]",
|
||||
"nadrb2x",
|
||||
"adrb2x",
|
||||
"vdd",
|
||||
"vss",NULL);
|
||||
}
|
||||
}
|
||||
|
||||
///////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Placement des rappels d'alimentation
|
||||
//
|
||||
///////////////////////////////////////////////////////////////////
|
||||
|
||||
if((type == 0) || (type == 1)) {
|
||||
max = nbit/2 + 2;
|
||||
GENLIB_PHSEG(CALU3,12,"vss", 10, 0, 10, (nbit + 2) * HCELL);
|
||||
GENLIB_PHSEG(CALU3,12,"vdd", (nmot * 35) + 140, 0,
|
||||
(nmot * 35) + 140, (nbit + 2) * HCELL);
|
||||
}
|
||||
if((type == 2) || (type == 3)) {
|
||||
max = nbit/2 + 5;
|
||||
GENLIB_PHSEG(CALU3,12,"vss", 10, 0, 10, (nbit + 8) * HCELL);
|
||||
GENLIB_PHSEG(CALU3,12,"vdd", (nmot * 35) + 140, 0,
|
||||
(nmot * 35) + 140, (nbit + 8) * HCELL);
|
||||
}
|
||||
for(i = 0 ; i < max ; i++) {
|
||||
GENLIB_PHBIGVIA(VIA12, 10, i*100, 12, 2, "vss");
|
||||
GENLIB_PHBIGVIA(VIA23, 10, i*100, 12, 2, "vss");
|
||||
GENLIB_PHSEG(TALU2, 2, "obs", 5, i*100, 15, i*100);
|
||||
}
|
||||
for(i = 0 ; i < max-1 ; i++) {
|
||||
GENLIB_PHBIGVIA(VIA12, nmot*35 + 140, 50 + i*100, 12, 2, "vdd");
|
||||
GENLIB_PHBIGVIA(VIA23, nmot*35 + 140, 50 + i*100, 12, 2, "vdd");
|
||||
GENLIB_PHSEG(TALU2, 2, "obs", nmot*35 + 135, 50 + i*100, nmot*35 + 145, 50 + i*100);
|
||||
}
|
||||
|
||||
GENLIB_DEF_AB(0,0,0,0);
|
||||
|
||||
GENLIB_SAVE_PHFIG(model_name);
|
||||
GENLIB_SAVE_LOFIG(model_name);
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,249 @@
|
|||
/*
|
||||
* This file is part of the Alliance CAD System
|
||||
* Copyright (C) Laboratoire LIP6 - Département ASIM
|
||||
* Universite Pierre et Marie Curie
|
||||
*
|
||||
* Home page : http://www-asim.lip6.fr/alliance/
|
||||
* E-mail support : mailto:alliance-support@asim.lip6.fr
|
||||
*
|
||||
* This progam is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
* Alliance VLSI CAD System is distributed in the hope that it will be
|
||||
* useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
|
||||
* Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with the GNU C Library; see the file COPYING. If not, write to the Free
|
||||
* Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
/* Simple barrel shifter generator.
|
||||
Author: Frédéric Pétrot
|
||||
Date : 1/10/2000
|
||||
$Log: dpgen_Shifter.c,v $
|
||||
Revision 1.1 2002/04/29 13:40:54 jpc
|
||||
Merging GenLib & DpGen.
|
||||
|
||||
Revision 1.5 2001/10/19 14:15:04 boris
|
||||
Retournement du placement physique des bits 0 à n-1
|
||||
|
||||
Revision 1.4 2000/11/06 10:32:44 jpc
|
||||
|
||||
* dpgen_Shifter.c :
|
||||
- Bug : l'ordre des connecteurs etait faux dans la doc. Donc on aligne
|
||||
dpgen_Shifter.c avec la doc.
|
||||
|
||||
* dpgen_RF1.c/dpgen_Defs.h/dpgen_Macro.c/dgnvrr.h :
|
||||
- Suppression de l'argument 'aRFFlags' dans la fonction 'dpgen_RF1'
|
||||
(redondant avec 'aFunction').
|
||||
|
||||
Revision 1.3 2000/11/03 15:08:28 jpc
|
||||
|
||||
* dpgen_Shifter.c :
|
||||
- Bug : le nom du modele n'etait pas pris en compte dans la generation
|
||||
de la vue physique... (elle etait forcee a "sh%d").
|
||||
|
||||
* dpgen_RF1.c :
|
||||
- Bug : le buffer generant les signaux de selection du multiplexeur
|
||||
d'entree (datain0/datain1) sortait "sel0" et "sel1" alors que
|
||||
dans la matrice les multiplexeurs lisaient "sel0[x]" et
|
||||
"sel1[x]". On n'utilise plus que "sel0" et "sel1".
|
||||
|
||||
* dpgen_RF1.c/dpgen_Defs.h/dpgen_Macro.c/dgnvrr.h :
|
||||
- Creation de la circuiterie preparatoire a l'implementation des bancs
|
||||
de registres speciaux :
|
||||
|
||||
1. Registre R0 "colle" a zero (pour le MIPS).
|
||||
2. Registre avec decodeur.
|
||||
3. Registre en mode FIFO (grace a un decodeur special).
|
||||
|
||||
Revision 1.2 2000/10/26 12:20:30 fred
|
||||
Added a pre placement for the shifter.
|
||||
|
||||
Revision 1.1 2000/10/02 15:33:15 jpc
|
||||
|
||||
* dpgen.sh :
|
||||
- Bug : les options longues n'etaient pas activees.
|
||||
|
||||
* docs/SPECS.html :
|
||||
- Mise a jour de la specification du shifter.
|
||||
- Correction de l'ordre des connecteurs de DFFT (inversion de "scan" et
|
||||
"scin").
|
||||
|
||||
* dpgen_Shifter.c/dpgen_Defs.h/dpgen_Macro.c :
|
||||
- Integration du generateur de shifter (fournit seulement la netlist pour
|
||||
l'instant).
|
||||
|
||||
*/
|
||||
|
||||
static char rcsid[]="$Id: dpgen_Shifter.c,v 1.1 2002/04/29 13:40:54 jpc Exp $";
|
||||
|
||||
|
||||
# include "util_Defs.h"
|
||||
# include "dpgen_Defs.h"
|
||||
# include "dgn.h"
|
||||
|
||||
|
||||
int ln2p(int n)
|
||||
{
|
||||
int i = 0, j = n & 1;
|
||||
|
||||
if (n)
|
||||
for (i = -1; n > 0; n >>= 1) {
|
||||
j += (n & 1);
|
||||
i++;
|
||||
}
|
||||
return i + (j > 1);
|
||||
}
|
||||
|
||||
chain_list *c; /* To free the allocated names */
|
||||
|
||||
void freestr()
|
||||
{
|
||||
chain_list *cc;
|
||||
for (cc = c; cc; cc = cc->NEXT)
|
||||
mbkfree(cc->DATA);
|
||||
freechain(c);
|
||||
}
|
||||
|
||||
#define namegen(x) \
|
||||
char *x(int n) \
|
||||
{ \
|
||||
char *s = mbkalloc(16 * sizeof(char)); \
|
||||
c = addchain(c, s); \
|
||||
sprintf(s, #x "[%d]", n); \
|
||||
return s; \
|
||||
}
|
||||
|
||||
namegen(i)
|
||||
namegen(o)
|
||||
namegen(MuxOutput)
|
||||
namegen(c0)
|
||||
namegen(c1)
|
||||
namegen(shamt)
|
||||
namegen(op)
|
||||
|
||||
/* Behavior:
|
||||
|
||||
o = (i op shamt);
|
||||
|
||||
where op is :
|
||||
X0 : logical left shift
|
||||
01 : logical right shift
|
||||
11 : arithmetical right shift
|
||||
*/
|
||||
extern void dpgen_Shifter(aFunction, aAL)
|
||||
long aFunction;
|
||||
va_list aAL;
|
||||
{
|
||||
char *modelName;
|
||||
long flags;
|
||||
int n;
|
||||
int Slices;
|
||||
int BitIndex, SliceIndex;
|
||||
int LeftIndex, RightIndex;
|
||||
char *LSB, *MSB;
|
||||
char *MuxInput0, *MuxInput1, *MuxInput2; /* Mux inputs */
|
||||
int sym, mys;
|
||||
|
||||
modelName = va_arg (aAL, char*);
|
||||
flags = va_arg (aAL, long );
|
||||
n = (int)va_arg (aAL, long );
|
||||
|
||||
Slices = ln2p(n - 1);
|
||||
|
||||
#define XX_NAME GENLIB_NAME
|
||||
|
||||
#define MX3(c0, c1, i0, i1, i2, q) \
|
||||
GENLIB_LOINS("mx3_x2", XX_NAME("m_%d", SliceIndex * n + BitIndex), c0, c1, i0, i1, i2, q, "vdd", "vss", NULL)
|
||||
|
||||
#define MX2(k, c0, i0, i1, q) \
|
||||
GENLIB_LOINS("mx2_x2", XX_NAME("c_%d", 2 * SliceIndex + k), c0, i0, i1, q, "vdd", "vss", NULL)
|
||||
|
||||
#define A2(k, i0, i1, q) \
|
||||
GENLIB_LOINS("a2_x2", XX_NAME("a_%d", k), i0, i1, q, "vdd", "vss", NULL)
|
||||
|
||||
#define O2(k, i0, i1, q) \
|
||||
GENLIB_LOINS("o2_x2", XX_NAME("o_%d", k), i0, i1, q, "vdd", "vss", NULL)
|
||||
|
||||
#define INV(k, i, nq) \
|
||||
GENLIB_LOINS("inv_x2", XX_NAME("i_%d", k), i, nq, "vdd", "vss", NULL)
|
||||
|
||||
GENLIB_DEF_LOFIG(modelName);
|
||||
|
||||
GENLIB_LOCON(GENLIB_BUS("op", 1, 0), 'I', GENLIB_BUS("op", 1, 0));
|
||||
GENLIB_LOCON(GENLIB_BUS("shamt", Slices - 1, 0), 'I', GENLIB_BUS("shamt", Slices - 1, 0));
|
||||
GENLIB_LOCON(GENLIB_BUS("i", n - 1, 0), 'I', GENLIB_BUS("i", n - 1, 0));
|
||||
GENLIB_LOCON(GENLIB_BUS("o", n - 1, 0), 'O', GENLIB_BUS("o", n - 1, 0));
|
||||
GENLIB_LOCON("vdd", 'I', "vdd");
|
||||
GENLIB_LOCON("vss", 'I', "vss");
|
||||
|
||||
/* Forcing a zero on lsb for left shifts */
|
||||
LSB = op(0);
|
||||
MSB = "msb"; /* intermediate signal for arith sh */
|
||||
|
||||
/* Arithmetic extension */
|
||||
A2(0, MuxOutput(n - 1), op(1), MSB);
|
||||
|
||||
/* Normalizing the input signals names */
|
||||
for (BitIndex = 0; BitIndex < n; BitIndex++)
|
||||
GENLIB_LOSIGMERGE(i(BitIndex), MuxOutput(BitIndex));
|
||||
|
||||
/* Connecting the mux matrix */
|
||||
for (SliceIndex = 0; SliceIndex < Slices; SliceIndex++) {
|
||||
for (BitIndex = 0; BitIndex < n; BitIndex++) {
|
||||
LeftIndex = BitIndex - (1 << SliceIndex);
|
||||
RightIndex = BitIndex + (1 << SliceIndex);
|
||||
MuxInput0 = LeftIndex >= 0 ? MuxOutput(SliceIndex * n + LeftIndex) : LSB;
|
||||
MuxInput1 = MuxOutput(SliceIndex * n + BitIndex);
|
||||
MuxInput2 = RightIndex < n ? MuxOutput(SliceIndex * n + RightIndex) : MSB;
|
||||
MX3(c0(SliceIndex), c1(SliceIndex), MuxInput0, MuxInput1, MuxInput2, MuxOutput((SliceIndex + 1) * n + BitIndex));
|
||||
}
|
||||
}
|
||||
|
||||
/* Normalizing the output signals names */
|
||||
for (BitIndex = 0; BitIndex < n; BitIndex++)
|
||||
GENLIB_LOSIGMERGE(o(BitIndex), MuxOutput(Slices * n + BitIndex));
|
||||
|
||||
/* Building the control signals */
|
||||
for (SliceIndex = 0; SliceIndex < Slices; SliceIndex++) {
|
||||
INV(SliceIndex, shamt(SliceIndex), c1(SliceIndex));
|
||||
O2 (SliceIndex, c1(SliceIndex), op(0), c0(SliceIndex));
|
||||
}
|
||||
|
||||
GENLIB_SAVE_LOFIG();
|
||||
|
||||
/* Let's place this stuff approximatively */
|
||||
if (n & 1)
|
||||
sym = SYM_Y, mys = NOSYM;
|
||||
else
|
||||
sym = NOSYM, mys = SYM_Y;
|
||||
|
||||
GENLIB_DEF_PHSC(modelName);
|
||||
GENLIB_SC_PLACE(XX_NAME("a_%d", 0), sym, 0, 0);
|
||||
for (SliceIndex = 0; SliceIndex < Slices; SliceIndex++) {
|
||||
GENLIB_SC_RIGHT(XX_NAME("i_%d", SliceIndex), sym);
|
||||
GENLIB_SC_RIGHT(XX_NAME("o_%d", SliceIndex), sym);
|
||||
}
|
||||
GENLIB_DEF_PHINS("a_0");
|
||||
BitIndex = n - 1;
|
||||
for (SliceIndex = 0; SliceIndex < Slices; SliceIndex++) {
|
||||
if (SliceIndex == 0)
|
||||
GENLIB_SC_BOTTOM(XX_NAME("m_%d", SliceIndex * n + BitIndex), mys);
|
||||
else
|
||||
GENLIB_SC_RIGHT(XX_NAME("m_%d", SliceIndex * n + BitIndex), mys);
|
||||
}
|
||||
for (SliceIndex = 0; SliceIndex < Slices; SliceIndex++) {
|
||||
GENLIB_DEF_PHINS(XX_NAME("m_%d", SliceIndex * n + n-1));
|
||||
for (BitIndex = n-2; BitIndex >= 0; BitIndex--) {
|
||||
GENLIB_SC_BOTTOM(XX_NAME("m_%d", SliceIndex * n + BitIndex),
|
||||
BitIndex & 1 ? mys : sym);
|
||||
}
|
||||
}
|
||||
GENLIB_SAVE_PHSC();
|
||||
freestr();
|
||||
}
|
||||
|
|
@ -0,0 +1,638 @@
|
|||
/*
|
||||
* $Id: dpgen_uROM.c,v 1.1 2002/04/29 13:40:54 jpc Exp $
|
||||
*
|
||||
* /----------------------------------------------------------------\
|
||||
* | |
|
||||
* | A l l i a n c e C A D S y s t e m |
|
||||
* | D p G e n |
|
||||
* | |
|
||||
* | Author : Jean-Paul CHAPUT |
|
||||
* | E-mail : alliance-support@asim.lip6.fr |
|
||||
* | ============================================================== |
|
||||
* | Module : "./dpgen_uROM.c" |
|
||||
* | ************************************************************** |
|
||||
* | U p d a t e s |
|
||||
* | |
|
||||
* \----------------------------------------------------------------/
|
||||
*/
|
||||
|
||||
|
||||
# include "util_Defs.h"
|
||||
# include "dpgen_Defs.h"
|
||||
# include "dgn.h"
|
||||
# include "debugon.h"
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Local constants.
|
||||
*/
|
||||
|
||||
# define ERROR_INDEX 4096
|
||||
|
||||
# define CELLS_ROM2 5
|
||||
# define CELLS_ROM4 17
|
||||
|
||||
# define SIZE_SNAME 1024
|
||||
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Local variables (prefix "LV_").
|
||||
*/
|
||||
|
||||
static FILE *LV_FILE;
|
||||
static long LV_Function;
|
||||
static char *LV_modelName;
|
||||
static struct xlong_s *LV_xl0;
|
||||
static struct xlong_s *LV_xl1;
|
||||
static struct xlong_s *LV_xl2;
|
||||
static struct xlong_s *LV_xl3;
|
||||
static long LV_flags;
|
||||
static long LV_N;
|
||||
static long LV_iLeafCell;
|
||||
static char *LV_tsLeafCell[] = {
|
||||
/* ROM2 generators leaf cells. */
|
||||
"dp_rom2_buf", "zero_x0", "buf_x4", "inv_x4", "one_x0",
|
||||
/* ROM4 generators leaf cells. */
|
||||
"dp_rom4_buf",
|
||||
"zero_x0", "a2_x4", "a2_x4", "buf_x4",
|
||||
"a2_x4", "buf_x4", "dp_rom4_xr2_x4", "o2_x4",
|
||||
"a2_x4", "dp_rom4_nxr2_x4", "buf_x4", "o2_x4",
|
||||
"buf_x4", "o2_x4", "o2_x4", "one_x0"
|
||||
};
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Internal macros declarations.
|
||||
*/
|
||||
|
||||
# define DPGEN_PORT_BIT(s) \
|
||||
SLICE_TO_BIT((s), LV_N, LV_flags & F_MSB_FIRST)
|
||||
|
||||
# define DPGEN_LOCON_BUS(name,dir) \
|
||||
GENLIB_LOCON ( FULL_BUS(name, LV_N, LV_flags & F_MSB_FIRST), dir, \
|
||||
FULL_BUS(name, LV_N, LV_flags & F_MSB_FIRST))
|
||||
|
||||
# define VHDL_BUS_WIDE(bus,msb,lsb) \
|
||||
sprintf (bus, \
|
||||
"(%ld %s %ld)", \
|
||||
DPGEN_PORT_BIT (msb), \
|
||||
(LV_flags & F_MSB_FIRST) ? "to" : "downto" , \
|
||||
DPGEN_PORT_BIT (lsb))
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Internal function declarations.
|
||||
*/
|
||||
|
||||
static long set_iLeafCell __FP((void));
|
||||
static void init_Generator __FP((long aFunction));
|
||||
static void create_Netlist __FP((void));
|
||||
static void create_Layout __FP((void));
|
||||
static void create_VHDL __FP((void));
|
||||
static long get_index_Cell __FP((long aiSlice));
|
||||
static char *get_model_Cell __FP((long aiSlice, long aiCell));
|
||||
static char *get_model_Buffer __FP((void));
|
||||
|
||||
|
||||
/*
|
||||
* /----------------------------------------------------------------\
|
||||
* | Functions Definitions |
|
||||
* \----------------------------------------------------------------/
|
||||
*/
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "set_iLeafCell ()".
|
||||
*/
|
||||
|
||||
static long set_iLeafCell ()
|
||||
{
|
||||
LV_iLeafCell = 0;
|
||||
|
||||
switch (LV_Function) {
|
||||
case DPGEN_ROM4: LV_iLeafCell += CELLS_ROM2;
|
||||
case DPGEN_ROM2:
|
||||
default:
|
||||
}
|
||||
|
||||
return (LV_iLeafCell);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "init_Generator ()".
|
||||
*/
|
||||
|
||||
static void init_Generator (aFunction)
|
||||
long aFunction;
|
||||
{
|
||||
/* Set the function once and for all. */
|
||||
LV_Function = aFunction;
|
||||
|
||||
set_iLeafCell ();
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "get_index_Cell ()".
|
||||
*/
|
||||
|
||||
static long get_index_Cell (aiSlice)
|
||||
long aiSlice;
|
||||
{
|
||||
long index;
|
||||
|
||||
|
||||
index = ERROR_INDEX;
|
||||
|
||||
switch (LV_Function) {
|
||||
case DPGEN_ROM2:
|
||||
__DBG(
|
||||
fprintf (stderr, "LV_xl0(%ld) := %ld.\n",
|
||||
aiSlice, getxlbit (LV_xl0, aiSlice));
|
||||
fprintf (stderr, "LV_xl1(%ld) := %ld.\n",
|
||||
aiSlice, getxlbit (LV_xl1, aiSlice));
|
||||
fflush (stderr);
|
||||
)
|
||||
index = (getxlbit (LV_xl1, aiSlice) << 1)
|
||||
+ getxlbit (LV_xl0, aiSlice);
|
||||
break;
|
||||
case DPGEN_ROM4:
|
||||
index = (getxlbit (LV_xl3, aiSlice) << 3)
|
||||
+ (getxlbit (LV_xl2, aiSlice) << 2)
|
||||
+ (getxlbit (LV_xl1, aiSlice) << 1)
|
||||
+ getxlbit (LV_xl0, aiSlice);
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
return (index);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "get_model_Cell ()".
|
||||
*/
|
||||
|
||||
static char *get_model_Cell (aiSlice, aiCell)
|
||||
long aiSlice, aiCell;
|
||||
{
|
||||
long index;
|
||||
|
||||
|
||||
index = ERROR_INDEX;
|
||||
|
||||
switch (LV_Function) {
|
||||
case DPGEN_ROM4:
|
||||
case DPGEN_ROM2:
|
||||
index = LV_iLeafCell + 1 + aiCell;
|
||||
break;
|
||||
}
|
||||
|
||||
if (index >= ERROR_INDEX) return ("bug_leaf");
|
||||
|
||||
__DBG(
|
||||
fprintf (stderr,
|
||||
"bit := %2ld, ",
|
||||
SLICE_TO_BIT(aiSlice, LV_N, LV_flags & F_MSB_FIRST));
|
||||
fprintf (stderr,
|
||||
"aiCell := %3ld, name := %s\n",
|
||||
aiCell,
|
||||
LV_tsLeafCell[ index ]);
|
||||
fflush (stderr);
|
||||
)
|
||||
|
||||
return (LV_tsLeafCell[ index ]);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "get_model_Buffer ()".
|
||||
*/
|
||||
|
||||
static char *get_model_Buffer ()
|
||||
{
|
||||
long index;
|
||||
|
||||
|
||||
index = ERROR_INDEX;
|
||||
|
||||
switch (LV_Function) {
|
||||
case DPGEN_ROM2:
|
||||
case DPGEN_ROM4:
|
||||
index = LV_iLeafCell;
|
||||
break;
|
||||
}
|
||||
|
||||
if (index == ERROR_INDEX) return ("bug_buff");
|
||||
|
||||
__DBG(
|
||||
fprintf (stderr,
|
||||
"index := %ld, name := %s\n",
|
||||
index,
|
||||
LV_tsLeafCell[ index ]);
|
||||
fflush (stderr);
|
||||
)
|
||||
|
||||
return (LV_tsLeafCell[ index ]);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "create_Netlist ()".
|
||||
*/
|
||||
|
||||
static void create_Netlist ()
|
||||
{
|
||||
char sInstance[SIZE_SNAME];
|
||||
char *sModel, *sI0, *sI1;
|
||||
long iSlice, iCell;
|
||||
|
||||
|
||||
GENLIB_DEF_LOFIG (LV_modelName);
|
||||
|
||||
/* Control terminals. */
|
||||
switch (LV_Function) {
|
||||
case DPGEN_ROM4:
|
||||
GENLIB_LOCON ("sel1", IN, "sel1");
|
||||
case DPGEN_ROM2:
|
||||
GENLIB_LOCON ("sel0", IN, "sel0");
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
/* Output data buses terminals. */
|
||||
DPGEN_LOCON_BUS ("q", OUT);
|
||||
|
||||
|
||||
/* Power terminals. */
|
||||
GENLIB_LOCON ("vdd", IN, "vdd");
|
||||
GENLIB_LOCON ("vss", IN, "vss");
|
||||
|
||||
|
||||
/* Loop for all the data slices. */
|
||||
for (iSlice = 0; iSlice < LV_N; iSlice++) {
|
||||
iCell = get_index_Cell (iSlice);
|
||||
sModel = get_model_Cell (iSlice, iCell);
|
||||
sprintf (sInstance, "cell_%ld", iSlice);
|
||||
|
||||
switch (LV_Function) {
|
||||
case DPGEN_ROM4:
|
||||
sI0 = "i0x";
|
||||
sI1 = "i1x";
|
||||
|
||||
/* Select the inputs. */
|
||||
switch (iCell) {
|
||||
case 0:
|
||||
case 15:
|
||||
break;
|
||||
case 8:
|
||||
case 9:
|
||||
case 10:
|
||||
case 14:
|
||||
sI0 = "i0x"; sI1 = "i1x";
|
||||
break;
|
||||
case 2:
|
||||
case 11:
|
||||
sI0 = "i0x"; sI1 = "ni1x";
|
||||
break;
|
||||
case 4:
|
||||
case 13:
|
||||
sI0 = "ni0x"; sI1 = "i1x";
|
||||
break;
|
||||
case 1:
|
||||
case 5:
|
||||
case 6:
|
||||
case 7:
|
||||
sI0 = "ni0x"; sI1 = "ni1x";
|
||||
break;
|
||||
case 3:
|
||||
sI0 = "ni1x";
|
||||
break;
|
||||
case 12:
|
||||
sI0 = "i1x";
|
||||
break;
|
||||
}
|
||||
|
||||
/* Select the gate. */
|
||||
if (!strncmp (sModel, "zero", 4)) {
|
||||
GENLIB_LOINSE (
|
||||
sModel,
|
||||
sInstance,
|
||||
s64printf ("nq => q[%ld]", DPGEN_PORT_BIT (iSlice)),
|
||||
"vdd => vdd",
|
||||
"vss => vss", 0L);
|
||||
} else if (!strncmp (sModel, "one", 3)) {
|
||||
GENLIB_LOINSE (
|
||||
sModel,
|
||||
sInstance,
|
||||
s64printf ("q => q[%ld]", DPGEN_PORT_BIT (iSlice)),
|
||||
"vdd => vdd",
|
||||
"vss => vss", 0L);
|
||||
} else if (!strncmp (sModel, "buf", 3)) {
|
||||
GENLIB_LOINSE (
|
||||
sModel,
|
||||
sInstance,
|
||||
s64printf ("i => %s" , sI0),
|
||||
s64printf ("q => q[%ld]", DPGEN_PORT_BIT (iSlice)),
|
||||
"vdd => vdd",
|
||||
"vss => vss", 0L);
|
||||
} else if (!strncmp (sModel, "inv", 3)) {
|
||||
GENLIB_LOINSE (
|
||||
sModel,
|
||||
sInstance,
|
||||
s64printf ( "i => %s" , sI0),
|
||||
s64printf ("nq => q[%ld]", DPGEN_PORT_BIT (iSlice)),
|
||||
"vdd => vdd",
|
||||
"vss => vss", 0L);
|
||||
} else if ( !strncmp (sModel, "a2", 2)
|
||||
|| !strncmp (sModel, "o2", 2)) {
|
||||
GENLIB_LOINSE (
|
||||
sModel,
|
||||
sInstance,
|
||||
s64printf ("i0 => %s" , sI0),
|
||||
s64printf ("i1 => %s" , sI1),
|
||||
s64printf ( "q => q[%ld]", DPGEN_PORT_BIT (iSlice)),
|
||||
"vdd => vdd",
|
||||
"vss => vss", 0L);
|
||||
} else if ( !strncmp (sModel, "dp_rom4_xr2" , 11)
|
||||
|| !strncmp (sModel, "dp_rom4_nxr2", 12)) {
|
||||
GENLIB_LOINSE (
|
||||
sModel,
|
||||
sInstance,
|
||||
"i0x => i0x",
|
||||
"i1x => i1x",
|
||||
"ni0x => ni0x",
|
||||
"ni1x => ni1x",
|
||||
s64printf ( "q => q[%ld]", DPGEN_PORT_BIT (iSlice)),
|
||||
"vdd => vdd",
|
||||
"vss => vss", 0L);
|
||||
}
|
||||
break;
|
||||
|
||||
case DPGEN_ROM2:
|
||||
switch (iCell) {
|
||||
case 0:
|
||||
GENLIB_LOINSE (
|
||||
sModel,
|
||||
sInstance,
|
||||
s64printf ("nq => q[%ld]", DPGEN_PORT_BIT (iSlice)),
|
||||
"vdd => vdd",
|
||||
"vss => vss", 0L);
|
||||
break;
|
||||
case 3:
|
||||
GENLIB_LOINSE (
|
||||
sModel,
|
||||
sInstance,
|
||||
s64printf ("q => q[%ld]", DPGEN_PORT_BIT (iSlice)),
|
||||
"vdd => vdd",
|
||||
"vss => vss", 0L);
|
||||
break;
|
||||
case 1:
|
||||
GENLIB_LOINSE (
|
||||
sModel,
|
||||
sInstance,
|
||||
"i => ni0x",
|
||||
s64printf ("q => q[%ld]", DPGEN_PORT_BIT (iSlice)),
|
||||
"vdd => vdd",
|
||||
"vss => vss", 0L);
|
||||
break;
|
||||
case 2:
|
||||
GENLIB_LOINSE (
|
||||
sModel,
|
||||
sInstance,
|
||||
"i => ni0x",
|
||||
s64printf ("nq => q[%ld]", DPGEN_PORT_BIT (iSlice)),
|
||||
"vdd => vdd",
|
||||
"vss => vss", 0L);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
}
|
||||
} /* End of "iSlice" (data slices) loop. */
|
||||
|
||||
|
||||
/* Add the buffer. */
|
||||
if (iSlice % 2) iSlice++;
|
||||
|
||||
sModel = get_model_Buffer ();
|
||||
sprintf (sInstance, "cell_%ld", iSlice);
|
||||
|
||||
switch (LV_Function) {
|
||||
case DPGEN_ROM2:
|
||||
GENLIB_LOINSE (
|
||||
sModel,
|
||||
sInstance,
|
||||
"i => sel0",
|
||||
"nix => ni0x",
|
||||
"vdd => vdd",
|
||||
"vss => vss", 0L);
|
||||
break;
|
||||
case DPGEN_ROM4:
|
||||
GENLIB_LOINSE (
|
||||
sModel,
|
||||
sInstance,
|
||||
"i0 => sel0",
|
||||
"i1 => sel1",
|
||||
"i0x => i0x",
|
||||
"i1x => i1x",
|
||||
"ni0x => ni0x",
|
||||
"ni1x => ni1x",
|
||||
"vdd => vdd",
|
||||
"vss => vss", 0L);
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
GENLIB_SAVE_LOFIG ();
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "create_Layout ()".
|
||||
*/
|
||||
|
||||
static void create_Layout ()
|
||||
{
|
||||
char sInstance[SIZE_SNAME];
|
||||
char *sModel;
|
||||
long iSlice;
|
||||
|
||||
|
||||
GENLIB_DEF_PHFIG (LV_modelName);
|
||||
|
||||
|
||||
/* Loop for all the data slices. */
|
||||
for (iSlice = 0; iSlice < LV_N; iSlice++) {
|
||||
|
||||
sModel = get_model_Cell (iSlice, get_index_Cell (iSlice));
|
||||
sprintf (sInstance, "cell_%ld", iSlice);
|
||||
|
||||
GENLIB_PLACE (sModel,
|
||||
sInstance,
|
||||
SLICE_TO_SYM (iSlice, LV_N),
|
||||
0,
|
||||
SLICE_TO_Y (iSlice, LV_N));
|
||||
} /* End of iSlice loop. */
|
||||
|
||||
|
||||
/* Add the buffer cell. */
|
||||
if (iSlice % 2) iSlice++;
|
||||
|
||||
sModel = get_model_Buffer ();
|
||||
sprintf (sInstance, "cell_%ld", iSlice);
|
||||
|
||||
GENLIB_PLACE (sModel,
|
||||
sInstance,
|
||||
SLICE_TO_SYM (iSlice, LV_N),
|
||||
0,
|
||||
SLICE_TO_Y (iSlice, LV_N));
|
||||
|
||||
GENLIB_DEF_AB (0, 0, 0, 0);
|
||||
GENLIB_SAVE_PHFIG ();
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "create_VHDL ()".
|
||||
*/
|
||||
|
||||
static void create_VHDL ()
|
||||
{
|
||||
char sConst[SIZE_SNAME];
|
||||
char sBusWide[SIZE_SNAME];
|
||||
|
||||
|
||||
LV_FILE = mbkfopen (LV_modelName, "vbe", WRITE_TEXT);
|
||||
|
||||
if (!LV_FILE) {
|
||||
eprinth ("*** dpgen ***");
|
||||
eprintf ("\n Unable to create file \"%s.vbe\".\n", LV_modelName);
|
||||
EXIT (1);
|
||||
}
|
||||
|
||||
|
||||
VHDL_BUS_WIDE (sBusWide, LV_N - 1, 0);
|
||||
|
||||
|
||||
/* Entity description. */
|
||||
fprintf (LV_FILE, "\nENTITY %s IS\n PORT (\n", LV_modelName);
|
||||
|
||||
/* Controls Terminals. */
|
||||
switch (LV_Function) {
|
||||
case DPGEN_ROM4:
|
||||
fprintf (LV_FILE, "%14s : in BIT;\n", "sel1");
|
||||
case DPGEN_ROM2:
|
||||
fprintf (LV_FILE, "%14s : in BIT;\n", "sel0");
|
||||
break;
|
||||
}
|
||||
|
||||
/* Output data bus. */
|
||||
fprintf (LV_FILE, "%14s : out BIT_VECTOR %s;\n", "q", sBusWide);
|
||||
|
||||
/* Power supplies terminals. */
|
||||
fprintf (LV_FILE, "%14s : in BIT;\n", "vdd");
|
||||
fprintf (LV_FILE, "%14s : in BIT\n" , "vss");
|
||||
|
||||
/* End of entity description. */
|
||||
fprintf (LV_FILE, " );\nEND %s;\n\n\n", LV_modelName);
|
||||
|
||||
|
||||
/* Architecture description. */
|
||||
fprintf (LV_FILE, "ARCHITECTURE VBE OF %s IS\n\n", LV_modelName);
|
||||
|
||||
|
||||
fprintf (LV_FILE, "BEGIN\n\n");
|
||||
|
||||
switch (LV_Function) {
|
||||
case DPGEN_ROM4:
|
||||
fprintf (LV_FILE," WITH sel1 & sel0 SELECT\n" );
|
||||
fprintf (LV_FILE,
|
||||
" q <= %s WHEN B\"00\",\n" , xltovhdl (LV_xl0, sConst));
|
||||
fprintf (LV_FILE,
|
||||
" %s WHEN B\"01\",\n" , xltovhdl (LV_xl1, sConst));
|
||||
fprintf (LV_FILE,
|
||||
" %s WHEN B\"10\",\n" , xltovhdl (LV_xl2, sConst));
|
||||
fprintf (LV_FILE,
|
||||
" %s WHEN B\"11\";\n\n", xltovhdl (LV_xl3, sConst));
|
||||
break;
|
||||
case DPGEN_ROM2:
|
||||
fprintf (LV_FILE," WITH sel0 SELECT\n" );
|
||||
fprintf (LV_FILE,
|
||||
" q <= %s WHEN \'0\',\n" , xltovhdl (LV_xl0, sConst));
|
||||
fprintf (LV_FILE,
|
||||
" %s WHEN \'1\';\n\n", xltovhdl (LV_xl1, sConst));
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
fprintf(LV_FILE, " ASSERT (vdd = '1')\n");
|
||||
fprintf(LV_FILE,
|
||||
" REPORT \"Power supply is missing on vdd of model %s.\"\n",
|
||||
LV_modelName);
|
||||
fprintf(LV_FILE, " SEVERITY WARNING;\n\n");
|
||||
|
||||
|
||||
fprintf(LV_FILE, " ASSERT (vss = '0')\n");
|
||||
fprintf(LV_FILE,
|
||||
" REPORT \"Power supply is missing on vss of model %s.\"\n",
|
||||
LV_modelName);
|
||||
fprintf(LV_FILE, " SEVERITY WARNING;\n\n");
|
||||
|
||||
|
||||
/* End of architecture description. */
|
||||
fprintf (LV_FILE, "END VBE;\n");
|
||||
|
||||
|
||||
fclose (LV_FILE);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "dpgen_uROM ()".
|
||||
*/
|
||||
|
||||
extern void dpgen_uROM (aFunction, aAL)
|
||||
long aFunction;
|
||||
va_list aAL;
|
||||
{
|
||||
/* Parses the mandatory arguments. */
|
||||
LV_modelName = va_arg (aAL, char*);
|
||||
LV_flags = va_arg (aAL, long );
|
||||
LV_N = va_arg (aAL, long );
|
||||
|
||||
__DBG (fprintf (stderr, "LV_flags := %ld.\n", LV_flags);)
|
||||
|
||||
|
||||
/* Initializes for the requested generator. */
|
||||
init_Generator (aFunction);
|
||||
|
||||
|
||||
/* Parses the constants. */
|
||||
LV_xl0 = newxl ();
|
||||
atoxl (LV_xl0, va_arg (aAL, char*));
|
||||
LV_xl0->size = LV_N;
|
||||
|
||||
LV_xl1 = newxl ();
|
||||
atoxl (LV_xl1, va_arg (aAL, char*));
|
||||
LV_xl1->size = LV_N;
|
||||
|
||||
if (LV_Function == DPGEN_ROM4) {
|
||||
LV_xl2 = newxl ();
|
||||
atoxl (LV_xl2, va_arg (aAL, char*));
|
||||
LV_xl2->size = LV_N;
|
||||
|
||||
LV_xl3 = newxl ();
|
||||
atoxl (LV_xl3, va_arg (aAL, char*));
|
||||
LV_xl3->size = LV_N;
|
||||
}
|
||||
|
||||
|
||||
/* Always create the netlist. */
|
||||
create_Netlist ();
|
||||
|
||||
if (LV_flags & F_PLACE) create_Layout ();
|
||||
if (LV_flags & F_BEHAV) create_VHDL ();
|
||||
}
|
||||
|
|
@ -2705,16 +2705,16 @@ int external; /* more that one external connector on the same net? */
|
|||
/*******************************************************************************
|
||||
* function LOINS *
|
||||
*******************************************************************************/
|
||||
void genLOINS(char *insname, ...)
|
||||
void genLOINS(char *figname, ...)
|
||||
{
|
||||
losig_list *ptsig;
|
||||
chain_list *ptchain = NULL, *ptchain1, *ptchain2 = NULL , *ptchain3;
|
||||
va_list arg;
|
||||
char *figname, *signame;
|
||||
char *insname, *signame;
|
||||
lofig_list *ptfig;
|
||||
|
||||
va_start(arg, insname);
|
||||
figname = namealloc(va_arg(arg, char *));
|
||||
va_start(arg, figname);
|
||||
insname = namealloc(va_arg(arg, char *));
|
||||
if (WORK_LOFIG == NULL) {
|
||||
(void)fflush(stdout);
|
||||
(void)fputs("*** genlib error ***\n", stderr);
|
||||
|
|
@ -2933,10 +2933,10 @@ void genLOINSA(char *model, char *instance, char *signals[])
|
|||
/*******************************************************************************
|
||||
* function LOINSE *
|
||||
*******************************************************************************/
|
||||
void genLOINSE(char *insname, ...)
|
||||
void genLOINSE(char *figname, ...)
|
||||
{
|
||||
va_list arg;
|
||||
char *figname, *signame;
|
||||
char *insname, *signame;
|
||||
lofig_list *ptfig;
|
||||
char con[100], sig[100];
|
||||
int icon, jcon, isig, jsig;
|
||||
|
|
@ -2955,9 +2955,9 @@ chain_list *ptchain = NULL;
|
|||
EXIT(1);
|
||||
}
|
||||
|
||||
va_start(arg, insname);
|
||||
figname = namealloc(va_arg(arg, char *));
|
||||
va_start(arg, figname);
|
||||
ptfig = getlofig(figname, 'P');
|
||||
insname = namealloc(va_arg(arg, char *));
|
||||
if (hassep(insname)) {
|
||||
(void)fflush(stdout);
|
||||
(void)fputs("*** genlib error ***\nIllegal LOINSE : the ", stderr);
|
||||
|
|
|
|||
|
|
@ -8,4 +8,5 @@
|
|||
#include <mpu.h>
|
||||
#include "mgn.h"
|
||||
#include "mbkgen.h"
|
||||
#include "dgn.h"
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1,148 +1,354 @@
|
|||
#!/bin/sh
|
||||
#!/bin/sh
|
||||
#
|
||||
# This file is part of the Alliance CAD System
|
||||
# Copyright (C) Laboratoire LIP6 - Département ASIM
|
||||
# Universite Pierre et Marie Curie
|
||||
#
|
||||
# Home page : http://www-asim.lip6.fr/alliance/
|
||||
# E-mail support : mailto:alliance-support@asim.lip6.fr
|
||||
#
|
||||
# This progam is free software; you can redistribute it and/or modify it
|
||||
# under the terms of the GNU General Public License as published by the
|
||||
# Free Software Foundation; either version 2 of the License, or (at your
|
||||
# option) any later version.
|
||||
#
|
||||
# Alliance VLSI CAD System is distributed in the hope that it will be
|
||||
# useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
|
||||
# Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License along
|
||||
# with the GNU C Library; see the file COPYING. If not, write to the Free
|
||||
# Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
# $Id: genlib.sh,v 1.3 2002/04/29 13:40:55 jpc Exp $
|
||||
#
|
||||
# /------------------------------------------------------------------\
|
||||
# | |
|
||||
# | A l l i a n c e C A D S y s t e m |
|
||||
# | D p G e n |
|
||||
# | |
|
||||
# | Author : Jean-Paul CHAPUT |
|
||||
# | E-mail : alliance-support@asim.lip6.fr |
|
||||
# | ================================================================ |
|
||||
# | sh script : "./dpgen/dpgen.sh" |
|
||||
# | **************************************************************** |
|
||||
# | U p d a t e s |
|
||||
# | |
|
||||
# \------------------------------------------------------------------/
|
||||
#
|
||||
# $Id: genlib.sh,v 1.2 2002/04/16 07:18:31 fred Exp $
|
||||
|
||||
help() {
|
||||
echo "Syntax: `basename $0` [-vk] source-file (without extension)"
|
||||
echo " -v : verbose mode"
|
||||
echo " -k : keeps the executable (whith debugging"
|
||||
echo " informations) along with the"
|
||||
echo " compilation Makefile after completion"
|
||||
exit 1
|
||||
}
|
||||
|
||||
|
||||
if [ $# -lt 1 -o $# -gt 6 ] ; then
|
||||
echo "Syntax: `basename $0` [-vk] source-file (without extension)"
|
||||
exit 1
|
||||
# /------------------------------------------------------------------\
|
||||
# | |
|
||||
# | Functions Definitions |
|
||||
# | |
|
||||
# \------------------------------------------------------------------/
|
||||
|
||||
|
||||
# --------------------------------------------------------------------
|
||||
# Function : `print_usage()'.
|
||||
|
||||
print_usage()
|
||||
{
|
||||
echo ""
|
||||
echo " usage: genlib [-cdlknv] [--keep-exec] [--no-exec] [--no-rm-core] \\"
|
||||
echo " [--keep-log] [--verbose] \\"
|
||||
echo " <program> [-e [args]]"
|
||||
echo ""
|
||||
echo " Options:"
|
||||
echo " [-c|--no-rm-core] : Don't remove core file."
|
||||
echo " [-l|--keep-log] : Keep log file (.grr) after execution."
|
||||
echo " [-k|--keep-exec] : Keep binary after execution."
|
||||
echo " [-m|--keep-makefile] : Keep makefile after execution."
|
||||
echo " [-n|--no-exec] : Do not execute the binary."
|
||||
echo " [-v|--verbose] : Issue more informations."
|
||||
echo " [-e [args]] : [args] are passed to the binary."
|
||||
echo ""
|
||||
}
|
||||
|
||||
|
||||
# --------------------------------------------------------------------
|
||||
# Function : `vecho()'.
|
||||
|
||||
vecho()
|
||||
{
|
||||
ECHOFLAGS=""
|
||||
if [ $1 -gt $VERBOSE ]; then return 0; fi
|
||||
if [ "$2" = "-n" ]; then
|
||||
ECHOFLAGS="-n"; shift;
|
||||
fi
|
||||
echo $ECHOFLAGS "$2" 2>&1 | tee -a $CSOURCE.grr
|
||||
}
|
||||
|
||||
talk=0
|
||||
devel=0
|
||||
keep=0
|
||||
debug=
|
||||
lib=""
|
||||
libpath=""
|
||||
name=""
|
||||
while [ $# -gt 0 ]
|
||||
do
|
||||
case $1 in
|
||||
-v) talk=1;;
|
||||
-d) devel=1;;
|
||||
-k) keep=1;debug=-g;;
|
||||
-vk) keep=1;debug=-g; talk=1;;
|
||||
-kv) keep=1;debug=-g; talk=1;;
|
||||
-l*) lib=$1;;
|
||||
-L*) libpath=$1;;
|
||||
*) if [ -z "$name" ]; then
|
||||
name=$1;
|
||||
else
|
||||
help
|
||||
fi
|
||||
esac
|
||||
shift
|
||||
done
|
||||
trap "rm -f ./*.$$; exit 1" 1 2 3 6
|
||||
|
||||
ALLIANCE_LIB=${ALLIANCE_TOP}/lib
|
||||
ALLIANCE_INCLUDE=${ALLIANCE_TOP}/include
|
||||
ALLIANCE_BIN=${ALLIANCE_TOP}/bin
|
||||
# /------------------------------------------------------------------\
|
||||
# | |
|
||||
# | Main Part of the Shell Script |
|
||||
# | |
|
||||
# \------------------------------------------------------------------/
|
||||
|
||||
export ALLIANCE_LIB ALLIANCE_INCLUDE ALLIANCE_BIN
|
||||
if [ -z "$ALLIANCE_TOP" ]; then
|
||||
alcbanner "GenLib" "4.0" "Procedural Generation Language" "1991"
|
||||
else
|
||||
${ALLIANCE_TOP}/bin/alcbanner "GenLib" "4.0" "Procedural Generation Language" "1991"
|
||||
fi
|
||||
|
||||
${ALLIANCE_BIN}/alcbanner "GenLib" "3.3" "Procedural Generation Language" "1991"
|
||||
|
||||
if [ -z "$name" ] ; then
|
||||
help
|
||||
fi
|
||||
if [ ! -f $name.c ] ; then
|
||||
echo "There seems no to be a file called $name.c"
|
||||
help
|
||||
fi
|
||||
|
||||
rm -f $name > /dev/null 2>&1
|
||||
|
||||
if [ $talk -eq 1 ]; then
|
||||
echo "Generating the Makefile";
|
||||
fi
|
||||
# --------------------------------------------------------------------
|
||||
# Process the command line.
|
||||
|
||||
# If no arguments, print usage.
|
||||
if [ $# -eq 0 ]; then print_usage; exit 0; fi
|
||||
|
||||
|
||||
KEEP_BIN="n"
|
||||
KEEP_LOG="n"
|
||||
KEEP_CORE="n"
|
||||
KEEP_MAKEFILE="n"
|
||||
VERBOSE=0
|
||||
EXECUTE="y"
|
||||
ARGUMENTS=""
|
||||
PROGRAM="not set"
|
||||
DEVEL="n"
|
||||
|
||||
|
||||
# Parse the arguments.
|
||||
while [ $# -gt 0 ]; do
|
||||
|
||||
case $1 in
|
||||
|
||||
--no-rm-core) KEEP_CORE="y";;
|
||||
--keep-makefile) KEEP_MAKEFILE="y";;
|
||||
--keep-exec) KEEP_BIN="y";;
|
||||
--keep-log) KEEP_LOG="y";;
|
||||
--no-exec) EXECUTE="n";;
|
||||
--verbose) VERBOSE=1;;
|
||||
--devel) DEVEL="y";;
|
||||
|
||||
-*) NB=2; CH=`echo $1 | cut -c$NB`
|
||||
while [ "$CH" != "" ]; do
|
||||
|
||||
case $CH in
|
||||
|
||||
m) KEEP_MAKEFILE="y";;
|
||||
c) KEEP_CORE="y";;
|
||||
k) KEEP_BIN="y";;
|
||||
l) KEEP_LOG="y";;
|
||||
n) EXECUTE="n";;
|
||||
v) VERBOSE=1;;
|
||||
d) DEVEL="y";;
|
||||
e) echo "genlib:warning: misplaced -e option.";
|
||||
print_usage; exit 1;;
|
||||
*) echo "genlib:warning: Invalid option \`$CH' (ignored)."
|
||||
print_usage;;
|
||||
|
||||
esac
|
||||
|
||||
NB=`expr $NB + 1`
|
||||
CH=`echo $1 | cut -c$NB`
|
||||
|
||||
done;;
|
||||
|
||||
*) PROGRAM=$1; shift; break;;
|
||||
|
||||
esac
|
||||
|
||||
shift
|
||||
|
||||
done
|
||||
|
||||
|
||||
# Parse optionals program arguments.
|
||||
if [ $# -gt 0 ]; then
|
||||
if [ "$1" != "-e" ]; then
|
||||
|
||||
echo "genlib:warning: ignored \`$1' parameter after program name."
|
||||
print_usage
|
||||
|
||||
else
|
||||
|
||||
shift; ARGUMENTS="$*"
|
||||
|
||||
fi
|
||||
fi
|
||||
|
||||
|
||||
# Check arguments coherency.
|
||||
if [ "$PROGRAM" = "not set" ]; then
|
||||
|
||||
echo "genlib:error: Missing <program> argument."
|
||||
print_usage; exit 1;
|
||||
|
||||
fi
|
||||
|
||||
CSOURCE=`basename $PROGRAM .c`
|
||||
|
||||
|
||||
# Removing previously generated files.
|
||||
rm -f $CSOURCE.grr $CSOURCE.o > /dev/null 2>&1
|
||||
|
||||
|
||||
# --------------------------------------------------------------------
|
||||
# Print the current MBK environment.
|
||||
|
||||
if [ ! -z "$ALLIANCE_TOP" ]; then ALLIANCE_TOP=$ALLIANCE_TOP; fi
|
||||
if [ ! -z "$ALLIANCE_OS" ]; then ALLIANCE_OS=$ALLIANCE_OS; fi
|
||||
|
||||
vecho 1 " o Current Alliance environment:"
|
||||
vecho 1 " - ALLIANCE_TOP : ${ALLIANCE_TOP-not set}"
|
||||
vecho 1 " - ALLIANCE_OS : ${ALLIANCE_OS-not set}"
|
||||
vecho 1 " o Current MBK environment:"
|
||||
vecho 1 " - MBK_IN_LO : ${MBK_IN_LO-not set}"
|
||||
vecho 1 " - MBK_OUT_LO : ${MBK_OUT_LO-not set}"
|
||||
vecho 1 " - MBK_IN_PH : ${MBK_IN_PH-not set}"
|
||||
vecho 1 " - MBK_OUT_PH : ${MBK_OUT_PH-not set}"
|
||||
vecho 1 " - MBK_WORK_LIB : ${MBK_WORK_LIB-not set}"
|
||||
vecho 1 -n " - MBK_CATA_LIB : "
|
||||
|
||||
if [ -z "$MBK_CATA_LIB" ]; then
|
||||
|
||||
vecho 1 "not set"
|
||||
|
||||
else
|
||||
|
||||
STRING=`echo ${MBK_CATA_LIB} | \
|
||||
awk 'BEGIN { FS=":"; } \
|
||||
{ for( i=1; i<=NF; i++) { \
|
||||
printf("%s\n", $i); \
|
||||
if (i < NF) \
|
||||
printf(" "); \
|
||||
} \
|
||||
}' -`
|
||||
|
||||
vecho 1 "$STRING"
|
||||
|
||||
fi
|
||||
|
||||
vecho 1 " - MBK_CATAL_NAME : ${MBK_CATAL_NAME-not set}"
|
||||
vecho 1 " - MBK_VDD : ${MBK_VDD-not set}"
|
||||
vecho 1 " - MBK_VSS : ${MBK_VSS-not set}"
|
||||
vecho 1 " - RDS_TECHNO_NAME : ${RDS_TECHNO_NAME-not set}"
|
||||
vecho 1 ""
|
||||
|
||||
# see genpat for another way of creating Makefile ;-) Czo...
|
||||
|
||||
# --------------------------------------------------------------------
|
||||
# Development hacks.
|
||||
|
||||
if [ $devel -eq 1 ]; then
|
||||
ALLIANCE_INSTALL_DIR="__ALLIANCE_INSTALL_DIR__"
|
||||
ALLIANCE_DEVEL_INCLUDE="-I${ALLIANCE_INSTALL_DIR}/include"
|
||||
ALLIANCE_DEVEL_LIB="-L${ALLIANCE_INSTALL_DIR}/lib"
|
||||
export ALLIANCE_INSTALL_DIR ALLIANCE_DEVEL_INCLUDE ALLIANCE_DEVEL_LIB
|
||||
fi
|
||||
if [ "$DEVEL" = "y" ]; then
|
||||
ALLIANCE_INSTALL_DIR="__ALLIANCE_INSTALL_DIR__"
|
||||
ALLIANCE_DEVEL_INCLUDE="-I${ALLIANCE_INSTALL_DIR}/include"
|
||||
ALLIANCE_DEVEL_LIB="-L${ALLIANCE_INSTALL_DIR}/lib"
|
||||
export ALLIANCE_INSTALL_DIR ALLIANCE_DEVEL_INCLUDE ALLIANCE_DEVEL_LIB
|
||||
fi
|
||||
|
||||
makefile="Makefile.$$"
|
||||
echo 'ALLIANCE_LIBRARY = '${ALLIANCE_DEVEL_LIB}' -L$(ALLIANCE_LIB) \
|
||||
-lMgn -lMlu -lMpu -lMcp -lMap -lMmg -lMcl -lMgl \
|
||||
-lMal -lMvg -lMel -lMsl -lMhl -lMlo -lMph -lMut -lRcn' >> $makefile
|
||||
|
||||
echo "ALLIANCE_INC = ${ALLIANCE_DEVEL_INCLUDE} -I\$(ALLIANCE_INCLUDE)" >> $makefile
|
||||
echo "$name : $name.c" >> $makefile
|
||||
echo ' $(CC) ' \
|
||||
"$debug -o $name $name.c $libpath $lib" \
|
||||
'$(ALLIANCE_INC) $(ALLIANCE_LIBRARY)' >> $makefile
|
||||
# --------------------------------------------------------------------
|
||||
# Build and execute the Makefile.
|
||||
|
||||
if [ $talk -eq 1 ]; then
|
||||
echo "Compiling, ..."
|
||||
fi
|
||||
vecho 1 " o Program generation."
|
||||
vecho 1 " - Creating Makefile."
|
||||
|
||||
make -f $makefile > $name.grr 2>&1
|
||||
MAKEFILE="Makefile-$$"
|
||||
|
||||
if [ ! $? -eq 0 ]; then
|
||||
echo "Compilation failed!"
|
||||
cat $name.grr
|
||||
rm $makefile
|
||||
exit 1
|
||||
fi
|
||||
|
||||
if [ $talk -eq 1 ] ; then
|
||||
echo "Current execution environment"
|
||||
echo "MBK_CATA_LIB : ${MBK_CATA_LIB-no cell library specified}"
|
||||
echo "MBK_WORK_LIB : ${MBK_WORK_LIB-:}"
|
||||
echo "MBK_IN_LO : ${MBK_IN_LO-vst}"
|
||||
echo "MBK_OUT_LO : ${MBK_OUT_LO-vst}"
|
||||
echo "MBK_IN_PH : ${MBK_IN_PH-ap}"
|
||||
echo "MBK_OUT_PH : ${MBK_OUT_PH-ap}"
|
||||
echo "MBK_CATAL_NAME : ${MBK_CATAL_NAME-CATAL}"
|
||||
fi
|
||||
if [ $talk -eq 1 ]; then
|
||||
echo "Executing ..."
|
||||
fi
|
||||
./$name
|
||||
exit_code=$?
|
||||
if [ $talk -eq 1 ]; then
|
||||
echo "Removing tmp files ..."
|
||||
fi
|
||||
if [ $keep -eq 0 ] ; then
|
||||
rm $name;
|
||||
fi
|
||||
rm $name.o $name.grr $makefile > /dev/null 2>&1
|
||||
# --------------------------------------------------------------------
|
||||
# Start of the Makefile text.
|
||||
|
||||
cat << EOF > $MAKEFILE
|
||||
ALLIANCE_INCLUDE = $ALLIANCE_TOP/include
|
||||
ALLIANCE_LIB = $ALLIANCE_TOP/lib
|
||||
|
||||
LOCAL_ALC_IDIR = $ALLIANCE_DEVEL_INCLUDE -I\$(ALLIANCE_INCLUDE)
|
||||
LOCAL_ALC_DEFS = -DALLIANCE_VERSION=\$(ALLIANCE_VERSION)
|
||||
LOCAL_ALC_INCS = \$(LOCAL_ALC_IDIR) \$(LOCAL_ALC_DEFS)
|
||||
|
||||
LOCAL_ALC_LDIR = $ALLIANCE_DEVEL_LIB -L\$(ALLIANCE_LIB)
|
||||
LOCAL_ALC_LVBE = -lBvl \\
|
||||
-lBeh \\
|
||||
-lBhl \\
|
||||
-lLog
|
||||
LOCAL_ALC_LMGN = -lMgn
|
||||
LOCAL_ALC_LMUT = -lMut
|
||||
LOCAL_ALC_LMLO = -lMlu \\
|
||||
-lMlo \\
|
||||
-lMal \\
|
||||
-lMcl \\
|
||||
-lMgl \\
|
||||
-lMel \\
|
||||
-lMhl \\
|
||||
-lMsl \\
|
||||
-lMvg \\
|
||||
-lRcn
|
||||
LOCAL_ALC_LMPH = -lMpu \\
|
||||
-lMph \\
|
||||
-lMap \\
|
||||
-lMcp \\
|
||||
-lMmg
|
||||
LOCAL_ALC_LIBS = \$(LOCAL_ALC_LDIR) \\
|
||||
\$(LOCAL_ALC_LVBE) \\
|
||||
\$(LOCAL_ALC_LMGN) \\
|
||||
\$(LOCAL_ALC_LMLO) \\
|
||||
\$(LOCAL_ALC_LMPH) \\
|
||||
\$(LOCAL_ALC_LMUT)
|
||||
|
||||
LOCAL_STD_LIBS = -lm
|
||||
|
||||
# C Flags for normal compilation.
|
||||
LOCAL_CFLAGS = \$(CFLAGS) -c -g -D\$(ALLIANCE_OS)
|
||||
LOCAL_OFLAGS = \$(OFLAGS) -o
|
||||
|
||||
|
||||
all: $CSOURCE
|
||||
|
||||
$CSOURCE: $CSOURCE.o
|
||||
\$(CC) \$(LOCAL_OFLAGS) \$@ \$? \$(LOCAL_ALC_LIBS) \$(LOCAL_STD_LIBS)
|
||||
rm -f \$?
|
||||
|
||||
$CSOURCE.o: $CSOURCE.c
|
||||
\$(CC) \$(LOCAL_CFLAGS) \$(LOCAL_ALC_INCS) \$?
|
||||
|
||||
|
||||
clean:
|
||||
rm -f $CSOURCE $CSOURCE.o
|
||||
|
||||
|
||||
EOF
|
||||
|
||||
|
||||
# --------------------------------------------------------------------
|
||||
# End of the Makefile text.
|
||||
|
||||
|
||||
vecho 1 " - Running Makefile."
|
||||
|
||||
make -f $MAKEFILE ALLIANCE_TOP=$ALLIANCE_TOP \
|
||||
CSOURCE=$CSOURCE clean all >> $CSOURCE.grr 2>&1
|
||||
|
||||
exit_code=$?
|
||||
|
||||
if [ $exit_code -ne 0 ]; then
|
||||
|
||||
if [ $KEEP_MAKEFILE != "y" ]; then rm -f $MAKEFILE; fi
|
||||
|
||||
echo "genlib:error: Compilation failed."
|
||||
exit $exit_code
|
||||
|
||||
else
|
||||
|
||||
if [ "$EXECUTE" = "y" ]; then
|
||||
|
||||
vecho 1 " o Execute program..."
|
||||
./$CSOURCE $ARGUMENTS; exit_code=$?
|
||||
|
||||
vecho 1 " - Exit code := $exit_code."
|
||||
if [ $exit_code -ne 0 ]; then
|
||||
if [ $KEEP_MAKEFILE != "y" ]; then rm -f $MAKEFILE; fi
|
||||
echo "genlib:error: Execution failed."
|
||||
fi
|
||||
|
||||
if [ "$KEEP_CORE" != "y" ]; then rm -f core >> $CSOURCE.grr 2>&1; fi
|
||||
|
||||
else
|
||||
vecho 1 " o Execution step skipped."
|
||||
exit_code=0
|
||||
fi
|
||||
|
||||
fi
|
||||
|
||||
|
||||
vecho 1 ""
|
||||
vecho 1 " o Remove temporary file."
|
||||
|
||||
rm -f $MAKEFILE
|
||||
|
||||
if [ "$KEEP_BIN" != "y" ]; then rm -f $CSOURCE >> $CSOURCE.grr 2>&1; fi
|
||||
|
||||
if [ \( $exit_code -eq 0 \) -a \( "$KEEP_LOG" != "y" \) ]; then
|
||||
rm -f $CSOURCE.grr > /dev/null 2>&1
|
||||
fi
|
||||
|
||||
echo ""
|
||||
|
||||
|
||||
exit $exit_code
|
||||
|
|
|
|||
|
|
@ -0,0 +1,369 @@
|
|||
/*
|
||||
* $Id: util_Const.c,v 1.1 2002/04/29 13:40:55 jpc Exp $
|
||||
*
|
||||
* /----------------------------------------------------------------\
|
||||
* | |
|
||||
* | A l l i a n c e C A D S y s t e m |
|
||||
* | D p G e n |
|
||||
* | |
|
||||
* | Author : Jean-Paul CHAPUT |
|
||||
* | E-mail : alliance-support@asim.lip6.fr |
|
||||
* | ============================================================== |
|
||||
* | C Module : "./util_Const.c" |
|
||||
* | ************************************************************** |
|
||||
* | U p d a t e s |
|
||||
* | |
|
||||
* \----------------------------------------------------------------/
|
||||
*/
|
||||
|
||||
|
||||
# include "util_Defs.h"
|
||||
# include "debugoff.h"
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Local variables.
|
||||
*/
|
||||
|
||||
static char *LV_const;
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Internal functions declarations.
|
||||
*/
|
||||
|
||||
static long btol __FP((char aDigit));
|
||||
static long otol __FP((char aDigit));
|
||||
static long xtol __FP((char aDigit));
|
||||
static char ltox __FP((long aDigit));
|
||||
|
||||
|
||||
/*
|
||||
* /----------------------------------------------------------------\
|
||||
* | Functions Definitions |
|
||||
* \----------------------------------------------------------------/
|
||||
*/
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "btol ()".
|
||||
*/
|
||||
|
||||
static long btol(aDigit)
|
||||
char aDigit;
|
||||
{
|
||||
long digit;
|
||||
|
||||
digit = 0;
|
||||
|
||||
switch (aDigit) {
|
||||
case '0': digit = 0; break;
|
||||
case '1': digit = 1; break;
|
||||
default:
|
||||
eprinth (NULL);
|
||||
eprintf ("\n Invalid digit \'%c\' in boolean string \"%s\".\n",
|
||||
aDigit, LV_const);
|
||||
EXIT (1);
|
||||
}
|
||||
|
||||
return (digit);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "otol ()".
|
||||
*/
|
||||
|
||||
static long otol(aDigit)
|
||||
char aDigit;
|
||||
{
|
||||
long digit;
|
||||
|
||||
|
||||
digit = -1;
|
||||
|
||||
|
||||
if ((aDigit >= '0') && (aDigit <= '7')) digit = (long)(aDigit - '0');
|
||||
|
||||
if (digit < 0) {
|
||||
eprinth (NULL);
|
||||
eprintf ("\n Invalid digit \'%c\' in octal string \"%s\".\n",
|
||||
aDigit, LV_const);
|
||||
EXIT (1);
|
||||
}
|
||||
|
||||
return (digit);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "xtol ()".
|
||||
*/
|
||||
|
||||
static long xtol(aDigit)
|
||||
char aDigit;
|
||||
{
|
||||
long digit;
|
||||
|
||||
|
||||
digit = -1;
|
||||
|
||||
|
||||
if ((aDigit >= '0') && (aDigit <= '9')) digit = (long)(aDigit - '0');
|
||||
if ((aDigit >= 'a') && (aDigit <= 'z')) digit = (long)(aDigit - 'a') + 10;
|
||||
if ((aDigit >= 'A') && (aDigit <= 'Z')) digit = (long)(aDigit - 'A') + 10;
|
||||
|
||||
if (digit < 0) {
|
||||
eprinth (NULL);
|
||||
eprintf ("\n Invalid digit \'%c\' in hexadecimal string \"%s\".\n",
|
||||
aDigit, LV_const);
|
||||
EXIT (1);
|
||||
}
|
||||
|
||||
return (digit);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "ltox ()".
|
||||
*/
|
||||
|
||||
static char ltox(aDigit)
|
||||
long aDigit;
|
||||
{
|
||||
char digit;
|
||||
|
||||
|
||||
digit = '\0';
|
||||
|
||||
|
||||
if ((aDigit >= 0) && (aDigit <= 9)) digit = (char)(aDigit + '0');
|
||||
if ((aDigit >= 10) && (aDigit <= 16)) digit = (char)(aDigit - 10 + 'a');
|
||||
|
||||
if (digit == '\0') {
|
||||
eprinth (NULL);
|
||||
eprintf ("\n Invalid number %d in hexadecimal conversion.\n",
|
||||
aDigit);
|
||||
EXIT (1);
|
||||
}
|
||||
|
||||
return (digit);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "newxl ()".
|
||||
*/
|
||||
|
||||
extern struct xlong_s *newxl()
|
||||
{
|
||||
struct xlong_s *pXl;
|
||||
long i;
|
||||
|
||||
|
||||
pXl = (struct xlong_s*)mbkalloc (sizeof (struct xlong_s));
|
||||
pXl->size = 0L;
|
||||
|
||||
for (i = 0; i < XLONG_SIZE; i++) (pXl->l)[i] = 0L;
|
||||
|
||||
return (pXl);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "freexl ()".
|
||||
*/
|
||||
|
||||
extern void freexl(apXl)
|
||||
struct xlong_s *apXl;
|
||||
{
|
||||
mbkfree (apXl);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "atoxl ()".
|
||||
*/
|
||||
|
||||
extern void atoxl(apXl, asConst)
|
||||
struct xlong_s *apXl;
|
||||
char *asConst;
|
||||
{
|
||||
long base, length, offset, i, xl_size, iRight, iLeft, power;
|
||||
|
||||
|
||||
LV_const = asConst;
|
||||
|
||||
base = 1;
|
||||
offset = 0;
|
||||
|
||||
if (asConst[0] == '0') {
|
||||
switch (asConst[1]) {
|
||||
case 'b':
|
||||
case 'B':
|
||||
base = 1; offset = 2; break;
|
||||
case 'x':
|
||||
case 'X':
|
||||
base = 4; offset = 2; break;
|
||||
default:
|
||||
base = 3; offset = 1; break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
__DBG (fprintf (stderr, "base := %ld\n", base);)
|
||||
|
||||
|
||||
length = strlen (asConst);
|
||||
|
||||
apXl->size = (length - offset) * base;
|
||||
|
||||
xl_size = apXl->size / 32 + ((apXl->size % 32) ? 1 : 0);
|
||||
|
||||
__DBG (fprintf (stderr, "xl_size := %ld\n", xl_size);)
|
||||
|
||||
for (i = 0; i < xl_size ; i++) {
|
||||
iRight = length - 1 - (32 / base) * i;
|
||||
iLeft = length - (32 / base) * (i + 1);
|
||||
|
||||
if (iLeft < offset) iLeft = offset;
|
||||
|
||||
__DBG (fprintf (stderr, "iRight := %ld\n", iRight);)
|
||||
__DBG (fprintf (stderr, "iLeft := %ld\n", iLeft);)
|
||||
|
||||
power = 1;
|
||||
|
||||
for (; iRight >= iLeft; iRight--) {
|
||||
__DBG (fprintf (stderr,
|
||||
"asConst[%ld] := %c\n",
|
||||
iRight,
|
||||
asConst[iRight]);)
|
||||
switch (base) {
|
||||
case 1: (apXl->l)[i] += btol(asConst[iRight]) << (power - 1); break;
|
||||
case 3: (apXl->l)[i] += otol(asConst[iRight]) << (power - 1); break;
|
||||
case 4: (apXl->l)[i] += xtol(asConst[iRight]) << (power - 1); break;
|
||||
}
|
||||
|
||||
power += base;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
__DBG(
|
||||
fprintf (stderr, "size := %ld\n", apXl->size);
|
||||
for (i = 0; i < XLONG_SIZE; i++)
|
||||
fprintf (stderr, "l[%ld] := %ld\n", i, apXl->l[i]);
|
||||
fflush (stderr);
|
||||
)
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "getxlbit ()".
|
||||
*/
|
||||
|
||||
extern long getxlbit(apXl, aBit)
|
||||
struct xlong_s *apXl;
|
||||
long aBit;
|
||||
{
|
||||
long i, mask;
|
||||
|
||||
|
||||
i = aBit / 32;
|
||||
mask = (long)(1 << (aBit % 32));
|
||||
|
||||
|
||||
if (i >= XLONG_SIZE) {
|
||||
eprinth ("getxlbit:");
|
||||
eprintf ("\n Requested bit %ld is out of range.\n", aBit);
|
||||
EXIT (1);
|
||||
}
|
||||
|
||||
|
||||
return (((apXl->l[i]) & mask) ? 1L : 0L);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "getxlhexa ()".
|
||||
*/
|
||||
|
||||
extern long getxlhexa(apXl, aBit)
|
||||
struct xlong_s *apXl;
|
||||
long aBit;
|
||||
{
|
||||
long i, shift;
|
||||
|
||||
|
||||
i = aBit / 32;
|
||||
shift = aBit % 32;
|
||||
|
||||
|
||||
if (i >= XLONG_SIZE) {
|
||||
eprinth ("getxlhexa:");
|
||||
eprintf ("\n Requested hexa %ld is out of range.\n", aBit);
|
||||
EXIT (1);
|
||||
}
|
||||
|
||||
|
||||
return ((((apXl->l[i]) >> shift) & 15));
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "xltovhdl ()".
|
||||
*/
|
||||
|
||||
extern char *xltovhdl(apXl, aS)
|
||||
struct xlong_s *apXl;
|
||||
char *aS;
|
||||
{
|
||||
long i;
|
||||
char *pS;
|
||||
|
||||
|
||||
pS = aS;
|
||||
i = apXl->size;
|
||||
|
||||
__DBG (fprintf (stderr, "size := %ld\n", i);)
|
||||
|
||||
if (i % 4) {
|
||||
strcpy (pS, "B\""); pS += 2;
|
||||
|
||||
for (; i % 4; i--) {
|
||||
if (getxlbit (apXl, i - 1))
|
||||
*pS = '1';
|
||||
else
|
||||
*pS = '0';
|
||||
|
||||
__DBG(
|
||||
fprintf (stderr, "iB := %ld, (%c)\n", i, *pS);
|
||||
fflush (stderr);
|
||||
)
|
||||
|
||||
pS++;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
if (i >= 4) {
|
||||
if (pS != aS) { strcpy (pS, "\" & "); pS += 4; }
|
||||
|
||||
strcpy (pS, "X\""); pS += 2;
|
||||
|
||||
for (i -= 4; i >= 0; i -= 4) {
|
||||
*pS = ltox (getxlhexa (apXl, i));
|
||||
|
||||
__DBG(
|
||||
fprintf (stderr, "iX := %ld, (%c)\n", i, *pS);
|
||||
fflush (stderr);
|
||||
)
|
||||
|
||||
pS++;
|
||||
}
|
||||
}
|
||||
|
||||
strcpy (pS, "\"");
|
||||
|
||||
|
||||
return (aS);
|
||||
}
|
||||
|
|
@ -0,0 +1,214 @@
|
|||
/*
|
||||
* $Id: util_Defs.h,v 1.1 2002/04/29 13:40:55 jpc Exp $
|
||||
*
|
||||
* /----------------------------------------------------------------\
|
||||
* | |
|
||||
* | A l l i a n c e C A D S y s t e m |
|
||||
* | D p G e n |
|
||||
* | |
|
||||
* | Author : Jean-Paul CHAPUT |
|
||||
* | E-mail : alliance-support@asim.lip6.fr |
|
||||
* | ============================================================== |
|
||||
* | C Header : "./util_Defs.h" |
|
||||
* | ************************************************************** |
|
||||
* | U p d a t e s |
|
||||
* | |
|
||||
* \----------------------------------------------------------------/
|
||||
*/
|
||||
|
||||
|
||||
# ifndef __util_Defs__
|
||||
# define __util_Defs__
|
||||
|
||||
|
||||
# include <unistd.h>
|
||||
# include <stdlib.h>
|
||||
# include <stdio.h>
|
||||
# include <signal.h>
|
||||
# include <ctype.h>
|
||||
# include <string.h>
|
||||
# include <strings.h>
|
||||
# include <malloc.h>
|
||||
# include <math.h>
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Looks if functions prototypes are availables.
|
||||
*/
|
||||
|
||||
# ifndef __FP
|
||||
# ifdef __STDC__
|
||||
/* Compiler is ANSI C compliant. */
|
||||
# include <unistd.h>
|
||||
# include <stdarg.h>
|
||||
|
||||
# define __FP( arguments ) arguments
|
||||
# define __FPV( arguments ) arguments
|
||||
|
||||
# define __KR_C( code )
|
||||
# define __ANSI_C( code ) code
|
||||
# else
|
||||
/* Compiler is K&R C. */
|
||||
# include <unistd.h>
|
||||
# include <varargs.h>
|
||||
|
||||
# define __FP( arguments ) ()
|
||||
# define __FPV( arguments ) (va_alist) va_dcl
|
||||
|
||||
# define __KR_C( code ) code
|
||||
# define __ANSI_C( code )
|
||||
# endif
|
||||
# endif
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Missing GNU functions prototypes under GCC/SunOS 4.1.4.
|
||||
*/
|
||||
|
||||
# include "GNU_Defs.h"
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Miscellaneous.
|
||||
*/
|
||||
|
||||
# define TRUE 1
|
||||
# define FALSE 0
|
||||
|
||||
# define m_Max(a,b) (((a) > (b)) ? (a) : (b))
|
||||
# define m_Min(a,b) (((a) > (b)) ? (b) : (a))
|
||||
# define ABS(a) (((a) > 0 ) ? (a) : -(a))
|
||||
|
||||
|
||||
/* Usual types shortcut. */
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Alliance Includes.
|
||||
*/
|
||||
|
||||
# include <mut.h>
|
||||
# include <mlo.h>
|
||||
# include <mph.h>
|
||||
# include <mpu.h>
|
||||
# include <mlu.h>
|
||||
# include "mgn.h"
|
||||
# include "mbkgen.h"
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Module : "util_Sys.c"
|
||||
*/
|
||||
|
||||
# define F_DUMPCORE 0
|
||||
# define F_NOCORE 1
|
||||
|
||||
# define C_SIGTFLT ((int)1)
|
||||
# define C_SIGERR ((int)2)
|
||||
|
||||
# define C_VerboseLevel0 (0L)
|
||||
# define C_VerboseLevel1 (1L)
|
||||
# define C_VerboseLevel2 (2L)
|
||||
|
||||
# define SIZE_S64 2048
|
||||
|
||||
|
||||
/* External variables from the various modules. */
|
||||
extern long util_VL;
|
||||
extern long util_flags;
|
||||
extern char util_binName[1024];
|
||||
|
||||
/* Interruptions handling functions. */
|
||||
extern void trapInit __FP((void));
|
||||
extern void sendGSignal __FP((int aSig));
|
||||
extern void setBinName __FP((char *asName));
|
||||
|
||||
/* Errors printing functions. */
|
||||
extern void stdflush __FP((void));
|
||||
extern void errMBK __FP((char *asName));
|
||||
extern void eprinth __FP((char *asName));
|
||||
extern int eprintf __FPV((char *aFormat, ...));
|
||||
extern int eprints __FP((char *aS));
|
||||
|
||||
/* Warnings printing functions. */
|
||||
extern void warnMBK __FP((char *asName));
|
||||
extern void wprinth __FP((char *asName));
|
||||
extern int wprintf __FPV((char *aFormat, ...));
|
||||
extern int wprints __FP((char *aS));
|
||||
|
||||
/* Messages printing functions. */
|
||||
extern void setVL __FP((long aVL));
|
||||
extern long getVL __FP((void));
|
||||
extern int vmprintf __FP((long aVL, char *aFormat, va_list aArgList));
|
||||
extern int mprintf __FPV((long aVL, char *aFormat, ...));
|
||||
extern int mprints __FP((long aVL, char *aS));
|
||||
extern int mprintf0 __FPV((char *aFormat, ...));
|
||||
extern int mprintf1 __FPV((char *aFormat, ...));
|
||||
extern int mprintf2 __FPV((char *aFormat, ...));
|
||||
|
||||
/* "util_init" global initialisation function. */
|
||||
extern void util_init __FP((long aVL, long aFlags, char *asName));
|
||||
|
||||
/* Persistent strings printing function (up to 64 strings). */
|
||||
extern char *s64printf __FPV((char *aFormat, ...));
|
||||
|
||||
/* Miscellaneous. */
|
||||
extern char *strtoup __FP((char *aS));
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Module : "util_Const.c"
|
||||
*/
|
||||
|
||||
|
||||
# define XLONG_SIZE 8
|
||||
|
||||
|
||||
typedef struct xlong_s {
|
||||
long size;
|
||||
long l[XLONG_SIZE];
|
||||
} xlong_t;
|
||||
|
||||
|
||||
extern struct xlong_s *newxl __FP((void));
|
||||
extern void freexl __FP((struct xlong_s *apXl));
|
||||
extern void atoxl __FP((struct xlong_s *apXl,
|
||||
char *asConst));
|
||||
extern long getxlbit __FP((struct xlong_s *apXl, long aBit));
|
||||
extern long getxlhexa __FP((struct xlong_s *apXl, long aBit));
|
||||
extern char *xltovhdl __FP((struct xlong_s *apXl, char *aS));
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Module : "util_Misc.c"
|
||||
*/
|
||||
|
||||
|
||||
/* Some useful macros. They relies on modules local variables
|
||||
* 'LV_N' & 'LV_flags'.
|
||||
*/
|
||||
# define DPGEN_PORT_BIT(s) \
|
||||
SLICE_TO_BIT((s), LV_N, LV_flags & F_MSB_FIRST)
|
||||
|
||||
# define DPGEN_LOCON_BUS(name,dir) \
|
||||
GENLIB_LOCON ( FULL_BUS(name, LV_N, LV_flags & F_MSB_FIRST), dir, \
|
||||
FULL_BUS(name, LV_N, LV_flags & F_MSB_FIRST))
|
||||
|
||||
# define VHDL_BUS_WIDE(bus,msb,lsb) \
|
||||
sprintf (bus, \
|
||||
"(%ld %s %ld)", \
|
||||
DPGEN_PORT_BIT (msb), \
|
||||
(LV_flags & F_MSB_FIRST) ? "to" : "downto" , \
|
||||
DPGEN_PORT_BIT (lsb))
|
||||
|
||||
|
||||
extern int ilog2 __FP((long x));
|
||||
extern int iexp2 __FP((long x));
|
||||
extern long get_depth __FP((long x, long depth));
|
||||
extern void DPGEN_PLACE __FP((char *aModelName,
|
||||
char *aInsName,
|
||||
long aX,
|
||||
long aY));
|
||||
|
||||
|
||||
# endif
|
||||
|
|
@ -0,0 +1,102 @@
|
|||
/*
|
||||
* $Id: util_Genlib.c,v 1.1 2002/04/29 13:40:55 jpc Exp $
|
||||
*
|
||||
* /----------------------------------------------------------------\
|
||||
* | |
|
||||
* | A l l i a n c e C A D S y s t e m |
|
||||
* | D p G e n |
|
||||
* | |
|
||||
* | Author : Jean-Paul CHAPUT |
|
||||
* | E-mail : alliance-support@asim.lip6.fr |
|
||||
* | ============================================================== |
|
||||
* | Module : "./util_Genlib.c" |
|
||||
* | ************************************************************** |
|
||||
* | U p d a t e s |
|
||||
* | |
|
||||
* \----------------------------------------------------------------/
|
||||
*/
|
||||
|
||||
|
||||
# include "util_Defs.h"
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Global variables (declared `extern' in "util_Defs.h").
|
||||
*/
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Internal definitions.
|
||||
*/
|
||||
|
||||
typedef struct eStack_s {
|
||||
struct lofig *WORK_LOFIG;
|
||||
struct phfig *WORK_PHFIG;
|
||||
struct phins *WORK_PHINS;
|
||||
long num_index;
|
||||
struct eStack_s *Prev;
|
||||
} eStack_t;
|
||||
|
||||
|
||||
eStack_t *genlibStack = NULL;
|
||||
|
||||
|
||||
/*
|
||||
* /----------------------------------------------------------------\
|
||||
* | Functions Definitions |
|
||||
* \----------------------------------------------------------------/
|
||||
*/
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "GENLIB_PUSH()".
|
||||
*/
|
||||
|
||||
extern void GENLIB_PUSH()
|
||||
{
|
||||
eStack_t *pNew;
|
||||
|
||||
|
||||
pNew = (eStack_t*)malloc(sizeof(eStack_t));
|
||||
|
||||
if (pNew == NULL) {
|
||||
eprinth(NULL);
|
||||
eprints("GENLIB_PUSH: Cannot allocate new stack element.\n");
|
||||
EXIT(1);
|
||||
}
|
||||
|
||||
pNew->WORK_LOFIG = WORK_LOFIG;
|
||||
pNew->WORK_PHFIG = WORK_PHFIG;
|
||||
pNew->WORK_PHINS = WORK_PHINS;
|
||||
pNew->num_index = num_index;
|
||||
pNew->Prev = genlibStack;
|
||||
|
||||
WORK_LOFIG = NULL;
|
||||
WORK_PHFIG = NULL;
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "GENLIB_POP()".
|
||||
*/
|
||||
|
||||
extern void GENLIB_POP()
|
||||
{
|
||||
eStack_t *pDel;
|
||||
|
||||
|
||||
if (genlibStack == NULL) {
|
||||
eprinth(NULL);
|
||||
eprints("GENLIB_POP: Attempt to pop from an empty stack.\n");
|
||||
EXIT(1);
|
||||
}
|
||||
|
||||
WORK_LOFIG = genlibStack->WORK_LOFIG;
|
||||
WORK_PHFIG = genlibStack->WORK_PHFIG;
|
||||
WORK_PHINS = genlibStack->WORK_PHINS;
|
||||
num_index = genlibStack->num_index;
|
||||
|
||||
pDel = genlibStack;
|
||||
genlibStack = genlibStack->Prev;
|
||||
|
||||
free((void*)pDel);
|
||||
}
|
||||
|
|
@ -0,0 +1,91 @@
|
|||
/*
|
||||
* $Id: util_Misc.c,v 1.1 2002/04/29 13:40:55 jpc Exp $
|
||||
*
|
||||
* /----------------------------------------------------------------\
|
||||
* | |
|
||||
* | A l l i a n c e C A D S y s t e m |
|
||||
* | D p G e n |
|
||||
* | |
|
||||
* | Author : Jean-Paul CHAPUT |
|
||||
* | E-mail : alliance-support@asim.lip6.fr |
|
||||
* | ============================================================== |
|
||||
* | Module : "./util_Misc.c" |
|
||||
* | ************************************************************** |
|
||||
* | U p d a t e s |
|
||||
* | |
|
||||
* \----------------------------------------------------------------/
|
||||
*/
|
||||
|
||||
|
||||
# include "util_Defs.h"
|
||||
# include "debugoff.h"
|
||||
|
||||
|
||||
/*
|
||||
* /----------------------------------------------------------------\
|
||||
* | Functions Definitions |
|
||||
* \----------------------------------------------------------------/
|
||||
*/
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "ilog2 ()".
|
||||
*/
|
||||
|
||||
extern int ilog2 (x)
|
||||
long x;
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; x; i++, x = x >> 1);
|
||||
|
||||
return i;
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "iexp2 ()".
|
||||
*/
|
||||
|
||||
extern int iexp2 (x)
|
||||
long x;
|
||||
{
|
||||
return (1 << x);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "get_depth ()".
|
||||
*/
|
||||
|
||||
extern long get_depth (x, depth)
|
||||
long x, depth;
|
||||
{
|
||||
long mDepth, i;
|
||||
|
||||
|
||||
mDepth = ilog2 (x);
|
||||
|
||||
|
||||
for (i = depth; i <= mDepth; i++)
|
||||
if (x & (1 << i)) return (i);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "DPGEN_PLACE ()".
|
||||
*/
|
||||
|
||||
extern void DPGEN_PLACE (aModelName, aInsName, aX, aY)
|
||||
char *aModelName, *aInsName;
|
||||
long aX, aY;
|
||||
{
|
||||
char sym;
|
||||
|
||||
|
||||
sym = NOSYM;
|
||||
if ((aY / 50) % 2) sym = SYM_Y;
|
||||
|
||||
GENLIB_PLACE (aModelName, aInsName, sym, aX, aY);
|
||||
}
|
||||
|
|
@ -0,0 +1,520 @@
|
|||
/*
|
||||
* $Id: util_Sys.c,v 1.1 2002/04/29 13:40:55 jpc Exp $
|
||||
*
|
||||
* /----------------------------------------------------------------\
|
||||
* | |
|
||||
* | A l l i a n c e C A D S y s t e m |
|
||||
* | D p G e n |
|
||||
* | |
|
||||
* | Author : Jean-Paul CHAPUT |
|
||||
* | E-mail : alliance-support@asim.lip6.fr |
|
||||
* | ============================================================== |
|
||||
* | C Module : "./util_Sys.c" |
|
||||
* | ************************************************************** |
|
||||
* | U p d a t e s |
|
||||
* | |
|
||||
* \----------------------------------------------------------------/
|
||||
*/
|
||||
|
||||
|
||||
# include "util_Defs.h"
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Global variables (declared `extern' in "util_Defs.h").
|
||||
*/
|
||||
|
||||
long util_VL = 1L;
|
||||
long util_flags = 0L;
|
||||
char util_binName[1024] = "noname";
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Internal functions declarations.
|
||||
*/
|
||||
|
||||
static void trapSig __FP((int aSig));
|
||||
|
||||
|
||||
/*
|
||||
* /----------------------------------------------------------------\
|
||||
* | Functions Definitions |
|
||||
* \----------------------------------------------------------------/
|
||||
*/
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "trapSig()".
|
||||
*/
|
||||
|
||||
static void trapSig(aSig)
|
||||
int aSig;
|
||||
{
|
||||
switch (aSig)
|
||||
{
|
||||
case C_SIGERR:
|
||||
/* A "normal" error occurs (produced by 'esignal'). */
|
||||
break;
|
||||
|
||||
case C_SIGTFLT:
|
||||
/* "util_init" was unable to setup 'trapSig'. */
|
||||
eprinth ("util_Sys");
|
||||
eprints ("\n Unable to trap SOFTSIG|SIGSEGV|SIGTERM.\n");
|
||||
break;
|
||||
|
||||
case SIGTERM:
|
||||
/* This occurs on MBK errors. */
|
||||
eprinth ((char *)NULL);
|
||||
eprints ("\n An error have occur in the MBK data-base.");
|
||||
eprints ("\n Please check your Alliance environment.");
|
||||
eprints ("\n\n");
|
||||
eprintf ("\n %s terminated.", util_binName);
|
||||
eprints ("\n" );
|
||||
break;
|
||||
|
||||
case SIGFPE:
|
||||
case SIGBUS:
|
||||
case SIGSEGV:
|
||||
/* Ouch !! This may result from a program bug. */
|
||||
eprinth ((char *)NULL);
|
||||
eprintf ("\n An %s internal bug have occur ", util_binName);
|
||||
|
||||
if (aSig == SIGFPE ) eprints ("(SIGFPE)." );
|
||||
if (aSig == SIGBUS ) eprints ("(SIGBUS)." );
|
||||
if (aSig == SIGSEGV) eprints ("(SIGSEGV).");
|
||||
eprints ("\n Please e-mail to \"alliance-support@asim.lip6.fr\".");
|
||||
eprints ("\n\n");
|
||||
eprintf ("\n %s terminated ", util_binName);
|
||||
|
||||
if (util_flags & F_NOCORE) {
|
||||
eprints ("(core not dumped).\n");
|
||||
exit (1);
|
||||
}
|
||||
else {
|
||||
eprints( "(core will be dumped).\n");
|
||||
if ( (signal(SIGFPE , SIG_DFL) == SIG_ERR)
|
||||
|| (signal(SIGBUS , SIG_DFL) == SIG_ERR)
|
||||
|| (signal(SIGSEGV, SIG_DFL) == SIG_ERR))
|
||||
exit (1);
|
||||
else {
|
||||
kill (getpid(), aSig);
|
||||
return;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
/* Unexpected signal. */
|
||||
eprinth ("util_Sys");
|
||||
eprintf ("\n Unexpected signal \'%d\' in trap function.\n", aSig);
|
||||
break;
|
||||
}
|
||||
|
||||
exit (1);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "trapInit()".
|
||||
*/
|
||||
|
||||
extern void trapInit()
|
||||
{
|
||||
/* Set the trap function for the ERROR signal. */
|
||||
if (ssignal (C_SIGERR, trapSig) == SIG_ERR) { trapSig (C_SIGTFLT); }
|
||||
|
||||
/* Set the trap function for SIGTERM signal. */
|
||||
if (signal(SIGTERM, trapSig) == SIG_ERR) { trapSig (C_SIGTFLT); }
|
||||
|
||||
/* Set the trap function for SIGFPE, SIGBUS and SIGSEGV signals. */
|
||||
if ( (signal(SIGFPE , trapSig) == SIG_ERR)
|
||||
|| (signal(SIGBUS , trapSig) == SIG_ERR)
|
||||
|| (signal(SIGSEGV, trapSig) == SIG_ERR)) trapSig (C_SIGTFLT);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "sendGSignal()".
|
||||
*/
|
||||
|
||||
extern void sendGSignal(aSig)
|
||||
int aSig;
|
||||
{
|
||||
gsignal (aSig);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "setBinName()".
|
||||
*/
|
||||
|
||||
extern void setBinName (asName)
|
||||
char *asName;
|
||||
{
|
||||
strncpy (util_binName, asName, 1023);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "stdflush()".
|
||||
*/
|
||||
|
||||
extern void stdflush()
|
||||
{
|
||||
fflush(stdout);
|
||||
fflush(stderr);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "errMBK()".
|
||||
*/
|
||||
|
||||
extern void errMBK(asName)
|
||||
char *asName;
|
||||
{
|
||||
stdflush();
|
||||
|
||||
fprintf(stderr, "\n*** MBK error ***:");
|
||||
|
||||
if (asName != (char *)NULL) {
|
||||
fprintf(stderr, "%s:", asName);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "eprinth()".
|
||||
*/
|
||||
|
||||
extern void eprinth(asName)
|
||||
char *asName;
|
||||
{
|
||||
stdflush();
|
||||
|
||||
fprintf(stderr, "\n*** Error ***:");
|
||||
|
||||
if (asName != (char *)NULL) {
|
||||
fprintf(stderr, "%s:", asName);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "eprintf()".
|
||||
*/
|
||||
|
||||
extern int eprintf __FPV((char *aFormat, ...))
|
||||
{
|
||||
va_list ArgList;
|
||||
__KR_C( char *aFormat; )
|
||||
int retVal;
|
||||
|
||||
|
||||
__ANSI_C( va_start(ArgList, aFormat); )
|
||||
__KR_C( va_start(ArgList); )
|
||||
__KR_C( aFormat = va_arg(ArgList, char*); )
|
||||
|
||||
retVal = vfprintf(stderr, aFormat, ArgList);
|
||||
|
||||
va_end(ArgList);
|
||||
|
||||
return(retVal);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "eprints()".
|
||||
*/
|
||||
|
||||
extern int eprints(aS)
|
||||
char *aS;
|
||||
{
|
||||
return(fputs(aS, stderr));
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "warnMBK()".
|
||||
*/
|
||||
|
||||
extern void warnMBK(asName)
|
||||
char *asName;
|
||||
{
|
||||
stdflush();
|
||||
|
||||
fprintf(stderr, "*** MBK warning ***:");
|
||||
|
||||
if (asName != (char *)NULL) {
|
||||
fprintf(stderr, "%s:", asName);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "wprinth()".
|
||||
*/
|
||||
|
||||
extern void wprinth(asName)
|
||||
char *asName;
|
||||
{
|
||||
stdflush();
|
||||
|
||||
fprintf(stderr, "*** Warning ***:");
|
||||
|
||||
if (asName != (char *)NULL) {
|
||||
fprintf(stderr, "%s:", asName);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "wprintf()".
|
||||
*/
|
||||
|
||||
extern int wprintf __FPV((char *aFormat, ...))
|
||||
{
|
||||
va_list AL;
|
||||
__KR_C( char *aFormat; )
|
||||
int RV;
|
||||
|
||||
__ANSI_C( va_start(AL, aFormat); )
|
||||
__KR_C( va_start(AL); )
|
||||
__KR_C( aFormat = va_arg(AL, char*); )
|
||||
|
||||
RV = vfprintf(stderr, aFormat, AL);
|
||||
va_end(AL);
|
||||
|
||||
return(RV);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "wprints()".
|
||||
*/
|
||||
|
||||
extern int wprints(aS)
|
||||
char *aS;
|
||||
{
|
||||
return(fputs(aS, stderr));
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "setVL()".
|
||||
*/
|
||||
|
||||
extern void setVL(aVL)
|
||||
long aVL;
|
||||
{
|
||||
switch (aVL) {
|
||||
case C_VerboseLevel0:
|
||||
case C_VerboseLevel1:
|
||||
case C_VerboseLevel2: util_VL = aVL; break;
|
||||
default: util_VL = C_VerboseLevel2; break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "getVL()".
|
||||
*/
|
||||
|
||||
extern long getVL()
|
||||
{
|
||||
return (util_VL);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "vmprintf()".
|
||||
*/
|
||||
|
||||
extern int vmprintf(aVL, aFormat, aArgList)
|
||||
va_list aArgList;
|
||||
long aVL;
|
||||
char *aFormat;
|
||||
{
|
||||
int retVal;
|
||||
|
||||
|
||||
if (aVL <= util_VL) {
|
||||
retVal = vfprintf (stdout, aFormat, aArgList);
|
||||
} else {
|
||||
retVal = 0;
|
||||
}
|
||||
|
||||
return (retVal);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "mprintf()".
|
||||
*/
|
||||
|
||||
extern int mprintf __FPV((long aVL, char *aFormat, ...))
|
||||
{
|
||||
va_list ArgList;
|
||||
__KR_C( char aVL; )
|
||||
__KR_C( char *aFormat; )
|
||||
int retVal;
|
||||
|
||||
|
||||
__ANSI_C( va_start (ArgList, aFormat); )
|
||||
__KR_C( va_start (ArgList); )
|
||||
__KR_C( aVL = va_arg (ArgList, long ); )
|
||||
__KR_C( aFormat = va_arg (ArgList, char*); )
|
||||
|
||||
retVal = vmprintf (aVL, aFormat, ArgList);
|
||||
|
||||
va_end(ArgList);
|
||||
|
||||
return(retVal);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "mprints()".
|
||||
*/
|
||||
|
||||
extern int mprints(aVL, aS)
|
||||
long aVL;
|
||||
char *aS;
|
||||
{
|
||||
int retVal;
|
||||
|
||||
|
||||
if (aVL <= util_VL) {
|
||||
retVal = fputs (aS, stdout);
|
||||
} else {
|
||||
retVal = 0;
|
||||
}
|
||||
|
||||
return (retVal);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "mprintf0()".
|
||||
*/
|
||||
|
||||
extern int mprintf0 __FPV((char *aFormat, ...))
|
||||
{
|
||||
va_list ArgList;
|
||||
__KR_C( char *aFormat; )
|
||||
int retVal;
|
||||
|
||||
|
||||
__ANSI_C( va_start (ArgList, aFormat); )
|
||||
__KR_C( va_start (ArgList); )
|
||||
__KR_C( aFormat = va_arg (ArgList, char*); )
|
||||
|
||||
retVal = vmprintf (C_VerboseLevel0, aFormat, ArgList);
|
||||
|
||||
va_end (ArgList);
|
||||
|
||||
return (retVal);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "mprintf1()".
|
||||
*/
|
||||
|
||||
extern int mprintf1 __FPV((char *aFormat, ...))
|
||||
{
|
||||
va_list ArgList;
|
||||
__KR_C( char *aFormat; )
|
||||
int retVal;
|
||||
|
||||
|
||||
__ANSI_C( va_start (ArgList, aFormat); )
|
||||
__KR_C( va_start (ArgList); )
|
||||
__KR_C( aFormat = va_arg (ArgList, char*); )
|
||||
|
||||
retVal = vmprintf (C_VerboseLevel1, aFormat, ArgList);
|
||||
|
||||
va_end (ArgList);
|
||||
|
||||
return (retVal);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "mprintf2()".
|
||||
*/
|
||||
|
||||
extern int mprintf2 __FPV((char *aFormat, ...))
|
||||
{
|
||||
va_list ArgList;
|
||||
__KR_C( char *aFormat; )
|
||||
int retVal;
|
||||
|
||||
|
||||
__ANSI_C( va_start (ArgList, aFormat); )
|
||||
__KR_C( va_start (ArgList); )
|
||||
__KR_C( aFormat = va_arg (ArgList, char*); )
|
||||
|
||||
retVal = vmprintf (C_VerboseLevel2, aFormat, ArgList);
|
||||
|
||||
va_end (ArgList);
|
||||
|
||||
return (retVal);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "util_init()".
|
||||
*/
|
||||
|
||||
extern void util_init(aVL, aFlags, asName)
|
||||
long aVL;
|
||||
long aFlags;
|
||||
char *asName;
|
||||
{
|
||||
util_flags = aFlags;
|
||||
|
||||
trapInit ();
|
||||
setVL (aVL);
|
||||
setBinName (asName);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "s64printf()".
|
||||
*/
|
||||
|
||||
extern char *s64printf __FPV((char *aFormat, ...))
|
||||
{
|
||||
va_list aAL;
|
||||
__KR_C( char *aFormat; )
|
||||
|
||||
static char s64[64][SIZE_S64];
|
||||
static long iS = 0;
|
||||
|
||||
|
||||
__ANSI_C( va_start(aAL, aFormat); )
|
||||
__KR_C( va_start(aAL); )
|
||||
__KR_C( aFormat = va_arg(aAL, char*); )
|
||||
|
||||
vsprintf(s64[(++iS) % 64] , aFormat, aAL);
|
||||
|
||||
va_end(aAL);
|
||||
|
||||
return(s64[iS % 64]);
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Function : "strtoup()".
|
||||
*/
|
||||
|
||||
extern char *strtoup (aS)
|
||||
char *aS;
|
||||
{
|
||||
char *p;
|
||||
|
||||
for (p = aS; *p != '\0'; p++) *p = (char)toupper ((int)*p);
|
||||
|
||||
return (aS);
|
||||
}
|
||||
Loading…
Reference in New Issue