Le man de moka !!!
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SUBDIRS = src
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SUBDIRS = src man1
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@ -28,5 +28,6 @@ AM_ALLIANCE
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AC_OUTPUT([
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Makefile
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man1/Makefile
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src/Makefile
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])
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man_MANS = moka.1
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EXTRA_DIST = $(man_MANS)
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.\" @(#) 02/08/05 UPMC; Author: Jacomme L.
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.pl -.4
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.TH MOKA 1 "August 5, 2002" "ASIM/LIP6" "CAO\-VLSI Reference Manual"
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.SH NAME
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.TP
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MOKA \- Model checker ancestor
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.so man1/alc_origin.1
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.SH SYNOPSIS
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.TP
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\f4moka [\-VDB] fsm_filename ctl_filename
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.br
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.SH DESCRIPTION
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.br
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\fBmoka\fp is a CTL model checker.
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.br
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Made to run on FSM or RTL descriptions, \fBmoka\fP supports the same VHDL subset
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as syf or boom (for further informations about this subset see SYF(1), FSM(5), VBE(5) ).
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\fBmoka\fP uses a Reduced Ordered Binary Decision Diagrams representation and
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verifies CTL formulae (see CTL(5) for CTL file format details).
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.SH ENVIRONMENT VARIABLES
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.br
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.HP
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.ti 7
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\fIMBK_WORK_LIB\fP gives the path for the description and the CTL file.
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The default value is the current directory.
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.br
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.HP
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.ti 7
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\fIMBK_CATA_LIB\fP gives some auxiliary pathes for the descriptions and the CTL
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file.
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The default value is the current directory.
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.SH OPTIONS
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.ti 7
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\-V
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Sets verbose mode on. Each step of the model checking is displayed on the
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standard output.
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.br
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\-D
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Sets debug mode on. Each step of the model checking is detailed on the
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standard output.
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.br
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\-B
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The input file is a VHDL description using the Alliance VHDL subset
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(see VBE(5) file format).
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.br
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.SH FSM EXAMPLE
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.br
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.nf
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-- A multi fsm example
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ENTITY example is
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PORT
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(
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ck : in BIT;
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data_in : in BIT;
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reset : in BIT;
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data_out : out BIT
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);
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END example;
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ARCHITECTURE FSM OF example is
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TYPE A_ETAT_TYPE IS (A_E0, A_E1);
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SIGNAL A_NS, A_CS : A_ETAT_TYPE;
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TYPE B_ETAT_TYPE IS (B_E0, B_E1);
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SIGNAL B_NS, B_CS : B_ETAT_TYPE;
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--PRAGMA CURRENT_STATE A_CS FSM_A
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--PRAGMA NEXT_STATE A_NS FSM_A
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--PRAGMA CLOCK ck FSM_A
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--PRAGMA FIRST_STATE A_E0 FSM_A
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--PRAGMA CURRENT_STATE B_CS FSM_B
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--PRAGMA NEXT_STATE B_NS FSM_B
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--PRAGMA CLOCK ck FSM_B
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--PRAGMA FIRST_STATE B_E0 FSM_B
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SIGNAL ACK, REQ, DATA_INT : BIT;
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BEGIN
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A_1 : PROCESS ( A_CS, ACK )
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BEGIN
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IF ( reset = '1' )
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THEN A_NS <= A_E0;
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DATA_OUT <= '0';
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REQ <= '0';
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ELSE
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CASE A_CS is
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WHEN A_E0 =>
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IF ( ACK ='1') THEN A_NS <= A_E1;
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ELSE A_NS <= A_E0;
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END IF;
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DATA_OUT <= '0';
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REQ <= '1';
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WHEN A_E1 =>
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IF ( ACK ='1') THEN A_NS <= A_E1;
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ELSE A_NS <= A_E0;
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END IF;
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DATA_OUT <= DATA_INT;
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REQ <= '0';
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END CASE;
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END IF;
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END PROCESS A_1;
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A_2 : PROCESS( ck )
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BEGIN
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IF ( ck = '1' AND NOT ck'STABLE )
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THEN A_CS <= A_NS;
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END IF;
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END PROCESS A_2;
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-------
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B_1 : PROCESS ( B_CS, ACK )
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BEGIN
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IF ( reset = '1' )
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THEN B_NS <= B_E0;
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DATA_INT <= '0';
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ACK <= '0';
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ELSE
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CASE B_CS is
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WHEN B_E0 =>
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IF ( REQ ='1') THEN B_NS <= B_E1;
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ELSE B_NS <= B_E0;
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END IF;
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DATA_INT <= '0';
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ACK <= '0';
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WHEN B_E1 =>
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IF ( REQ ='1') THEN B_NS <= B_E1;
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ELSE B_NS <= B_E0;
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END IF;
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DATA_INT <= DATA_IN;
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ACK <= '1';
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END CASE;
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END IF;
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END PROCESS B_1;
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B_2 : PROCESS( ck )
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BEGIN
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IF ( ck = '1' AND NOT ck'STABLE )
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THEN B_CS <= B_NS;
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END IF;
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END PROCESS B_2;
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END FSM;
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.br
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.SH CTL EXAMPLE
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.br
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.nf
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-- A CTL file example
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TYPE A_ETAT_TYPE IS (A_E0, A_E1);
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TYPE B_ETAT_TYPE IS (B_E0, B_E1);
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VARIABLE A_NS, A_CS : A_ETAT_TYPE;
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VARIABLE B_NS, B_CS : B_ETAT_TYPE;
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VARIABLE ck : BIT;
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VARIABLE data_in : BIT;
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VARIABLE data_out : BIT;
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VARIABLE reset : BIT;
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VARIABLE ack : BIT;
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VARIABLE req : BIT;
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INITIAL init1 := (reset='1');
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ASSUME ass1 := (reset='0');
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begin
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prop1 : EX( ack='1' );
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prop2 : AG( req -> AF( ack ) );
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prop4 : AU( req='1', ack='1');
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end;
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.br
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.SH MOKA EXAMPLE
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.br
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moka -V example example
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.SH SEE ALSO
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.br
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\fBsyf\fP (1), \fBfsp\fP (1), \fBfsm\fP (5), \fBctl\fP (5), \fBvbe(5)\fP.
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.so man1/alc_bug_report.1
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