Modif Bug
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43028e7e0e
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008708fb49
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@ -1,6 +1,7 @@
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SHELL = /bin/sh
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ASIMUT = $(ALLIANCE_TOP)/bin/asimut -bdd
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# ASIMUT = $(ALLIANCE_TOP)/bin/asimut -zd -i 0 -bdd
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ASIMUT = echo
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YAGLE = $(ALLIANCE_TOP)/bin/yagle
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DRUC = $(ALLIANCE_TOP)/bin/druc
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@ -8,6 +9,7 @@ GRAAL = $(ALLIANCE_TOP)/bin/graal
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DREAL = $(ALLIANCE_TOP)/bin/dreal
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GRAAL = echo
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DREAL = echo
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TOUCH = touch
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GENLIB = $(ALLIANCE_TOP)/bin/genlib
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LVX = $(ALLIANCE_TOP)/bin/lvx
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@ -27,15 +29,15 @@ all : amd2901.cif chip.ttv
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chip.ttv : chip.al
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MBK_IN_LO=al; \
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sclib:$(ALLIANCE_TOP)/cells/padlib; \
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sc2sxlib:$(ALLIANCE_TOP)/cells/sxlib:$(ALLIANCE_TOP)/cells/padlib; \
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export MBK_IN_LO MBK_CATA_LIB; \
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$(TAS) chip
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amd2901.cif : proof_end
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MBK_IN_PH=ap ;\
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MBK_WORK_LIB=. ;\
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sclib:$(ALLIANCE_TOP)/cells/padlib;\
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RDS_TECHNO_NAME=$(ALLIANCE_TOP)/etc/prol10_7.rds ;\
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sc2sxlib:$(ALLIANCE_TOP)/cells/sxlib:$(ALLIANCE_TOP)/cells/padlib;\
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RDS_TECHNO_NAME=$(ALLIANCE_TOP)/etc/prol10_8.rds ;\
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RDS_IN=cif ;\
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RDS_OUT=cif ;\
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export MBK_IN_PH MBK_WORK_LIB MBK_CATA_LIB RDS_TECHNO_NAME RDS_IN RDS_OUT;\
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@ -49,8 +51,8 @@ amd2901.cif : proof_end
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proof_end : chip.vbe
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MBK_WORK_LIB=. ;\
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export MBK_WORK_LIB;\
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$(PROOF) -a -d amd chip ;\
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echo "proof_end done" >> proof_end
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$(PROOF) -a -d amd chip
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$(TOUCH) proof_end
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#################################################################
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# YAGLE on the chip #
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@ -59,7 +61,7 @@ proof_end : chip.vbe
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chip.vbe : asimut_end
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MBK_IN_LO=al ;\
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MBK_WORK_LIB=. ;\
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sclib:$(ALLIANCE_TOP)/cells/padlib ;\
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sc2sxlib:$(ALLIANCE_TOP)/cells/sxlib:$(ALLIANCE_TOP)/cells/padlib ;\
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export MBK_IN_LO MBK_WORK_LIB MBK_CATA_LIB;\
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$(YAGLE) chip -i -v
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@ -70,12 +72,12 @@ chip.vbe : asimut_end
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asimut_end : lvx_chip
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MBK_IN_LO=al ;\
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MBK_WORK_LIB=. ;\
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sclib:$(ALLIANCE_TOP)/cells/padlib ;\
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sc2sxlib:$(ALLIANCE_TOP)/cells/sxlib:$(ALLIANCE_TOP)/cells/padlib ;\
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export MBK_IN_LO MBK_WORK_LIB MBK_CATA_LIB;\
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VH_PATSFX=pat; export VH_PATSFX;\
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VH_MAXERR=10; export VH_MAXERR;\
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VH_MAXERR=10000; export VH_MAXERR;\
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$(ASIMUT) chip pattern res_pattern
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echo " asimut_end done " >> asimut_end
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$(TOUCH) asimut_end
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#################################################################
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# LVX of the chip #
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@ -83,10 +85,10 @@ asimut_end : lvx_chip
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lvx_chip : chip.al
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MBK_WORK_LIB=. ;\
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sclib:$(ALLIANCE_TOP)/cells/padlib;\
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sc2sxlib:$(ALLIANCE_TOP)/cells/sxlib:$(ALLIANCE_TOP)/cells/padlib;\
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export MBK_WORK_LIB MBK_CATA_LIB;\
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$(LVX) vst al chip chip
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echo " lvx_chip done" >> lvx_chip
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$(TOUCH) lvx_chip
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#################################################################
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# LYNX of the chip #
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@ -96,7 +98,7 @@ chip.al : druc_chip
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MBK_OUT_LO=al ;\
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MBK_IN_PH=ap ;\
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MBK_WORK_LIB=. ;\
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sclib:$(ALLIANCE_TOP)/cells/padlib;\
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sc2sxlib:$(ALLIANCE_TOP)/cells/sxlib:$(ALLIANCE_TOP)/cells/padlib;\
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export MBK_OUT_LO MBK_IN_PH MBK_WORK_LIB MBK_CATA_LIB;\
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$(LYNX) chip
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@ -108,12 +110,12 @@ chip.al : druc_chip
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druc_chip : chip.ap
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MBK_IN_PH=ap ;\
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MBK_WORK_LIB=. ;\
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sclib:$(ALLIANCE_TOP)/cells/padlib;\
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RDS_TECHNO_NAME=$(ALLIANCE_TOP)/etc/cmos_7.rds ;\
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sc2sxlib:$(ALLIANCE_TOP)/cells/sxlib:$(ALLIANCE_TOP)/cells/padlib;\
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RDS_TECHNO_NAME=$(ALLIANCE_TOP)/etc/cmos_8.rds ;\
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RDS_IN=cif; RDS_OUT=cif;\
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export MBK_IN_PH MBK_WORK_LIB MBK_CATA_LIB RDS_TECHNO_NAME RDS_IN RDS_OUT;\
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$(DRUC) chip ;\
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echo "druc_chip done " >> druc_chip
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$(DRUC) chip
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$(TOUCH) druc_chip
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#################################################################
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@ -125,7 +127,7 @@ chip.ap : lvx_heart chip.rin
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MBK_IN_PH=ap ;\
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MBK_OUT_PH=ap ;\
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MBK_WORK_LIB=. ;\
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sclib:$(ALLIANCE_TOP)/cells/padlib;\
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sc2sxlib:$(ALLIANCE_TOP)/cells/sxlib:$(ALLIANCE_TOP)/cells/padlib;\
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export MBK_IN_LO MBK_IN_PH MBK_OUT_PH MBK_WORK_LIB MBK_CATA_LIB;\
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$(RING) chip chip;\
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$(GRAAL) -l chip
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@ -136,10 +138,10 @@ chip.ap : lvx_heart chip.rin
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lvx_heart : heart.al
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MBK_WORK_LIB=. ;\
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sclib:$(ALLIANCE_TOP)/cells/padlib;\
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sc2sxlib:$(ALLIANCE_TOP)/cells/sxlib:$(ALLIANCE_TOP)/cells/padlib;\
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export MBK_WORK_LIB MBK_CATA_LIB;\
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$(LVX) vst al heart heart -f
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echo "lvx_heart done " >> lvx_heart
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$(TOUCH) lvx_heart
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#################################################################
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# LYNX of the heart #
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@ -149,7 +151,7 @@ heart.al : druc_heart
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MBK_OUT_LO=al ;\
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MBK_IN_PH=ap ;\
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MBK_WORK_LIB=. ;\
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sclib:$(ALLIANCE_TOP)/cells/padlib ;\
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sc2sxlib:$(ALLIANCE_TOP)/cells/sxlib:$(ALLIANCE_TOP)/cells/padlib ;\
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export MBK_OUT_LO MBK_IN_PH MBK_WORK_LIB MBK_CATA_LIB;\
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$(LYNX) heart
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@ -161,12 +163,12 @@ heart.al : druc_heart
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druc_heart : heart.ap
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MBK_IN_PH=ap ;\
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MBK_WORK_LIB=. ;\
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sclib:$(ALLIANCE_TOP)/cells/padlib ;\
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RDS_TECHNO_NAME=$(ALLIANCE_TOP)/etc/cmos_7.rds ;\
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sc2sxlib:$(ALLIANCE_TOP)/cells/sxlib:$(ALLIANCE_TOP)/cells/padlib ;\
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RDS_TECHNO_NAME=$(ALLIANCE_TOP)/etc/cmos_8.rds ;\
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RDS_IN=cif; RDS_OUT=cif;\
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export MBK_IN_PH MBK_WORK_LIB MBK_CATA_LIB RDS_TECHNO_NAME RDS_IN RDS_OUT;\
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$(DRUC) heart ;\
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echo "druc_heart done " >> druc_heart
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$(DRUC) heart
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$(TOUCH) druc_heart
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#################################################################
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# SCR is a standard cells router, it makes an automatic #
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@ -179,9 +181,8 @@ heart.ap : asimut_vst
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MBK_OUT_PH=ap ;\
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MBK_IN_LO=vst ;\
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MBK_WORK_LIB=. ;\
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sclib:$(ALLIANCE_TOP)/cells/padlib;\
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SCR_SCLIB=1 ;\
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export MBK_IN_PH MBK_OUT_PH MBK_IN_LO MBK_WORK_LIB MBK_CATA_LIB SCR_SCLIB ;\
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sc2sxlib:$(ALLIANCE_TOP)/cells/sxlib:$(ALLIANCE_TOP)/cells/padlib;\
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export MBK_IN_PH MBK_OUT_PH MBK_IN_LO MBK_WORK_LIB MBK_CATA_LIB ;\
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$(SCR) -p -r heart;\
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# $(GRAAL) -l heart
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@ -195,12 +196,12 @@ heart.ap : asimut_vst
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asimut_vst : chip.vst
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MBK_IN_LO=vst ;\
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MBK_WORK_LIB=. ;\
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sclib:$(ALLIANCE_TOP)/cells/padlib ;\
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sc2sxlib:$(ALLIANCE_TOP)/cells/sxlib:$(ALLIANCE_TOP)/cells/padlib ;\
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VH_PATSFX=pat; export VH_PATSFX;\
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VH_MAXERR=10; export VH_MAXERR;\
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VH_MAXERR=10000; export VH_MAXERR;\
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export MBK_IN_LO MBK_WORK_LIB MBK_CATA_LIB;\
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$(ASIMUT) chip pattern result_str ;\
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echo "asimut_vst done " >> asimut_vst
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$(ASIMUT) chip pattern result_str
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$(TOUCH) asimut_vst
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#################################################################
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# GENLIB is a procedural design language upon C. #
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@ -213,7 +214,7 @@ chip.vst : asimut_vbe chip.c
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(MBK_IN_LO=vst ;\
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MBK_OUT_LO=vst ;\
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MBK_WORK_LIB=. ;\
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sclib:$(ALLIANCE_TOP)/cells/padlib ;\
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sc2sxlib:$(ALLIANCE_TOP)/cells/sxlib:$(ALLIANCE_TOP)/cells/padlib ;\
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export MBK_IN_LO MBK_OUT_LO MBK_WORK_LIB MBK_CATA_LIB;\
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$(GENLIB) -v chip)
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@ -227,10 +228,10 @@ chip.vst : asimut_vbe chip.c
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asimut_vbe : asimut_first
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MBK_WORK_LIB=. ;\
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sclib:$(ALLIANCE_TOP)/cells/padlib;\
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MBK_CATA_LIB=.:$(ALLIANCE_TOP)/cells/sc2sxlib:$(ALLIANCE_TOP)/cells/sxlib:$(ALLIANCE_TOP)/cells/padlib;\
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export MBK_WORK_LIB MBK_CATA_LIB;\
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$(ASIMUT) -b amd pattern result_beh;\
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echo "asimut_vbe done " >> asimut_vbe
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$(ASIMUT) -b amd pattern result_beh
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$(TOUCH) asimut_vbe
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#################################################################
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# Asimut compilation #
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@ -241,9 +242,9 @@ asimut_first : amd.vbe
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MBK_CATA_LIB=. ; \
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export MBK_WORK_LIB MBK_CATA_LIB;\
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VH_PATSFX=pat; export VH_PATSFX;\
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VH_MAXERR=10; export VH_MAXERR;\
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$(ASIMUT) -b -c amd;\
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echo "asimut_first done " >> asimut_first
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VH_MAXERR=10000; export VH_MAXERR;\
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$(ASIMUT) -b -c amd
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$(TOUCH) asimut_first
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clean :
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rm -f *.vst r*.pat *.al *.ap *.grr *.err
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@ -198,8 +198,7 @@ WITH i(5 DOWNTO 3) SELECT
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ovr <= c_sumrs(3) XOR c_sumrs(2) WHEN "000",
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c_difsr(3) XOR c_difsr(2) WHEN "001",
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c_difrs(3) XOR c_difrs(2) WHEN "010",
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'd' WHEN OTHERS;
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-- '0' WHEN OTHERS;
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'0' WHEN OTHERS;
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--
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--
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WITH i(5 DOWNTO 3) SELECT
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@ -43,7 +43,7 @@ begin
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-- Beware : unprocessed patterns
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accu_0 : 0 0 5 007 1 0 0 0 0 0 1 1 1 1 ?5 ?0 ?0 ?* ?0 ?1 ?1 ?0 1 0 1 0 ;
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accu_0 : 0 0 5 007 1 0 0 0 0 0 1 1 1 1 ?* ?* ?* ?* ?* ?* ?* ?* 1 0 1 0 ;
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: 0 0 5 007 1 0 0 0 1 0 1 1 1 1 ?5 ?0 ?0 ?* ?0 ?1 ?1 ?0 1 0 1 0 ;
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: 0 0 5 007 1 0 0 0 0 0 1 1 1 1 ?5 ?0 ?0 ?* ?0 ?1 ?1 ?0 1 0 1 0 ;
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: 0 0 5 462 1 0 0 0 0 0 ?1 1 ?1 1 ?5 ?0 ?0 ?* ?0 ?1 ?1 ?0 1 0 1 0 ;
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