ENTITY rf2_out_mem IS
PORT (
  busa     : in  BIT;
  busb     : in  BIT;
  xcks     : in  BIT;
  dataouta : out BIT;
  dataoutb : out BIT;
  vdd      : in  BIT;
  vss      : in  BIT
);
END rf2_out_mem;

ARCHITECTURE VBE OF rf2_out_mem IS
  SIGNAL latcha	 : REG_BIT REGISTER;
  SIGNAL latchb	 : REG_BIT REGISTER;

BEGIN
  ASSERT (vdd and not (vss))
  REPORT "power supply is missing on rf2_out_mem"
  SEVERITY WARNING;

  label0 : BLOCK (xcks = '1')
  BEGIN
    latcha <= GUARDED busa;
    latchb <= GUARDED busb;
  END BLOCK label0;

  dataouta <= latcha;
  dataoutb <= latchb;

END;
