ENTITY rom_dec_prech IS
PORT (
  nck    : in  BIT;
  prech  : out BIT;
  nprech : out BIT;
  vdd    : in  BIT;
  vss    : in  BIT
);
END rom_dec_prech;

ARCHITECTURE VBE OF rom_dec_prech IS

BEGIN
  ASSERT (vdd and not (vss))
  REPORT "power supply is missing on rom_dec_prech"
  SEVERITY WARNING;

  prech <= not nck;
  nprech <= not prech;
END;
