ZERO_DP(5)

NAME
zero_dp

SYNOPSIS
GenLib Call :
    LOINS( "zero_dp", "insname", "o", "vdd", "vss", 0L );

DESCRIPTION
VHDL Behavioral description :
-- Interface declaration.
ENTITY  zero_dp  IS
  PORT(
          o :   out     BIT;
        vdd : in        BIT;
        vss : in        BIT
      );
END  zero_dp;
-- Architecture declaration.
ARCHITECTURE  behavior_data_flow  OF  zero_dp  IS
BEGIN
  -- Logical equations.
  o     <= '0';
END  behavior_data_flow;
Physical features :
    Cell wide : 12 lambdas, or 2 pitchs.
Timing characteristics :
    rup    =    0    (ohms)
    rdown    =    2143    (ohms)

SEE ALSO
dplib(1), fpgen(1), scmap(1)