-- VHDL data flow description generated from `np1_dp`
--		date : Thu Oct 30 16:36:38 1997


-- Entity Declaration

ENTITY np1_dp IS
  GENERIC (
    CONSTANT area : NATURAL := 720;	-- area
    CONSTANT transistors : NATURAL := 2;	-- transistors
    CONSTANT cin_i : NATURAL := 68;	-- cin_i
    CONSTANT tplh_i_o : NATURAL := 401;	-- tplh_i_o
    CONSTANT rup_i_o : NATURAL := 1110;	-- rup_i_o
    CONSTANT tphl_i_o : NATURAL := 269;	-- tphl_i_o
    CONSTANT rdown_i_o : NATURAL := 1230	-- rdown_i_o
  );
  PORT (
  i : in BIT;	-- i
  o : out BIT;	-- o
  vdd : in BIT;	-- vdd
  vss : in BIT	-- vss
  );
END np1_dp;


-- Architecture Declaration

ARCHITECTURE behaviour_data_flow OF np1_dp IS

BEGIN
  ASSERT ((vdd and not (vss)) = '1')
    REPORT "power supply is missing on np1_dp"
    SEVERITY WARNING;


o <= not (i);
END;
