entity tie_y is
   port (
      vdd : in      bit;
      vss : in      bit
 );
end tie_y;

architecture structural of tie_y is

entity rowend_x0 is
   port (
      vdd : in      bit;
      vss : in      bit
 );
end b1_y;

architecture structural of b1_y is

begin

u4 : rowend_x0
   port map (
      vdd => vdd,
      vss => vss
   );

end structural;
