SOFA/FPGA1212_SOFA_CHD_PNR/FPGA1212_SOFA_CHD_Verilog/SRC
Ganesh Gore 562641ed4d [SOFA-CHD] Bugfix to fix floating cin net 2020-12-22 00:23:12 -07:00
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lb [SOFA-CHD] Bugfix to fix floating cin net 2020-12-22 00:23:12 -07:00
routing [SOFA_CHD] Added OpenFPGA taks and verilog netlist 2020-12-09 00:49:00 -07:00
sub_module [SOFA-CHD] Updated SOFA-CHD - Updated cells - DRC Clean 2020-12-16 15:00:15 -07:00
InstancesMap.txt [SOFA_CHD] Added OpenFPGA taks and verilog netlist 2020-12-09 00:49:00 -07:00
define_simulation.v [SOFA_CHD] Added OpenFPGA taks and verilog netlist 2020-12-09 00:49:00 -07:00
fabric_netlists.v [SOFA-CHD] Bugfix to fix floating cin net 2020-12-22 00:23:12 -07:00
fpga_core.v [SOFA_CHD] Added OpenFPGA taks and verilog netlist 2020-12-09 00:49:00 -07:00
fpga_defines.v [SOFA_CHD] Added OpenFPGA taks and verilog netlist 2020-12-09 00:49:00 -07:00
fpga_top.v [SOFA_CHD] Added OpenFPGA taks and verilog netlist 2020-12-09 00:49:00 -07:00
top_include_netlists.v [SOFA_CHD] Added OpenFPGA taks and verilog netlist 2020-12-09 00:49:00 -07:00