SOFA/FPGA1212_FLAT_HD_SKY_PNR/modules/lef
Ganesh Gore 20dc203b31 [FPGA1212_v1] Module level results 2020-11-29 11:02:17 -07:00
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cbx_1__0__icv_in_design.lef [FPGA1212_v1] Module level results 2020-11-29 11:02:17 -07:00
cbx_1__1__icv_in_design.lef [FPGA1212_v1] Module level results 2020-11-29 11:02:17 -07:00
cbx_1__2__icv_in_design.lef [FPGA1212_v1] Module level results 2020-11-29 11:02:17 -07:00
cby_0__1__icv_in_design.lef [FPGA1212_v1] Module level results 2020-11-29 11:02:17 -07:00
cby_1__1__icv_in_design.lef [FPGA1212_v1] Module level results 2020-11-29 11:02:17 -07:00
cby_2__1__icv_in_design.lef [FPGA1212_v1] Module level results 2020-11-29 11:02:17 -07:00
sb_0__0__icv_in_design.lef [FPGA1212_v1] Module level results 2020-11-29 11:02:17 -07:00
sb_0__1__icv_in_design.lef [FPGA1212_v1] Module level results 2020-11-29 11:02:17 -07:00
sb_0__2__icv_in_design.lef [FPGA1212_v1] Module level results 2020-11-29 11:02:17 -07:00
sb_1__0__icv_in_design.lef [FPGA1212_v1] Module level results 2020-11-29 11:02:17 -07:00
sb_1__1__icv_in_design.lef [FPGA1212_v1] Module level results 2020-11-29 11:02:17 -07:00
sb_1__2__icv_in_design.lef [FPGA1212_v1] Module level results 2020-11-29 11:02:17 -07:00
sb_2__0__icv_in_design.lef [FPGA1212_v1] Module level results 2020-11-29 11:02:17 -07:00
sb_2__1__icv_in_design.lef [FPGA1212_v1] Module level results 2020-11-29 11:02:17 -07:00
sb_2__2__icv_in_design.lef [FPGA1212_v1] Module level results 2020-11-29 11:02:17 -07:00