tangxifan ce91890a0e [HDL] Now use a proper drive strength of 4 in the digital I/O cells		2020-11-18 11:58:21 -07:00
..
caravel_fpga_wrapper_hd.v	[HDL] Bug fix in the caravel fpga wrapper built with hd cell library	2020-11-18 11:29:37 -07:00
digital_io_behavorial.v	[HDL] Add digitial I/O with protection circuitry	2020-11-17 19:17:48 -07:00
digital_io_hd.v	[HDL] Now use a proper drive strength of 4 in the digital I/O cells	2020-11-18 11:58:21 -07:00
skywater_function_verification.v	[HDL] Add preprocessing flags for running functional verification	2020-11-05 11:29:23 -07:00
wrapper_lines_generator.py	[HDL] Bug fix in the caravel fpga wrapper built with hd cell library	2020-11-18 11:29:37 -07:00