SOFA/SOFA_A/SOFA_A_verilog/sub_module/local_encoder.v

11 lines
317 B
Verilog

//-------------------------------------------
// FPGA Synthesizable Verilog Netlist
// Description: Local Decoders for Multiplexers
// Author: Xifan TANG
// Organization: University of Utah
// Date: Sun Feb 19 10:53:27 2023
//-------------------------------------------
//----- Time scale -----
`timescale 1ns / 1ps