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SOFA/FPGA22_HIER_SKY_PNR/FPGA22_HIER_SKY_Verilog
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Ganesh Gore 72ff141046 [DESIGN] Updated FPGA22 Design 
+ Utilization increased to 60%
+ Added track offset
+ Added Power ring
+ Added Tapcells
+ Added additional reports and screenshot to track improvements
 		2020-10-27 14:54:19 -06:00
..
SRC [Design] Added FPGA22 design with SKY130_FD_SC_HD 2020-10-26 23:59:20 -06:00
TESTBENCH/top [DESIGN] Updated FPGA22 Design 2020-10-27 14:54:19 -06:00
OpenFPGAEngine.info [Design] Added FPGA22 design with SKY130_FD_SC_HD 2020-10-26 23:59:20 -06:00
openfpgashell.log [DESIGN] Updated FPGA22 Design 2020-10-27 14:54:19 -06:00
proj_const.tcl [DESIGN] Updated FPGA22 Design 2020-10-27 14:54:19 -06:00