riscv
/
SOFA
mirror of https://github.com/lnis-uofu/SOFA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
SOFA/HDL
History
tangxifan 9c80a1b1a7 [HDL] Bug fix in the custom cell code generator 2020-12-10 15:45:20 -07:00
..
common [HDL] Bug fix in the custom cell code generator 2020-12-10 15:45:20 -07:00
README.md [Doc] Add readme for HDL directory 2020-11-03 09:23:33 -07:00

README.md

Skywater PDK

This directory contains the HDL netlists for FPGA fabrics that are automatically generated by OpenFPGA. It also includes necessary wrappers to enable the netlist generation. The custom netlists are place in the common directory.