mirror of https://github.com/lnis-uofu/SOFA.git
69 lines
4.4 KiB
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69 lines
4.4 KiB
ReStructuredText
DC and AC Characteristics
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-------------------------
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Each FPGA device contains 37 I/O pins, whose details are summarized in the following tables.
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I/O usage and port information
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. table:: I/O usage and sizes
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+-----------+------------------------------------------------------------------------+-------------+
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| I/O Type | Description | No. of Pins |
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+===========+========================================================================+=============+
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| Data I/O | Datapath I/Os of FPGA fabric | 30 |
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+-----------+------------------------------------------------------------------------+-------------+
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| Clk | Operating clock of FPGA core | 1 |
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+-----------+------------------------------------------------------------------------+-------------+
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| ProgClk | Clock used by configuration protocol to program FPGA fabric | 1 |
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+-----------+------------------------------------------------------------------------+-------------+
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| CCin | Input of configuation protocol to load bitstream | 1 |
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+-----------+------------------------------------------------------------------------+-------------+
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| CCout | Output of configuration protocol to read back bitstream | 1 |
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+-----------+------------------------------------------------------------------------+-------------+
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| TestEn | Activate the test mode of FPGA fabric | 1 |
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+-----------+------------------------------------------------------------------------+-------------+
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| SCin | Input of built-in scan-chain to load data to flip-flops of FPGA fabric | 1 |
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+-----------+------------------------------------------------------------------------+-------------+
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| SCout | Output of built-in scan-chain to read back flip-flops from FPGA fabric | 1 |
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+-----------+------------------------------------------------------------------------+-------------+
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| Total | | 37 |
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+-----------+------------------------------------------------------------------------+-------------+
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Recommended Operating Conditions
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. table:: Recommended Operating Conditions
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+----------+------------------------------+------+------+-------+
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| Symbol | Description | Min | Max | Units |
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+==========+==============================+======+======+=======+
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| VDD_io | Supply voltage for I/Os | TBD | TBD | V |
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+----------+------------------------------+------+------+-------+
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| VDD_core | Supply voltage for FPGA core | TBD | TBD | V |
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+----------+------------------------------+------+------+-------+
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| V_in | Input voltage for other I/Os | TBD | TBD | V |
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+----------+------------------------------+------+------+-------+
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| I_in | Maximum current through pins | N/A | TBD | mA |
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+----------+------------------------------+------+------+-------+
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| f_max | Maximum frequency of I/Os | N/A | TBD | MHz |
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+----------+------------------------------+------+------+-------+
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Typical AC Characteristics
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^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. table:: Typical AC characteristics for FPGA I/Os
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+-----------------+-------------------------------------------+------+------+-------+
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| Symbol | Description | Min | Max | Units |
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+=================+===========================================+======+======+=======+
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| V_in Overshoot | Maximum allowed overshoot voltage for Vin | TBD | TBD | V |
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+-----------------+-------------------------------------------+------+------+-------+
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| V_in Undershoot | Minimum allowed overshoot voltage for Vin | TBD | TBD | V |
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+-----------------+-------------------------------------------+------+------+-------+
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| I_VDD_core | Quiescent VDD_core supply current | TBD | TBD | mA |
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+-----------------+-------------------------------------------+------+------+-------+
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| I_VDD_io | Quiescent VDD_io supply current | TBD | TBD | mA |
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+-----------------+-------------------------------------------+------+------+-------+
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