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k4_non_adder_caravel_io_FPGA_2x2_fdhd_cc/verilog_testbench | ||
k4_non_adder_caravel_io_FPGA_12x12_fdhd_cc/verilog_testbench | ||
README.md |
README.md
Skywater PDK
This directory contains the testbenches for FPGA fabrics that are automatically generated by OpenFPGA or tuned for a specific FPGA fabric. Please keep this directory clean and organize as follows:
- Each testbench should be placed in a separated directory
- READMD is the only file allowed in the directory, others should be sub-directories.