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tangxifan f5d18d33ea [Testbench] Add scan-chain testbench for post-pnr verification 2020-11-18 16:23:37 -07:00
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common [Testbench] Add scan-chain testbench for post-pnr verification 2020-11-18 16:23:37 -07:00
k4_N8_caravel_io_FPGA_2x2_fdhd_cc/postpnr/verilog_testbench [Testbench] Rename post-pnr testbenches to dedicated directories 2020-11-17 13:45:55 -07:00
k4_N8_caravel_io_FPGA_12x12_fdhd_cc [Testbench] Add scan-chain testbench for post-pnr verification 2020-11-18 16:23:37 -07:00
README.md [Doc] Add README to SDC and Testbench directories 2020-11-03 09:27:06 -07:00

README.md

Skywater PDK

This directory contains the testbenches for FPGA fabrics that are automatically generated by OpenFPGA or tuned for a specific FPGA fabric. Please keep this directory clean and organize as follows:

  • Each testbench should be placed in a separated directory
  • READMD is the only file allowed in the directory, others should be sub-directories.