mirror of https://github.com/lnis-uofu/SOFA.git
12 lines
294 B
Verilog
12 lines
294 B
Verilog
module io_tc1 (mux_in, demux_out,mux_sel, demux_sel);
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input [0:511] mux_in;
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input [8:0]mux_sel;
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input [8:0]demux_sel;
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output [511:0]demux_out;
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mux_512x1 mux0 (.in(mux_in),.sel(mux_sel),.out(mux_out));
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demux_1x512 demux0 (.in(mux_out),.sel(demux_sel),.out(demux_out));
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endmodule
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