SOFA/FPGA22_HIER_SKY_PNR/FPGA22_HIER_SKY_Verilog/SRC
Ganesh Gore 229b8e22b4 Fixed scan-chain connections 2020-11-08 01:06:13 -07:00
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lb Fixed scan-chain connections 2020-11-08 01:06:13 -07:00
routing Fixed scan-chain connections 2020-11-08 01:06:13 -07:00
sub_module Updated design with new architecure and merged grid_io 2020-11-06 22:35:31 -07:00
InstancesMap.txt Updated design with new architecure and merged grid_io 2020-11-06 22:35:31 -07:00
define_simulation.v [Design] Added FPGA22 design with SKY130_FD_SC_HD 2020-10-26 23:59:20 -06:00
fabric_netlists.v Updated design with new architecure and merged grid_io 2020-11-06 22:35:31 -07:00
fpga_core.v Fixed scan-chain connections 2020-11-08 01:06:13 -07:00
fpga_defines.v [Design] Added FPGA22 design with SKY130_FD_SC_HD 2020-10-26 23:59:20 -06:00
fpga_top.v Updated design with new architecure and merged grid_io 2020-11-06 22:35:31 -07:00
top_autocheck_top_tb.v Updated design with new architecure and merged grid_io 2020-11-06 22:35:31 -07:00
top_formal_random_top_tb.v Updated design with new architecure and merged grid_io 2020-11-06 22:35:31 -07:00
top_include_netlists.v [Design] Added FPGA22 design with SKY130_FD_SC_HD 2020-10-26 23:59:20 -06:00
top_top_formal_verification.v Updated design with new architecure and merged grid_io 2020-11-06 22:35:31 -07:00