tangxifan 3fb8e425a7 [Script] initial version of setup script		2020-10-09 20:31:13 -06:00
..
openfpga_shell_script	[Script] Now use variables to redirect the output directory of Verilog/SDC files	2020-10-09 16:00:41 -06:00
openfpga_task/k4_cc_fdms_2x2/generate_fabric/config	[Script] initial version of setup script	2020-10-09 20:31:13 -06:00
repo_setup.py	[Script] initial version of setup script	2020-10-09 20:31:13 -06:00