mirror of https://github.com/lnis-uofu/SOFA.git
187 lines
6.9 KiB
C
187 lines
6.9 KiB
C
#ifndef _STRIVE_H_
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#define _STRIVE_H_
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#include <stdint.h>
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#include <stdbool.h>
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// a pointer to this is a null pointer, but the compiler does not
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// know that because "sram" is a linker symbol from sections.lds.
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extern uint32_t sram;
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// Pointer to firmware flash routines
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extern uint32_t flashio_worker_begin;
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extern uint32_t flashio_worker_end;
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// Storage area (MGMT: 0x0100_0000, User: 0x0200_0000)
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#define reg_rw_block0 (*(volatile uint32_t*)0x01000000)
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#define reg_rw_block1 (*(volatile uint32_t*)0x01100000)
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#define reg_ro_block0 (*(volatile uint32_t*)0x02000000)
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// UART (0x2000_0000)
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#define reg_uart_clkdiv (*(volatile uint32_t*)0x20000000)
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#define reg_uart_data (*(volatile uint32_t*)0x20000004)
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#define reg_uart_enable (*(volatile uint32_t*)0x20000008)
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// GPIO (0x2100_0000)
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#define reg_gpio_data (*(volatile uint32_t*)0x21000000)
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#define reg_gpio_ena (*(volatile uint32_t*)0x21000004)
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#define reg_gpio_pu (*(volatile uint32_t*)0x21000008)
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#define reg_gpio_pd (*(volatile uint32_t*)0x2100000c)
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// Logic Analyzer (0x2200_0000)
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#define reg_la0_data (*(volatile uint32_t*)0x25000000)
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#define reg_la1_data (*(volatile uint32_t*)0x25000004)
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#define reg_la2_data (*(volatile uint32_t*)0x25000008)
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#define reg_la3_data (*(volatile uint32_t*)0x2500000c)
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#define reg_la0_ena (*(volatile uint32_t*)0x25000010)
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#define reg_la1_ena (*(volatile uint32_t*)0x25000014)
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#define reg_la2_ena (*(volatile uint32_t*)0x25000018)
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#define reg_la3_ena (*(volatile uint32_t*)0x2500001c)
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// User Project Control (0x2300_0000)
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#define reg_mprj_xfer (*(volatile uint32_t*)0x26000000)
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#define reg_mprj_pwr (*(volatile uint32_t*)0x26000004)
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#define reg_mprj_datal (*(volatile uint32_t*)0x26000008)
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#define reg_mprj_datah (*(volatile uint32_t*)0x2600000c)
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#define reg_mprj_io_0 (*(volatile uint32_t*)0x26000020)
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#define reg_mprj_io_1 (*(volatile uint32_t*)0x26000024)
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#define reg_mprj_io_2 (*(volatile uint32_t*)0x26000028)
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#define reg_mprj_io_3 (*(volatile uint32_t*)0x2600002c)
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#define reg_mprj_io_4 (*(volatile uint32_t*)0x26000030)
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#define reg_mprj_io_5 (*(volatile uint32_t*)0x26000034)
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#define reg_mprj_io_6 (*(volatile uint32_t*)0x26000038)
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#define reg_mprj_io_7 (*(volatile uint32_t*)0x2600003c)
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#define reg_mprj_io_8 (*(volatile uint32_t*)0x26000040)
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#define reg_mprj_io_9 (*(volatile uint32_t*)0x26000044)
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#define reg_mprj_io_10 (*(volatile uint32_t*)0x26000048)
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#define reg_mprj_io_11 (*(volatile uint32_t*)0x2600004c)
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#define reg_mprj_io_12 (*(volatile uint32_t*)0x26000050)
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#define reg_mprj_io_13 (*(volatile uint32_t*)0x26000054)
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#define reg_mprj_io_14 (*(volatile uint32_t*)0x26000058)
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#define reg_mprj_io_15 (*(volatile uint32_t*)0x2600005c)
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#define reg_mprj_io_16 (*(volatile uint32_t*)0x26000060)
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#define reg_mprj_io_17 (*(volatile uint32_t*)0x26000064)
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#define reg_mprj_io_18 (*(volatile uint32_t*)0x26000068)
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#define reg_mprj_io_19 (*(volatile uint32_t*)0x2600006c)
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#define reg_mprj_io_20 (*(volatile uint32_t*)0x26000070)
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#define reg_mprj_io_21 (*(volatile uint32_t*)0x26000074)
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#define reg_mprj_io_22 (*(volatile uint32_t*)0x26000078)
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#define reg_mprj_io_23 (*(volatile uint32_t*)0x2600007c)
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#define reg_mprj_io_24 (*(volatile uint32_t*)0x26000080)
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#define reg_mprj_io_25 (*(volatile uint32_t*)0x26000084)
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#define reg_mprj_io_26 (*(volatile uint32_t*)0x26000088)
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#define reg_mprj_io_27 (*(volatile uint32_t*)0x2600008c)
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#define reg_mprj_io_28 (*(volatile uint32_t*)0x26000090)
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#define reg_mprj_io_29 (*(volatile uint32_t*)0x26000094)
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#define reg_mprj_io_30 (*(volatile uint32_t*)0x26000098)
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#define reg_mprj_io_31 (*(volatile uint32_t*)0x2600009c)
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#define reg_mprj_io_32 (*(volatile uint32_t*)0x260000a0)
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#define reg_mprj_io_33 (*(volatile uint32_t*)0x260000a4)
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#define reg_mprj_io_34 (*(volatile uint32_t*)0x260000a8)
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#define reg_mprj_io_35 (*(volatile uint32_t*)0x260000ac)
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#define reg_mprj_io_36 (*(volatile uint32_t*)0x260000b0)
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#define reg_mprj_io_37 (*(volatile uint32_t*)0x260000b4)
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// User Project Slaves (0x3000_0000)
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#define reg_mprj_slave (*(volatile uint32_t*)0x30000000)
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// Flash Control SPI Configuration (2D00_0000)
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#define reg_spictrl (*(volatile uint32_t*)0x2d000000)
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// Bit fields for Flash SPI control
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#define FLASH_BITBANG_IO0 0x00000001
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#define FLASH_BITBANG_IO1 0x00000002
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#define FLASH_BITBANG_CLK 0x00000010
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#define FLASH_BITBANG_CSB 0x00000020
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#define FLASH_BITBANG_OEB0 0x00000100
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#define FLASH_BITBANG_OEB1 0x00000200
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#define FLASH_ENABLE 0x80000000
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// Counter-Timer 0 Configuration
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#define reg_timer0_config (*(volatile uint32_t*)0x22000000)
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#define reg_timer0_value (*(volatile uint32_t*)0x22000004)
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#define reg_timer0_data (*(volatile uint32_t*)0x22000008)
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// Counter-Timer 1 Configuration
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#define reg_timer1_config (*(volatile uint32_t*)0x23000000)
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#define reg_timer1_value (*(volatile uint32_t*)0x23000004)
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#define reg_timer1_data (*(volatile uint32_t*)0x23000008)
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// Bit fields for Counter-timer configuration
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#define TIMER_ENABLE 0x01
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#define TIMER_ONESHOT 0x02
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#define TIMER_UPCOUNT 0x04
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#define TIMER_CHAIN 0x08
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#define TIMER_IRQ_ENABLE 0x10
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// SPI Master Configuration
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#define reg_spimaster_config (*(volatile uint32_t*)0x24000000)
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#define reg_spimaster_data (*(volatile uint32_t*)0x24000004)
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// Bit fields for SPI master configuration
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#define SPI_MASTER_DIV_MASK 0x00ff
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#define SPI_MASTER_MLB 0x0100
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#define SPI_MASTER_INV_CSB 0x0200
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#define SPI_MASTER_INV_CLK 0x0400
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#define SPI_MASTER_MODE_1 0x0800
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#define SPI_MASTER_STREAM 0x1000
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#define SPI_MASTER_ENABLE 0x2000
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#define SPI_MASTER_IRQ_ENABLE 0x4000
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#define SPI_HOUSEKEEPING_CONN 0x8000
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// System Area (0x2F00_0000)
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#define reg_power_good (*(volatile uint32_t*)0x2F000000)
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#define reg_clk_out_dest (*(volatile uint32_t*)0x2F000004)
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#define reg_trap_out_dest (*(volatile uint32_t*)0x2F000008)
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#define reg_irq_source (*(volatile uint32_t*)0x2F00000C)
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// Bit fields for reg_power_good
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#define USER1_VCCD_POWER_GOOD 0x01
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#define USER2_VCCD_POWER_GOOD 0x02
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#define USER1_VDDA_POWER_GOOD 0x04
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#define USER2_VDDA_POWER_GOOD 0x08
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// Bit fields for reg_clk_out_dest
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#define CLOCK1_MONITOR 0x01
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#define CLOCK2_MONITOR 0x02
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// Bit fields for reg_irq_source
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#define IRQ7_SOURCE 0x01
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#define IRQ8_SOURCE 0x02
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// Individual bit fields for the GPIO pad control
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#define MGMT_ENABLE 0x0001
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#define OUTPUT_DISABLE 0x0002
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#define HOLD_OVERRIDE 0x0004
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#define INPUT_DISABLE 0x0008
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#define MODE_SELECT 0x0010
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#define ANALOG_ENABLE 0x0020
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#define ANALOG_SELECT 0x0040
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#define ANALOG_POLARITY 0x0080
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#define SLOW_SLEW_MODE 0x0100
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#define TRIPPOINT_SEL 0x0200
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#define DIGITAL_MODE_MASK 0x1c00
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// Useful GPIO mode values
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#define GPIO_MODE_MGMT_STD_INPUT_NOPULL 0x0403
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#define GPIO_MODE_MGMT_STD_INPUT_PULLDOWN 0x0803
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#define GPIO_MODE_MGMT_STD_INPUT_PULLUP 0x0c03
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#define GPIO_MODE_MGMT_STD_OUTPUT 0x1809
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#define GPIO_MODE_USER_STD_INPUT_NOPULL 0x0402
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#define GPIO_MODE_USER_STD_INPUT_PULLDOWN 0x0802
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#define GPIO_MODE_USER_STD_INPUT_PULLUP 0x0c02
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#define GPIO_MODE_USER_STD_OUTPUT 0x1808
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// --------------------------------------------------------
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#endif
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